src/mainboard/lippert/frontrunner-af/agesawrapper.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2011 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  18  */
  19
  20 #include "agesawrapper.h"
  21 #include "BiosCallOuts.h"
  22 #include "PlatformGnbPcieComplex.h"
  23
  24 #define __SIMPLE_DEVICE__
  25
  26 #include <arch/acpi.h>
  27 #include <arch/io.h>
  28 #include <cbmem.h>
  29 #include <cpu/x86/msr.h>
  30 #include <cpu/x86/mtrr.h>
  31 #include <stdint.h>
  32 #include <string.h>
  33
  34 #include <cpu/amd/agesa/s3_resume.h>
  35 #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
  36
  37 #define FILECODE UNASSIGNED_FILE_FILECODE
  38
  39 #define MMCONF_ENABLE 1
  40
  41 /* ACPI table pointers returned by AmdInitLate */
  42 VOID *DmiTable          = NULL;
  43 VOID *AcpiPstate        = NULL;
  44 VOID *AcpiSrat          = NULL;
  45 VOID *AcpiSlit          = NULL;
  46
  47 VOID *AcpiWheaMce       = NULL;
  48 VOID *AcpiWheaCmc       = NULL;
  49 VOID *AcpiAlib          = NULL;
  50
  51 /*------------------------------------------------------------------------------
  52  *                              T Y P E D E F S          A N D           S T R U C T U R E S
  53  *------------------------------------------------------------------------------
  54  */
  55
  56 /*------------------------------------------------------------------------------
  57  *      P R O T O T Y P E S              O F             L O C A L               F U N C T I O N S
  58  *------------------------------------------------------------------------------
  59  */
  60
  61 /*------------------------------------------------------------------------------
  62  *                                              E X P O R T E D         F U N C T I O N S
  63  *------------------------------------------------------------------------------
  64  */
  65
  66 /*------------------------------------------------------------------------------
  67  *                                              L O C A L               F U N C T I O N S
  68  *------------------------------------------------------------------------------
  69  */
  70 UINT32
  71 agesawrapper_amdinitcpuio (
  72         VOID
  73         )
  74 {
  75         AGESA_STATUS            Status;
  76         UINT64                          MsrReg;
  77         UINT32                          PciData;
  78         PCI_ADDR                        PciAddress;
  79         AMD_CONFIG_PARAMS       StdHeader;
  80
  81         /* Enable legacy video routing: D18F1xF4 VGA Enable */
  82         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xF4);
  83         PciData = 1;
  84         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
  85
  86         /* The platform BIOS needs to ensure the memory ranges of SB800 legacy
  87          * devices (TPM, HPET, BIOS RAM, Watchdog Timer, I/O APIC and ACPI) are
  88          * set to non-posted regions.
  89          */
  90         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x84);
  91         PciData = 0x00FEDF00; // last address before processor local APIC at FEE00000
  92         PciData |= 1 << 7;              // set NP (non-posted) bit
  93         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
  94         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x80);
  95         PciData = (0xFED00000 >> 8) | 3; // lowest NP address is HPET at FED00000
  96         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
  97
  98         /* Map the remaining PCI hole as posted MMIO */
  99         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x8C);
 100         PciData = 0x00FECF00; // last address before non-posted range
 101         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 102         LibAmdMsrRead (0xC001001A, &MsrReg, &StdHeader);
 103         MsrReg = (MsrReg >> 8) | 3;
 104         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0x88);
 105         PciData = (UINT32)MsrReg;
 106         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 107
 108         /* Send all IO (0000-FFFF) to southbridge. */
 109         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xC4);
 110         PciData = 0x0000F000;
 111         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 112         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 1, 0xC0);
 113         PciData = 0x00000003;
 114         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 115         Status = AGESA_SUCCESS;
 116         return (UINT32)Status;
 117 }
 118
 119 UINT32
 120 agesawrapper_amdinitmmio (
 121         VOID
 122         )
 123 {
 124         AGESA_STATUS            Status;
 125         UINT64                          MsrReg;
 126         UINT32                          PciData;
 127         PCI_ADDR                        PciAddress;
 128         AMD_CONFIG_PARAMS       StdHeader;
 129
 130         UINT8                           BusRangeVal = 0;
 131         UINT8                           BusNum;
 132         UINT8                           Index;
 133
 134         /*
 135          Set the MMIO Configuration Base Address and Bus Range onto MMIO configuration base
 136          Address MSR register.
 137         */
 138
 139         for (Index = 0; Index < 8; Index++) {
 140                 BusNum = CONFIG_MMCONF_BUS_NUMBER >> Index;
 141                 if (BusNum == 1) {
 142                         BusRangeVal = Index;
 143                         break;
 144                 }
 145         }
 146
 147         MsrReg = (CONFIG_MMCONF_BASE_ADDRESS | (UINT64)(BusRangeVal << 2) | MMCONF_ENABLE);
 148         LibAmdMsrWrite (0xC0010058, &MsrReg, &StdHeader);
 149
 150         /*
 151          Set the NB_CFG MSR register. Enable CF8 extended configuration cycles.
 152         */
 153         LibAmdMsrRead (0xC001001F, &MsrReg, &StdHeader);
 154         MsrReg = MsrReg | 0x0000400000000000ull;
 155         LibAmdMsrWrite (0xC001001F, &MsrReg, &StdHeader);
 156
 157         /* Set Ontario Link Data */
 158         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0xE0);
 159         PciData = 0x01308002;
 160         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 161         PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0, 0, 0xE4);
 162         PciData = (AMD_APU_SSID<<0x10)|AMD_APU_SVID;
 163         LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
 164
 165         Status = AGESA_SUCCESS;
 166         return (UINT32)Status;
 167 }
 168
 169 UINT32
 170 agesawrapper_amdinitreset (
 171         VOID
 172         )
 173 {
 174         AGESA_STATUS status;
 175         AMD_INTERFACE_PARAMS AmdParamStruct;
 176         AMD_RESET_PARAMS AmdResetParams;
 177
 178         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 179         memset(&AmdResetParams, 0, sizeof(AMD_RESET_PARAMS));
 180
 181         AmdParamStruct.AgesaFunctionName = AMD_INIT_RESET;
 182         AmdParamStruct.AllocationMethod = ByHost;
 183         AmdParamStruct.NewStructSize = sizeof(AMD_RESET_PARAMS);
 184         AmdParamStruct.NewStructPtr = &AmdResetParams;
 185         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 186         AmdParamStruct.StdHeader.CalloutPtr = NULL;
 187         AmdParamStruct.StdHeader.Func = 0;
 188         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 189         AmdCreateStruct (&AmdParamStruct);
 190         AmdResetParams.HtConfig.Depth = 0;
 191
 192         status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
 193         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
 194         AmdReleaseStruct (&AmdParamStruct);
 195         return (UINT32)status;
 196 }
 197
 198 UINT32
 199 agesawrapper_amdinitearly (
 200         VOID
 201         )
 202 {
 203         AGESA_STATUS status;
 204         AMD_INTERFACE_PARAMS AmdParamStruct;
 205         AMD_EARLY_PARAMS                 *AmdEarlyParamsPtr;
 206
 207         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 208
 209         AmdParamStruct.AgesaFunctionName = AMD_INIT_EARLY;
 210         AmdParamStruct.AllocationMethod = PreMemHeap;
 211         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 212         AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 213         AmdParamStruct.StdHeader.Func = 0;
 214         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 215         AmdCreateStruct (&AmdParamStruct);
 216
 217         AmdEarlyParamsPtr = (AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr;
 218         OemCustomizeInitEarly (AmdEarlyParamsPtr);
 219
 220         status = AmdInitEarly ((AMD_EARLY_PARAMS *)AmdParamStruct.NewStructPtr);
 221         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
 222         AmdReleaseStruct (&AmdParamStruct);
 223
 224         return (UINT32)status;
 225 }
 226
 227 UINT32 GetHeapBase(
 228         AMD_CONFIG_PARAMS *StdHeader
 229         )
 230 {
 231         UINT32 heap;
 232
 233 #if CONFIG_HAVE_ACPI_RESUME
 234         /* Both romstage and ramstage has this S3 detect. */
 235         if (acpi_get_sleep_type() == 3)
 236                 heap = (UINT32)cbmem_find(CBMEM_ID_RESUME_SCRATCH) + (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE); /* himem_heap_base + high_stack_size */
 237         else
 238 #endif
 239                 heap = BIOS_HEAP_START_ADDRESS; /* low mem */
 240
 241         return heap;
 242 }
 243
 244 UINT32
 245 agesawrapper_amdinitpost (
 246         VOID
 247         )
 248 {
 249         AGESA_STATUS status;
 250         UINT16                                  i;
 251         UINT32                                  *HeadPtr;
 252         AMD_INTERFACE_PARAMS    AmdParamStruct;
 253         BIOS_HEAP_MANAGER               *BiosManagerPtr;
 254
 255         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 256
 257         AmdParamStruct.AgesaFunctionName = AMD_INIT_POST;
 258         AmdParamStruct.AllocationMethod = PreMemHeap;
 259         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 260         AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 261         AmdParamStruct.StdHeader.Func = 0;
 262         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 263
 264         AmdCreateStruct (&AmdParamStruct);
 265         status = AmdInitPost ((AMD_POST_PARAMS *)AmdParamStruct.NewStructPtr);
 266         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
 267         AmdReleaseStruct (&AmdParamStruct);
 268
 269         /* Initialize heap space */
 270         BiosManagerPtr = (BIOS_HEAP_MANAGER *)GetHeapBase(&AmdParamStruct.StdHeader);
 271
 272         HeadPtr = (UINT32 *) ((UINT8 *) BiosManagerPtr + sizeof (BIOS_HEAP_MANAGER));
 273         for (i = 0; i < ((BIOS_HEAP_SIZE/4) - (sizeof (BIOS_HEAP_MANAGER)/4)); i++) {
 274                 *HeadPtr = 0x00000000;
 275                 HeadPtr++;
 276         }
 277         BiosManagerPtr->StartOfAllocatedNodes = 0;
 278         BiosManagerPtr->StartOfFreedNodes = 0;
 279
 280         return (UINT32)status;
 281 }
 282
 283 UINT32
 284 agesawrapper_amdinitenv (
 285         VOID
 286         )
 287 {
 288         AGESA_STATUS status;
 289         AMD_INTERFACE_PARAMS AmdParamStruct;
 290         PCI_ADDR                         PciAddress;
 291         UINT32                           PciValue;
 292
 293         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 294
 295         AmdParamStruct.AgesaFunctionName = AMD_INIT_ENV;
 296         AmdParamStruct.AllocationMethod = PostMemDram;
 297         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 298         AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 299         AmdParamStruct.StdHeader.Func = 0;
 300         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 301         AmdCreateStruct (&AmdParamStruct);
 302         status = AmdInitEnv ((AMD_ENV_PARAMS *)AmdParamStruct.NewStructPtr);
 303         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
 304         /* Initialize Subordinate Bus Number and Secondary Bus Number
 305          * In platform BIOS this address is allocated by PCI enumeration code
 306                  Modify D1F0x18
 307          */
 308         PciAddress.Address.Bus = 0;
 309         PciAddress.Address.Device = 1;
 310         PciAddress.Address.Function = 0;
 311         PciAddress.Address.Register = 0x18;
 312         /* Write to D1F0x18 */
 313         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 314         PciValue |= 0x00010100;
 315         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 316
 317         /* Initialize GMM Base Address for Legacy Bridge Mode
 318         *       Modify B1D5F0x18
 319         */
 320         PciAddress.Address.Bus = 1;
 321         PciAddress.Address.Device = 5;
 322         PciAddress.Address.Function = 0;
 323         PciAddress.Address.Register = 0x18;
 324
 325         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 326         PciValue |= 0x96000000;
 327         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 328
 329         /* Initialize FB Base Address for Legacy Bridge Mode
 330         * Modify B1D5F0x10
 331         */
 332         PciAddress.Address.Register = 0x10;
 333         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 334         PciValue |= 0x80000000;
 335         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 336
 337         /* Initialize GMM Base Address for Pcie Mode
 338         *       Modify B0D1F0x18
 339         */
 340         PciAddress.Address.Bus = 0;
 341         PciAddress.Address.Device = 1;
 342         PciAddress.Address.Function = 0;
 343         PciAddress.Address.Register = 0x18;
 344
 345         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 346         PciValue |= 0x96000000;
 347         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 348
 349         /* Initialize FB Base Address for Pcie Mode
 350         *       Modify B0D1F0x10
 351         */
 352         PciAddress.Address.Register = 0x10;
 353         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 354         PciValue |= 0x80000000;
 355         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 356
 357         /* Initialize MMIO Base and Limit Address
 358         *       Modify B0D1F0x20
 359         */
 360         PciAddress.Address.Bus = 0;
 361         PciAddress.Address.Device = 1;
 362         PciAddress.Address.Function = 0;
 363         PciAddress.Address.Register = 0x20;
 364
 365         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 366         PciValue |= 0x96009600;
 367         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 368
 369         /* Initialize MMIO Prefetchable Memory Limit and Base
 370         *       Modify B0D1F0x24
 371         */
 372         PciAddress.Address.Register = 0x24;
 373         LibAmdPciRead (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 374         PciValue |= 0x8FF18001;
 375         LibAmdPciWrite (AccessWidth32, PciAddress, &PciValue, &AmdParamStruct.StdHeader);
 376         AmdReleaseStruct (&AmdParamStruct);
 377
 378         return (UINT32)status;
 379 }
 380
 381 VOID *
 382 agesawrapper_getlateinitptr (
 383         int pick
 384         )
 385 {
 386         switch (pick) {
 387                 case PICK_DMI:
 388                         return DmiTable;
 389                 case PICK_PSTATE:
 390                         return AcpiPstate;
 391                 case PICK_SRAT:
 392                         return AcpiSrat;
 393                 case PICK_SLIT:
 394                         return AcpiSlit;
 395                 case PICK_WHEA_MCE:
 396                         return AcpiWheaMce;
 397                 case PICK_WHEA_CMC:
 398                         return AcpiWheaCmc;
 399                 case PICK_ALIB:
 400                         return AcpiAlib;
 401                 default:
 402                         return NULL;
 403         }
 404 }
 405
 406 UINT32
 407 agesawrapper_amdinitmid (
 408         VOID
 409         )
 410 {
 411         AGESA_STATUS status;
 412         AMD_INTERFACE_PARAMS AmdParamStruct;
 413
 414         /* Enable MMIO on AMD CPU Address Map Controller */
 415         agesawrapper_amdinitcpuio ();
 416
 417         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 418
 419         AmdParamStruct.AgesaFunctionName = AMD_INIT_MID;
 420         AmdParamStruct.AllocationMethod = PostMemDram;
 421         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 422         AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 423         AmdParamStruct.StdHeader.Func = 0;
 424         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 425
 426         AmdCreateStruct (&AmdParamStruct);
 427
 428         status = AmdInitMid ((AMD_MID_PARAMS *)AmdParamStruct.NewStructPtr);
 429         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
 430         AmdReleaseStruct (&AmdParamStruct);
 431
 432         return (UINT32)status;
 433 }
 434
 435 UINT32
 436 agesawrapper_amdinitlate (
 437         VOID
 438         )
 439 {
 440         AGESA_STATUS Status;
 441         AMD_INTERFACE_PARAMS AmdParamStruct;
 442         AMD_LATE_PARAMS * AmdLateParamsPtr;
 443
 444         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 445
 446         AmdParamStruct.AgesaFunctionName = AMD_INIT_LATE;
 447         AmdParamStruct.AllocationMethod = PostMemDram;
 448         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 449         AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 450         AmdParamStruct.StdHeader.Func = 0;
 451         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 452
 453         AmdCreateStruct (&AmdParamStruct);
 454         AmdLateParamsPtr = (AMD_LATE_PARAMS *) AmdParamStruct.NewStructPtr;
 455
 456         printk (BIOS_DEBUG, "agesawrapper_amdinitlate: AmdLateParamsPtr = %X\n", (u32)AmdLateParamsPtr);
 457
 458         Status = AmdInitLate (AmdLateParamsPtr);
 459         if (Status != AGESA_SUCCESS) {
 460                 agesawrapper_amdreadeventlog();
 461                 ASSERT(Status == AGESA_SUCCESS);
 462         }
 463
 464         DmiTable    = AmdLateParamsPtr->DmiTable;
 465         AcpiPstate  = AmdLateParamsPtr->AcpiPState;
 466         AcpiSrat    = AmdLateParamsPtr->AcpiSrat;
 467         AcpiSlit    = AmdLateParamsPtr->AcpiSlit;
 468         AcpiWheaMce = AmdLateParamsPtr->AcpiWheaMce;
 469         AcpiWheaCmc = AmdLateParamsPtr->AcpiWheaCmc;
 470         AcpiAlib    = AmdLateParamsPtr->AcpiAlib;
 471
 472         printk(BIOS_DEBUG, "In %s, AGESA generated ACPI tables:\n"
 473                 "   DmiTable:%p\n   AcpiPstate: %p\n   AcpiSrat:%p\n   AcpiSlit:%p\n"
 474                 "   Mce:%p\n   Cmc:%p\n   Alib:%p\n",
 475                  __func__, DmiTable, AcpiPstate, AcpiSrat, AcpiSlit,
 476                  AcpiWheaMce, AcpiWheaCmc, AcpiAlib);
 477
 478         /* Don't release the structure until coreboot has copied the ACPI tables.
 479          * AmdReleaseStruct (&AmdLateParams);
 480          */
 481
 482         return (UINT32)Status;
 483 }
 484
 485 #if CONFIG_HAVE_ACPI_RESUME
 486 UINT32
 487 agesawrapper_amdinitresume (
 488   VOID
 489   )
 490 {
 491         AGESA_STATUS status;
 492         AMD_INTERFACE_PARAMS AmdParamStruct;
 493         AMD_RESUME_PARAMS     *AmdResumeParamsPtr;
 494         S3_DATA_TYPE            S3DataType;
 495
 496         memset(&AmdParamStruct, 0, sizeof(AMD_INTERFACE_PARAMS));
 497
 498         AmdParamStruct.AgesaFunctionName = AMD_INIT_RESUME;
 499         AmdParamStruct.AllocationMethod = PreMemHeap;
 500         AmdParamStruct.StdHeader.AltImageBasePtr = 0;
 501         AmdParamStruct.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 502         AmdParamStruct.StdHeader.Func = 0;
 503         AmdParamStruct.StdHeader.ImageBasePtr = 0;
 504         AmdCreateStruct (&AmdParamStruct);
 505
 506         AmdResumeParamsPtr = (AMD_RESUME_PARAMS *)AmdParamStruct.NewStructPtr;
 507
 508         AmdResumeParamsPtr->S3DataBlock.NvStorageSize = 0;
 509         AmdResumeParamsPtr->S3DataBlock.VolatileStorageSize = 0;
 510         S3DataType = S3DataTypeNonVolatile;
 511
 512         OemAgesaGetS3Info (S3DataType,
 513                            (u32 *) &AmdResumeParamsPtr->S3DataBlock.NvStorageSize,
 514                            (void **) &AmdResumeParamsPtr->S3DataBlock.NvStorage);
 515
 516         status = AmdInitResume ((AMD_RESUME_PARAMS *)AmdParamStruct.NewStructPtr);
 517
 518         if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog();
 519         AmdReleaseStruct (&AmdParamStruct);
 520
 521         return (UINT32)status;
 522 }
 523
 524 UINT32
 525 agesawrapper_amds3laterestore (
 526   VOID
 527   )
 528 {
 529         AGESA_STATUS Status;
 530         AMD_INTERFACE_PARAMS    AmdInterfaceParams;
 531         AMD_S3LATE_PARAMS       AmdS3LateParams;
 532         AMD_S3LATE_PARAMS       *AmdS3LateParamsPtr;
 533         S3_DATA_TYPE          S3DataType;
 534
 535         memset(&AmdS3LateParams, 0, sizeof(AMD_S3LATE_PARAMS));
 536
 537         AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
 538         AmdInterfaceParams.AllocationMethod = ByHost;
 539         AmdInterfaceParams.AgesaFunctionName = AMD_S3LATE_RESTORE;
 540         AmdInterfaceParams.NewStructPtr = &AmdS3LateParams;
 541         AmdInterfaceParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 542         AmdS3LateParamsPtr = &AmdS3LateParams;
 543         AmdInterfaceParams.NewStructSize = sizeof (AMD_S3LATE_PARAMS);
 544
 545         AmdCreateStruct (&AmdInterfaceParams);
 546
 547         AmdS3LateParamsPtr->S3DataBlock.VolatileStorageSize = 0;
 548         S3DataType = S3DataTypeVolatile;
 549
 550         OemAgesaGetS3Info (S3DataType,
 551                            (u32 *) &AmdS3LateParamsPtr->S3DataBlock.VolatileStorageSize,
 552                            (void **) &AmdS3LateParamsPtr->S3DataBlock.VolatileStorage);
 553
 554         Status = AmdS3LateRestore (AmdS3LateParamsPtr);
 555         if (Status != AGESA_SUCCESS) {
 556                 agesawrapper_amdreadeventlog();
 557                 ASSERT(Status == AGESA_SUCCESS);
 558         }
 559
 560         return (UINT32)Status;
 561 }
 562
 563 #ifndef __PRE_RAM__
 564 UINT32
 565 agesawrapper_amdS3Save (
 566         VOID
 567         )
 568 {
 569         AGESA_STATUS Status;
 570         AMD_S3SAVE_PARAMS *AmdS3SaveParamsPtr;
 571         AMD_INTERFACE_PARAMS  AmdInterfaceParams;
 572         S3_DATA_TYPE          S3DataType;
 573
 574         memset(&AmdInterfaceParams, 0, sizeof(AMD_INTERFACE_PARAMS));
 575
 576         AmdInterfaceParams.StdHeader.ImageBasePtr = 0;
 577         AmdInterfaceParams.StdHeader.HeapStatus = HEAP_SYSTEM_MEM;
 578         AmdInterfaceParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 579         AmdInterfaceParams.AllocationMethod = PostMemDram;
 580         AmdInterfaceParams.AgesaFunctionName = AMD_S3_SAVE;
 581         AmdInterfaceParams.StdHeader.AltImageBasePtr = 0;
 582         AmdInterfaceParams.StdHeader.Func = 0;
 583         AmdCreateStruct(&AmdInterfaceParams);
 584
 585         AmdS3SaveParamsPtr = (AMD_S3SAVE_PARAMS *)AmdInterfaceParams.NewStructPtr;
 586         AmdS3SaveParamsPtr->StdHeader = AmdInterfaceParams.StdHeader;
 587
 588         Status = AmdS3Save (AmdS3SaveParamsPtr);
 589         if (Status != AGESA_SUCCESS) {
 590                 agesawrapper_amdreadeventlog();
 591                 ASSERT(Status == AGESA_SUCCESS);
 592         }
 593
 594         S3DataType = S3DataTypeNonVolatile;
 595
 596         Status = OemAgesaSaveS3Info (
 597                 S3DataType,
 598                 AmdS3SaveParamsPtr->S3DataBlock.NvStorageSize,
 599                 AmdS3SaveParamsPtr->S3DataBlock.NvStorage);
 600
 601         if (AmdS3SaveParamsPtr->S3DataBlock.VolatileStorageSize != 0) {
 602                 S3DataType = S3DataTypeVolatile;
 603
 604                 Status = OemAgesaSaveS3Info (
 605                         S3DataType,
 606                         AmdS3SaveParamsPtr->S3DataBlock.VolatileStorageSize,
 607                         AmdS3SaveParamsPtr->S3DataBlock.VolatileStorage
 608                         );
 609         }
 610
 611         OemAgesaSaveMtrr();
 612         AmdReleaseStruct (&AmdInterfaceParams);
 613
 614         return (UINT32)Status;
 615 }
 616 #endif  /* #ifndef __PRE_RAM__ */
 617 #endif  /* CONFIG_HAVE_ACPI_RESUME */
 618
 619 UINT32
 620 agesawrapper_amdlaterunaptask (
 621         UINT32 Func,
 622         UINT32 Data,
 623         VOID *ConfigPtr
 624         )
 625 {
 626         AGESA_STATUS Status;
 627         AP_EXE_PARAMS ApExeParams;
 628
 629         memset(&ApExeParams, 0, sizeof(AP_EXE_PARAMS));
 630
 631         ApExeParams.StdHeader.AltImageBasePtr = 0;
 632         ApExeParams.StdHeader.CalloutPtr = (CALLOUT_ENTRY) &GetBiosCallout;
 633         ApExeParams.StdHeader.Func = 0;
 634         ApExeParams.StdHeader.ImageBasePtr = 0;
 635         ApExeParams.FunctionNumber = Func;
 636         ApExeParams.RelatedDataBlock = ConfigPtr;
 637
 638         Status = AmdLateRunApTask (&ApExeParams);
 639         if (Status != AGESA_SUCCESS) {
 640                 agesawrapper_amdreadeventlog();
 641                 ASSERT(Status == AGESA_SUCCESS);
 642         }
 643
 644         return (UINT32)Status;
 645 }
 646
 647 UINT32
 648 agesawrapper_amdreadeventlog (
 649         VOID
 650         )
 651 {
 652         AGESA_STATUS Status;
 653         EVENT_PARAMS AmdEventParams;
 654
 655         memset(&AmdEventParams, 0, sizeof(EVENT_PARAMS));
 656
 657         AmdEventParams.StdHeader.AltImageBasePtr = 0;
 658         AmdEventParams.StdHeader.CalloutPtr = NULL;
 659         AmdEventParams.StdHeader.Func = 0;
 660         AmdEventParams.StdHeader.ImageBasePtr = 0;
 661         Status = AmdReadEventLog (&AmdEventParams);
 662         while (AmdEventParams.EventClass != 0) {
 663                 printk(BIOS_DEBUG,"\nEventLog:  EventClass = %lx, EventInfo = %lx.\n",AmdEventParams.EventClass,AmdEventParams.EventInfo);
 664                 printk(BIOS_DEBUG,"     Param1 = %lx, Param2 = %lx.\n",AmdEventParams.DataParam1,AmdEventParams.DataParam2);
 665                 printk(BIOS_DEBUG,"     Param3 = %lx, Param4 = %lx.\n",AmdEventParams.DataParam3,AmdEventParams.DataParam4);
 666                 Status = AmdReadEventLog (&AmdEventParams);
 667         }
 668
 669         return (UINT32)Status;
 670 }