1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/drivers/pcmcia/soc_common.h
5 * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
7 * This file contains definitions for the PCMCIA support code common to
8 * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
10 #ifndef _ASM_ARCH_PCMCIA
11 #define _ASM_ARCH_PCMCIA
13 /* include the world */
14 #include <linux/clk.h>
15 #include <linux/cpufreq.h>
16 #include <pcmcia/ss.h>
17 #include <pcmcia/cistpl.h>
22 struct pcmcia_low_level
;
25 struct soc_pcmcia_regulator
{
26 struct regulator
*reg
;
31 * This structure encapsulates per-socket state which we might need to
32 * use when responding to a Card Services query of some kind.
34 struct soc_pcmcia_socket
{
35 struct pcmcia_socket socket
;
38 * Info from low level handler
46 const struct pcmcia_low_level
*ops
;
49 socket_state_t cs_state
;
51 unsigned short spd_io
[MAX_IO_WIN
];
52 unsigned short spd_mem
[MAX_WIN
];
53 unsigned short spd_attr
[MAX_WIN
];
55 struct resource res_skt
;
56 struct resource res_io
;
57 struct resource res_mem
;
58 struct resource res_attr
;
59 void __iomem
*virt_io
;
63 struct gpio_desc
*desc
;
67 #define SOC_STAT_CD 0 /* Card detect */
68 #define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */
69 #define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */
70 #define SOC_STAT_RDY 3 /* Ready / Interrupt */
71 #define SOC_STAT_VS1 4 /* Voltage sense 1 */
72 #define SOC_STAT_VS2 5 /* Voltage sense 2 */
74 struct gpio_desc
*gpio_reset
;
75 struct gpio_desc
*gpio_bus_enable
;
76 struct soc_pcmcia_regulator vcc
;
77 struct soc_pcmcia_regulator vpp
;
79 unsigned int irq_state
;
81 #ifdef CONFIG_CPU_FREQ
82 struct notifier_block cpufreq_nb
;
84 struct timer_list poll_timer
;
85 struct list_head node
;
91 struct soc_pcmcia_socket skt
[0];
104 struct pcmcia_low_level
{
105 struct module
*owner
;
107 /* first socket in system */
112 int (*hw_init
)(struct soc_pcmcia_socket
*);
113 void (*hw_shutdown
)(struct soc_pcmcia_socket
*);
115 void (*socket_state
)(struct soc_pcmcia_socket
*, struct pcmcia_state
*);
116 int (*configure_socket
)(struct soc_pcmcia_socket
*, const socket_state_t
*);
119 * Enable card status IRQs on (re-)initialisation. This can
120 * be called at initialisation, power management event, or
123 void (*socket_init
)(struct soc_pcmcia_socket
*);
126 * Disable card status IRQs and PCMCIA bus on suspend.
128 void (*socket_suspend
)(struct soc_pcmcia_socket
*);
131 * Hardware specific timing routines.
132 * If provided, the get_timing routine overrides the SOC default.
134 unsigned int (*get_timing
)(struct soc_pcmcia_socket
*, unsigned int, unsigned int);
135 int (*set_timing
)(struct soc_pcmcia_socket
*);
136 int (*show_timing
)(struct soc_pcmcia_socket
*, char *);
138 #ifdef CONFIG_CPU_FREQ
142 int (*frequency_change
)(struct soc_pcmcia_socket
*, unsigned long, struct cpufreq_freqs
*);
147 struct soc_pcmcia_timing
{
153 extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket
*, struct soc_pcmcia_timing
*);
155 void soc_pcmcia_init_one(struct soc_pcmcia_socket
*skt
,
156 const struct pcmcia_low_level
*ops
, struct device
*dev
);
157 void soc_pcmcia_remove_one(struct soc_pcmcia_socket
*skt
);
158 int soc_pcmcia_add_one(struct soc_pcmcia_socket
*skt
);
159 int soc_pcmcia_request_gpiods(struct soc_pcmcia_socket
*skt
);
161 void soc_common_cf_socket_state(struct soc_pcmcia_socket
*skt
,
162 struct pcmcia_state
*state
);
164 int soc_pcmcia_regulator_set(struct soc_pcmcia_socket
*skt
,
165 struct soc_pcmcia_regulator
*r
, int v
);
167 #ifdef CONFIG_PCMCIA_DEBUG
169 extern void soc_pcmcia_debug(struct soc_pcmcia_socket
*skt
, const char *func
,
170 int lvl
, const char *fmt
, ...);
172 #define debug(skt, lvl, fmt, arg...) \
173 soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
176 #define debug(skt, lvl, fmt, arg...) do { } while (0)
181 * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
182 * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
183 * a minimum value of 165ns, as well. Section 4.7.2 (describing
184 * common and attribute memory write timing) says that twWE has a
185 * minimum value of 150ns for a 250ns cycle time (for 5V operation;
186 * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
187 * operation, also section 4.7.4). Section 4.7.3 says that taOE
188 * has a maximum value of 150ns for a 300ns cycle time (for 5V
189 * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
191 * When configuring memory maps, Card Services appears to adopt the policy
192 * that a memory access time of "0" means "use the default." The default
193 * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
194 * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
195 * memory command width time is 300ns.
197 #define SOC_PCMCIA_IO_ACCESS (165)
198 #define SOC_PCMCIA_5V_MEM_ACCESS (150)
199 #define SOC_PCMCIA_3V_MEM_ACCESS (300)
200 #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
203 * The socket driver actually works nicely in interrupt-driven form,
204 * so the (relatively infrequent) polling is "just to be sure."
206 #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
209 /* I/O pins replacing memory pins
210 * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
212 * These signals change meaning when going from memory-only to
213 * memory-or-I/O interface:
215 #define iostschg bvd1