Makefile

   1 LEVEL = ../..
   2 DIRS := include lib tools docs
   3
   4 PARALLEL_DIRS :=
   5
   6 ifeq ($(BUILD_EXAMPLES),1)
   7   PARALLEL_DIRS += examples
   8 endif
   9
  10 include $(LEVEL)/Makefile.common
  11
  12 ifneq ($(PROJ_SRC_ROOT),$(PROJ_OBJ_ROOT))
  13 $(RecursiveTargets)::
  14         $(Verb) if [ ! -f test/Makefile ]; then \
  15           $(MKDIR) test; \
  16           $(CP) $(PROJ_SRC_DIR)/test/Makefile test/Makefile; \
  17         fi
  18 endif
  19
  20 test::
  21         @ $(MAKE) -C test
  22
  23 report::
  24         @ $(MAKE) -C test report
  25
  26 clean::
  27         @ $(MAKE) -C test clean
  28
  29 tags::
  30         $(Verb) etags `find . -type f -name '*.h' -or -name '*.cpp' | \
  31           grep -v /lib/Headers | grep -v /test/`
  32
  33 cscope.files:
  34         find tools lib include -name '*.cpp' \
  35                             -or -name '*.def' \
  36                             -or -name '*.td' \
  37                             -or -name '*.h' > cscope.files
  38
  39 .PHONY: test report clean cscope.files