1 //===--- CGRecordLayout.h - LLVM Record Layout Information ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef CLANG_CODEGEN_CGRECORDLAYOUT_H
11 #define CLANG_CODEGEN_CGRECORDLAYOUT_H
13 #include "llvm/ADT/DenseMap.h"
14 #include "llvm/DerivedTypes.h"
15 #include "clang/AST/Decl.h"
24 /// \brief Helper object for describing how to generate the code for access to a
27 /// This structure is intended to describe the "policy" of how the bit-field
28 /// should be accessed, which may be target, language, or ABI dependent.
29 class CGBitFieldInfo
{
31 /// Descriptor for a single component of a bit-field access. The entire
32 /// bit-field is constituted of a bitwise OR of all of the individual
35 /// Each component describes an accessed value, which is how the component
36 /// should be transferred to/from memory, and a target placement, which is how
37 /// that component fits into the constituted bit-field. The pseudo-IR for a
40 /// %0 = gep %base, 0, FieldIndex
41 /// %1 = gep (i8*) %0, FieldByteOffset
42 /// %2 = (i(AccessWidth) *) %1
43 /// %3 = load %2, align AccessAlignment
44 /// %4 = shr %3, FieldBitStart
46 /// and the composed bit-field is formed as the boolean OR of all accesses,
47 /// masked to TargetBitWidth bits and shifted to TargetBitOffset.
49 /// Offset of the field to load in the LLVM structure, if any.
52 /// Byte offset from the field address, if any. This should generally be
53 /// unused as the cleanest IR comes from having a well-constructed LLVM type
54 /// with proper GEP instructions, but sometimes its use is required, for
55 /// example if an access is intended to straddle an LLVM field boundary.
56 unsigned FieldByteOffset
;
58 /// Bit offset in the accessed value to use. The width is implied by \see
60 unsigned FieldBitStart
;
62 /// Bit width of the memory access to perform.
65 /// The alignment of the memory access, or 0 if the default alignment should
68 // FIXME: Remove use of 0 to encode default, instead have IRgen do the right
69 // thing when it generates the code, if avoiding align directives is
71 unsigned AccessAlignment
;
73 /// Offset for the target value.
74 unsigned TargetBitOffset
;
76 /// Number of bits in the access that are destined for the bit-field.
77 unsigned TargetBitWidth
;
81 /// The components to use to access the bit-field. We may need up to three
82 /// separate components to support up to i64 bit-field access (4 + 2 + 1 byte
85 // FIXME: De-hardcode this, just allocate following the struct.
86 AccessInfo Components
[3];
88 /// The total size of the bit-field, in bits.
91 /// The number of access components to use.
92 unsigned NumComponents
;
94 /// Whether the bit-field is signed.
98 CGBitFieldInfo(unsigned Size
, unsigned NumComponents
, AccessInfo
*_Components
,
99 bool IsSigned
) : Size(Size
), NumComponents(NumComponents
),
101 assert(NumComponents
<= 3 && "invalid number of components!");
102 for (unsigned i
= 0; i
!= NumComponents
; ++i
)
103 Components
[i
] = _Components
[i
];
105 // Check some invariants.
106 unsigned AccessedSize
= 0;
107 for (unsigned i
= 0, e
= getNumComponents(); i
!= e
; ++i
) {
108 const AccessInfo
&AI
= getComponent(i
);
109 AccessedSize
+= AI
.TargetBitWidth
;
111 // We shouldn't try to load 0 bits.
112 assert(AI
.TargetBitWidth
> 0);
114 // We can't load more bits than we accessed.
115 assert(AI
.FieldBitStart
+ AI
.TargetBitWidth
<= AI
.AccessWidth
);
117 // We shouldn't put any bits outside the result size.
118 assert(AI
.TargetBitWidth
+ AI
.TargetBitOffset
<= Size
);
121 // Check that the total number of target bits matches the total bit-field
123 assert(AccessedSize
== Size
&& "Total size does not match accessed size!");
127 /// \brief Check whether this bit-field access is (i.e., should be sign
128 /// extended on loads).
129 bool isSigned() const { return IsSigned
; }
131 /// \brief Get the size of the bit-field, in bits.
132 unsigned getSize() const { return Size
; }
134 /// @name Component Access
137 unsigned getNumComponents() const { return NumComponents
; }
139 const AccessInfo
&getComponent(unsigned Index
) const {
140 assert(Index
< getNumComponents() && "Invalid access!");
141 return Components
[Index
];
146 void print(llvm::raw_ostream
&OS
) const;
149 /// \brief Given a bit-field decl, build an appropriate helper object for
150 /// accessing that field (which is expected to have the given offset and
152 static CGBitFieldInfo
MakeInfo(class CodeGenTypes
&Types
, const FieldDecl
*FD
,
153 uint64_t FieldOffset
, uint64_t FieldSize
);
155 /// \brief Given a bit-field decl, build an appropriate helper object for
156 /// accessing that field (which is expected to have the given offset and
157 /// size). The field decl should be known to be contained within a type of at
158 /// least the given size and with the given alignment.
159 static CGBitFieldInfo
MakeInfo(CodeGenTypes
&Types
, const FieldDecl
*FD
,
160 uint64_t FieldOffset
, uint64_t FieldSize
,
161 uint64_t ContainingTypeSizeInBits
,
162 unsigned ContainingTypeAlign
);
165 /// CGRecordLayout - This class handles struct and union layout info while
166 /// lowering AST types to LLVM types.
168 /// These layout objects are only created on demand as IR generation requires.
169 class CGRecordLayout
{
170 friend class CodeGenTypes
;
172 CGRecordLayout(const CGRecordLayout
&); // DO NOT IMPLEMENT
173 void operator=(const CGRecordLayout
&); // DO NOT IMPLEMENT
176 /// The LLVM type corresponding to this record layout.
177 llvm::PATypeHolder LLVMType
;
179 /// The LLVM type for the non-virtual part of this record layout, used for
180 /// laying out the record as a base.
181 llvm::PATypeHolder NonVirtualBaseLLVMType
;
183 /// Map from (non-bit-field) struct field to the corresponding llvm struct
184 /// type field no. This info is populated by record builder.
185 llvm::DenseMap
<const FieldDecl
*, unsigned> FieldInfo
;
187 /// Map from (bit-field) struct field to the corresponding llvm struct type
188 /// field no. This info is populated by record builder.
189 llvm::DenseMap
<const FieldDecl
*, CGBitFieldInfo
> BitFields
;
191 // FIXME: Maybe we could use a CXXBaseSpecifier as the key and use a single
192 // map for both virtual and non virtual bases.
193 llvm::DenseMap
<const CXXRecordDecl
*, unsigned> NonVirtualBaseFields
;
195 /// Whether one of the fields in this record layout is a pointer to data
196 /// member, or a struct that contains pointer to data member.
197 bool IsZeroInitializable
: 1;
200 CGRecordLayout(const llvm::StructType
*LLVMType
,
201 const llvm::StructType
*NonVirtualBaseLLVMType
,
202 bool IsZeroInitializable
)
203 : LLVMType(LLVMType
), NonVirtualBaseLLVMType(NonVirtualBaseLLVMType
),
204 IsZeroInitializable(IsZeroInitializable
) {}
206 /// \brief Return the LLVM type associated with this record.
207 const llvm::StructType
*getLLVMType() const {
208 return cast
<llvm::StructType
>(LLVMType
.get());
211 const llvm::StructType
*getNonVirtualBaseLLVMType() const {
212 return cast
<llvm::StructType
>(NonVirtualBaseLLVMType
.get());
215 /// \brief Check whether this struct can be C++ zero-initialized
216 /// with a zeroinitializer.
217 bool isZeroInitializable() const {
218 return IsZeroInitializable
;
221 /// \brief Return llvm::StructType element number that corresponds to the
223 unsigned getLLVMFieldNo(const FieldDecl
*FD
) const {
224 assert(!FD
->isBitField() && "Invalid call for bit-field decl!");
225 assert(FieldInfo
.count(FD
) && "Invalid field for record!");
226 return FieldInfo
.lookup(FD
);
229 unsigned getNonVirtualBaseLLVMFieldNo(const CXXRecordDecl
*RD
) const {
230 assert(NonVirtualBaseFields
.count(RD
) && "Invalid non-virtual base!");
231 return NonVirtualBaseFields
.lookup(RD
);
234 /// \brief Return the BitFieldInfo that corresponds to the field FD.
235 const CGBitFieldInfo
&getBitFieldInfo(const FieldDecl
*FD
) const {
236 assert(FD
->isBitField() && "Invalid call for non bit-field decl!");
237 llvm::DenseMap
<const FieldDecl
*, CGBitFieldInfo
>::const_iterator
238 it
= BitFields
.find(FD
);
239 assert(it
!= BitFields
.end() && "Unable to find bitfield info");
243 void print(llvm::raw_ostream
&OS
) const;
247 } // end namespace CodeGen
248 } // end namespace clang