Merge branch 'master' of c-leuse:cerebrum
[cerebrum.git] / devices / arduino-mega.json
blob1ed923ded499e9b3ca01e159d099d88be5465b77
2         "type": "avr",
3         "programmer": "stk500v2",
4         "cerebrum_baudrate": 115200,
5     "programmer_baudrate": 115200,
6         "mcu": "atmega2560",
7         "clock": 16000000,
8         "pwm": {
9                 "B7": [0, "A", "TCCR0A |= (1<<COM0A1) | (1<<WGM00) | (1<<WGM01); TCCR0B |= (1<<CS00);",
10                         "TCCR0A &= ~(1<<COM0A1);"],
11                 "G5": [0, "B", "TCCR0A |= (1<<COM0B1) | (1<<WGM00) | (1<<WGM01); TCCR0B |= (1<<CS00);",
12                         "TCCR0A &= ~(1<<COM0B1);"],
13                 "B5": [1, "A", "TCCR1A |= (1<<COM1A1) | (1<<WGM10)); TCCR1B |= (1<<CS10) | (1<<WGM12));",
14                         "TCCR1A &= ~(1<<COM1A1);"],
15                 "B6": [1, "B", "TCCR1B |= (1<<COM1A1) | (1<<WGM10); TCCR1B |= (1<<CS10) | (1<<WGM12);",
16                         "TCCR1B &= ~(1<<COM1A1);"],
17                 "B4": [2, "A", "TCCR2A |= (1<<COM2A1) | (1<<WGM20) | (1<<WGM21); TCCR0B |= (1<<CS20);",
18                         "TCCR2A &= ~(1<<COM2A1);"],
19                 "H6": [2, "B", "TCCR2A |= (1<<COM2B1) | (1<<WGM20) | (1<<WGM21); TCCR0B |= (1<<CS20);",
20                         "TCCR2A &= ~(1<<COM2B1);"],
21                 "E3": [3, "A", "TCCR3A |= (1<<COM3A1) | (1<<WGM30); TCCR3B |= (1<<CS10) | (1<<WGM32);",
22                         "TCCR3A &= ~(1<<COM3A1);"],
23                 "E4": [3, "B", "TCCR3A |= (1<<COM3B1) | (1<<WGM30); TCCR3B |= (1<<CS10) | (1<<WGM32);",
24                         "TCCR3A &= ~(1<<COM3B1);"],
25                 "E5": [3, "C", "TCCR3A |= (1<<COM3C1) | (1<<WGM30); TCCR3B |= (1<<CS10) | (1<<WGM32);",
26                         "TCCR3A &= ~(1<<COM3C1);"],
27                 "H3": [4, "A", "TCCR4A |= (1<<COM4A1) | (1<<WGM40); TCCR4B |= (1<<CS10) | (1<<WGM42);",
28                         "TCCR4A &= ~(1<<COM4A1);"],
29                 "H4": [4, "B", "TCCR4A |= (1<<COM4B1) | (1<<WGM40); TCCR4B |= (1<<CS10) | (1<<WGM42);",
30                         "TCCR4A &= ~(1<<COM4B1);"],
31                 "H5": [4, "C", "TCCR4A |= (1<<COM4C1) | (1<<WGM40); TCCR4B |= (1<<CS10) | (1<<WGM42);",
32                         "TCCR4A &= ~(1<<COM4C1);"],
33                 "L3": [5, "A", "TCCR5A |= (1<<COM5A1) | (1<<WGM50); TCCR5B |= (1<<CS10) | (1<<WGM52);",
34                         "TCCR5A &= ~(1<<COM5A1);"],
35                 "L4": [5, "B", "TCCR5A |= (1<<COM5B1) | (1<<WGM50); TCCR5B |= (1<<CS10) | (1<<WGM52);",
36                         "TCCR5A &= ~(1<<COM5B1);"],
37                 "L5": [5, "C", "TCCR5A |= (1<<COM5C1) | (1<<WGM50); TCCR5B |= (1<<CS10) | (1<<WGM52);",
38                         "TCCR5A &= ~(1<<COM5C1);"]
39         },
40         "adc": {
41                 "prescaler_bits": "ADPS2 | ADPS1 | ADPS0",
42                 "F0": 8,
43                 "F1": 9,
44                 "F2": 10,
45                 "F3": 11,
46                 "F4": 12,
47                 "F5": 13,
48                 "F6": 14,
49                 "F7": 15,
50                 "K0": 32,
51                 "K1": 33,
52                 "K2": 34,
53                 "K3": 35,
54                 "K4": 36,
55                 "K5": 37,
56                 "K6": 38,
57                 "K7": 39
58         },
59         "spi": {
60                 "port": "B",
61                 "mosi": 2,
62                 "sck": 1,
63                 "ss": 0
64         }