Autogeneration of MSP430-rgb-PWM-firmware works
[cerebrum.git] / msp / uart_io_config.h
blob813dae026cee7fb4c7d4846d0a74632b1434537b
1 /**
2 * \addtogroup MOD_UART
3 * \{
4 **/
6 /**
7 * \file
8 * \brief Configuration include file for \ref MOD_UART "UART IO"
9 * \author Alex Mykyta (amykyta3@gmail.com)
10 **/
12 #ifndef __UART_IO_CONFIG_H__
13 #define __UART_IO_CONFIG_H__
15 //==================================================================================================
16 // UART IO Config
18 // Configuration for: PROJECT_NAME
19 //==================================================================================================
21 // ===================================================
22 // = NOTE: Actual ports must be configured manually! =
23 // ===================================================
25 /** \addtogroup DEF_UART_CONFIG Configuration Defines
26 * \brief Configuration defines for the UART IO module
27 * \{ **/
29 ///\brief UART IO Operating Mode
30 #define UIO_USE_INTERRUPTS 1 ///< \hideinitializer
31 /**< 0 = Polling Mode : No buffers used. RX and TX is done within the function calls. \n
32 * 1 = Interrupt Mode : All IO is buffered. RX and TX is handled in interrupts.
33 **/
35 ///\brief RX buffer size (Interrupt mode only)
36 #define UIO_RXBUF_SIZE 64 ///< \hideinitializer
38 ///\brief TX buffer size (Interrupt mode only)
39 #define UIO_TXBUF_SIZE 64 ///< \hideinitializer
41 /// \brief Select which USCI module to use
42 #define UIO_USE_DEV 0 ///< \hideinitializer
43 /**< 0 = USCIA0 \n
44 * 1 = USCIA1 \n
45 * 2 = USCIA2 \n
46 * 3 = USCIA3
47 **/
49 /// \brief Select which clock source to use
50 #define UIO_CLK_SRC 2 ///< \hideinitializer
51 /**< 0 = External \n
52 * 1 = ACLK \n
53 * 2 = SMCLK
54 **/
56 /** \addtogroup DEF_UART_BAUDS Baud Rates
57 * \brief Baud rate constants based on the clock source
58 * \{ **/
59 // Baud Rates for SMCLK = 18 MHz
60 #define UIO_BR0_9600 0x53 ///< \hideinitializer
61 #define UIO_BR1_9600 0x07 ///< \hideinitializer
62 #define UIO_MCTL_9600 0x00 ///< \hideinitializer
64 #define UIO_BR0_19200 0xA9 ///< \hideinitializer
65 #define UIO_BR1_19200 0x03 ///< \hideinitializer
66 #define UIO_MCTL_19200 0x55 ///< \hideinitializer
68 #define UIO_BR0_115200 0x9C ///< \hideinitializer
69 #define UIO_BR1_115200 0x00 ///< \hideinitializer
70 #define UIO_MCTL_115200 0x22 ///< \hideinitializer
72 // Default Baud Rate
73 #define UIO_BR0_DEFAULT UIO_BR0_9600
74 #define UIO_BR1_DEFAULT UIO_BR1_9600
75 #define UIO_MCTL_DEFAULT UIO_MCTL_9600
76 ///\}
77 ///\}
79 #endif
80 ///\}