arch/arm-cortex-m0/interrupt.c

   1 /* Author: Domen Puncer <domen@cba.si>.  License: WTFPL, see file LICENSE */
   2 #include <stdio.h>
   3 #include <interrupt.h>
   4 #include <arch/cm0_regs.h>
   5
   6
   7 struct irq_entry {
   8         /* this will be changed to doubly linked list, and irq_request will also have to be fixed */
   9         irqreturn_t (*handler)(int irq, void *dev_id);
  10         void *dev_id;
  11 };
  12
  13 int irq_request(unsigned int irq, irqreturn_t (*handler)(int irq, void *dev_id), unsigned long flags, void *dev_id);
  14 void irq_free(unsigned int irq, void *dev_id);
  15
  16 /* cortex-m0 only supports 32 external interrupts - all is ISER[0] actually */
  17 void irq_enable(int irq)
  18 {
  19         NVIC->ISER[irq>>5] = 1 << (irq&0x1f);
  20 }
  21
  22 void irq_disable(int irq)
  23 {
  24         NVIC->ICER[irq>>5] = 1 << (irq&0x1f);
  25 }
  26
  27 void irq_ack(int irq)
  28 {
  29 }
  30
  31 // clear pending
  32 //      NVIC->ICPR[irq>>5] = 1 << (irq&0x1f);
  33
  34 static irqreturn_t irq_default_handler(int irq, void *dev_id)
  35 {
  36         printf("%s: unhandled irq %i, disabling\n", __func__, irq);
  37         irq_disable(irq);
  38         return IRQ_HANDLED;
  39 }