[ASan/Win] Add DLL thunks for __asan_{,un}poison_memory_region
[blocksruntime.git] / lib / extendsfdf2.c
blob91fd2b436a3354ba90623c544a5869999dd54a08
1 //===-- lib/extendsfdf2.c - single -> double conversion -----------*- C -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is dual licensed under the MIT and the University of Illinois Open
6 // Source Licenses. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements a fairly generic conversion from a narrower to a wider
11 // IEEE-754 floating-point type. The constants and types defined following the
12 // includes below parameterize the conversion.
14 // This routine can be trivially adapted to support conversions from
15 // half-precision or to quad-precision. It does not support types that don't
16 // use the usual IEEE-754 interchange formats; specifically, some work would be
17 // needed to adapt it to (for example) the Intel 80-bit format or PowerPC
18 // double-double format.
20 // Note please, however, that this implementation is only intended to support
21 // *widening* operations; if you need to convert to a *narrower* floating-point
22 // type (e.g. double -> float), then this routine will not do what you want it
23 // to.
25 // It also requires that integer types at least as large as both formats
26 // are available on the target platform; this may pose a problem when trying
27 // to add support for quad on some 32-bit systems, for example. You also may
28 // run into trouble finding an appropriate CLZ function for wide source types;
29 // you will likely need to roll your own on some platforms.
31 // Finally, the following assumptions are made:
33 // 1. floating-point types and integer types have the same endianness on the
34 // target platform
36 // 2. quiet NaNs, if supported, are indicated by the leading bit of the
37 // significand field being set
39 //===----------------------------------------------------------------------===//
41 #include "int_lib.h"
43 typedef float src_t;
44 typedef uint32_t src_rep_t;
45 #define SRC_REP_C UINT32_C
46 static const int srcSigBits = 23;
47 #define src_rep_t_clz __builtin_clz
49 typedef double dst_t;
50 typedef uint64_t dst_rep_t;
51 #define DST_REP_C UINT64_C
52 static const int dstSigBits = 52;
54 // End of specialization parameters. Two helper routines for conversion to and
55 // from the representation of floating-point data as integer values follow.
57 static inline src_rep_t srcToRep(src_t x) {
58 const union { src_t f; src_rep_t i; } rep = {.f = x};
59 return rep.i;
62 static inline dst_t dstFromRep(dst_rep_t x) {
63 const union { dst_t f; dst_rep_t i; } rep = {.i = x};
64 return rep.f;
67 // End helper routines. Conversion implementation follows.
69 ARM_EABI_FNALIAS(f2d, extendsfdf2)
71 dst_t __extendsfdf2(src_t a) {
73 // Various constants whose values follow from the type parameters.
74 // Any reasonable optimizer will fold and propagate all of these.
75 const int srcBits = sizeof(src_t)*CHAR_BIT;
76 const int srcExpBits = srcBits - srcSigBits - 1;
77 const int srcInfExp = (1 << srcExpBits) - 1;
78 const int srcExpBias = srcInfExp >> 1;
80 const src_rep_t srcMinNormal = SRC_REP_C(1) << srcSigBits;
81 const src_rep_t srcInfinity = (src_rep_t)srcInfExp << srcSigBits;
82 const src_rep_t srcSignMask = SRC_REP_C(1) << (srcSigBits + srcExpBits);
83 const src_rep_t srcAbsMask = srcSignMask - 1;
84 const src_rep_t srcQNaN = SRC_REP_C(1) << (srcSigBits - 1);
85 const src_rep_t srcNaNCode = srcQNaN - 1;
87 const int dstBits = sizeof(dst_t)*CHAR_BIT;
88 const int dstExpBits = dstBits - dstSigBits - 1;
89 const int dstInfExp = (1 << dstExpBits) - 1;
90 const int dstExpBias = dstInfExp >> 1;
92 const dst_rep_t dstMinNormal = DST_REP_C(1) << dstSigBits;
94 // Break a into a sign and representation of the absolute value
95 const src_rep_t aRep = srcToRep(a);
96 const src_rep_t aAbs = aRep & srcAbsMask;
97 const src_rep_t sign = aRep & srcSignMask;
98 dst_rep_t absResult;
100 if (aAbs - srcMinNormal < srcInfinity - srcMinNormal) {
101 // a is a normal number.
102 // Extend to the destination type by shifting the significand and
103 // exponent into the proper position and rebiasing the exponent.
104 absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits);
105 absResult += (dst_rep_t)(dstExpBias - srcExpBias) << dstSigBits;
108 else if (aAbs >= srcInfinity) {
109 // a is NaN or infinity.
110 // Conjure the result by beginning with infinity, then setting the qNaN
111 // bit (if needed) and right-aligning the rest of the trailing NaN
112 // payload field.
113 absResult = (dst_rep_t)dstInfExp << dstSigBits;
114 absResult |= (dst_rep_t)(aAbs & srcQNaN) << (dstSigBits - srcSigBits);
115 absResult |= aAbs & srcNaNCode;
118 else if (aAbs) {
119 // a is denormal.
120 // renormalize the significand and clear the leading bit, then insert
121 // the correct adjusted exponent in the destination type.
122 const int scale = src_rep_t_clz(aAbs) - src_rep_t_clz(srcMinNormal);
123 absResult = (dst_rep_t)aAbs << (dstSigBits - srcSigBits + scale);
124 absResult ^= dstMinNormal;
125 const int resultExponent = dstExpBias - srcExpBias - scale + 1;
126 absResult |= (dst_rep_t)resultExponent << dstSigBits;
129 else {
130 // a is zero.
131 absResult = 0;
134 // Apply the signbit to (dst_t)abs(a).
135 const dst_rep_t result = absResult | (dst_rep_t)sign << (dstBits - srcBits);
136 return dstFromRep(result);