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[binutils.git] / bfd / elf32-rx.c
blob0a5e12c297b352bba2866f76cd2fbc54811176fb
1 /* Renesas RX specific support for 32-bit ELF.
2 Copyright (C) 2008, 2009, 2010
3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "bfd_stdint.h"
24 #include "libbfd.h"
25 #include "elf-bfd.h"
26 #include "elf/rx.h"
27 #include "libiberty.h"
28
29 #define RX_OPCODE_BIG_ENDIAN 0
30
31 #ifdef DEBUG
32 char * rx_get_reloc (long);
33 void rx_dump_symtab (bfd *, void *, void *);
34 #endif
35
36 #define RXREL(n,sz,bit,shift,complain,pcrel) \
37 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
38 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
39
40 /* Note that the relocations around 0x7f are internal to this file;
41 feel free to move them as needed to avoid conflicts with published
42 relocation numbers. */
43
44 static reloc_howto_type rx_elf_howto_table [] =
45 {
46 RXREL (NONE, 0, 0, 0, dont, FALSE),
47 RXREL (DIR32, 2, 32, 0, signed, FALSE),
48 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
49 RXREL (DIR16, 1, 16, 0, dont, FALSE),
50 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
51 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
52 RXREL (DIR8, 0, 8, 0, dont, FALSE),
53 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
54 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
55 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
56 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
57 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
58 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
59 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
60 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
61 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
62 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
63 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
64 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
65
66 EMPTY_HOWTO (0x13),
67 EMPTY_HOWTO (0x14),
68 EMPTY_HOWTO (0x15),
69 EMPTY_HOWTO (0x16),
70 EMPTY_HOWTO (0x17),
71 EMPTY_HOWTO (0x18),
72 EMPTY_HOWTO (0x19),
73 EMPTY_HOWTO (0x1a),
74 EMPTY_HOWTO (0x1b),
75 EMPTY_HOWTO (0x1c),
76 EMPTY_HOWTO (0x1d),
77 EMPTY_HOWTO (0x1e),
78 EMPTY_HOWTO (0x1f),
79
80 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
81 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
82 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
83 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
84 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
85 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
86 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
87 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
88 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
89 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
90 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
91 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
92 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
93 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
94
95 EMPTY_HOWTO (0x2e),
96 EMPTY_HOWTO (0x2f),
97 EMPTY_HOWTO (0x30),
98 EMPTY_HOWTO (0x31),
99 EMPTY_HOWTO (0x32),
100 EMPTY_HOWTO (0x33),
101 EMPTY_HOWTO (0x34),
102 EMPTY_HOWTO (0x35),
103 EMPTY_HOWTO (0x36),
104 EMPTY_HOWTO (0x37),
105 EMPTY_HOWTO (0x38),
106 EMPTY_HOWTO (0x39),
107 EMPTY_HOWTO (0x3a),
108 EMPTY_HOWTO (0x3b),
109 EMPTY_HOWTO (0x3c),
110 EMPTY_HOWTO (0x3d),
111 EMPTY_HOWTO (0x3e),
112 EMPTY_HOWTO (0x3f),
113 EMPTY_HOWTO (0x40),
114
115 RXREL (ABS32, 2, 32, 0, dont, FALSE),
116 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
117 RXREL (ABS16, 1, 16, 0, dont, FALSE),
118 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
119 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
120 RXREL (ABS8, 0, 8, 0, dont, FALSE),
121 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
122 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
123 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
124 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
125 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
126 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
127 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
128 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
129 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
130 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
131 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
132
133 #define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
134
135 EMPTY_HOWTO (0x52),
136 EMPTY_HOWTO (0x53),
137 EMPTY_HOWTO (0x54),
138 EMPTY_HOWTO (0x55),
139 EMPTY_HOWTO (0x56),
140 EMPTY_HOWTO (0x57),
141 EMPTY_HOWTO (0x58),
142 EMPTY_HOWTO (0x59),
143 EMPTY_HOWTO (0x5a),
144 EMPTY_HOWTO (0x5b),
145 EMPTY_HOWTO (0x5c),
146 EMPTY_HOWTO (0x5d),
147 EMPTY_HOWTO (0x5e),
148 EMPTY_HOWTO (0x5f),
149 EMPTY_HOWTO (0x60),
150 EMPTY_HOWTO (0x61),
151 EMPTY_HOWTO (0x62),
152 EMPTY_HOWTO (0x63),
153 EMPTY_HOWTO (0x64),
154 EMPTY_HOWTO (0x65),
155 EMPTY_HOWTO (0x66),
156 EMPTY_HOWTO (0x67),
157 EMPTY_HOWTO (0x68),
158 EMPTY_HOWTO (0x69),
159 EMPTY_HOWTO (0x6a),
160 EMPTY_HOWTO (0x6b),
161 EMPTY_HOWTO (0x6c),
162 EMPTY_HOWTO (0x6d),
163 EMPTY_HOWTO (0x6e),
164 EMPTY_HOWTO (0x6f),
165 EMPTY_HOWTO (0x70),
166 EMPTY_HOWTO (0x71),
167 EMPTY_HOWTO (0x72),
168 EMPTY_HOWTO (0x73),
169 EMPTY_HOWTO (0x74),
170 EMPTY_HOWTO (0x75),
171 EMPTY_HOWTO (0x76),
172 EMPTY_HOWTO (0x77),
173
174 /* These are internal. */
175 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
176 /* ---- ---- 4--- 3210. */
177 #define R_RX_RH_ABS5p8B 0x78
178 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
179 #define R_RX_RH_ABS5p8W 0x79
180 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
181 #define R_RX_RH_ABS5p8L 0x7a
182 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
183 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
184 /* ---- -432 1--- 0---. */
185 #define R_RX_RH_ABS5p5B 0x7b
186 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
187 #define R_RX_RH_ABS5p5W 0x7c
188 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
189 #define R_RX_RH_ABS5p5L 0x7d
190 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
191 /* A 4-bit unsigned immediate at bit position 8. */
192 #define R_RX_RH_UIMM4p8 0x7e
193 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
194 /* A 4-bit negative unsigned immediate at bit position 8. */
195 #define R_RX_RH_UNEG4p8 0x7f
196 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
197 /* End of internal relocs. */
198
199 RXREL (SYM, 2, 32, 0, dont, FALSE),
200 RXREL (OPneg, 2, 32, 0, dont, FALSE),
201 RXREL (OPadd, 2, 32, 0, dont, FALSE),
202 RXREL (OPsub, 2, 32, 0, dont, FALSE),
203 RXREL (OPmul, 2, 32, 0, dont, FALSE),
204 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
205 RXREL (OPshla, 2, 32, 0, dont, FALSE),
206 RXREL (OPshra, 2, 32, 0, dont, FALSE),
207 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
208 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
209 RXREL (OPand, 2, 32, 0, dont, FALSE),
210 RXREL (OPor, 2, 32, 0, dont, FALSE),
211 RXREL (OPxor, 2, 32, 0, dont, FALSE),
212 RXREL (OPnot, 2, 32, 0, dont, FALSE),
213 RXREL (OPmod, 2, 32, 0, dont, FALSE),
214 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
215 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
216 };
217 \f
218 /* Map BFD reloc types to RX ELF reloc types. */
219
220 struct rx_reloc_map
221 {
222 bfd_reloc_code_real_type bfd_reloc_val;
223 unsigned int rx_reloc_val;
224 };
225
226 static const struct rx_reloc_map rx_reloc_map [] =
227 {
228 { BFD_RELOC_NONE, R_RX_NONE },
229 { BFD_RELOC_8, R_RX_DIR8S },
230 { BFD_RELOC_16, R_RX_DIR16S },
231 { BFD_RELOC_24, R_RX_DIR24S },
232 { BFD_RELOC_32, R_RX_DIR32 },
233 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
234 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
235 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
236 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
237 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
238 { BFD_RELOC_RX_8U, R_RX_DIR8U },
239 { BFD_RELOC_RX_16U, R_RX_DIR16U },
240 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
241 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
242 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
243 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
244 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
245 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
246 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
247 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
248 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
249 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
250 { BFD_RELOC_RX_SYM, R_RX_SYM },
251 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
252 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
253 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
254 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
255 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
256 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
257 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
258 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
259 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
260 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
261 };
262
263 #define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
264
265 static reloc_howto_type *
266 rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
267 bfd_reloc_code_real_type code)
268 {
269 unsigned int i;
270
271 if (code == BFD_RELOC_RX_32_OP)
272 return rx_elf_howto_table + R_RX_DIR32;
273
274 for (i = ARRAY_SIZE (rx_reloc_map); --i;)
275 if (rx_reloc_map [i].bfd_reloc_val == code)
276 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
277
278 return NULL;
279 }
280
281 static reloc_howto_type *
282 rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
283 {
284 unsigned int i;
285
286 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
287 if (rx_elf_howto_table[i].name != NULL
288 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
289 return rx_elf_howto_table + i;
290
291 return NULL;
292 }
293
294 /* Set the howto pointer for an RX ELF reloc. */
295
296 static void
297 rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
298 arelent * cache_ptr,
299 Elf_Internal_Rela * dst)
300 {
301 unsigned int r_type;
302
303 r_type = ELF32_R_TYPE (dst->r_info);
304 BFD_ASSERT (r_type < (unsigned int) R_RX_max);
305 cache_ptr->howto = rx_elf_howto_table + r_type;
306 }
307 \f
308 static bfd_vma
309 get_symbol_value (const char * name,
310 bfd_reloc_status_type * status,
311 struct bfd_link_info * info,
312 bfd * input_bfd,
313 asection * input_section,
314 int offset)
315 {
316 bfd_vma value = 0;
317 struct bfd_link_hash_entry * h;
318
319 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
320
321 if (h == NULL
322 || (h->type != bfd_link_hash_defined
323 && h->type != bfd_link_hash_defweak))
324 * status = info->callbacks->undefined_symbol
325 (info, name, input_bfd, input_section, offset, TRUE);
326 else
327 value = (h->u.def.value
328 + h->u.def.section->output_section->vma
329 + h->u.def.section->output_offset);
330
331 return value;
332 }
333
334 static bfd_vma
335 get_gp (bfd_reloc_status_type * status,
336 struct bfd_link_info * info,
337 bfd * abfd,
338 asection * sec,
339 int offset)
340 {
341 static bfd_boolean cached = FALSE;
342 static bfd_vma cached_value = 0;
343
344 if (!cached)
345 {
346 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
347 cached = TRUE;
348 }
349 return cached_value;
350 }
351
352 static bfd_vma
353 get_romstart (bfd_reloc_status_type * status,
354 struct bfd_link_info * info,
355 bfd * abfd,
356 asection * sec,
357 int offset)
358 {
359 static bfd_boolean cached = FALSE;
360 static bfd_vma cached_value = 0;
361
362 if (!cached)
363 {
364 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
365 cached = TRUE;
366 }
367 return cached_value;
368 }
369
370 static bfd_vma
371 get_ramstart (bfd_reloc_status_type * status,
372 struct bfd_link_info * info,
373 bfd * abfd,
374 asection * sec,
375 int offset)
376 {
377 static bfd_boolean cached = FALSE;
378 static bfd_vma cached_value = 0;
379
380 if (!cached)
381 {
382 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
383 cached = TRUE;
384 }
385 return cached_value;
386 }
387
388 #define NUM_STACK_ENTRIES 16
389 static int32_t rx_stack [ NUM_STACK_ENTRIES ];
390 static unsigned int rx_stack_top;
391
392 #define RX_STACK_PUSH(val) \
393 do \
394 { \
395 if (rx_stack_top < NUM_STACK_ENTRIES) \
396 rx_stack [rx_stack_top ++] = (val); \
397 else \
398 r = bfd_reloc_dangerous; \
399 } \
400 while (0)
401
402 #define RX_STACK_POP(dest) \
403 do \
404 { \
405 if (rx_stack_top > 0) \
406 (dest) = rx_stack [-- rx_stack_top]; \
407 else \
408 (dest) = 0, r = bfd_reloc_dangerous; \
409 } \
410 while (0)
411
412 /* Relocate an RX ELF section.
413 There is some attempt to make this function usable for many architectures,
414 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
415 if only to serve as a learning tool.
416
417 The RELOCATE_SECTION function is called by the new ELF backend linker
418 to handle the relocations for a section.
419
420 The relocs are always passed as Rela structures; if the section
421 actually uses Rel structures, the r_addend field will always be
422 zero.
423
424 This function is responsible for adjusting the section contents as
425 necessary, and (if using Rela relocs and generating a relocatable
426 output file) adjusting the reloc addend as necessary.
427
428 This function does not have to worry about setting the reloc
429 address or the reloc symbol index.
430
431 LOCAL_SYMS is a pointer to the swapped in local symbols.
432
433 LOCAL_SECTIONS is an array giving the section in the input file
434 corresponding to the st_shndx field of each local symbol.
435
436 The global hash table entry for the global symbols can be found
437 via elf_sym_hashes (input_bfd).
438
439 When generating relocatable output, this function must handle
440 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
441 going to be the section symbol corresponding to the output
442 section, which means that the addend must be adjusted
443 accordingly. */
444
445 static bfd_boolean
446 rx_elf_relocate_section
447 (bfd * output_bfd,
448 struct bfd_link_info * info,
449 bfd * input_bfd,
450 asection * input_section,
451 bfd_byte * contents,
452 Elf_Internal_Rela * relocs,
453 Elf_Internal_Sym * local_syms,
454 asection ** local_sections)
455 {
456 Elf_Internal_Shdr * symtab_hdr;
457 struct elf_link_hash_entry ** sym_hashes;
458 Elf_Internal_Rela * rel;
459 Elf_Internal_Rela * relend;
460
461 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
462 sym_hashes = elf_sym_hashes (input_bfd);
463 relend = relocs + input_section->reloc_count;
464 for (rel = relocs; rel < relend; rel ++)
465 {
466 reloc_howto_type * howto;
467 unsigned long r_symndx;
468 Elf_Internal_Sym * sym;
469 asection * sec;
470 struct elf_link_hash_entry * h;
471 bfd_vma relocation;
472 bfd_reloc_status_type r;
473 const char * name = NULL;
474 bfd_boolean unresolved_reloc = TRUE;
475 int r_type;
476
477 r_type = ELF32_R_TYPE (rel->r_info);
478 r_symndx = ELF32_R_SYM (rel->r_info);
479
480 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
481 h = NULL;
482 sym = NULL;
483 sec = NULL;
484 relocation = 0;
485
486 if (r_symndx < symtab_hdr->sh_info)
487 {
488 sym = local_syms + r_symndx;
489 sec = local_sections [r_symndx];
490 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
491
492 name = bfd_elf_string_from_elf_section
493 (input_bfd, symtab_hdr->sh_link, sym->st_name);
494 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
495 }
496 else
497 {
498 bfd_boolean warned;
499
500 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
501 r_symndx, symtab_hdr, sym_hashes, h,
502 sec, relocation, unresolved_reloc,
503 warned);
504
505 name = h->root.root.string;
506 }
507
508 if (sec != NULL && elf_discarded_section (sec))
509 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
510 rel, relend, howto, contents);
511
512 if (info->relocatable)
513 {
514 /* This is a relocatable link. We don't have to change
515 anything, unless the reloc is against a section symbol,
516 in which case we have to adjust according to where the
517 section symbol winds up in the output section. */
518 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
519 rel->r_addend += sec->output_offset;
520 continue;
521 }
522
523 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
524 /* If the symbol is undefined and weak
525 then the relocation resolves to zero. */
526 relocation = 0;
527 else
528 {
529 if (howto->pc_relative)
530 {
531 relocation -= (input_section->output_section->vma
532 + input_section->output_offset
533 + rel->r_offset);
534 if (r_type != R_RX_RH_3_PCREL
535 && r_type != R_RX_DIR3U_PCREL)
536 relocation ++;
537 }
538
539 relocation += rel->r_addend;
540 }
541
542 r = bfd_reloc_ok;
543
544 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
545 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
546 #define OP(i) (contents[rel->r_offset + (i)])
547 #define WARN_REDHAT(type) \
548 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
549 input_bfd, input_section, name)
550
551 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
552 switch (r_type)
553 {
554 case R_RX_NONE:
555 break;
556
557 case R_RX_RH_RELAX:
558 break;
559
560 case R_RX_RH_3_PCREL:
561 WARN_REDHAT ("RX_RH_3_PCREL");
562 RANGE (3, 10);
563 OP (0) &= 0xf8;
564 OP (0) |= relocation & 0x07;
565 break;
566
567 case R_RX_RH_8_NEG:
568 WARN_REDHAT ("RX_RH_8_NEG");
569 relocation = - relocation;
570 case R_RX_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RX_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RX_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RX_RH_16_NEG:
586 WARN_REDHAT ("RX_RH_16_NEG");
587 relocation = - relocation;
588 case R_RX_DIR16S_PCREL:
589 RANGE (-32768, 32767);
590 #if RX_OPCODE_BIG_ENDIAN
591 #else
592 OP (0) = relocation;
593 OP (1) = relocation >> 8;
594 #endif
595 break;
596
597 case R_RX_RH_16_OP:
598 WARN_REDHAT ("RX_RH_16_OP");
599 RANGE (-32768, 32767);
600 #if RX_OPCODE_BIG_ENDIAN
601 OP (1) = relocation;
602 OP (0) = relocation >> 8;
603 #else
604 OP (0) = relocation;
605 OP (1) = relocation >> 8;
606 #endif
607 break;
608
609 case R_RX_DIR16S:
610 RANGE (-32768, 65535);
611 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
612 {
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 }
616 else
617 {
618 OP (0) = relocation;
619 OP (1) = relocation >> 8;
620 }
621 break;
622
623 case R_RX_DIR16U:
624 RANGE (0, 65536);
625 #if RX_OPCODE_BIG_ENDIAN
626 OP (1) = relocation;
627 OP (0) = relocation >> 8;
628 #else
629 OP (0) = relocation;
630 OP (1) = relocation >> 8;
631 #endif
632 break;
633
634 case R_RX_DIR16:
635 RANGE (-32768, 65536);
636 #if RX_OPCODE_BIG_ENDIAN
637 OP (1) = relocation;
638 OP (0) = relocation >> 8;
639 #else
640 OP (0) = relocation;
641 OP (1) = relocation >> 8;
642 #endif
643 break;
644
645 case R_RX_DIR16_REV:
646 RANGE (-32768, 65536);
647 #if RX_OPCODE_BIG_ENDIAN
648 OP (0) = relocation;
649 OP (1) = relocation >> 8;
650 #else
651 OP (1) = relocation;
652 OP (0) = relocation >> 8;
653 #endif
654 break;
655
656 case R_RX_DIR3U_PCREL:
657 RANGE (3, 10);
658 OP (0) &= 0xf8;
659 OP (0) |= relocation & 0x07;
660 break;
661
662 case R_RX_RH_24_NEG:
663 WARN_REDHAT ("RX_RH_24_NEG");
664 relocation = - relocation;
665 case R_RX_DIR24S_PCREL:
666 RANGE (-0x800000, 0x7fffff);
667 #if RX_OPCODE_BIG_ENDIAN
668 OP (2) = relocation;
669 OP (1) = relocation >> 8;
670 OP (0) = relocation >> 16;
671 #else
672 OP (0) = relocation;
673 OP (1) = relocation >> 8;
674 OP (2) = relocation >> 16;
675 #endif
676 break;
677
678 case R_RX_RH_24_OP:
679 WARN_REDHAT ("RX_RH_24_OP");
680 RANGE (-0x800000, 0x7fffff);
681 #if RX_OPCODE_BIG_ENDIAN
682 OP (2) = relocation;
683 OP (1) = relocation >> 8;
684 OP (0) = relocation >> 16;
685 #else
686 OP (0) = relocation;
687 OP (1) = relocation >> 8;
688 OP (2) = relocation >> 16;
689 #endif
690 break;
691
692 case R_RX_DIR24S:
693 RANGE (-0x800000, 0x7fffff);
694 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
695 {
696 OP (2) = relocation;
697 OP (1) = relocation >> 8;
698 OP (0) = relocation >> 16;
699 }
700 else
701 {
702 OP (0) = relocation;
703 OP (1) = relocation >> 8;
704 OP (2) = relocation >> 16;
705 }
706 break;
707
708 case R_RX_RH_24_UNS:
709 WARN_REDHAT ("RX_RH_24_UNS");
710 RANGE (0, 0xffffff);
711 #if RX_OPCODE_BIG_ENDIAN
712 OP (2) = relocation;
713 OP (1) = relocation >> 8;
714 OP (0) = relocation >> 16;
715 #else
716 OP (0) = relocation;
717 OP (1) = relocation >> 8;
718 OP (2) = relocation >> 16;
719 #endif
720 break;
721
722 case R_RX_RH_32_NEG:
723 WARN_REDHAT ("RX_RH_32_NEG");
724 relocation = - relocation;
725 #if RX_OPCODE_BIG_ENDIAN
726 OP (3) = relocation;
727 OP (2) = relocation >> 8;
728 OP (1) = relocation >> 16;
729 OP (0) = relocation >> 24;
730 #else
731 OP (0) = relocation;
732 OP (1) = relocation >> 8;
733 OP (2) = relocation >> 16;
734 OP (3) = relocation >> 24;
735 #endif
736 break;
737
738 case R_RX_RH_32_OP:
739 WARN_REDHAT ("RX_RH_32_OP");
740 #if RX_OPCODE_BIG_ENDIAN
741 OP (3) = relocation;
742 OP (2) = relocation >> 8;
743 OP (1) = relocation >> 16;
744 OP (0) = relocation >> 24;
745 #else
746 OP (0) = relocation;
747 OP (1) = relocation >> 8;
748 OP (2) = relocation >> 16;
749 OP (3) = relocation >> 24;
750 #endif
751 break;
752
753 case R_RX_DIR32:
754 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
755 {
756 OP (3) = relocation;
757 OP (2) = relocation >> 8;
758 OP (1) = relocation >> 16;
759 OP (0) = relocation >> 24;
760 }
761 else
762 {
763 OP (0) = relocation;
764 OP (1) = relocation >> 8;
765 OP (2) = relocation >> 16;
766 OP (3) = relocation >> 24;
767 }
768 break;
769
770 case R_RX_DIR32_REV:
771 if (BIGE (output_bfd))
772 {
773 OP (0) = relocation;
774 OP (1) = relocation >> 8;
775 OP (2) = relocation >> 16;
776 OP (3) = relocation >> 24;
777 }
778 else
779 {
780 OP (3) = relocation;
781 OP (2) = relocation >> 8;
782 OP (1) = relocation >> 16;
783 OP (0) = relocation >> 24;
784 }
785 break;
786
787 case R_RX_RH_DIFF:
788 {
789 bfd_vma val;
790 WARN_REDHAT ("RX_RH_DIFF");
791 val = bfd_get_32 (output_bfd, & OP (0));
792 val -= relocation;
793 bfd_put_32 (output_bfd, val, & OP (0));
794 }
795 break;
796
797 case R_RX_RH_GPRELB:
798 WARN_REDHAT ("RX_RH_GPRELB");
799 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
800 RANGE (0, 65535);
801 #if RX_OPCODE_BIG_ENDIAN
802 OP (1) = relocation;
803 OP (0) = relocation >> 8;
804 #else
805 OP (0) = relocation;
806 OP (1) = relocation >> 8;
807 #endif
808 break;
809
810 case R_RX_RH_GPRELW:
811 WARN_REDHAT ("RX_RH_GPRELW");
812 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
813 ALIGN (1);
814 relocation >>= 1;
815 RANGE (0, 65535);
816 #if RX_OPCODE_BIG_ENDIAN
817 OP (1) = relocation;
818 OP (0) = relocation >> 8;
819 #else
820 OP (0) = relocation;
821 OP (1) = relocation >> 8;
822 #endif
823 break;
824
825 case R_RX_RH_GPRELL:
826 WARN_REDHAT ("RX_RH_GPRELL");
827 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
828 ALIGN (3);
829 relocation >>= 2;
830 RANGE (0, 65535);
831 #if RX_OPCODE_BIG_ENDIAN
832 OP (1) = relocation;
833 OP (0) = relocation >> 8;
834 #else
835 OP (0) = relocation;
836 OP (1) = relocation >> 8;
837 #endif
838 break;
839
840 /* Internal relocations just for relaxation: */
841 case R_RX_RH_ABS5p5B:
842 RX_STACK_POP (relocation);
843 RANGE (0, 31);
844 OP (0) &= 0xf8;
845 OP (0) |= relocation >> 2;
846 OP (1) &= 0x77;
847 OP (1) |= (relocation << 6) & 0x80;
848 OP (1) |= (relocation << 3) & 0x08;
849 break;
850
851 case R_RX_RH_ABS5p5W:
852 RX_STACK_POP (relocation);
853 RANGE (0, 62);
854 ALIGN (1);
855 relocation >>= 1;
856 OP (0) &= 0xf8;
857 OP (0) |= relocation >> 2;
858 OP (1) &= 0x77;
859 OP (1) |= (relocation << 6) & 0x80;
860 OP (1) |= (relocation << 3) & 0x08;
861 break;
862
863 case R_RX_RH_ABS5p5L:
864 RX_STACK_POP (relocation);
865 RANGE (0, 124);
866 ALIGN (3);
867 relocation >>= 2;
868 OP (0) &= 0xf8;
869 OP (0) |= relocation >> 2;
870 OP (1) &= 0x77;
871 OP (1) |= (relocation << 6) & 0x80;
872 OP (1) |= (relocation << 3) & 0x08;
873 break;
874
875 case R_RX_RH_ABS5p8B:
876 RX_STACK_POP (relocation);
877 RANGE (0, 31);
878 OP (0) &= 0x70;
879 OP (0) |= (relocation << 3) & 0x80;
880 OP (0) |= relocation & 0x0f;
881 break;
882
883 case R_RX_RH_ABS5p8W:
884 RX_STACK_POP (relocation);
885 RANGE (0, 62);
886 ALIGN (1);
887 relocation >>= 1;
888 OP (0) &= 0x70;
889 OP (0) |= (relocation << 3) & 0x80;
890 OP (0) |= relocation & 0x0f;
891 break;
892
893 case R_RX_RH_ABS5p8L:
894 RX_STACK_POP (relocation);
895 RANGE (0, 124);
896 ALIGN (3);
897 relocation >>= 2;
898 OP (0) &= 0x70;
899 OP (0) |= (relocation << 3) & 0x80;
900 OP (0) |= relocation & 0x0f;
901 break;
902
903 case R_RX_RH_UIMM4p8:
904 RANGE (0, 15);
905 OP (0) &= 0x0f;
906 OP (0) |= relocation << 4;
907 break;
908
909 case R_RX_RH_UNEG4p8:
910 RANGE (-15, 0);
911 OP (0) &= 0x0f;
912 OP (0) |= (-relocation) << 4;
913 break;
914
915 /* Complex reloc handling: */
916
917 case R_RX_ABS32:
918 RX_STACK_POP (relocation);
919 #if RX_OPCODE_BIG_ENDIAN
920 OP (3) = relocation;
921 OP (2) = relocation >> 8;
922 OP (1) = relocation >> 16;
923 OP (0) = relocation >> 24;
924 #else
925 OP (0) = relocation;
926 OP (1) = relocation >> 8;
927 OP (2) = relocation >> 16;
928 OP (3) = relocation >> 24;
929 #endif
930 break;
931
932 case R_RX_ABS32_REV:
933 RX_STACK_POP (relocation);
934 #if RX_OPCODE_BIG_ENDIAN
935 OP (0) = relocation;
936 OP (1) = relocation >> 8;
937 OP (2) = relocation >> 16;
938 OP (3) = relocation >> 24;
939 #else
940 OP (3) = relocation;
941 OP (2) = relocation >> 8;
942 OP (1) = relocation >> 16;
943 OP (0) = relocation >> 24;
944 #endif
945 break;
946
947 case R_RX_ABS24S_PCREL:
948 case R_RX_ABS24S:
949 RX_STACK_POP (relocation);
950 RANGE (-0x800000, 0x7fffff);
951 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
952 {
953 OP (2) = relocation;
954 OP (1) = relocation >> 8;
955 OP (0) = relocation >> 16;
956 }
957 else
958 {
959 OP (0) = relocation;
960 OP (1) = relocation >> 8;
961 OP (2) = relocation >> 16;
962 }
963 break;
964
965 case R_RX_ABS16:
966 RX_STACK_POP (relocation);
967 RANGE (-32768, 65535);
968 #if RX_OPCODE_BIG_ENDIAN
969 OP (1) = relocation;
970 OP (0) = relocation >> 8;
971 #else
972 OP (0) = relocation;
973 OP (1) = relocation >> 8;
974 #endif
975 break;
976
977 case R_RX_ABS16_REV:
978 RX_STACK_POP (relocation);
979 RANGE (-32768, 65535);
980 #if RX_OPCODE_BIG_ENDIAN
981 OP (0) = relocation;
982 OP (1) = relocation >> 8;
983 #else
984 OP (1) = relocation;
985 OP (0) = relocation >> 8;
986 #endif
987 break;
988
989 case R_RX_ABS16S_PCREL:
990 case R_RX_ABS16S:
991 RX_STACK_POP (relocation);
992 RANGE (-32768, 32767);
993 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
994 {
995 OP (1) = relocation;
996 OP (0) = relocation >> 8;
997 }
998 else
999 {
1000 OP (0) = relocation;
1001 OP (1) = relocation >> 8;
1002 }
1003 break;
1004
1005 case R_RX_ABS16U:
1006 RX_STACK_POP (relocation);
1007 RANGE (0, 65536);
1008 #if RX_OPCODE_BIG_ENDIAN
1009 OP (1) = relocation;
1010 OP (0) = relocation >> 8;
1011 #else
1012 OP (0) = relocation;
1013 OP (1) = relocation >> 8;
1014 #endif
1015 break;
1016
1017 case R_RX_ABS16UL:
1018 RX_STACK_POP (relocation);
1019 relocation >>= 2;
1020 RANGE (0, 65536);
1021 #if RX_OPCODE_BIG_ENDIAN
1022 OP (1) = relocation;
1023 OP (0) = relocation >> 8;
1024 #else
1025 OP (0) = relocation;
1026 OP (1) = relocation >> 8;
1027 #endif
1028 break;
1029
1030 case R_RX_ABS16UW:
1031 RX_STACK_POP (relocation);
1032 relocation >>= 1;
1033 RANGE (0, 65536);
1034 #if RX_OPCODE_BIG_ENDIAN
1035 OP (1) = relocation;
1036 OP (0) = relocation >> 8;
1037 #else
1038 OP (0) = relocation;
1039 OP (1) = relocation >> 8;
1040 #endif
1041 break;
1042
1043 case R_RX_ABS8:
1044 RX_STACK_POP (relocation);
1045 RANGE (-128, 255);
1046 OP (0) = relocation;
1047 break;
1048
1049 case R_RX_ABS8U:
1050 RX_STACK_POP (relocation);
1051 RANGE (0, 255);
1052 OP (0) = relocation;
1053 break;
1054
1055 case R_RX_ABS8UL:
1056 RX_STACK_POP (relocation);
1057 relocation >>= 2;
1058 RANGE (0, 255);
1059 OP (0) = relocation;
1060 break;
1061
1062 case R_RX_ABS8UW:
1063 RX_STACK_POP (relocation);
1064 relocation >>= 1;
1065 RANGE (0, 255);
1066 OP (0) = relocation;
1067 break;
1068
1069 case R_RX_ABS8S_PCREL:
1070 case R_RX_ABS8S:
1071 RX_STACK_POP (relocation);
1072 RANGE (-128, 127);
1073 OP (0) = relocation;
1074 break;
1075
1076 case R_RX_SYM:
1077 if (r_symndx < symtab_hdr->sh_info)
1078 RX_STACK_PUSH (sec->output_section->vma
1079 + sec->output_offset
1080 + sym->st_value);
1081 else
1082 {
1083 if (h != NULL
1084 && (h->root.type == bfd_link_hash_defined
1085 || h->root.type == bfd_link_hash_defweak))
1086 RX_STACK_PUSH (h->root.u.def.value
1087 + sec->output_section->vma
1088 + sec->output_offset);
1089 else
1090 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1091 }
1092 break;
1093
1094 case R_RX_OPneg:
1095 {
1096 int32_t tmp;
1097
1098 RX_STACK_POP (tmp);
1099 tmp = - tmp;
1100 RX_STACK_PUSH (tmp);
1101 }
1102 break;
1103
1104 case R_RX_OPadd:
1105 {
1106 int32_t tmp1, tmp2;
1107
1108 RX_STACK_POP (tmp1);
1109 RX_STACK_POP (tmp2);
1110 tmp1 += tmp2;
1111 RX_STACK_PUSH (tmp1);
1112 }
1113 break;
1114
1115 case R_RX_OPsub:
1116 {
1117 int32_t tmp1, tmp2;
1118
1119 RX_STACK_POP (tmp1);
1120 RX_STACK_POP (tmp2);
1121 tmp2 -= tmp1;
1122 RX_STACK_PUSH (tmp2);
1123 }
1124 break;
1125
1126 case R_RX_OPmul:
1127 {
1128 int32_t tmp1, tmp2;
1129
1130 RX_STACK_POP (tmp1);
1131 RX_STACK_POP (tmp2);
1132 tmp1 *= tmp2;
1133 RX_STACK_PUSH (tmp1);
1134 }
1135 break;
1136
1137 case R_RX_OPdiv:
1138 {
1139 int32_t tmp1, tmp2;
1140
1141 RX_STACK_POP (tmp1);
1142 RX_STACK_POP (tmp2);
1143 tmp1 /= tmp2;
1144 RX_STACK_PUSH (tmp1);
1145 }
1146 break;
1147
1148 case R_RX_OPshla:
1149 {
1150 int32_t tmp1, tmp2;
1151
1152 RX_STACK_POP (tmp1);
1153 RX_STACK_POP (tmp2);
1154 tmp1 <<= tmp2;
1155 RX_STACK_PUSH (tmp1);
1156 }
1157 break;
1158
1159 case R_RX_OPshra:
1160 {
1161 int32_t tmp1, tmp2;
1162
1163 RX_STACK_POP (tmp1);
1164 RX_STACK_POP (tmp2);
1165 tmp1 >>= tmp2;
1166 RX_STACK_PUSH (tmp1);
1167 }
1168 break;
1169
1170 case R_RX_OPsctsize:
1171 RX_STACK_PUSH (input_section->size);
1172 break;
1173
1174 case R_RX_OPscttop:
1175 RX_STACK_PUSH (input_section->output_section->vma);
1176 break;
1177
1178 case R_RX_OPand:
1179 {
1180 int32_t tmp1, tmp2;
1181
1182 RX_STACK_POP (tmp1);
1183 RX_STACK_POP (tmp2);
1184 tmp1 &= tmp2;
1185 RX_STACK_PUSH (tmp1);
1186 }
1187 break;
1188
1189 case R_RX_OPor:
1190 {
1191 int32_t tmp1, tmp2;
1192
1193 RX_STACK_POP (tmp1);
1194 RX_STACK_POP (tmp2);
1195 tmp1 |= tmp2;
1196 RX_STACK_PUSH (tmp1);
1197 }
1198 break;
1199
1200 case R_RX_OPxor:
1201 {
1202 int32_t tmp1, tmp2;
1203
1204 RX_STACK_POP (tmp1);
1205 RX_STACK_POP (tmp2);
1206 tmp1 ^= tmp2;
1207 RX_STACK_PUSH (tmp1);
1208 }
1209 break;
1210
1211 case R_RX_OPnot:
1212 {
1213 int32_t tmp;
1214
1215 RX_STACK_POP (tmp);
1216 tmp = ~ tmp;
1217 RX_STACK_PUSH (tmp);
1218 }
1219 break;
1220
1221 case R_RX_OPmod:
1222 {
1223 int32_t tmp1, tmp2;
1224
1225 RX_STACK_POP (tmp1);
1226 RX_STACK_POP (tmp2);
1227 tmp1 %= tmp2;
1228 RX_STACK_PUSH (tmp1);
1229 }
1230 break;
1231
1232 case R_RX_OPromtop:
1233 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1234 break;
1235
1236 case R_RX_OPramtop:
1237 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1238 break;
1239
1240 default:
1241 r = bfd_reloc_notsupported;
1242 break;
1243 }
1244
1245 if (r != bfd_reloc_ok)
1246 {
1247 const char * msg = NULL;
1248
1249 switch (r)
1250 {
1251 case bfd_reloc_overflow:
1252 /* Catch the case of a missing function declaration
1253 and emit a more helpful error message. */
1254 if (r_type == R_RX_DIR24S_PCREL)
1255 msg = _("%B(%A): error: call to undefined function '%s'");
1256 else
1257 r = info->callbacks->reloc_overflow
1258 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1259 input_bfd, input_section, rel->r_offset);
1260 break;
1261
1262 case bfd_reloc_undefined:
1263 r = info->callbacks->undefined_symbol
1264 (info, name, input_bfd, input_section, rel->r_offset,
1265 TRUE);
1266 break;
1267
1268 case bfd_reloc_other:
1269 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1270 break;
1271
1272 case bfd_reloc_outofrange:
1273 msg = _("%B(%A): internal error: out of range error");
1274 break;
1275
1276 case bfd_reloc_notsupported:
1277 msg = _("%B(%A): internal error: unsupported relocation error");
1278 break;
1279
1280 case bfd_reloc_dangerous:
1281 msg = _("%B(%A): internal error: dangerous relocation");
1282 break;
1283
1284 default:
1285 msg = _("%B(%A): internal error: unknown error");
1286 break;
1287 }
1288
1289 if (msg)
1290 _bfd_error_handler (msg, input_bfd, input_section, name);
1291
1292 if (! r)
1293 return FALSE;
1294 }
1295 }
1296
1297 return TRUE;
1298 }
1299 \f
1300 /* Relaxation Support. */
1301
1302 /* Progression of relocations from largest operand size to smallest
1303 operand size. */
1304
1305 static int
1306 next_smaller_reloc (int r)
1307 {
1308 switch (r)
1309 {
1310 case R_RX_DIR32: return R_RX_DIR24S;
1311 case R_RX_DIR24S: return R_RX_DIR16S;
1312 case R_RX_DIR16S: return R_RX_DIR8S;
1313 case R_RX_DIR8S: return R_RX_NONE;
1314
1315 case R_RX_DIR16: return R_RX_DIR8;
1316 case R_RX_DIR8: return R_RX_NONE;
1317
1318 case R_RX_DIR16U: return R_RX_DIR8U;
1319 case R_RX_DIR8U: return R_RX_NONE;
1320
1321 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1322 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1323 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1324
1325 case R_RX_DIR16UL: return R_RX_DIR8UL;
1326 case R_RX_DIR8UL: return R_RX_NONE;
1327 case R_RX_DIR16UW: return R_RX_DIR8UW;
1328 case R_RX_DIR8UW: return R_RX_NONE;
1329
1330 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1331 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1332 case R_RX_RH_16_OP: return R_RX_DIR8;
1333
1334 case R_RX_ABS32: return R_RX_ABS24S;
1335 case R_RX_ABS24S: return R_RX_ABS16S;
1336 case R_RX_ABS16: return R_RX_ABS8;
1337 case R_RX_ABS16U: return R_RX_ABS8U;
1338 case R_RX_ABS16S: return R_RX_ABS8S;
1339 case R_RX_ABS8: return R_RX_NONE;
1340 case R_RX_ABS8U: return R_RX_NONE;
1341 case R_RX_ABS8S: return R_RX_NONE;
1342 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1343 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1344 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1345 case R_RX_ABS16UL: return R_RX_ABS8UL;
1346 case R_RX_ABS16UW: return R_RX_ABS8UW;
1347 case R_RX_ABS8UL: return R_RX_NONE;
1348 case R_RX_ABS8UW: return R_RX_NONE;
1349 }
1350 return r;
1351 };
1352
1353 /* Delete some bytes from a section while relaxing. */
1354
1355 static bfd_boolean
1356 elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1357 Elf_Internal_Rela *alignment_rel, int force_snip)
1358 {
1359 Elf_Internal_Shdr * symtab_hdr;
1360 unsigned int sec_shndx;
1361 bfd_byte * contents;
1362 Elf_Internal_Rela * irel;
1363 Elf_Internal_Rela * irelend;
1364 Elf_Internal_Sym * isym;
1365 Elf_Internal_Sym * isymend;
1366 bfd_vma toaddr;
1367 unsigned int symcount;
1368 struct elf_link_hash_entry ** sym_hashes;
1369 struct elf_link_hash_entry ** end_hashes;
1370
1371 if (!alignment_rel)
1372 force_snip = 1;
1373
1374 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1375
1376 contents = elf_section_data (sec)->this_hdr.contents;
1377
1378 /* The deletion must stop at the next alignment boundary, if
1379 ALIGNMENT_REL is non-NULL. */
1380 toaddr = sec->size;
1381 if (alignment_rel)
1382 toaddr = alignment_rel->r_offset;
1383
1384 irel = elf_section_data (sec)->relocs;
1385 irelend = irel + sec->reloc_count;
1386
1387 /* Actually delete the bytes. */
1388 memmove (contents + addr, contents + addr + count,
1389 (size_t) (toaddr - addr - count));
1390
1391 /* If we don't have an alignment marker to worry about, we can just
1392 shrink the section. Otherwise, we have to fill in the newly
1393 created gap with NOP insns (0x03). */
1394 if (force_snip)
1395 sec->size -= count;
1396 else
1397 memset (contents + toaddr - count, 0x03, count);
1398
1399 /* Adjust all the relocs. */
1400 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1401 {
1402 /* Get the new reloc address. */
1403 if (irel->r_offset > addr
1404 && (irel->r_offset < toaddr
1405 || (force_snip && irel->r_offset == toaddr)))
1406 irel->r_offset -= count;
1407
1408 /* If we see an ALIGN marker at the end of the gap, we move it
1409 to the beginning of the gap, since marking these gaps is what
1410 they're for. */
1411 if (irel->r_offset == toaddr
1412 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1413 && irel->r_addend & RX_RELAXA_ALIGN)
1414 irel->r_offset -= count;
1415 }
1416
1417 /* Adjust the local symbols defined in this section. */
1418 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1419 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1420 isymend = isym + symtab_hdr->sh_info;
1421
1422 for (; isym < isymend; isym++)
1423 {
1424 /* If the symbol is in the range of memory we just moved, we
1425 have to adjust its value. */
1426 if (isym->st_shndx == sec_shndx
1427 && isym->st_value > addr
1428 && isym->st_value < toaddr)
1429 isym->st_value -= count;
1430
1431 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1432 *end* is in the moved bytes but it's *start* isn't), then we
1433 must adjust its size. */
1434 if (isym->st_shndx == sec_shndx
1435 && isym->st_value < addr
1436 && isym->st_value + isym->st_size > addr
1437 && isym->st_value + isym->st_size < toaddr)
1438 isym->st_size -= count;
1439 }
1440
1441 /* Now adjust the global symbols defined in this section. */
1442 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1443 - symtab_hdr->sh_info);
1444 sym_hashes = elf_sym_hashes (abfd);
1445 end_hashes = sym_hashes + symcount;
1446
1447 for (; sym_hashes < end_hashes; sym_hashes++)
1448 {
1449 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1450
1451 if ((sym_hash->root.type == bfd_link_hash_defined
1452 || sym_hash->root.type == bfd_link_hash_defweak)
1453 && sym_hash->root.u.def.section == sec)
1454 {
1455 /* As above, adjust the value if needed. */
1456 if (sym_hash->root.u.def.value > addr
1457 && sym_hash->root.u.def.value < toaddr)
1458 sym_hash->root.u.def.value -= count;
1459
1460 /* As above, adjust the size if needed. */
1461 if (sym_hash->root.u.def.value < addr
1462 && sym_hash->root.u.def.value + sym_hash->size > addr
1463 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1464 sym_hash->size -= count;
1465 }
1466 }
1467
1468 return TRUE;
1469 }
1470
1471 /* Used to sort relocs by address. If relocs have the same address,
1472 we maintain their relative order, except that R_RX_RH_RELAX
1473 alignment relocs must be the first reloc for any given address. */
1474
1475 static void
1476 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1477 {
1478 int i;
1479 bfd_boolean again;
1480 bfd_boolean swappit;
1481
1482 /* This is almost a classic bubblesort. It's the slowest sort, but
1483 we're taking advantage of the fact that the relocations are
1484 mostly in order already (the assembler emits them that way) and
1485 we need relocs with the same address to remain in the same
1486 relative order. */
1487 again = TRUE;
1488 while (again)
1489 {
1490 again = FALSE;
1491 for (i = 0; i < count - 1; i ++)
1492 {
1493 if (r[i].r_offset > r[i + 1].r_offset)
1494 swappit = TRUE;
1495 else if (r[i].r_offset < r[i + 1].r_offset)
1496 swappit = FALSE;
1497 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1498 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1499 swappit = TRUE;
1500 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1501 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1502 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1503 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1504 swappit = TRUE;
1505 else
1506 swappit = FALSE;
1507
1508 if (swappit)
1509 {
1510 Elf_Internal_Rela tmp;
1511
1512 tmp = r[i];
1513 r[i] = r[i + 1];
1514 r[i + 1] = tmp;
1515 /* If we do move a reloc back, re-scan to see if it
1516 needs to be moved even further back. This avoids
1517 most of the O(n^2) behavior for our cases. */
1518 if (i > 0)
1519 i -= 2;
1520 again = TRUE;
1521 }
1522 }
1523 }
1524 }
1525
1526
1527 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1528 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1529 lrel, abfd, sec, link_info, scale)
1530
1531 static bfd_vma
1532 rx_offset_for_reloc (bfd * abfd,
1533 Elf_Internal_Rela * rel,
1534 Elf_Internal_Shdr * symtab_hdr,
1535 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1536 Elf_Internal_Sym * intsyms,
1537 Elf_Internal_Rela ** lrel,
1538 bfd * input_bfd,
1539 asection * input_section,
1540 struct bfd_link_info * info,
1541 int * scale)
1542 {
1543 bfd_vma symval;
1544 bfd_reloc_status_type r;
1545
1546 *scale = 1;
1547
1548 /* REL is the first of 1..N relocations. We compute the symbol
1549 value for each relocation, then combine them if needed. LREL
1550 gets a pointer to the last relocation used. */
1551 while (1)
1552 {
1553 int32_t tmp1, tmp2;
1554
1555 /* Get the value of the symbol referred to by the reloc. */
1556 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1557 {
1558 /* A local symbol. */
1559 Elf_Internal_Sym *isym;
1560 asection *ssec;
1561
1562 isym = intsyms + ELF32_R_SYM (rel->r_info);
1563
1564 if (isym->st_shndx == SHN_UNDEF)
1565 ssec = bfd_und_section_ptr;
1566 else if (isym->st_shndx == SHN_ABS)
1567 ssec = bfd_abs_section_ptr;
1568 else if (isym->st_shndx == SHN_COMMON)
1569 ssec = bfd_com_section_ptr;
1570 else
1571 ssec = bfd_section_from_elf_index (abfd,
1572 isym->st_shndx);
1573
1574 /* Initial symbol value. */
1575 symval = isym->st_value;
1576
1577 /* GAS may have made this symbol relative to a section, in
1578 which case, we have to add the addend to find the
1579 symbol. */
1580 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1581 symval += rel->r_addend;
1582
1583 if (ssec)
1584 {
1585 if ((ssec->flags & SEC_MERGE)
1586 && ssec->sec_info_type == ELF_INFO_TYPE_MERGE)
1587 symval = _bfd_merged_section_offset (abfd, & ssec,
1588 elf_section_data (ssec)->sec_info,
1589 symval);
1590 }
1591
1592 /* Now make the offset relative to where the linker is putting it. */
1593 if (ssec)
1594 symval +=
1595 ssec->output_section->vma + ssec->output_offset;
1596
1597 symval += rel->r_addend;
1598 }
1599 else
1600 {
1601 unsigned long indx;
1602 struct elf_link_hash_entry * h;
1603
1604 /* An external symbol. */
1605 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1606 h = elf_sym_hashes (abfd)[indx];
1607 BFD_ASSERT (h != NULL);
1608
1609 if (h->root.type != bfd_link_hash_defined
1610 && h->root.type != bfd_link_hash_defweak)
1611 {
1612 /* This appears to be a reference to an undefined
1613 symbol. Just ignore it--it will be caught by the
1614 regular reloc processing. */
1615 if (lrel)
1616 *lrel = rel;
1617 return 0;
1618 }
1619
1620 symval = (h->root.u.def.value
1621 + h->root.u.def.section->output_section->vma
1622 + h->root.u.def.section->output_offset);
1623
1624 symval += rel->r_addend;
1625 }
1626
1627 switch (ELF32_R_TYPE (rel->r_info))
1628 {
1629 case R_RX_SYM:
1630 RX_STACK_PUSH (symval);
1631 break;
1632
1633 case R_RX_OPneg:
1634 RX_STACK_POP (tmp1);
1635 tmp1 = - tmp1;
1636 RX_STACK_PUSH (tmp1);
1637 break;
1638
1639 case R_RX_OPadd:
1640 RX_STACK_POP (tmp1);
1641 RX_STACK_POP (tmp2);
1642 tmp1 += tmp2;
1643 RX_STACK_PUSH (tmp1);
1644 break;
1645
1646 case R_RX_OPsub:
1647 RX_STACK_POP (tmp1);
1648 RX_STACK_POP (tmp2);
1649 tmp2 -= tmp1;
1650 RX_STACK_PUSH (tmp2);
1651 break;
1652
1653 case R_RX_OPmul:
1654 RX_STACK_POP (tmp1);
1655 RX_STACK_POP (tmp2);
1656 tmp1 *= tmp2;
1657 RX_STACK_PUSH (tmp1);
1658 break;
1659
1660 case R_RX_OPdiv:
1661 RX_STACK_POP (tmp1);
1662 RX_STACK_POP (tmp2);
1663 tmp1 /= tmp2;
1664 RX_STACK_PUSH (tmp1);
1665 break;
1666
1667 case R_RX_OPshla:
1668 RX_STACK_POP (tmp1);
1669 RX_STACK_POP (tmp2);
1670 tmp1 <<= tmp2;
1671 RX_STACK_PUSH (tmp1);
1672 break;
1673
1674 case R_RX_OPshra:
1675 RX_STACK_POP (tmp1);
1676 RX_STACK_POP (tmp2);
1677 tmp1 >>= tmp2;
1678 RX_STACK_PUSH (tmp1);
1679 break;
1680
1681 case R_RX_OPsctsize:
1682 RX_STACK_PUSH (input_section->size);
1683 break;
1684
1685 case R_RX_OPscttop:
1686 RX_STACK_PUSH (input_section->output_section->vma);
1687 break;
1688
1689 case R_RX_OPand:
1690 RX_STACK_POP (tmp1);
1691 RX_STACK_POP (tmp2);
1692 tmp1 &= tmp2;
1693 RX_STACK_PUSH (tmp1);
1694 break;
1695
1696 case R_RX_OPor:
1697 RX_STACK_POP (tmp1);
1698 RX_STACK_POP (tmp2);
1699 tmp1 |= tmp2;
1700 RX_STACK_PUSH (tmp1);
1701 break;
1702
1703 case R_RX_OPxor:
1704 RX_STACK_POP (tmp1);
1705 RX_STACK_POP (tmp2);
1706 tmp1 ^= tmp2;
1707 RX_STACK_PUSH (tmp1);
1708 break;
1709
1710 case R_RX_OPnot:
1711 RX_STACK_POP (tmp1);
1712 tmp1 = ~ tmp1;
1713 RX_STACK_PUSH (tmp1);
1714 break;
1715
1716 case R_RX_OPmod:
1717 RX_STACK_POP (tmp1);
1718 RX_STACK_POP (tmp2);
1719 tmp1 %= tmp2;
1720 RX_STACK_PUSH (tmp1);
1721 break;
1722
1723 case R_RX_OPromtop:
1724 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1725 break;
1726
1727 case R_RX_OPramtop:
1728 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1729 break;
1730
1731 case R_RX_DIR16UL:
1732 case R_RX_DIR8UL:
1733 case R_RX_ABS16UL:
1734 case R_RX_ABS8UL:
1735 if (rx_stack_top)
1736 RX_STACK_POP (symval);
1737 if (lrel)
1738 *lrel = rel;
1739 *scale = 4;
1740 return symval;
1741
1742 case R_RX_DIR16UW:
1743 case R_RX_DIR8UW:
1744 case R_RX_ABS16UW:
1745 case R_RX_ABS8UW:
1746 if (rx_stack_top)
1747 RX_STACK_POP (symval);
1748 if (lrel)
1749 *lrel = rel;
1750 *scale = 2;
1751 return symval;
1752
1753 default:
1754 if (rx_stack_top)
1755 RX_STACK_POP (symval);
1756 if (lrel)
1757 *lrel = rel;
1758 return symval;
1759 }
1760
1761 rel ++;
1762 }
1763 }
1764
1765 static void
1766 move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1767 {
1768 bfd_vma old_offset = srel->r_offset;
1769
1770 irel ++;
1771 while (irel <= srel)
1772 {
1773 if (irel->r_offset == old_offset)
1774 irel->r_offset += delta;
1775 irel ++;
1776 }
1777 }
1778
1779 /* Relax one section. */
1780
1781 static bfd_boolean
1782 elf32_rx_relax_section (bfd * abfd,
1783 asection * sec,
1784 struct bfd_link_info * link_info,
1785 bfd_boolean * again,
1786 bfd_boolean allow_pcrel3)
1787 {
1788 Elf_Internal_Shdr * symtab_hdr;
1789 Elf_Internal_Shdr * shndx_hdr;
1790 Elf_Internal_Rela * internal_relocs;
1791 Elf_Internal_Rela * free_relocs = NULL;
1792 Elf_Internal_Rela * irel;
1793 Elf_Internal_Rela * srel;
1794 Elf_Internal_Rela * irelend;
1795 Elf_Internal_Rela * next_alignment;
1796 Elf_Internal_Rela * prev_alignment;
1797 bfd_byte * contents = NULL;
1798 bfd_byte * free_contents = NULL;
1799 Elf_Internal_Sym * intsyms = NULL;
1800 Elf_Internal_Sym * free_intsyms = NULL;
1801 Elf_External_Sym_Shndx * shndx_buf = NULL;
1802 bfd_vma pc;
1803 bfd_vma sec_start;
1804 bfd_vma symval = 0;
1805 int pcrel = 0;
1806 int code = 0;
1807 int section_alignment_glue;
1808 /* how much to scale the relocation by - 1, 2, or 4. */
1809 int scale;
1810
1811 /* Assume nothing changes. */
1812 *again = FALSE;
1813
1814 /* We don't have to do anything for a relocatable link, if
1815 this section does not have relocs, or if this is not a
1816 code section. */
1817 if (link_info->relocatable
1818 || (sec->flags & SEC_RELOC) == 0
1819 || sec->reloc_count == 0
1820 || (sec->flags & SEC_CODE) == 0)
1821 return TRUE;
1822
1823 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1824 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1825
1826 sec_start = sec->output_section->vma + sec->output_offset;
1827
1828 /* Get the section contents. */
1829 if (elf_section_data (sec)->this_hdr.contents != NULL)
1830 contents = elf_section_data (sec)->this_hdr.contents;
1831 /* Go get them off disk. */
1832 else
1833 {
1834 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
1835 goto error_return;
1836 elf_section_data (sec)->this_hdr.contents = contents;
1837 }
1838
1839 /* Read this BFD's symbols. */
1840 /* Get cached copy if it exists. */
1841 if (symtab_hdr->contents != NULL)
1842 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
1843 else
1844 {
1845 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
1846 symtab_hdr->contents = (bfd_byte *) intsyms;
1847 }
1848
1849 if (shndx_hdr->sh_size != 0)
1850 {
1851 bfd_size_type amt;
1852
1853 amt = symtab_hdr->sh_info;
1854 amt *= sizeof (Elf_External_Sym_Shndx);
1855 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
1856 if (shndx_buf == NULL)
1857 goto error_return;
1858 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
1859 || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
1860 goto error_return;
1861 shndx_hdr->contents = (bfd_byte *) shndx_buf;
1862 }
1863
1864 /* Get a copy of the native relocations. */
1865 internal_relocs = (_bfd_elf_link_read_relocs
1866 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1867 link_info->keep_memory));
1868 if (internal_relocs == NULL)
1869 goto error_return;
1870 if (! link_info->keep_memory)
1871 free_relocs = internal_relocs;
1872
1873 /* The RL_ relocs must be just before the operand relocs they go
1874 with, so we must sort them to guarantee this. We use bubblesort
1875 instead of qsort so we can guarantee that relocs with the same
1876 address remain in the same relative order. */
1877 reloc_bubblesort (internal_relocs, sec->reloc_count);
1878
1879 /* Walk through them looking for relaxing opportunities. */
1880 irelend = internal_relocs + sec->reloc_count;
1881
1882 /* This will either be NULL or a pointer to the next alignment
1883 relocation. */
1884 next_alignment = internal_relocs;
1885 /* This will be the previous alignment, although at first it points
1886 to the first real relocation. */
1887 prev_alignment = internal_relocs;
1888
1889 /* We calculate worst case shrinkage caused by alignment directives.
1890 No fool-proof, but better than either ignoring the problem or
1891 doing heavy duty analysis of all the alignment markers in all
1892 input sections. */
1893 section_alignment_glue = 0;
1894 for (irel = internal_relocs; irel < irelend; irel++)
1895 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1896 && irel->r_addend & RX_RELAXA_ALIGN)
1897 {
1898 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1899
1900 if (section_alignment_glue < this_glue)
1901 section_alignment_glue = this_glue;
1902 }
1903 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
1904 shrinkage. */
1905 section_alignment_glue *= 2;
1906
1907 for (irel = internal_relocs; irel < irelend; irel++)
1908 {
1909 unsigned char *insn;
1910 int nrelocs;
1911
1912 /* The insns we care about are all marked with one of these. */
1913 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
1914 continue;
1915
1916 if (irel->r_addend & RX_RELAXA_ALIGN
1917 || next_alignment == internal_relocs)
1918 {
1919 /* When we delete bytes, we need to maintain all the alignments
1920 indicated. In addition, we need to be careful about relaxing
1921 jumps across alignment boundaries - these displacements
1922 *grow* when we delete bytes. For now, don't shrink
1923 displacements across an alignment boundary, just in case.
1924 Note that this only affects relocations to the same
1925 section. */
1926 prev_alignment = next_alignment;
1927 next_alignment += 2;
1928 while (next_alignment < irelend
1929 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
1930 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
1931 next_alignment ++;
1932 if (next_alignment >= irelend || next_alignment->r_offset == 0)
1933 next_alignment = NULL;
1934 }
1935
1936 /* When we hit alignment markers, see if we've shrunk enough
1937 before them to reduce the gap without violating the alignment
1938 requirements. */
1939 if (irel->r_addend & RX_RELAXA_ALIGN)
1940 {
1941 /* At this point, the next relocation *should* be the ELIGN
1942 end marker. */
1943 Elf_Internal_Rela *erel = irel + 1;
1944 unsigned int alignment, nbytes;
1945
1946 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
1947 continue;
1948 if (!(erel->r_addend & RX_RELAXA_ELIGN))
1949 continue;
1950
1951 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1952
1953 if (erel->r_offset - irel->r_offset < alignment)
1954 continue;
1955
1956 nbytes = erel->r_offset - irel->r_offset;
1957 nbytes /= alignment;
1958 nbytes *= alignment;
1959
1960 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
1961 erel->r_offset == sec->size);
1962 *again = TRUE;
1963
1964 continue;
1965 }
1966
1967 if (irel->r_addend & RX_RELAXA_ELIGN)
1968 continue;
1969
1970 insn = contents + irel->r_offset;
1971
1972 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
1973
1974 /* At this point, we have an insn that is a candidate for linker
1975 relaxation. There are NRELOCS relocs following that may be
1976 relaxed, although each reloc may be made of more than one
1977 reloc entry (such as gp-rel symbols). */
1978
1979 /* Get the value of the symbol referred to by the reloc. Just
1980 in case this is the last reloc in the list, use the RL's
1981 addend to choose between this reloc (no addend) or the next
1982 (yes addend, which means at least one following reloc). */
1983
1984 /* srel points to the "current" reloction for this insn -
1985 actually the last reloc for a given operand, which is the one
1986 we need to update. We check the relaxations in the same
1987 order that the relocations happen, so we'll just push it
1988 along as we go. */
1989 srel = irel;
1990
1991 pc = sec->output_section->vma + sec->output_offset
1992 + srel->r_offset;
1993
1994 #define GET_RELOC \
1995 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
1996 pcrel = symval - pc + srel->r_addend; \
1997 nrelocs --;
1998
1999 #define SNIPNR(offset, nbytes) \
2000 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2001 #define SNIP(offset, nbytes, newtype) \
2002 SNIPNR (offset, nbytes); \
2003 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2004
2005 /* The order of these bit tests must match the order that the
2006 relocs appear in. Since we sorted those by offset, we can
2007 predict them. */
2008
2009 /* Note that the numbers in, say, DSP6 are the bit offsets of
2010 the code fields that describe the operand. Bits number 0 for
2011 the MSB of insn[0]. */
2012
2013 /* DSP* codes:
2014 0 00 [reg]
2015 1 01 dsp:8[reg]
2016 2 10 dsp:16[reg]
2017 3 11 reg */
2018 if (irel->r_addend & RX_RELAXA_DSP6)
2019 {
2020 GET_RELOC;
2021
2022 code = insn[0] & 3;
2023 if (code == 2 && symval/scale <= 255)
2024 {
2025 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2026 insn[0] &= 0xfc;
2027 insn[0] |= 0x01;
2028 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2029 if (newrel != ELF32_R_TYPE (srel->r_info))
2030 {
2031 SNIP (3, 1, newrel);
2032 *again = TRUE;
2033 }
2034 }
2035
2036 else if (code == 1 && symval == 0)
2037 {
2038 insn[0] &= 0xfc;
2039 SNIP (2, 1, R_RX_NONE);
2040 *again = TRUE;
2041 }
2042
2043 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2044 else if (code == 1 && symval/scale <= 31
2045 /* Decodable bits. */
2046 && (insn[0] & 0xcc) == 0xcc
2047 /* Width. */
2048 && (insn[0] & 0x30) != 3
2049 /* Register MSBs. */
2050 && (insn[1] & 0x88) == 0x00)
2051 {
2052 int newrel = 0;
2053
2054 insn[0] = 0x88 | (insn[0] & 0x30);
2055 /* The register fields are in the right place already. */
2056
2057 /* We can't relax this new opcode. */
2058 irel->r_addend = 0;
2059
2060 switch ((insn[0] & 0x30) >> 4)
2061 {
2062 case 0:
2063 newrel = R_RX_RH_ABS5p5B;
2064 break;
2065 case 1:
2066 newrel = R_RX_RH_ABS5p5W;
2067 break;
2068 case 2:
2069 newrel = R_RX_RH_ABS5p5L;
2070 break;
2071 }
2072
2073 move_reloc (irel, srel, -2);
2074 SNIP (2, 1, newrel);
2075 }
2076
2077 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2078 else if (code == 1 && symval/scale <= 31
2079 /* Decodable bits. */
2080 && (insn[0] & 0xf8) == 0x58
2081 /* Register MSBs. */
2082 && (insn[1] & 0x88) == 0x00)
2083 {
2084 int newrel = 0;
2085
2086 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2087 /* The register fields are in the right place already. */
2088
2089 /* We can't relax this new opcode. */
2090 irel->r_addend = 0;
2091
2092 switch ((insn[0] & 0x08) >> 3)
2093 {
2094 case 0:
2095 newrel = R_RX_RH_ABS5p5B;
2096 break;
2097 case 1:
2098 newrel = R_RX_RH_ABS5p5W;
2099 break;
2100 }
2101
2102 move_reloc (irel, srel, -2);
2103 SNIP (2, 1, newrel);
2104 }
2105 }
2106
2107 /* A DSP4 operand always follows a DSP6 operand, even if there's
2108 no relocation for it. We have to read the code out of the
2109 opcode to calculate the offset of the operand. */
2110 if (irel->r_addend & RX_RELAXA_DSP4)
2111 {
2112 int code6, offset = 0;
2113
2114 GET_RELOC;
2115
2116 code6 = insn[0] & 0x03;
2117 switch (code6)
2118 {
2119 case 0: offset = 2; break;
2120 case 1: offset = 3; break;
2121 case 2: offset = 4; break;
2122 case 3: offset = 2; break;
2123 }
2124
2125 code = (insn[0] & 0x0c) >> 2;
2126
2127 if (code == 2 && symval / scale <= 255)
2128 {
2129 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2130
2131 insn[0] &= 0xf3;
2132 insn[0] |= 0x04;
2133 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2134 if (newrel != ELF32_R_TYPE (srel->r_info))
2135 {
2136 SNIP (offset+1, 1, newrel);
2137 *again = TRUE;
2138 }
2139 }
2140
2141 else if (code == 1 && symval == 0)
2142 {
2143 insn[0] &= 0xf3;
2144 SNIP (offset, 1, R_RX_NONE);
2145 *again = TRUE;
2146 }
2147 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2148 else if (code == 1 && symval/scale <= 31
2149 /* Decodable bits. */
2150 && (insn[0] & 0xc3) == 0xc3
2151 /* Width. */
2152 && (insn[0] & 0x30) != 3
2153 /* Register MSBs. */
2154 && (insn[1] & 0x88) == 0x00)
2155 {
2156 int newrel = 0;
2157
2158 insn[0] = 0x80 | (insn[0] & 0x30);
2159 /* The register fields are in the right place already. */
2160
2161 /* We can't relax this new opcode. */
2162 irel->r_addend = 0;
2163
2164 switch ((insn[0] & 0x30) >> 4)
2165 {
2166 case 0:
2167 newrel = R_RX_RH_ABS5p5B;
2168 break;
2169 case 1:
2170 newrel = R_RX_RH_ABS5p5W;
2171 break;
2172 case 2:
2173 newrel = R_RX_RH_ABS5p5L;
2174 break;
2175 }
2176
2177 move_reloc (irel, srel, -2);
2178 SNIP (2, 1, newrel);
2179 }
2180 }
2181
2182 /* These always occur alone, but the offset depends on whether
2183 it's a MEMEX opcode (0x06) or not. */
2184 if (irel->r_addend & RX_RELAXA_DSP14)
2185 {
2186 int offset;
2187 GET_RELOC;
2188
2189 if (insn[0] == 0x06)
2190 offset = 3;
2191 else
2192 offset = 4;
2193
2194 code = insn[1] & 3;
2195
2196 if (code == 2 && symval / scale <= 255)
2197 {
2198 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2199
2200 insn[1] &= 0xfc;
2201 insn[1] |= 0x01;
2202 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2203 if (newrel != ELF32_R_TYPE (srel->r_info))
2204 {
2205 SNIP (offset, 1, newrel);
2206 *again = TRUE;
2207 }
2208 }
2209 else if (code == 1 && symval == 0)
2210 {
2211 insn[1] &= 0xfc;
2212 SNIP (offset, 1, R_RX_NONE);
2213 *again = TRUE;
2214 }
2215 }
2216
2217 /* IMM* codes:
2218 0 00 imm:32
2219 1 01 simm:8
2220 2 10 simm:16
2221 3 11 simm:24. */
2222
2223 /* These always occur alone. */
2224 if (irel->r_addend & RX_RELAXA_IMM6)
2225 {
2226 long ssymval;
2227
2228 GET_RELOC;
2229
2230 /* These relocations sign-extend, so we must do signed compares. */
2231 ssymval = (long) symval;
2232
2233 code = insn[0] & 0x03;
2234
2235 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2236 {
2237 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2238
2239 insn[0] &= 0xfc;
2240 insn[0] |= 0x03;
2241 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2242 if (newrel != ELF32_R_TYPE (srel->r_info))
2243 {
2244 SNIP (2, 1, newrel);
2245 *again = TRUE;
2246 }
2247 }
2248
2249 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2250 {
2251 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2252
2253 insn[0] &= 0xfc;
2254 insn[0] |= 0x02;
2255 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2256 if (newrel != ELF32_R_TYPE (srel->r_info))
2257 {
2258 SNIP (2, 1, newrel);
2259 *again = TRUE;
2260 }
2261 }
2262
2263 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2264 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2265 /* Decodable bits. */
2266 && (insn[0] & 0xfc) == 0x74
2267 /* Decodable bits. */
2268 && ((insn[1] & 0xf0) == 0x00))
2269 {
2270 int newrel;
2271
2272 insn[0] = 0x75;
2273 insn[1] = 0x50 | (insn[1] & 0x0f);
2274
2275 /* We can't relax this new opcode. */
2276 irel->r_addend = 0;
2277
2278 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2279 newrel = R_RX_ABS8U;
2280 else
2281 newrel = R_RX_DIR8U;
2282
2283 SNIP (2, 1, newrel);
2284 *again = TRUE;
2285 }
2286
2287 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2288 {
2289 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2290
2291 insn[0] &= 0xfc;
2292 insn[0] |= 0x01;
2293 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2294 if (newrel != ELF32_R_TYPE (srel->r_info))
2295 {
2296 SNIP (2, 1, newrel);
2297 *again = TRUE;
2298 }
2299 }
2300
2301 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2302 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2303 /* Decodable bits and immediate type. */
2304 && insn[0] == 0x75
2305 /* Decodable bits. */
2306 && (insn[1] & 0xc0) == 0x00)
2307 {
2308 static const int newop[4] = { 1, 3, 4, 5 };
2309
2310 insn[0] = 0x60 | newop[insn[1] >> 4];
2311 /* The register number doesn't move. */
2312
2313 /* We can't relax this new opcode. */
2314 irel->r_addend = 0;
2315
2316 move_reloc (irel, srel, -1);
2317
2318 SNIP (2, 1, R_RX_RH_UIMM4p8);
2319 *again = TRUE;
2320 }
2321
2322 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2323 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2324 /* Decodable bits and immediate type. */
2325 && insn[0] == 0x71
2326 /* Same register for source and destination. */
2327 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2328 {
2329 int newrel;
2330
2331 /* Note that we can't turn "add $0,Rs" into a NOP
2332 because the flags need to be set right. */
2333
2334 if (ssymval < 0)
2335 {
2336 insn[0] = 0x60; /* Subtract. */
2337 newrel = R_RX_RH_UNEG4p8;
2338 }
2339 else
2340 {
2341 insn[0] = 0x62; /* Add. */
2342 newrel = R_RX_RH_UIMM4p8;
2343 }
2344
2345 /* The register number is in the right place. */
2346
2347 /* We can't relax this new opcode. */
2348 irel->r_addend = 0;
2349
2350 move_reloc (irel, srel, -1);
2351
2352 SNIP (2, 1, newrel);
2353 *again = TRUE;
2354 }
2355 }
2356
2357 /* These are either matched with a DSP6 (2-byte base) or an id24
2358 (3-byte base). */
2359 if (irel->r_addend & RX_RELAXA_IMM12)
2360 {
2361 int dspcode, offset = 0;
2362 long ssymval;
2363
2364 GET_RELOC;
2365
2366 if ((insn[0] & 0xfc) == 0xfc)
2367 dspcode = 1; /* Just something with one byte operand. */
2368 else
2369 dspcode = insn[0] & 3;
2370 switch (dspcode)
2371 {
2372 case 0: offset = 2; break;
2373 case 1: offset = 3; break;
2374 case 2: offset = 4; break;
2375 case 3: offset = 2; break;
2376 }
2377
2378 /* These relocations sign-extend, so we must do signed compares. */
2379 ssymval = (long) symval;
2380
2381 code = (insn[1] >> 2) & 3;
2382 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2383 {
2384 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2385
2386 insn[1] &= 0xf3;
2387 insn[1] |= 0x0c;
2388 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2389 if (newrel != ELF32_R_TYPE (srel->r_info))
2390 {
2391 SNIP (offset, 1, newrel);
2392 *again = TRUE;
2393 }
2394 }
2395
2396 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2397 {
2398 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2399
2400 insn[1] &= 0xf3;
2401 insn[1] |= 0x08;
2402 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2403 if (newrel != ELF32_R_TYPE (srel->r_info))
2404 {
2405 SNIP (offset, 1, newrel);
2406 *again = TRUE;
2407 }
2408 }
2409
2410 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2411 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2412 /* Decodable bits. */
2413 && insn[0] == 0xfb
2414 /* Decodable bits. */
2415 && ((insn[1] & 0x03) == 0x02))
2416 {
2417 int newrel;
2418
2419 insn[0] = 0x75;
2420 insn[1] = 0x40 | (insn[1] >> 4);
2421
2422 /* We can't relax this new opcode. */
2423 irel->r_addend = 0;
2424
2425 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2426 newrel = R_RX_ABS8U;
2427 else
2428 newrel = R_RX_DIR8U;
2429
2430 SNIP (2, 1, newrel);
2431 *again = TRUE;
2432 }
2433
2434 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2435 {
2436 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2437
2438 insn[1] &= 0xf3;
2439 insn[1] |= 0x04;
2440 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2441 if (newrel != ELF32_R_TYPE(srel->r_info))
2442 {
2443 SNIP (offset, 1, newrel);
2444 *again = TRUE;
2445 }
2446 }
2447
2448 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2449 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2450 /* Decodable bits. */
2451 && insn[0] == 0xfb
2452 /* Decodable bits. */
2453 && ((insn[1] & 0x03) == 0x02))
2454 {
2455 insn[0] = 0x66;
2456 insn[1] = insn[1] >> 4;
2457
2458 /* We can't relax this new opcode. */
2459 irel->r_addend = 0;
2460
2461 move_reloc (irel, srel, -1);
2462
2463 SNIP (2, 1, R_RX_RH_UIMM4p8);
2464 *again = TRUE;
2465 }
2466 }
2467
2468 if (irel->r_addend & RX_RELAXA_BRA)
2469 {
2470 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2471 int max_pcrel3 = 4;
2472 int alignment_glue = 0;
2473
2474 GET_RELOC;
2475
2476 /* Branches over alignment chunks are problematic, as
2477 deleting bytes here makes the branch *further* away. We
2478 can be agressive with branches within this alignment
2479 block, but not branches outside it. */
2480 if ((prev_alignment == NULL
2481 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2482 && (next_alignment == NULL
2483 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2484 alignment_glue = section_alignment_glue;
2485
2486 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2487 && srel[1].r_addend & RX_RELAXA_BRA
2488 && srel[1].r_offset < irel->r_offset + pcrel)
2489 max_pcrel3 ++;
2490
2491 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2492
2493 /* The values we compare PCREL with are not what you'd
2494 expect; they're off by a little to compensate for (1)
2495 where the reloc is relative to the insn, and (2) how much
2496 the insn is going to change when we relax it. */
2497
2498 /* These we have to decode. */
2499 switch (insn[0])
2500 {
2501 case 0x04: /* BRA pcdsp:24 */
2502 if (-32768 + alignment_glue <= pcrel
2503 && pcrel <= 32765 - alignment_glue)
2504 {
2505 insn[0] = 0x38;
2506 SNIP (3, 1, newrel);
2507 *again = TRUE;
2508 }
2509 break;
2510
2511 case 0x38: /* BRA pcdsp:16 */
2512 if (-128 + alignment_glue <= pcrel
2513 && pcrel <= 127 - alignment_glue)
2514 {
2515 insn[0] = 0x2e;
2516 SNIP (2, 1, newrel);
2517 *again = TRUE;
2518 }
2519 break;
2520
2521 case 0x2e: /* BRA pcdsp:8 */
2522 /* Note that there's a risk here of shortening things so
2523 much that we no longer fit this reloc; it *should*
2524 only happen when you branch across a branch, and that
2525 branch also devolves into BRA.S. "Real" code should
2526 be OK. */
2527 if (max_pcrel3 + alignment_glue <= pcrel
2528 && pcrel <= 10 - alignment_glue
2529 && allow_pcrel3)
2530 {
2531 insn[0] = 0x08;
2532 SNIP (1, 1, newrel);
2533 move_reloc (irel, srel, -1);
2534 *again = TRUE;
2535 }
2536 break;
2537
2538 case 0x05: /* BSR pcdsp:24 */
2539 if (-32768 + alignment_glue <= pcrel
2540 && pcrel <= 32765 - alignment_glue)
2541 {
2542 insn[0] = 0x39;
2543 SNIP (1, 1, newrel);
2544 *again = TRUE;
2545 }
2546 break;
2547
2548 case 0x3a: /* BEQ.W pcdsp:16 */
2549 case 0x3b: /* BNE.W pcdsp:16 */
2550 if (-128 + alignment_glue <= pcrel
2551 && pcrel <= 127 - alignment_glue)
2552 {
2553 insn[0] = 0x20 | (insn[0] & 1);
2554 SNIP (1, 1, newrel);
2555 *again = TRUE;
2556 }
2557 break;
2558
2559 case 0x20: /* BEQ.B pcdsp:8 */
2560 case 0x21: /* BNE.B pcdsp:8 */
2561 if (max_pcrel3 + alignment_glue <= pcrel
2562 && pcrel - alignment_glue <= 10
2563 && allow_pcrel3)
2564 {
2565 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2566 SNIP (1, 1, newrel);
2567 move_reloc (irel, srel, -1);
2568 *again = TRUE;
2569 }
2570 break;
2571
2572 case 0x16: /* synthetic BNE dsp24 */
2573 case 0x1e: /* synthetic BEQ dsp24 */
2574 if (-32767 + alignment_glue <= pcrel
2575 && pcrel <= 32766 - alignment_glue
2576 && insn[1] == 0x04)
2577 {
2578 if (insn[0] == 0x16)
2579 insn[0] = 0x3b;
2580 else
2581 insn[0] = 0x3a;
2582 /* We snip out the bytes at the end else the reloc
2583 will get moved too, and too much. */
2584 SNIP (3, 2, newrel);
2585 move_reloc (irel, srel, -1);
2586 *again = TRUE;
2587 }
2588 break;
2589 }
2590
2591 /* Special case - synthetic conditional branches, pcrel24.
2592 Note that EQ and NE have been handled above. */
2593 if ((insn[0] & 0xf0) == 0x20
2594 && insn[1] == 0x06
2595 && insn[2] == 0x04
2596 && srel->r_offset != irel->r_offset + 1
2597 && -32767 + alignment_glue <= pcrel
2598 && pcrel <= 32766 - alignment_glue)
2599 {
2600 insn[1] = 0x05;
2601 insn[2] = 0x38;
2602 SNIP (5, 1, newrel);
2603 *again = TRUE;
2604 }
2605
2606 /* Special case - synthetic conditional branches, pcrel16 */
2607 if ((insn[0] & 0xf0) == 0x20
2608 && insn[1] == 0x05
2609 && insn[2] == 0x38
2610 && srel->r_offset != irel->r_offset + 1
2611 && -127 + alignment_glue <= pcrel
2612 && pcrel <= 126 - alignment_glue)
2613 {
2614 int cond = (insn[0] & 0x0f) ^ 0x01;
2615
2616 insn[0] = 0x20 | cond;
2617 /* By moving the reloc first, we avoid having
2618 delete_bytes move it also. */
2619 move_reloc (irel, srel, -2);
2620 SNIP (2, 3, newrel);
2621 *again = TRUE;
2622 }
2623 }
2624
2625 BFD_ASSERT (nrelocs == 0);
2626
2627 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2628 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2629 because it may have one or two relocations. */
2630 if ((insn[0] & 0xfc) == 0xf8
2631 && (insn[1] & 0x80) == 0x00
2632 && (insn[0] & 0x03) != 0x03)
2633 {
2634 int dcode, icode, reg, ioff, dscale, ilen;
2635 bfd_vma disp_val = 0;
2636 long imm_val = 0;
2637 Elf_Internal_Rela * disp_rel = 0;
2638 Elf_Internal_Rela * imm_rel = 0;
2639
2640 /* Reset this. */
2641 srel = irel;
2642
2643 dcode = insn[0] & 0x03;
2644 icode = (insn[1] >> 2) & 0x03;
2645 reg = (insn[1] >> 4) & 0x0f;
2646
2647 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2648
2649 /* Figure out what the dispacement is. */
2650 if (dcode == 1 || dcode == 2)
2651 {
2652 /* There's a displacement. See if there's a reloc for it. */
2653 if (srel[1].r_offset == irel->r_offset + 2)
2654 {
2655 GET_RELOC;
2656 disp_val = symval;
2657 disp_rel = srel;
2658 }
2659 else
2660 {
2661 if (dcode == 1)
2662 disp_val = insn[2];
2663 else
2664 {
2665 #if RX_OPCODE_BIG_ENDIAN
2666 disp_val = insn[2] * 256 + insn[3];
2667 #else
2668 disp_val = insn[2] + insn[3] * 256;
2669 #endif
2670 }
2671 switch (insn[1] & 3)
2672 {
2673 case 1:
2674 disp_val *= 2;
2675 scale = 2;
2676 break;
2677 case 2:
2678 disp_val *= 4;
2679 scale = 4;
2680 break;
2681 }
2682 }
2683 }
2684
2685 dscale = scale;
2686
2687 /* Figure out what the immediate is. */
2688 if (srel[1].r_offset == irel->r_offset + ioff)
2689 {
2690 GET_RELOC;
2691 imm_val = (long) symval;
2692 imm_rel = srel;
2693 }
2694 else
2695 {
2696 unsigned char * ip = insn + ioff;
2697
2698 switch (icode)
2699 {
2700 case 1:
2701 /* For byte writes, we don't sign extend. Makes the math easier later. */
2702 if (scale == 1)
2703 imm_val = ip[0];
2704 else
2705 imm_val = (char) ip[0];
2706 break;
2707 case 2:
2708 #if RX_OPCODE_BIG_ENDIAN
2709 imm_val = ((char) ip[0] << 8) | ip[1];
2710 #else
2711 imm_val = ((char) ip[1] << 8) | ip[0];
2712 #endif
2713 break;
2714 case 3:
2715 #if RX_OPCODE_BIG_ENDIAN
2716 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2717 #else
2718 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2719 #endif
2720 break;
2721 case 0:
2722 #if RX_OPCODE_BIG_ENDIAN
2723 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2724 #else
2725 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2726 #endif
2727 break;
2728 }
2729 }
2730
2731 ilen = 2;
2732
2733 switch (dcode)
2734 {
2735 case 1:
2736 ilen += 1;
2737 break;
2738 case 2:
2739 ilen += 2;
2740 break;
2741 }
2742
2743 switch (icode)
2744 {
2745 case 1:
2746 ilen += 1;
2747 break;
2748 case 2:
2749 ilen += 2;
2750 break;
2751 case 3:
2752 ilen += 3;
2753 break;
2754 case 4:
2755 ilen += 4;
2756 break;
2757 }
2758
2759 /* The shortcut happens when the immediate is 0..255,
2760 register r0 to r7, and displacement (scaled) 0..31. */
2761
2762 if (0 <= imm_val && imm_val <= 255
2763 && 0 <= reg && reg <= 7
2764 && disp_val / dscale <= 31)
2765 {
2766 insn[0] = 0x3c | (insn[1] & 0x03);
2767 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2768 insn[2] = imm_val;
2769
2770 if (disp_rel)
2771 {
2772 int newrel = R_RX_NONE;
2773
2774 switch (dscale)
2775 {
2776 case 1:
2777 newrel = R_RX_RH_ABS5p8B;
2778 break;
2779 case 2:
2780 newrel = R_RX_RH_ABS5p8W;
2781 break;
2782 case 4:
2783 newrel = R_RX_RH_ABS5p8L;
2784 break;
2785 }
2786 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2787 move_reloc (irel, disp_rel, -1);
2788 }
2789 if (imm_rel)
2790 {
2791 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2792 move_reloc (disp_rel ? disp_rel : irel,
2793 imm_rel,
2794 irel->r_offset - imm_rel->r_offset + 2);
2795 }
2796
2797 SNIPNR (3, ilen - 3);
2798 *again = TRUE;
2799
2800 /* We can't relax this new opcode. */
2801 irel->r_addend = 0;
2802 }
2803 }
2804 }
2805
2806 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2807 whatever they're branching over won't shrink any more. If we're
2808 basically done here, do one more pass just for branches - but
2809 don't request a pass after that one! */
2810 if (!*again && !allow_pcrel3)
2811 {
2812 bfd_boolean ignored;
2813
2814 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
2815 }
2816
2817 return TRUE;
2818
2819 error_return:
2820 if (free_relocs != NULL)
2821 free (free_relocs);
2822
2823 if (free_contents != NULL)
2824 free (free_contents);
2825
2826 if (shndx_buf != NULL)
2827 {
2828 shndx_hdr->contents = NULL;
2829 free (shndx_buf);
2830 }
2831
2832 if (free_intsyms != NULL)
2833 free (free_intsyms);
2834
2835 return FALSE;
2836 }
2837
2838 static bfd_boolean
2839 elf32_rx_relax_section_wrapper (bfd * abfd,
2840 asection * sec,
2841 struct bfd_link_info * link_info,
2842 bfd_boolean * again)
2843 {
2844 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
2845 }
2846 \f
2847 /* Function to set the ELF flag bits. */
2848
2849 static bfd_boolean
2850 rx_elf_set_private_flags (bfd * abfd, flagword flags)
2851 {
2852 elf_elfheader (abfd)->e_flags = flags;
2853 elf_flags_init (abfd) = TRUE;
2854 return TRUE;
2855 }
2856
2857 static bfd_boolean no_warn_mismatch = FALSE;
2858
2859 void bfd_elf32_rx_set_target_flags (bfd_boolean);
2860
2861 void
2862 bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch)
2863 {
2864 no_warn_mismatch = user_no_warn_mismatch;
2865 }
2866
2867 /* Merge backend specific data from an object file to the output
2868 object file when linking. */
2869
2870 static bfd_boolean
2871 rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2872 {
2873 flagword old_flags;
2874 flagword new_flags;
2875 bfd_boolean error = FALSE;
2876
2877 new_flags = elf_elfheader (ibfd)->e_flags;
2878 old_flags = elf_elfheader (obfd)->e_flags;
2879
2880 if (!elf_flags_init (obfd))
2881 {
2882 /* First call, no flags set. */
2883 elf_flags_init (obfd) = TRUE;
2884 elf_elfheader (obfd)->e_flags = new_flags;
2885 }
2886 else if (old_flags != new_flags)
2887 {
2888 flagword known_flags = E_FLAG_RX_64BIT_DOUBLES | E_FLAG_RX_DSP;
2889
2890 if ((old_flags ^ new_flags) & known_flags)
2891 {
2892 /* Only complain if flag bits we care about do not match.
2893 Other bits may be set, since older binaries did use some
2894 deprecated flags. */
2895 if (no_warn_mismatch)
2896 {
2897 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
2898 }
2899 else
2900 {
2901 (*_bfd_error_handler)
2902 ("ELF header flags mismatch: old_flags = 0x%.8lx, new_flags = 0x%.8lx, filename = %s",
2903 old_flags, new_flags, bfd_get_filename (ibfd));
2904 error = TRUE;
2905 }
2906 }
2907 else
2908 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
2909 }
2910
2911 if (error)
2912 bfd_set_error (bfd_error_bad_value);
2913
2914 return !error;
2915 }
2916 \f
2917 static bfd_boolean
2918 rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
2919 {
2920 FILE * file = (FILE *) ptr;
2921 flagword flags;
2922
2923 BFD_ASSERT (abfd != NULL && ptr != NULL);
2924
2925 /* Print normal ELF private data. */
2926 _bfd_elf_print_private_bfd_data (abfd, ptr);
2927
2928 flags = elf_elfheader (abfd)->e_flags;
2929 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
2930
2931 if (flags & E_FLAG_RX_64BIT_DOUBLES)
2932 fprintf (file, _(" [64-bit doubles]"));
2933 if (flags & E_FLAG_RX_DSP)
2934 fprintf (file, _(" [dsp]"));
2935
2936 fputc ('\n', file);
2937 return TRUE;
2938 }
2939
2940 /* Return the MACH for an e_flags value. */
2941
2942 static int
2943 elf32_rx_machine (bfd * abfd)
2944 {
2945 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
2946 return bfd_mach_rx;
2947
2948 return 0;
2949 }
2950
2951 static bfd_boolean
2952 rx_elf_object_p (bfd * abfd)
2953 {
2954 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
2955 elf32_rx_machine (abfd));
2956 return TRUE;
2957 }
2958 \f
2959
2960 #ifdef DEBUG
2961 void
2962 rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
2963 {
2964 size_t locsymcount;
2965 Elf_Internal_Sym * isymbuf;
2966 Elf_Internal_Sym * isymend;
2967 Elf_Internal_Sym * isym;
2968 Elf_Internal_Shdr * symtab_hdr;
2969 bfd_boolean free_internal = FALSE, free_external = FALSE;
2970 char * st_info_str;
2971 char * st_info_stb_str;
2972 char * st_other_str;
2973 char * st_shndx_str;
2974
2975 if (! internal_syms)
2976 {
2977 internal_syms = bfd_malloc (1000);
2978 free_internal = 1;
2979 }
2980 if (! external_syms)
2981 {
2982 external_syms = bfd_malloc (1000);
2983 free_external = 1;
2984 }
2985
2986 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2987 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
2988 if (free_internal)
2989 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2990 symtab_hdr->sh_info, 0,
2991 internal_syms, external_syms, NULL);
2992 else
2993 isymbuf = internal_syms;
2994 isymend = isymbuf + locsymcount;
2995
2996 for (isym = isymbuf ; isym < isymend ; isym++)
2997 {
2998 switch (ELF_ST_TYPE (isym->st_info))
2999 {
3000 case STT_FUNC: st_info_str = "STT_FUNC";
3001 case STT_SECTION: st_info_str = "STT_SECTION";
3002 case STT_FILE: st_info_str = "STT_FILE";
3003 case STT_OBJECT: st_info_str = "STT_OBJECT";
3004 case STT_TLS: st_info_str = "STT_TLS";
3005 default: st_info_str = "";
3006 }
3007 switch (ELF_ST_BIND (isym->st_info))
3008 {
3009 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
3010 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
3011 default: st_info_stb_str = "";
3012 }
3013 switch (ELF_ST_VISIBILITY (isym->st_other))
3014 {
3015 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
3016 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
3017 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
3018 default: st_other_str = "";
3019 }
3020 switch (isym->st_shndx)
3021 {
3022 case SHN_ABS: st_shndx_str = "SHN_ABS";
3023 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
3024 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
3025 default: st_shndx_str = "";
3026 }
3027
3028 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3029 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3030 isym,
3031 (unsigned long) isym->st_value,
3032 (unsigned long) isym->st_size,
3033 isym->st_name,
3034 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3035 isym->st_name),
3036 isym->st_info, st_info_str, st_info_stb_str,
3037 isym->st_other, st_other_str,
3038 isym->st_shndx, st_shndx_str);
3039 }
3040 if (free_internal)
3041 free (internal_syms);
3042 if (free_external)
3043 free (external_syms);
3044 }
3045
3046 char *
3047 rx_get_reloc (long reloc)
3048 {
3049 if (0 <= reloc && reloc < R_RX_max)
3050 return rx_elf_howto_table[reloc].name;
3051 return "";
3052 }
3053 #endif /* DEBUG */
3054
3055 \f
3056 /* We must take care to keep the on-disk copy of any code sections
3057 that are fully linked swapped if the target is big endian, to match
3058 the Renesas tools. */
3059
3060 /* The rule is: big endian object that are final-link executables,
3061 have code sections stored with 32-bit words swapped relative to
3062 what you'd get by default. */
3063
3064 static bfd_boolean
3065 rx_get_section_contents (bfd * abfd,
3066 sec_ptr section,
3067 void * location,
3068 file_ptr offset,
3069 bfd_size_type count)
3070 {
3071 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3072 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3073 bfd_boolean rv;
3074
3075 #ifdef DJDEBUG
3076 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3077 (long) offset, (long) count, section->name,
3078 bfd_big_endian(abfd) ? "be" : "le",
3079 exec, s_code, (long unsigned) section->filepos,
3080 (long unsigned) offset);
3081 #endif
3082
3083 if (exec && s_code && bfd_big_endian (abfd))
3084 {
3085 char * cloc = (char *) location;
3086 bfd_size_type cnt, end_cnt;
3087
3088 rv = TRUE;
3089
3090 /* Fetch and swap unaligned bytes at the beginning. */
3091 if (offset % 4)
3092 {
3093 char buf[4];
3094
3095 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3096 (offset & -4), 4);
3097 if (!rv)
3098 return FALSE;
3099
3100 bfd_putb32 (bfd_getl32 (buf), buf);
3101
3102 cnt = 4 - (offset % 4);
3103 if (cnt > count)
3104 cnt = count;
3105
3106 memcpy (location, buf + (offset % 4), cnt);
3107
3108 count -= cnt;
3109 offset += cnt;
3110 cloc += count;
3111 }
3112
3113 end_cnt = count % 4;
3114
3115 /* Fetch and swap the middle bytes. */
3116 if (count >= 4)
3117 {
3118 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3119 count - end_cnt);
3120 if (!rv)
3121 return FALSE;
3122
3123 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3124 bfd_putb32 (bfd_getl32 (cloc), cloc);
3125 }
3126
3127 /* Fetch and swap the end bytes. */
3128 if (end_cnt > 0)
3129 {
3130 char buf[4];
3131
3132 /* Fetch the end bytes. */
3133 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3134 offset + count - end_cnt, 4);
3135 if (!rv)
3136 return FALSE;
3137
3138 bfd_putb32 (bfd_getl32 (buf), buf);
3139 memcpy (cloc, buf, end_cnt);
3140 }
3141 }
3142 else
3143 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3144
3145 return rv;
3146 }
3147
3148 #ifdef DJDEBUG
3149 static bfd_boolean
3150 rx2_set_section_contents (bfd * abfd,
3151 sec_ptr section,
3152 const void * location,
3153 file_ptr offset,
3154 bfd_size_type count)
3155 {
3156 bfd_size_type i;
3157
3158 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3159 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3160 for (i = 0; i < count; i++)
3161 {
3162 if (i % 16 == 0 && i > 0)
3163 fprintf (stderr, "\n");
3164
3165 if (i % 16 && i % 4 == 0)
3166 fprintf (stderr, " ");
3167
3168 if (i % 16 == 0)
3169 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3170
3171 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3172 }
3173 fprintf (stderr, "\n");
3174
3175 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3176 }
3177 #define _bfd_elf_set_section_contents rx2_set_section_contents
3178 #endif
3179
3180 static bfd_boolean
3181 rx_set_section_contents (bfd * abfd,
3182 sec_ptr section,
3183 const void * location,
3184 file_ptr offset,
3185 bfd_size_type count)
3186 {
3187 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3188 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3189 bfd_boolean rv;
3190 char * swapped_data = NULL;
3191 bfd_size_type i;
3192 bfd_vma caddr = section->vma + offset;
3193 file_ptr faddr = 0;
3194 bfd_size_type scount;
3195
3196 #ifdef DJDEBUG
3197 bfd_size_type i;
3198
3199 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3200 (long) offset, (long) count, section->name,
3201 bfd_big_endian (abfd) ? "be" : "le",
3202 exec, s_code);
3203
3204 for (i = 0; i < count; i++)
3205 {
3206 int a = section->vma + offset + i;
3207
3208 if (a % 16 == 0 && a > 0)
3209 fprintf (stderr, "\n");
3210
3211 if (a % 16 && a % 4 == 0)
3212 fprintf (stderr, " ");
3213
3214 if (a % 16 == 0 || i == 0)
3215 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3216
3217 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3218 }
3219
3220 fprintf (stderr, "\n");
3221 #endif
3222
3223 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3224 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3225
3226 while (count > 0 && caddr > 0 && caddr % 4)
3227 {
3228 switch (caddr % 4)
3229 {
3230 case 0: faddr = offset + 3; break;
3231 case 1: faddr = offset + 1; break;
3232 case 2: faddr = offset - 1; break;
3233 case 3: faddr = offset - 3; break;
3234 }
3235
3236 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3237 if (! rv)
3238 return rv;
3239
3240 location ++;
3241 offset ++;
3242 count --;
3243 caddr ++;
3244 }
3245
3246 scount = (int)(count / 4) * 4;
3247 if (scount > 0)
3248 {
3249 char * cloc = (char *) location;
3250
3251 swapped_data = (char *) bfd_alloc (abfd, count);
3252
3253 for (i = 0; i < count; i += 4)
3254 {
3255 bfd_vma v = bfd_getl32 (cloc + i);
3256 bfd_putb32 (v, swapped_data + i);
3257 }
3258
3259 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3260
3261 if (!rv)
3262 return rv;
3263 }
3264
3265 count -= scount;
3266 location += scount;
3267 offset += scount;
3268
3269 if (count > 0)
3270 {
3271 caddr = section->vma + offset;
3272 while (count > 0)
3273 {
3274 switch (caddr % 4)
3275 {
3276 case 0: faddr = offset + 3; break;
3277 case 1: faddr = offset + 1; break;
3278 case 2: faddr = offset - 1; break;
3279 case 3: faddr = offset - 3; break;
3280 }
3281 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3282 if (! rv)
3283 return rv;
3284
3285 location ++;
3286 offset ++;
3287 count --;
3288 caddr ++;
3289 }
3290 }
3291
3292 return TRUE;
3293 }
3294
3295 static bfd_boolean
3296 rx_final_link (bfd * abfd, struct bfd_link_info * info)
3297 {
3298 asection * o;
3299
3300 for (o = abfd->sections; o != NULL; o = o->next)
3301 {
3302 #ifdef DJDEBUG
3303 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3304 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3305 #endif
3306 if (o->flags & SEC_CODE
3307 && bfd_big_endian (abfd)
3308 && (o->size % 4 || o->rawsize % 4))
3309 {
3310 #ifdef DJDEBUG
3311 fprintf (stderr, "adjusting...\n");
3312 #endif
3313 o->size += 4 - (o->size % 4);
3314 o->rawsize += 4 - (o->rawsize % 4);
3315 }
3316 }
3317
3318 return bfd_elf_final_link (abfd, info);
3319 }
3320
3321 static bfd_boolean
3322 elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3323 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3324 {
3325 const struct elf_backend_data * bed;
3326 struct elf_obj_tdata * tdata;
3327 Elf_Internal_Phdr * phdr;
3328 unsigned int count;
3329 unsigned int i;
3330
3331 bed = get_elf_backend_data (abfd);
3332 tdata = elf_tdata (abfd);
3333 phdr = tdata->phdr;
3334 count = tdata->program_header_size / bed->s->sizeof_phdr;
3335
3336 for (i = count; i-- != 0; )
3337 if (phdr[i].p_type == PT_LOAD)
3338 {
3339 /* The Renesas tools expect p_paddr to be zero. However,
3340 there is no other way to store the writable data in ROM for
3341 startup initialization. So, we let the linker *think*
3342 we're using paddr and vaddr the "usual" way, but at the
3343 last minute we move the paddr into the vaddr (which is what
3344 the simulator uses) and zero out paddr. Note that this
3345 does not affect the section headers, just the program
3346 headers. We hope. */
3347 phdr[i].p_vaddr = phdr[i].p_paddr;
3348 /* If we zero out p_paddr, then the LMA in the section table
3349 becomes wrong. */
3350 /*phdr[i].p_paddr = 0;*/
3351 }
3352
3353 return TRUE;
3354 }
3355 \f
3356 #define ELF_ARCH bfd_arch_rx
3357 #define ELF_MACHINE_CODE EM_RX
3358 #define ELF_MAXPAGESIZE 0x1000
3359
3360 #define TARGET_BIG_SYM bfd_elf32_rx_be_vec
3361 #define TARGET_BIG_NAME "elf32-rx-be"
3362
3363 #define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec
3364 #define TARGET_LITTLE_NAME "elf32-rx-le"
3365
3366 #define elf_info_to_howto_rel NULL
3367 #define elf_info_to_howto rx_info_to_howto_rela
3368 #define elf_backend_object_p rx_elf_object_p
3369 #define elf_backend_relocate_section rx_elf_relocate_section
3370 #define elf_symbol_leading_char ('_')
3371 #define elf_backend_can_gc_sections 1
3372 #define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3373
3374 #define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3375 #define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3376 #define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3377 #define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3378 #define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3379 #define bfd_elf32_get_section_contents rx_get_section_contents
3380 #define bfd_elf32_set_section_contents rx_set_section_contents
3381 #define bfd_elf32_bfd_final_link rx_final_link
3382 #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
3383
3384 #include "elf32-target.h"
git-cvsimport of binutils cvsroot