1 2008-04-29 Adam Nemet <anemet@caviumnetworks.com>
3 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
4 the two drem and the two dremu macros.
6 2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
8 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
9 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
10 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
11 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
13 2008-04-25 David S. Miller <davem@davemloft.net>
15 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
16 instead of %sys_tick_cmpr, as suggested in architecture manuals.
18 2008-04-23 Paolo Bonzini <bonzini@gnu.org>
20 * aclocal.m4: Regenerate.
21 * configure: Regenerate.
23 2008-04-23 David S. Miller <davem@davemloft.net>
25 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
27 (prefetch_table): Add missing values.
29 2008-04-22 H.J. Lu <hongjiu.lu@intel.com>
31 * i386-gen.c (opcode_modifiers): Add NoAVX.
33 * i386-opc.h (NoAVX): New.
35 (i386_opcode_modifier): Add noavx.
37 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
38 instructions which don't have AVX equivalent.
39 * i386-tbl.h: Regenerated.
41 2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
43 * i386-dis.c (OP_VEX_FMA): New.
44 (OP_EX_VexImmW): Likewise.
46 (Vex128FMA): Likewise.
47 (EXVexImmW): Likewise.
48 (get_vex_imm8): Likewise.
49 (OP_EX_VexReg): Likewise.
50 (vex_i4_done): Renamed to ...
52 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
53 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
55 (print_insn): Updated.
56 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
57 (OP_REG_VexI4): Check invalid high registers.
59 2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
60 Michael Meissner <michael.meissner@amd.com>
62 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
63 * i386-tbl.h: Regenerate from i386-opc.tbl.
65 2008-04-14 Edmar Wienskoski <edmar@freescale.com>
67 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
68 accept Power E500MC instructions.
69 (print_ppc_disassembler_options): Document -Me500mc.
70 * ppc-opc.c (DUIS, DUI, T): New.
71 (XRT, XRTRA): Likewise.
73 (powerpc_opcodes): Add new Power E500MC instructions.
75 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
77 * s390-dis.c (init_disasm): Evaluate disassembler_options.
78 (print_s390_disassembler_options): New function.
79 * disassemble.c (disassembler_usage): Invoke
80 print_s390_disassembler_options.
82 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
84 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
85 of local variables used for mnemonic parsing: prefix, suffix and
88 2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
90 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
91 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
92 (s390_crb_extensions): New extensions table.
93 (insertExpandedMnemonic): Handle '$' tag.
94 * s390-opc.txt: Remove conditional jump variants which can now
95 be expanded automatically.
96 Replace '*' tag with '$' in the compare and branch instructions.
98 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
100 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
101 (PREFIX_VEX_3AXX): Likewis.
103 2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
105 * i386-opc.tbl: Remove 4 extra blank lines.
107 2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
109 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
110 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
111 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
112 * i386-opc.tbl: Likewise.
114 * i386-opc.h (CpuCLMUL): Renamed to ...
117 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
119 * i386-init.h: Regenerated.
121 2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
123 * i386-dis.c (OP_E_register): New.
124 (OP_E_memory): Likewise.
126 (OP_EX_Vex): Likewise.
127 (OP_EX_VexW): Likewise.
128 (OP_XMM_Vex): Likewise.
129 (OP_XMM_VexW): Likewise.
130 (OP_REG_VexI4): Likewise.
131 (PCLMUL_Fixup): Likewise.
132 (VEXI4_Fixup): Likewise.
133 (VZERO_Fixup): Likewise.
134 (VCMP_Fixup): Likewise.
135 (VPERMIL2_Fixup): Likewise.
136 (rex_original): Likewise.
137 (rex_ignored): Likewise.
158 (VPERMIL2): Likewise.
159 (xmm_mode): Likewise.
160 (xmmq_mode): Likewise.
161 (ymmq_mode): Likewise.
162 (vex_mode): Likewise.
163 (vex128_mode): Likewise.
164 (vex256_mode): Likewise.
165 (USE_VEX_C4_TABLE): Likewise.
166 (USE_VEX_C5_TABLE): Likewise.
167 (USE_VEX_LEN_TABLE): Likewise.
168 (VEX_C4_TABLE): Likewise.
169 (VEX_C5_TABLE): Likewise.
170 (VEX_LEN_TABLE): Likewise.
171 (REG_VEX_XX): Likewise.
172 (MOD_VEX_XXX): Likewise.
173 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
174 (PREFIX_0F3A44): Likewise.
175 (PREFIX_0F3ADF): Likewise.
176 (PREFIX_VEX_XXX): Likewise.
178 (VEX_OF38): Likewise.
179 (VEX_OF3A): Likewise.
180 (VEX_LEN_XXX): Likewise.
182 (need_vex): Likewise.
183 (need_vex_reg): Likewise.
184 (vex_i4_done): Likewise.
185 (vex_table): Likewise.
186 (vex_len_table): Likewise.
187 (OP_REG_VexI4): Likewise.
188 (vex_cmp_op): Likewise.
189 (pclmul_op): Likewise.
190 (vpermil2_op): Likewise.
193 (PREFIX_0F38F0): Likewise.
194 (PREFIX_0F3A60): Likewise.
195 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
196 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
197 and PREFIX_VEX_XXX entries.
198 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
199 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
201 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
202 Add MOD_VEX_XXX entries.
203 (ckprefix): Initialize rex_original and rex_ignored. Store the
204 REX byte in rex_original.
205 (get_valid_dis386): Handle the implicit prefix in VEX prefix
206 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
207 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
208 calling get_valid_dis386. Use rex_original and rex_ignored when
210 (putop): Handle "XY".
211 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
213 (OP_E_extended): Updated to use OP_E_register and
215 (OP_XMM): Handle VEX.
217 (XMM_Fixup): Likewise.
218 (CMP_Fixup): Use ARRAY_SIZE.
220 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
221 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
222 (operand_type_init): Add OPERAND_TYPE_REGYMM and
223 OPERAND_TYPE_VEX_IMM4.
224 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
225 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
226 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
227 VexImmExt and SSE2AVX.
228 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
230 * i386-opc.h (CpuAVX): New.
232 (CpuCLMUL): Likewise.
243 (Vex3Sources): Likewise.
244 (VexImmExt): Likewise.
248 (Vex_Imm4): Likewise.
249 (Implicit1stXmm0): Likewise.
252 (ByteOkIntel): Likewise.
255 (Unspecified): Likewise.
257 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
258 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
259 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
260 vex3sources, veximmext and sse2avx.
261 (i386_operand_type): Add regymm, ymmword and vex_imm4.
263 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
265 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
267 * i386-init.h: Regenerated.
268 * i386-tbl.h: Likewise.
270 2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
272 From Robin Getz <robin.getz@analog.com>
273 * bfin-dis.c (bu32): Typedef.
274 (enum const_forms_t): Add c_uimm32 and c_huimm32.
275 (constant_formats[]): Add uimm32 and huimm16.
280 (luimm16_val): Define.
281 (struct saved_state): Define.
282 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
283 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
284 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
286 (decode_LDIMMhalf_0): Print out the whole register value.
288 From Jie Zhang <jie.zhang@analog.com>
289 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
290 multiply and multiply-accumulate to data register instruction.
292 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
293 c_imm32, c_huimm32e): Define.
294 (constant_formats): Add flags for printing decimal, leading spaces, and
296 (comment, parallel): Add global flags in all disassembly.
297 (fmtconst): Take advantage of new flags, and print default in hex.
298 (fmtconst_val): Likewise.
299 (decode_macfunc): Be consistant with spaces, tabs, comments,
300 capitalization in disassembly, fix minor coding style issues.
301 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
302 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
303 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
304 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
305 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
306 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
307 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
308 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
309 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
310 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
311 _print_insn_bfin, print_insn_bfin): Likewise.
313 2008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
315 * aclocal.m4: Regenerate.
316 * configure: Likewise.
317 * Makefile.in: Likewise.
319 2008-03-13 Alan Modra <amodra@bigpond.net.au>
321 * Makefile.am: Run "make dep-am".
322 * Makefile.in: Regenerate.
323 * configure: Regenerate.
325 2008-03-07 Alan Modra <amodra@bigpond.net.au>
327 * ppc-opc.c (powerpc_opcodes): Order and format.
329 2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
331 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
332 * i386-tbl.h: Regenerated.
334 2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
336 * i386-opc.tbl: Disallow 16-bit near indirect branches for
338 * i386-tbl.h: Regenerated.
340 2008-02-21 Jan Beulich <jbeulich@novell.com>
342 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
343 and Fword for far indirect jmp. Allow Reg16 and Word for near
344 indirect jmp on x86-64. Disallow Fword for lcall.
345 * i386-tbl.h: Re-generate.
347 2008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
349 * cr16-opc.c (cr16_num_optab): Defined
351 2008-02-16 H.J. Lu <hongjiu.lu@intel.com>
353 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
354 * i386-init.h: Regenerated.
356 2008-02-14 Nick Clifton <nickc@redhat.com>
359 * configure.in (SHARED_LIBADD): Select the correct host specific
360 file extension for shared libraries.
361 * configure: Regenerate.
363 2008-02-13 Jan Beulich <jbeulich@novell.com>
365 * i386-opc.h (RegFlat): New.
366 * i386-reg.tbl (flat): Add.
367 * i386-tbl.h: Re-generate.
369 2008-02-13 Jan Beulich <jbeulich@novell.com>
371 * i386-dis.c (a_mode): New.
372 (cond_jump_mode): Adjust.
373 (Ma): Change to a_mode.
374 (intel_operand_size): Handle a_mode.
375 * i386-opc.tbl: Allow Dword and Qword for bound.
376 * i386-tbl.h: Re-generate.
378 2008-02-13 Jan Beulich <jbeulich@novell.com>
380 * i386-gen.c (process_i386_registers): Process new fields.
381 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
382 unsigned char. Add dw2_regnum and Dw2Inval.
383 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
385 * i386-tbl.h: Re-generate.
387 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
389 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
390 * i386-init.h: Updated.
392 2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
394 * i386-gen.c (cpu_flags): Add CpuXsave.
396 * i386-opc.h (CpuXsave): New.
398 (i386_cpu_flags): Add cpuxsave.
400 * i386-dis.c (MOD_0FAE_REG_4): New.
401 (RM_0F01_REG_2): Likewise.
402 (MOD_0FAE_REG_5): Updated.
403 (RM_0F01_REG_3): Likewise.
404 (reg_table): Use MOD_0FAE_REG_4.
405 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
407 (rm_table): Add RM_0F01_REG_2.
409 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
410 * i386-init.h: Regenerated.
411 * i386-tbl.h: Likewise.
413 2008-02-11 Jan Beulich <jbeulich@novell.com>
415 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
416 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
417 * i386-tbl.h: Re-generate.
419 2008-02-04 H.J. Lu <hongjiu.lu@intel.com>
422 * configure: Regenerated.
424 2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
426 * mips-dis.c: Update copyright.
427 (mips_arch_choices): Add Octeon.
428 * mips-opc.c: Update copyright.
430 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
432 2008-01-29 Alan Modra <amodra@bigpond.net.au>
434 * ppc-opc.c: Support optional L form mtmsr.
436 2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
438 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
440 2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
442 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
443 * i386-init.h: Regenerated.
445 2008-01-23 Tristan Gingold <gingold@adacore.com>
447 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
448 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
450 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
452 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
453 (cpu_flags): Likewise.
455 * i386-opc.h (CpuMMX2): Removed.
458 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
459 * i386-init.h: Regenerated.
460 * i386-tbl.h: Likewise.
462 2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
464 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
466 * i386-init.h: Regenerated.
468 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
470 * i386-opc.tbl: Use Qword on movddup.
471 * i386-tbl.h: Regenerated.
473 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
475 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
476 * i386-tbl.h: Regenerated.
478 2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
480 * i386-dis.c (Mx): New.
481 (PREFIX_0FC3): Likewise.
482 (PREFIX_0FC7_REG_6): Updated.
483 (dis386_twobyte): Use PREFIX_0FC3.
484 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
485 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
488 2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
490 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
491 (operand_types): Add Mem.
493 * i386-opc.h (IntelSyntax): New.
494 * i386-opc.h (Mem): New.
496 (Opcode_Modifier_Max): Updated.
497 (i386_opcode_modifier): Add intelsyntax.
498 (i386_operand_type): Add mem.
500 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
503 * i386-reg.tbl: Add size for accumulator.
505 * i386-init.h: Regenerated.
506 * i386-tbl.h: Likewise.
508 2008-01-13 H.J. Lu <hongjiu.lu@intel.com>
510 * i386-opc.h (Byte): Fix a typo.
512 2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
515 * i386-gen.c (operand_type_init): Add Dword to
516 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
517 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
519 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
520 Xmmword, Unspecified and Anysize.
521 (set_bitfield): Make Mmword an alias of Qword. Make Oword
524 * i386-opc.h (CheckSize): Removed.
532 (i386_opcode_modifier): Remove checksize, byte, word, dword,
536 (Unspecified): Likewise.
538 (i386_operand_type): Add byte, word, dword, fword, qword,
539 tbyte xmmword, unspecified and anysize.
541 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
542 Tbyte, Xmmword, Unspecified and Anysize.
544 * i386-reg.tbl: Add size for accumulator.
546 * i386-init.h: Regenerated.
547 * i386-tbl.h: Likewise.
549 2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
551 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
553 (reg_table): Updated.
554 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
555 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
557 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
559 * i386-gen.c (set_bitfield): Use fail () on error.
561 2008-01-08 H.J. Lu <hongjiu.lu@intel.com>
563 * i386-gen.c (lineno): New.
564 (filename): Likewise.
565 (set_bitfield): Report filename and line numer on error.
566 (process_i386_opcodes): Set filename and update lineno.
567 (process_i386_registers): Likewise.
569 2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
571 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
574 * i386-opc.h (IntelMnemonic): Renamed to ..
576 (Opcode_Modifier_Max): Updated.
577 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
580 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
581 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
582 * i386-tbl.h: Regenerated.
584 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
586 * i386-gen.c: Update copyright to 2008.
587 * i386-opc.h: Likewise.
588 * i386-opc.tbl: Likewise.
590 * i386-init.h: Regenerated.
591 * i386-tbl.h: Likewise.
593 2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
595 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
596 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
597 * i386-tbl.h: Regenerated.
599 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
601 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
603 (cpu_flags): Likewise.
605 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
606 (CpuSSE4_2_Or_ABM): Likewise.
608 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
610 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
611 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
612 and CpuPadLock, respectively.
613 * i386-init.h: Regenerated.
614 * i386-tbl.h: Likewise.
616 2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
618 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
620 * i386-opc.h (No_xSuf): Removed.
621 (CheckSize): Updated.
623 * i386-tbl.h: Regenerated.
625 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
627 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
628 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
630 (cpu_flags): Add CpuSSE4_2_Or_ABM.
632 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
634 (i386_cpu_flags): Add cpusse4_2_or_abm.
636 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
637 CpuABM|CpuSSE4_2 on popcnt.
638 * i386-init.h: Regenerated.
639 * i386-tbl.h: Likewise.
641 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
643 * i386-opc.h: Update comments.
645 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
647 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
648 * i386-opc.h: Likewise.
649 * i386-opc.tbl: Likewise.
651 2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
654 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
655 Byte, Word, Dword, QWord and Xmmword.
657 * i386-opc.h (No_xSuf): New.
658 (CheckSize): Likewise.
665 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
666 Dword, QWord and Xmmword.
668 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
670 * i386-tbl.h: Regenerated.
672 2008-01-02 Mark Kettenis <kettenis@gnu.org>
674 * m88k-dis.c (instructions): Fix fcvt.* instructions.
677 For older changes see ChangeLog-2007
683 version-control: never