1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 1999 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
31 #include "opcodes/sh-opc.h"
38 const char comment_chars
[] = "!";
39 const char line_separator_chars
[] = ";";
40 const char line_comment_chars
[] = "!#";
42 static void s_uses
PARAMS ((int));
44 static void sh_count_relocs
PARAMS ((bfd
*, segT
, PTR
));
45 static void sh_frob_section
PARAMS ((bfd
*, segT
, PTR
));
48 void s_align_bytes ();
49 static void s_uacons
PARAMS ((int));
50 static sh_opcode_info
*find_cooked_opcode
PARAMS ((char **));
51 static void assemble_ppi
PARAMS ((char *, sh_opcode_info
*));
60 target_big_endian
= 0;
63 /* This table describes all the machine specific pseudo-ops the assembler
64 has to support. The fields are:
65 pseudo-op name without dot
66 function to call to execute this pseudo-op
67 Integer arg to pass to the function
70 const pseudo_typeS md_pseudo_table
[] =
74 {"form", listing_psize
, 0},
75 {"little", little
, 0},
76 {"heading", listing_title
, 0},
77 {"import", s_ignore
, 0},
78 {"page", listing_eject
, 0},
79 {"program", s_ignore
, 0},
81 {"uaword", s_uacons
, 2},
82 {"ualong", s_uacons
, 4},
86 /*int md_reloc_size; */
88 int sh_relax
; /* set if -relax seen */
90 /* Whether -small was seen. */
94 /* Whether -dsp was seen. */
98 /* The bit mask of architectures that could
99 accomodate the insns seen so far. */
100 static int valid_arch
;
102 const char EXP_CHARS
[] = "eE";
104 /* Chars that mean this number is a floating point constant */
107 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
109 #define C(a,b) ENCODE_RELAX(a,b)
111 #define JREG 14 /* Register used as a temp when relaxing */
112 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
113 #define GET_WHAT(x) ((x>>4))
115 /* These are the three types of relaxable instrction */
117 #define COND_JUMP_DELAY 2
118 #define UNCOND_JUMP 3
127 #define UNDEF_WORD_DISP 4
132 /* Branch displacements are from the address of the branch plus
133 four, thus all minimum and maximum values have 4 added to them. */
136 #define COND8_LENGTH 2
138 /* There is one extra instruction before the branch, so we must add
139 two more bytes to account for it. */
140 #define COND12_F 4100
141 #define COND12_M -4090
142 #define COND12_LENGTH 6
144 #define COND12_DELAY_LENGTH 4
146 /* ??? The minimum and maximum values are wrong, but this does not matter
147 since this relocation type is not supported yet. */
148 #define COND32_F (1<<30)
149 #define COND32_M -(1<<30)
150 #define COND32_LENGTH 14
152 #define UNCOND12_F 4098
153 #define UNCOND12_M -4092
154 #define UNCOND12_LENGTH 2
156 /* ??? The minimum and maximum values are wrong, but this does not matter
157 since this relocation type is not supported yet. */
158 #define UNCOND32_F (1<<30)
159 #define UNCOND32_M -(1<<30)
160 #define UNCOND32_LENGTH 14
162 const relax_typeS md_relax_table
[C (END
, 0)] = {
163 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
164 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
167 /* C (COND_JUMP, COND8) */
168 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP
, COND12
) },
169 /* C (COND_JUMP, COND12) */
170 { COND12_F
, COND12_M
, COND12_LENGTH
, C (COND_JUMP
, COND32
), },
171 /* C (COND_JUMP, COND32) */
172 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
173 { 0 }, { 0 }, { 0 }, { 0 },
174 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
177 /* C (COND_JUMP_DELAY, COND8) */
178 { COND8_F
, COND8_M
, COND8_LENGTH
, C (COND_JUMP_DELAY
, COND12
) },
179 /* C (COND_JUMP_DELAY, COND12) */
180 { COND12_F
, COND12_M
, COND12_DELAY_LENGTH
, C (COND_JUMP_DELAY
, COND32
), },
181 /* C (COND_JUMP_DELAY, COND32) */
182 { COND32_F
, COND32_M
, COND32_LENGTH
, 0, },
183 { 0 }, { 0 }, { 0 }, { 0 },
184 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
187 /* C (UNCOND_JUMP, UNCOND12) */
188 { UNCOND12_F
, UNCOND12_M
, UNCOND12_LENGTH
, C (UNCOND_JUMP
, UNCOND32
), },
189 /* C (UNCOND_JUMP, UNCOND32) */
190 { UNCOND32_F
, UNCOND32_M
, UNCOND32_LENGTH
, 0, },
191 { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
192 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
195 static struct hash_control
*opcode_hash_control
; /* Opcode mnemonics */
198 This function is called once, at assembler startup time. This should
199 set up all the tables, etc that the MD part of the assembler needs
205 sh_opcode_info
*opcode
;
206 char *prev_name
= "";
210 /* The WinCE OS only supports little endian executables. */
211 target_big_endian
= 0;
214 target_big_endian
= 1;
217 target_arch
= arch_sh1_up
& ~(sh_dsp
? arch_sh3e_up
: arch_sh_dsp_up
);
218 valid_arch
= target_arch
;
220 opcode_hash_control
= hash_new ();
222 /* Insert unique names into hash table */
223 for (opcode
= sh_table
; opcode
->name
; opcode
++)
225 if (strcmp (prev_name
, opcode
->name
))
227 if (! (opcode
->arch
& target_arch
))
229 prev_name
= opcode
->name
;
230 hash_insert (opcode_hash_control
, opcode
->name
, (char *) opcode
);
234 /* Make all the opcodes with the same name point to the same
236 opcode
->name
= prev_name
;
243 static int reg_x
, reg_y
;
247 static expressionS immediate
; /* absolute expression */
257 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
259 /* try and parse a reg name, returns number of chars consumed */
261 parse_reg (src
, mode
, reg
)
266 /* We use ! IDENT_CHAR for the next character after the register name, to
267 make sure that we won't accidentally recognize a symbol name such as
268 'sram' or sr_ram as being a reference to the register 'sr'. */
274 if (src
[2] >= '0' && src
[2] <= '5'
275 && ! IDENT_CHAR ((unsigned char) src
[3]))
278 *reg
= 10 + src
[2] - '0';
282 if (src
[1] >= '0' && src
[1] <= '9'
283 && ! IDENT_CHAR ((unsigned char) src
[2]))
286 *reg
= (src
[1] - '0');
289 if (src
[1] >= '0' && src
[1] <= '7' && strncmp (&src
[2], "_bank", 5) == 0
290 && ! IDENT_CHAR ((unsigned char) src
[7]))
293 *reg
= (src
[1] - '0');
297 if (src
[1] == 'e' && ! IDENT_CHAR ((unsigned char) src
[2]))
302 if (src
[1] == 's' && ! IDENT_CHAR ((unsigned char) src
[2]))
313 if (! IDENT_CHAR ((unsigned char) src
[2]))
319 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
328 if (! IDENT_CHAR ((unsigned char) src
[2]))
334 if (src
[2] == 'g' && ! IDENT_CHAR ((unsigned char) src
[3]))
342 if (src
[1] == 'x' && src
[2] >= '0' && src
[2] <= '1'
343 && ! IDENT_CHAR ((unsigned char) src
[3]))
346 *reg
= 4 + (src
[1] - '0');
349 if (src
[1] == 'y' && src
[2] >= '0' && src
[2] <= '1'
350 && ! IDENT_CHAR ((unsigned char) src
[3]))
353 *reg
= 6 + (src
[1] - '0');
356 if (src
[1] == 's' && src
[2] >= '0' && src
[2] <= '3'
357 && ! IDENT_CHAR ((unsigned char) src
[3]))
359 int n
= src
[1] - '0';
362 *reg
= n
| ((~n
& 2) << 1);
367 if (src
[0] == 'i' && src
[1] && ! IDENT_CHAR ((unsigned char) src
[3]))
389 if (src
[0] == 'x' && src
[1] >= '0' && src
[1] <= '1'
390 && ! IDENT_CHAR ((unsigned char) src
[2]))
393 *reg
= A_X0_NUM
+ src
[1] - '0';
397 if (src
[0] == 'y' && src
[1] >= '0' && src
[1] <= '1'
398 && ! IDENT_CHAR ((unsigned char) src
[2]))
401 *reg
= A_Y0_NUM
+ src
[1] - '0';
405 if (src
[0] == 'm' && src
[1] >= '0' && src
[1] <= '1'
406 && ! IDENT_CHAR ((unsigned char) src
[2]))
409 *reg
= src
[1] == '0' ? A_M0_NUM
: A_M1_NUM
;
415 && src
[2] == 'r' && ! IDENT_CHAR ((unsigned char) src
[3]))
421 if (src
[0] == 's' && src
[1] == 'p' && src
[2] == 'c'
422 && ! IDENT_CHAR ((unsigned char) src
[3]))
428 if (src
[0] == 's' && src
[1] == 'g' && src
[2] == 'r'
429 && ! IDENT_CHAR ((unsigned char) src
[3]))
435 if (src
[0] == 'd' && src
[1] == 's' && src
[2] == 'r'
436 && ! IDENT_CHAR ((unsigned char) src
[3]))
442 if (src
[0] == 'd' && src
[1] == 'b' && src
[2] == 'r'
443 && ! IDENT_CHAR ((unsigned char) src
[3]))
449 if (src
[0] == 's' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
455 if (src
[0] == 's' && src
[1] == 'p' && ! IDENT_CHAR ((unsigned char) src
[2]))
462 if (src
[0] == 'p' && src
[1] == 'r' && ! IDENT_CHAR ((unsigned char) src
[2]))
467 if (src
[0] == 'p' && src
[1] == 'c' && ! IDENT_CHAR ((unsigned char) src
[2]))
472 if (src
[0] == 'g' && src
[1] == 'b' && src
[2] == 'r'
473 && ! IDENT_CHAR ((unsigned char) src
[3]))
478 if (src
[0] == 'v' && src
[1] == 'b' && src
[2] == 'r'
479 && ! IDENT_CHAR ((unsigned char) src
[3]))
485 if (src
[0] == 'm' && src
[1] == 'a' && src
[2] == 'c'
486 && ! IDENT_CHAR ((unsigned char) src
[4]))
499 if (src
[0] == 'm' && src
[1] == 'o' && src
[2] == 'd'
500 && ! IDENT_CHAR ((unsigned char) src
[4]))
505 if (src
[0] == 'f' && src
[1] == 'r')
509 if (src
[3] >= '0' && src
[3] <= '5'
510 && ! IDENT_CHAR ((unsigned char) src
[4]))
513 *reg
= 10 + src
[3] - '0';
517 if (src
[2] >= '0' && src
[2] <= '9'
518 && ! IDENT_CHAR ((unsigned char) src
[3]))
521 *reg
= (src
[2] - '0');
525 if (src
[0] == 'd' && src
[1] == 'r')
529 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
530 && ! IDENT_CHAR ((unsigned char) src
[4]))
533 *reg
= 10 + src
[3] - '0';
537 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
538 && ! IDENT_CHAR ((unsigned char) src
[3]))
541 *reg
= (src
[2] - '0');
545 if (src
[0] == 'x' && src
[1] == 'd')
549 if (src
[3] >= '0' && src
[3] <= '4' && ! ((src
[3] - '0') & 1)
550 && ! IDENT_CHAR ((unsigned char) src
[4]))
553 *reg
= 11 + src
[3] - '0';
557 if (src
[2] >= '0' && src
[2] <= '8' && ! ((src
[2] - '0') & 1)
558 && ! IDENT_CHAR ((unsigned char) src
[3]))
561 *reg
= (src
[2] - '0') + 1;
565 if (src
[0] == 'f' && src
[1] == 'v')
567 if (src
[2] == '1'&& src
[3] == '2' && ! IDENT_CHAR ((unsigned char) src
[4]))
573 if ((src
[2] == '0' || src
[2] == '4' || src
[2] == '8')
574 && ! IDENT_CHAR ((unsigned char) src
[3]))
577 *reg
= (src
[2] - '0');
581 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 'u' && src
[3] == 'l'
582 && ! IDENT_CHAR ((unsigned char) src
[4]))
588 if (src
[0] == 'f' && src
[1] == 'p' && src
[2] == 's' && src
[3] == 'c'
589 && src
[4] == 'r' && ! IDENT_CHAR ((unsigned char) src
[5]))
595 if (src
[0] == 'x' && src
[1] == 'm' && src
[2] == 't' && src
[3] == 'r'
596 && src
[4] == 'x' && ! IDENT_CHAR ((unsigned char) src
[5]))
605 static symbolS
*dot()
609 /* JF: '.' is pseudo symbol with value of current location
610 in current segment. */
611 fake
= FAKE_LABEL_NAME
;
612 return symbol_new (fake
,
614 (valueT
) frag_now_fix (),
628 save
= input_line_pointer
;
629 input_line_pointer
= s
;
630 expression (&immediate
);
631 if (immediate
.X_op
== O_absent
)
632 as_bad (_("missing operand"));
633 new = input_line_pointer
;
634 input_line_pointer
= save
;
639 /* The many forms of operand:
642 @Rn Register indirect
655 pr, gbr, vbr, macl, mach
670 /* Must be predecrement */
673 len
= parse_reg (src
, &mode
, &(op
->reg
));
675 as_bad (_("illegal register after @-"));
680 else if (src
[0] == '(')
682 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
685 len
= parse_reg (src
, &mode
, &(op
->reg
));
686 if (len
&& mode
== A_REG_N
)
691 as_bad (_("must be @(r0,...)"));
695 /* Now can be rn or gbr */
696 len
= parse_reg (src
, &mode
, &(op
->reg
));
701 else if (mode
== A_REG_N
)
703 op
->type
= A_IND_R0_REG_N
;
707 as_bad (_("syntax error in @(r0,...)"));
712 /* Must be an @(disp,.. thing) */
713 src
= parse_exp (src
);
716 /* Now can be rn, gbr or pc */
717 len
= parse_reg (src
, &mode
, &op
->reg
);
722 op
->type
= A_DISP_REG_N
;
724 else if (mode
== A_GBR
)
726 op
->type
= A_DISP_GBR
;
728 else if (mode
== A_DISP_PC
)
730 /* Turn a plain @(4,pc) into @(.+4,pc) */
731 if (immediate
.X_op
== O_constant
) {
732 immediate
.X_add_symbol
= dot();
733 immediate
.X_op
= O_symbol
;
735 op
->type
= A_DISP_PC
;
739 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
744 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
749 as_bad (_("expecting )"));
755 src
+= parse_reg (src
, &mode
, &(op
->reg
));
758 as_bad (_("illegal register after @"));
763 if ((src
[0] == 'r' && src
[1] == '8')
764 || (src
[0] == 'i' && (src
[1] == 'x' || src
[1] == 's')))
769 if ((src
[0] == 'r' && src
[1] == '9')
770 || (src
[0] == 'i' && src
[1] == 'y'))
773 op
->type
= A_PMODY_N
;
787 get_operand (ptr
, op
)
798 *ptr
= parse_exp (src
);
803 else if (src
[0] == '@')
805 *ptr
= parse_at (src
, op
);
808 len
= parse_reg (src
, &mode
, &(op
->reg
));
817 /* Not a reg, the only thing left is a displacement */
818 *ptr
= parse_exp (src
);
819 op
->type
= A_DISP_PC
;
826 get_operands (info
, args
, operand
)
827 sh_opcode_info
*info
;
829 sh_operand_info
*operand
;
835 /* The pre-processor will eliminate whitespace in front of '@'
836 after the first argument; we may be called multiple times
837 from assemble_ppi, so don't insist on finding whitespace here. */
841 get_operand (&ptr
, operand
+ 0);
848 get_operand (&ptr
, operand
+ 1);
855 get_operand (&ptr
, operand
+ 2);
877 /* Passed a pointer to a list of opcodes which use different
878 addressing modes, return the opcode which matches the opcodes
884 get_specific (opcode
, operands
)
885 sh_opcode_info
*opcode
;
886 sh_operand_info
*operands
;
888 sh_opcode_info
*this_try
= opcode
;
889 char *name
= opcode
->name
;
894 if (this_try
->name
!= name
)
896 /* We've looked so far down the table that we've run out of
897 opcodes with the same name */
900 /* look at both operands needed by the opcodes and provided by
901 the user - since an arg test will often fail on the same arg
902 again and again, we'll try and test the last failing arg the
903 first on each opcode try */
905 for (n
= 0; this_try
->arg
[n
]; n
++)
907 sh_operand_info
*user
= operands
+ n
;
908 sh_arg_type arg
= this_try
->arg
[n
];
919 if (user
->type
!= arg
)
923 /* opcode needs r0 */
924 if (user
->type
!= A_REG_N
|| user
->reg
!= 0)
928 if (user
->type
!= A_R0_GBR
|| user
->reg
!= 0)
932 if (user
->type
!= F_REG_N
|| user
->reg
!= 0)
951 /* Opcode needs rn */
952 if (user
->type
!= arg
)
957 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
972 if (user
->type
!= arg
)
977 if (user
->type
!= arg
)
989 /* Opcode needs rn */
990 if (user
->type
!= arg
- A_REG_M
+ A_REG_N
)
996 if (user
->type
!= DSP_REG_N
)
1018 if (user
->type
!= DSP_REG_N
)
1040 if (user
->type
!= DSP_REG_N
)
1062 if (user
->type
!= DSP_REG_N
)
1084 if (user
->type
!= DSP_REG_N
)
1106 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_A0_NUM
)
1110 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X0_NUM
)
1114 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_X1_NUM
)
1118 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y0_NUM
)
1122 if (user
->type
!= DSP_REG_N
|| user
->reg
!= A_Y1_NUM
)
1132 /* Opcode needs rn */
1133 if (user
->type
!= arg
- F_REG_M
+ F_REG_N
)
1138 if (user
->type
!= D_REG_N
&& user
->type
!= X_REG_N
)
1143 if (user
->type
!= XMTRX_M4
)
1149 printf (_("unhandled %d\n"), arg
);
1153 if ( !(valid_arch
& this_try
->arch
))
1155 valid_arch
&= this_try
->arch
;
1164 check (operand
, low
, high
)
1165 expressionS
*operand
;
1169 if (operand
->X_op
!= O_constant
1170 || operand
->X_add_number
< low
1171 || operand
->X_add_number
> high
)
1173 as_bad (_("operand must be absolute in range %d..%d"), low
, high
);
1175 return operand
->X_add_number
;
1180 insert (where
, how
, pcrel
)
1185 fix_new_exp (frag_now
,
1186 where
- frag_now
->fr_literal
,
1194 build_relax (opcode
)
1195 sh_opcode_info
*opcode
;
1197 int high_byte
= target_big_endian
? 0 : 1;
1200 if (opcode
->arg
[0] == A_BDISP8
)
1202 int what
= (opcode
->nibbles
[1] & 4) ? COND_JUMP_DELAY
: COND_JUMP
;
1203 p
= frag_var (rs_machine_dependent
,
1204 md_relax_table
[C (what
, COND32
)].rlx_length
,
1205 md_relax_table
[C (what
, COND8
)].rlx_length
,
1207 immediate
.X_add_symbol
,
1208 immediate
.X_add_number
,
1210 p
[high_byte
] = (opcode
->nibbles
[0] << 4) | (opcode
->nibbles
[1]);
1212 else if (opcode
->arg
[0] == A_BDISP12
)
1214 p
= frag_var (rs_machine_dependent
,
1215 md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
,
1216 md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
,
1218 immediate
.X_add_symbol
,
1219 immediate
.X_add_number
,
1221 p
[high_byte
] = (opcode
->nibbles
[0] << 4);
1226 /* Now we know what sort of opcodes it is, lets build the bytes -
1229 build_Mytes (opcode
, operand
)
1230 sh_opcode_info
*opcode
;
1231 sh_operand_info
*operand
;
1236 char *output
= frag_more (2);
1237 int low_byte
= target_big_endian
? 1 : 0;
1243 for (index
= 0; index
< 4; index
++)
1245 sh_nibble_type i
= opcode
->nibbles
[index
];
1255 nbuf
[index
] = reg_n
;
1258 nbuf
[index
] = reg_m
;
1261 if (reg_n
< 2 || reg_n
> 5)
1262 as_bad (_("Invalid register: 'r%d'"), reg_n
);
1263 nbuf
[index
] = (reg_n
& 3) | 4;
1266 nbuf
[index
] = reg_n
| (reg_m
>> 2);
1269 nbuf
[index
] = reg_b
| 0x08;
1272 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0);
1275 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY4
, 0);
1278 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4BY2
, 0);
1281 insert (output
+ low_byte
, BFD_RELOC_SH_IMM4
, 0);
1284 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY4
, 0);
1287 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8BY2
, 0);
1290 insert (output
+ low_byte
, BFD_RELOC_SH_IMM8
, 0);
1293 insert (output
, BFD_RELOC_SH_PCRELIMM8BY4
, 1);
1296 insert (output
, BFD_RELOC_SH_PCRELIMM8BY2
, 1);
1299 printf (_("failed for %d\n"), i
);
1303 if (! target_big_endian
) {
1304 output
[1] = (nbuf
[0] << 4) | (nbuf
[1]);
1305 output
[0] = (nbuf
[2] << 4) | (nbuf
[3]);
1308 output
[0] = (nbuf
[0] << 4) | (nbuf
[1]);
1309 output
[1] = (nbuf
[2] << 4) | (nbuf
[3]);
1313 /* Find an opcode at the start of *STR_P in the hash table, and set
1314 *STR_P to the first character after the last one read. */
1316 static sh_opcode_info
*
1317 find_cooked_opcode (str_p
)
1321 unsigned char *op_start
;
1322 unsigned char *op_end
;
1325 /* Drop leading whitespace */
1329 /* Find the op code end.
1330 The pre-processor will eliminate whitespace in front of
1331 any '@' after the first argument; we may be called from
1332 assemble_ppi, so the opcode might be terminated by an '@'. */
1333 for (op_start
= op_end
= (unsigned char *) (str
);
1336 && !is_end_of_line
[*op_end
] && *op_end
!= ' ' && *op_end
!= '@';
1339 unsigned char c
= op_start
[nlen
];
1341 /* The machine independent code will convert CMP/EQ into cmp/EQ
1342 because it thinks the '/' is the end of the symbol. Moreover,
1343 all but the first sub-insn is a parallel processing insn won't
1344 be capitailzed. Instead of hacking up the machine independent
1345 code, we just deal with it here. */
1346 c
= isupper (c
) ? tolower (c
) : c
;
1355 as_bad (_("can't find opcode "));
1358 return (sh_opcode_info
*) hash_find (opcode_hash_control
, name
);
1361 /* Assemble a parallel processing insn. */
1362 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1364 assemble_ppi (op_end
, opcode
)
1366 sh_opcode_info
*opcode
;
1375 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1376 Make sure we encode a defined insn pattern. */
1382 sh_operand_info operand
[3];
1384 if (opcode
->arg
[0] != A_END
)
1385 op_end
= get_operands (opcode
, op_end
, operand
);
1386 opcode
= get_specific (opcode
, operand
);
1389 /* Couldn't find an opcode which matched the operands */
1390 char *where
= frag_more (2);
1394 as_bad (_("invalid operands for opcode"));
1397 if (opcode
->nibbles
[0] != PPI
)
1398 as_bad (_("insn can't be combined with parallel processing insn"));
1400 switch (opcode
->nibbles
[1])
1405 as_bad (_("multiple movx specifications"));
1410 as_bad (_("multiple movy specifications"));
1416 as_bad (_("multiple movx specifications"));
1417 if (reg_n
< 4 || reg_n
> 5)
1418 as_bad (_("invalid movx address register"));
1419 if (opcode
->nibbles
[2] & 8)
1421 if (reg_m
== A_A1_NUM
)
1423 else if (reg_m
!= A_A0_NUM
)
1424 as_bad (_("invalid movx dsp register"));
1429 as_bad (_("invalid movx dsp register"));
1432 movx
+= ((reg_n
- 4) << 9) + (opcode
->nibbles
[2] << 2) + DDT_BASE
;
1437 as_bad (_("multiple movy specifications"));
1438 if (opcode
->nibbles
[2] & 8)
1440 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1443 if (reg_m
== A_A1_NUM
)
1445 else if (reg_m
!= A_A0_NUM
)
1446 as_bad (_("invalid movy dsp register"));
1451 as_bad (_("invalid movy dsp register"));
1454 if (reg_n
< 6 || reg_n
> 7)
1455 as_bad (_("invalid movy address register"));
1456 movy
+= ((reg_n
- 6) << 8) + opcode
->nibbles
[2] + DDT_BASE
;
1460 if (immediate
.X_op
!= O_constant
)
1461 as_bad (_("dsp immediate shift value not constant"));
1462 field_b
= ((opcode
->nibbles
[2] << 12)
1463 | (immediate
.X_add_number
& 127) << 4
1468 as_bad (_("multiple parallel processing specifications"));
1469 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1470 + (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1474 as_bad (_("multiple condition specifications"));
1475 cond
= opcode
->nibbles
[2] << 8;
1477 goto skip_cond_check
;
1481 as_bad (_("multiple parallel processing specifications"));
1482 field_b
= ((opcode
->nibbles
[2] << 12) + (opcode
->nibbles
[3] << 8)
1483 + cond
+ (reg_x
<< 6) + (reg_y
<< 4) + reg_n
);
1489 if ((field_b
& 0xef00) != 0xa100)
1490 as_bad (_("insn cannot be combined with pmuls"));
1492 switch (field_b
& 0xf)
1495 field_b
+= 0 - A_X0_NUM
;
1498 field_b
+= 1 - A_Y0_NUM
;
1501 field_b
+= 2 - A_A0_NUM
;
1504 field_b
+= 3 - A_A1_NUM
;
1507 as_bad (_("bad padd / psub pmuls output operand"));
1510 field_b
+= 0x4000 + reg_efg
;
1517 as_bad (_("condition not followed by conditionalizable insn"));
1523 opcode
= find_cooked_opcode (&op_end
);
1527 (_("unrecognized characters at end of parallel processing insn")));
1532 move_code
= movx
| movy
;
1535 /* Parallel processing insn. */
1536 unsigned long ppi_code
= (movx
| movy
| 0xf800) << 16 | field_b
;
1538 output
= frag_more (4);
1539 if (! target_big_endian
)
1541 output
[3] = ppi_code
>> 8;
1542 output
[2] = ppi_code
;
1546 output
[2] = ppi_code
>> 8;
1547 output
[3] = ppi_code
;
1549 move_code
|= 0xf800;
1552 /* Just a double data transfer. */
1553 output
= frag_more (2);
1554 if (! target_big_endian
)
1556 output
[1] = move_code
>> 8;
1557 output
[0] = move_code
;
1561 output
[0] = move_code
>> 8;
1562 output
[1] = move_code
;
1566 /* This is the guts of the machine-dependent assembler. STR points to a
1567 machine dependent instruction. This function is supposed to emit
1568 the frags/bytes it assembles to.
1575 unsigned char *op_end
;
1576 sh_operand_info operand
[3];
1577 sh_opcode_info
*opcode
;
1579 opcode
= find_cooked_opcode (&str
);
1584 as_bad (_("unknown opcode"));
1589 && ! seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1591 /* Output a CODE reloc to tell the linker that the following
1592 bytes are instructions, not data. */
1593 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1595 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 1;
1598 if (opcode
->nibbles
[0] == PPI
)
1600 assemble_ppi (op_end
, opcode
);
1604 if (opcode
->arg
[0] == A_BDISP12
1605 || opcode
->arg
[0] == A_BDISP8
)
1607 parse_exp (op_end
+ 1);
1608 build_relax (opcode
);
1612 if (opcode
->arg
[0] == A_END
)
1614 /* Ignore trailing whitespace. If there is any, it has already
1615 been compressed to a single space. */
1621 op_end
= get_operands (opcode
, op_end
, operand
);
1623 opcode
= get_specific (opcode
, operand
);
1627 /* Couldn't find an opcode which matched the operands */
1628 char *where
= frag_more (2);
1632 as_bad (_("invalid operands for opcode"));
1637 as_bad (_("excess operands: '%s'"), op_end
);
1639 build_Mytes (opcode
, operand
);
1644 /* This routine is called each time a label definition is seen. It
1645 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1650 static fragS
*last_label_frag
;
1651 static int last_label_offset
;
1654 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1658 offset
= frag_now_fix ();
1659 if (frag_now
!= last_label_frag
1660 || offset
!= last_label_offset
)
1662 fix_new (frag_now
, offset
, 2, &abs_symbol
, 0, 0, BFD_RELOC_SH_LABEL
);
1663 last_label_frag
= frag_now
;
1664 last_label_offset
= offset
;
1669 /* This routine is called when the assembler is about to output some
1670 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1673 sh_flush_pending_output ()
1676 && seg_info (now_seg
)->tc_segment_info_data
.in_code
)
1678 fix_new (frag_now
, frag_now_fix (), 2, &abs_symbol
, 0, 0,
1680 seg_info (now_seg
)->tc_segment_info_data
.in_code
= 0;
1685 DEFUN (md_undefined_symbol
, (name
),
1692 #ifndef BFD_ASSEMBLER
1695 DEFUN (tc_crawl_symbol_chain
, (headers
),
1696 object_headers
* headers
)
1698 printf (_("call to tc_crawl_symbol_chain \n"));
1702 DEFUN (tc_headers_hook
, (headers
),
1703 object_headers
* headers
)
1705 printf (_("call to tc_headers_hook \n"));
1711 /* Various routines to kill one day */
1712 /* Equal to MAX_PRECISION in atof-ieee.c */
1713 #define MAX_LITTLENUMS 6
1715 /* Turn a string in input_line_pointer into a floating point constant of type
1716 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1717 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1720 md_atof (type
, litP
, sizeP
)
1726 LITTLENUM_TYPE words
[4];
1742 return _("bad call to md_atof");
1745 t
= atof_ieee (input_line_pointer
, type
, words
);
1747 input_line_pointer
= t
;
1751 if (! target_big_endian
)
1753 for (i
= prec
- 1; i
>= 0; i
--)
1755 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1761 for (i
= 0; i
< prec
; i
++)
1763 md_number_to_chars (litP
, (valueT
) words
[i
], 2);
1771 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1772 call instruction. It refers to a label of the instruction which
1773 loads the register which the call uses. We use it to generate a
1774 special reloc for the linker. */
1783 as_warn (_(".uses pseudo-op seen when not relaxing"));
1787 if (ex
.X_op
!= O_symbol
|| ex
.X_add_number
!= 0)
1789 as_bad (_("bad .uses format"));
1790 ignore_rest_of_line ();
1794 fix_new_exp (frag_now
, frag_now_fix (), 2, &ex
, 1, BFD_RELOC_SH_USES
);
1796 demand_empty_rest_of_line ();
1799 CONST
char *md_shortopts
= "";
1800 struct option md_longopts
[] = {
1802 #define OPTION_RELAX (OPTION_MD_BASE)
1803 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1804 #define OPTION_SMALL (OPTION_LITTLE + 1)
1805 #define OPTION_DSP (OPTION_SMALL + 1)
1807 {"relax", no_argument
, NULL
, OPTION_RELAX
},
1808 {"little", no_argument
, NULL
, OPTION_LITTLE
},
1809 {"small", no_argument
, NULL
, OPTION_SMALL
},
1810 {"dsp", no_argument
, NULL
, OPTION_DSP
},
1811 {NULL
, no_argument
, NULL
, 0}
1813 size_t md_longopts_size
= sizeof(md_longopts
);
1816 md_parse_option (c
, arg
)
1828 target_big_endian
= 0;
1847 md_show_usage (stream
)
1850 fprintf(stream
, _("\
1852 -little generate little endian code\n\
1853 -relax alter jump instructions for long displacements\n\
1854 -small align sections to 4 byte boundaries, not 16\n
1855 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1859 tc_Nout_fix_to_chars ()
1861 printf (_("call to tc_Nout_fix_to_chars \n"));
1865 /* This struct is used to pass arguments to sh_count_relocs through
1866 bfd_map_over_sections. */
1868 struct sh_count_relocs
1870 /* Symbol we are looking for. */
1872 /* Count of relocs found. */
1876 /* Count the number of fixups in a section which refer to a particular
1877 symbol. When using BFD_ASSEMBLER, this is called via
1878 bfd_map_over_sections. */
1882 sh_count_relocs (abfd
, sec
, data
)
1887 struct sh_count_relocs
*info
= (struct sh_count_relocs
*) data
;
1888 segment_info_type
*seginfo
;
1892 seginfo
= seg_info (sec
);
1893 if (seginfo
== NULL
)
1897 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1899 if (fix
->fx_addsy
== sym
)
1907 /* Handle the count relocs for a particular section. When using
1908 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1912 sh_frob_section (abfd
, sec
, ignore
)
1917 segment_info_type
*seginfo
;
1920 seginfo
= seg_info (sec
);
1921 if (seginfo
== NULL
)
1924 for (fix
= seginfo
->fix_root
; fix
!= NULL
; fix
= fix
->fx_next
)
1929 struct sh_count_relocs info
;
1931 if (fix
->fx_r_type
!= BFD_RELOC_SH_USES
)
1934 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
1935 symbol in the same section. */
1936 sym
= fix
->fx_addsy
;
1938 || fix
->fx_subsy
!= NULL
1939 || fix
->fx_addnumber
!= 0
1940 || S_GET_SEGMENT (sym
) != sec
1941 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1942 || S_GET_STORAGE_CLASS (sym
) == C_EXT
1944 || S_IS_EXTERNAL (sym
))
1946 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1947 _(".uses does not refer to a local symbol in the same section"));
1951 /* Look through the fixups again, this time looking for one
1952 at the same location as sym. */
1953 val
= S_GET_VALUE (sym
);
1954 for (fscan
= seginfo
->fix_root
;
1956 fscan
= fscan
->fx_next
)
1957 if (val
== fscan
->fx_frag
->fr_address
+ fscan
->fx_where
1958 && fscan
->fx_r_type
!= BFD_RELOC_SH_ALIGN
1959 && fscan
->fx_r_type
!= BFD_RELOC_SH_CODE
1960 && fscan
->fx_r_type
!= BFD_RELOC_SH_DATA
1961 && fscan
->fx_r_type
!= BFD_RELOC_SH_LABEL
)
1965 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1966 _("can't find fixup pointed to by .uses"));
1970 if (fscan
->fx_tcbit
)
1972 /* We've already done this one. */
1976 /* fscan should also be a fixup to a local symbol in the same
1978 sym
= fscan
->fx_addsy
;
1980 || fscan
->fx_subsy
!= NULL
1981 || fscan
->fx_addnumber
!= 0
1982 || S_GET_SEGMENT (sym
) != sec
1983 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1984 || S_GET_STORAGE_CLASS (sym
) == C_EXT
1986 || S_IS_EXTERNAL (sym
))
1988 as_warn_where (fix
->fx_file
, fix
->fx_line
,
1989 _(".uses target does not refer to a local symbol in the same section"));
1993 /* Now we look through all the fixups of all the sections,
1994 counting the number of times we find a reference to sym. */
1997 #ifdef BFD_ASSEMBLER
1998 bfd_map_over_sections (stdoutput
, sh_count_relocs
, (PTR
) &info
);
2003 for (iscan
= SEG_E0
; iscan
< SEG_UNKNOWN
; iscan
++)
2004 sh_count_relocs ((bfd
*) NULL
, iscan
, (PTR
) &info
);
2011 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2012 We have already adjusted the value of sym to include the
2013 fragment address, so we undo that adjustment here. */
2014 subseg_change (sec
, 0);
2015 fix_new (symbol_get_frag (sym
),
2016 S_GET_VALUE (sym
) - symbol_get_frag (sym
)->fr_address
,
2017 4, &abs_symbol
, info
.count
, 0, BFD_RELOC_SH_COUNT
);
2021 /* This function is called after the symbol table has been completed,
2022 but before the relocs or section contents have been written out.
2023 If we have seen any .uses pseudo-ops, they point to an instruction
2024 which loads a register with the address of a function. We look
2025 through the fixups to find where the function address is being
2026 loaded from. We then generate a COUNT reloc giving the number of
2027 times that function address is referred to. The linker uses this
2028 information when doing relaxing, to decide when it can eliminate
2029 the stored function address entirely. */
2037 #ifdef BFD_ASSEMBLER
2038 bfd_map_over_sections (stdoutput
, sh_frob_section
, (PTR
) NULL
);
2043 for (iseg
= SEG_E0
; iseg
< SEG_UNKNOWN
; iseg
++)
2044 sh_frob_section ((bfd
*) NULL
, iseg
, (PTR
) NULL
);
2049 /* Called after relaxing. Set the correct sizes of the fragments, and
2050 create relocs so that md_apply_fix will fill in the correct values. */
2053 md_convert_frag (headers
, seg
, fragP
)
2054 #ifdef BFD_ASSEMBLER
2057 object_headers
*headers
;
2064 switch (fragP
->fr_subtype
)
2066 case C (COND_JUMP
, COND8
):
2067 case C (COND_JUMP_DELAY
, COND8
):
2068 subseg_change (seg
, 0);
2069 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2070 1, BFD_RELOC_SH_PCDISP8BY2
);
2075 case C (UNCOND_JUMP
, UNCOND12
):
2076 subseg_change (seg
, 0);
2077 fix_new (fragP
, fragP
->fr_fix
, 2, fragP
->fr_symbol
, fragP
->fr_offset
,
2078 1, BFD_RELOC_SH_PCDISP12BY2
);
2083 case C (UNCOND_JUMP
, UNCOND32
):
2084 case C (UNCOND_JUMP
, UNDEF_WORD_DISP
):
2085 if (fragP
->fr_symbol
== NULL
)
2086 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2087 (unsigned long) fragP
->fr_address
);
2088 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2089 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2090 (unsigned long) fragP
->fr_address
,
2091 S_GET_NAME (fragP
->fr_symbol
));
2093 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2094 (unsigned long) fragP
->fr_address
,
2095 S_GET_NAME (fragP
->fr_symbol
));
2097 #if 0 /* This code works, but generates poor code and the compiler
2098 should never produce a sequence that requires it to be used. */
2100 /* A jump wont fit in 12 bits, make code which looks like
2106 int t
= buffer
[0] & 0x10;
2108 buffer
[highbyte
] = 0xa0; /* branch over move and disp */
2109 buffer
[lowbyte
] = 3;
2110 buffer
[highbyte
+2] = 0xd0 | JREG
; /* Build mov insn */
2111 buffer
[lowbyte
+2] = 0x00;
2113 buffer
[highbyte
+4] = 0; /* space for 32 bit jump disp */
2114 buffer
[lowbyte
+4] = 0;
2115 buffer
[highbyte
+6] = 0;
2116 buffer
[lowbyte
+6] = 0;
2118 buffer
[highbyte
+8] = 0x40 | JREG
; /* Build jmp @JREG */
2119 buffer
[lowbyte
+8] = t
? 0xb : 0x2b;
2121 buffer
[highbyte
+10] = 0x20; /* build nop */
2122 buffer
[lowbyte
+10] = 0x0b;
2124 /* Make reloc for the long disp */
2132 fragP
->fr_fix
+= UNCOND32_LENGTH
;
2139 case C (COND_JUMP
, COND12
):
2140 case C (COND_JUMP_DELAY
, COND12
):
2141 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
2142 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2143 was due to gas incorrectly relaxing an out-of-range conditional
2144 branch with delay slot. It turned:
2145 bf.s L6 (slot mov.l r12,@(44,r0))
2148 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2150 32: 10 cb mov.l r12,@(44,r0)
2151 Therefore, branches with delay slots have to be handled
2152 differently from ones without delay slots. */
2154 unsigned char *buffer
=
2155 (unsigned char *) (fragP
->fr_fix
+ fragP
->fr_literal
);
2156 int highbyte
= target_big_endian
? 0 : 1;
2157 int lowbyte
= target_big_endian
? 1 : 0;
2158 int delay
= fragP
->fr_subtype
== C (COND_JUMP_DELAY
, COND12
);
2160 /* Toggle the true/false bit of the bcond. */
2161 buffer
[highbyte
] ^= 0x2;
2163 /* If this is a dalayed branch, we may not put the the bra in the
2164 slot. So we change it to a non-delayed branch, like that:
2165 b! cond slot_label; bra disp; slot_label: slot_insn
2166 ??? We should try if swapping the conditional branch and
2167 its delay-slot insn already makes the branch reach. */
2169 /* Build a relocation to six / four bytes farther on. */
2170 subseg_change (seg
, 0);
2171 fix_new (fragP
, fragP
->fr_fix
, 2,
2172 #ifdef BFD_ASSEMBLER
2173 section_symbol (seg
),
2175 seg_info (seg
)->dot
,
2177 fragP
->fr_address
+ fragP
->fr_fix
+ (delay
? 4 : 6),
2178 1, BFD_RELOC_SH_PCDISP8BY2
);
2180 /* Set up a jump instruction. */
2181 buffer
[highbyte
+ 2] = 0xa0;
2182 buffer
[lowbyte
+ 2] = 0;
2183 fix_new (fragP
, fragP
->fr_fix
+ 2, 2, fragP
->fr_symbol
,
2184 fragP
->fr_offset
, 1, BFD_RELOC_SH_PCDISP12BY2
);
2188 buffer
[highbyte
] &= ~0x4; /* Removes delay slot from branch. */
2193 /* Fill in a NOP instruction. */
2194 buffer
[highbyte
+ 4] = 0x0;
2195 buffer
[lowbyte
+ 4] = 0x9;
2204 case C (COND_JUMP
, COND32
):
2205 case C (COND_JUMP_DELAY
, COND32
):
2206 case C (COND_JUMP
, UNDEF_WORD_DISP
):
2207 case C (COND_JUMP_DELAY
, UNDEF_WORD_DISP
):
2208 if (fragP
->fr_symbol
== NULL
)
2209 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2210 (unsigned long) fragP
->fr_address
);
2211 else if (S_IS_DEFINED (fragP
->fr_symbol
))
2212 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2213 (unsigned long) fragP
->fr_address
,
2214 S_GET_NAME (fragP
->fr_symbol
));
2216 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2217 (unsigned long) fragP
->fr_address
,
2218 S_GET_NAME (fragP
->fr_symbol
));
2220 #if 0 /* This code works, but generates poor code, and the compiler
2221 should never produce a sequence that requires it to be used. */
2223 /* A bcond won't fit and it won't go into a 12 bit
2224 displacement either, the code sequence looks like:
2233 buffer
[0] ^= 0x2; /* Toggle T/F bit */
2235 buffer
[1] = 5; /* branch over mov, jump, nop and ptr */
2236 buffer
[2] = 0xd0 | JREG
; /* Build mov insn */
2238 buffer
[4] = 0x40 | JREG
; /* Build jmp @JREG */
2240 buffer
[6] = 0x20; /* build nop */
2242 buffer
[8] = 0; /* space for 32 bit jump disp */
2248 /* Make reloc for the long disp */
2256 fragP
->fr_fix
+= COND32_LENGTH
;
2267 if (donerelax
&& !sh_relax
)
2268 as_warn_where (fragP
->fr_file
, fragP
->fr_line
,
2269 _("overflow in branch to %s; converted into longer instruction sequence"),
2270 (fragP
->fr_symbol
!= NULL
2271 ? S_GET_NAME (fragP
->fr_symbol
)
2276 DEFUN (md_section_align
, (seg
, size
),
2280 #ifdef BFD_ASSEMBLER
2283 #else /* ! OBJ_ELF */
2284 return ((size
+ (1 << bfd_get_section_alignment (stdoutput
, seg
)) - 1)
2285 & (-1 << bfd_get_section_alignment (stdoutput
, seg
)));
2286 #endif /* ! OBJ_ELF */
2287 #else /* ! BFD_ASSEMBLER */
2288 return ((size
+ (1 << section_alignment
[(int) seg
]) - 1)
2289 & (-1 << section_alignment
[(int) seg
]));
2290 #endif /* ! BFD_ASSEMBLER */
2293 /* This static variable is set by s_uacons to tell sh_cons_align that
2294 the expession does not need to be aligned. */
2296 static int sh_no_align_cons
= 0;
2298 /* This handles the unaligned space allocation pseudo-ops, such as
2299 .uaword. .uaword is just like .word, but the value does not need
2306 /* Tell sh_cons_align not to align this value. */
2307 sh_no_align_cons
= 1;
2311 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2312 aligned correctly. Note that this can cause warnings to be issued
2313 when assembling initialized structured which were declared with the
2314 packed attribute. FIXME: Perhaps we should require an option to
2315 enable this warning? */
2318 sh_cons_align (nbytes
)
2324 if (sh_no_align_cons
)
2326 /* This is an unaligned pseudo-op. */
2327 sh_no_align_cons
= 0;
2332 while ((nbytes
& 1) == 0)
2341 if (now_seg
== absolute_section
)
2343 if ((abs_section_offset
& ((1 << nalign
) - 1)) != 0)
2344 as_warn (_("misaligned data"));
2348 p
= frag_var (rs_align_code
, 1, 1, (relax_substateT
) 0,
2349 (symbolS
*) NULL
, (offsetT
) nalign
, (char *) NULL
);
2351 record_alignment (now_seg
, nalign
);
2354 /* When relaxing, we need to output a reloc for any .align directive
2355 that requests alignment to a four byte boundary or larger. This is
2356 also where we check for misaligned data. */
2359 sh_handle_align (frag
)
2363 && frag
->fr_type
== rs_align
2364 && frag
->fr_address
+ frag
->fr_fix
> 0
2365 && frag
->fr_offset
> 1
2366 && now_seg
!= bss_section
)
2367 fix_new (frag
, frag
->fr_fix
, 2, &abs_symbol
, frag
->fr_offset
, 0,
2368 BFD_RELOC_SH_ALIGN
);
2370 if (frag
->fr_type
== rs_align_code
2371 && frag
->fr_next
->fr_address
- frag
->fr_address
- frag
->fr_fix
!= 0)
2372 as_warn_where (frag
->fr_file
, frag
->fr_line
, _("misaligned data"));
2375 /* This macro decides whether a particular reloc is an entry in a
2376 switch table. It is used when relaxing, because the linker needs
2377 to know about all such entries so that it can adjust them if
2380 #ifdef BFD_ASSEMBLER
2381 #define SWITCH_TABLE_CONS(fix) (0)
2383 #define SWITCH_TABLE_CONS(fix) \
2384 ((fix)->fx_r_type == 0 \
2385 && ((fix)->fx_size == 2 \
2386 || (fix)->fx_size == 1 \
2387 || (fix)->fx_size == 4))
2390 #define SWITCH_TABLE(fix) \
2391 ((fix)->fx_addsy != NULL \
2392 && (fix)->fx_subsy != NULL \
2393 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2394 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2395 && ((fix)->fx_r_type == BFD_RELOC_32 \
2396 || (fix)->fx_r_type == BFD_RELOC_16 \
2397 || (fix)->fx_r_type == BFD_RELOC_8 \
2398 || SWITCH_TABLE_CONS (fix)))
2400 /* See whether we need to force a relocation into the output file.
2401 This is used to force out switch and PC relative relocations when
2405 sh_force_relocation (fix
)
2409 if (fix
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2410 || fix
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2416 return (fix
->fx_pcrel
2417 || SWITCH_TABLE (fix
)
2418 || fix
->fx_r_type
== BFD_RELOC_SH_COUNT
2419 || fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
2420 || fix
->fx_r_type
== BFD_RELOC_SH_CODE
2421 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2422 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
);
2427 sh_fix_adjustable (fixP
)
2431 if (fixP
->fx_addsy
== NULL
)
2434 /* We need the symbol name for the VTABLE entries */
2435 if (fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
2436 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
2442 void sh_elf_final_processing()
2446 /* Set file-specific flags to indicate if this code needs
2447 a processor with the sh-dsp / sh3e ISA to execute. */
2448 if (valid_arch
& arch_sh1
)
2450 else if (valid_arch
& arch_sh2
)
2452 else if (valid_arch
& arch_sh_dsp
)
2454 else if (valid_arch
& arch_sh3
)
2456 else if (valid_arch
& arch_sh3_dsp
)
2458 else if (valid_arch
& arch_sh3e
)
2460 else if (valid_arch
& arch_sh4
)
2465 elf_elfheader (stdoutput
)->e_flags
&= ~EF_SH_MACH_MASK
;
2466 elf_elfheader (stdoutput
)->e_flags
|= val
;
2470 /* Apply a fixup to the object file. */
2472 #ifdef BFD_ASSEMBLER
2474 md_apply_fix (fixP
, valp
)
2479 md_apply_fix (fixP
, val
)
2484 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
2485 int lowbyte
= target_big_endian
? 1 : 0;
2486 int highbyte
= target_big_endian
? 0 : 1;
2487 #ifdef BFD_ASSEMBLER
2493 #ifdef BFD_ASSEMBLER
2494 /* adjust_reloc_syms won't convert a reloc against a weak symbol
2495 into a reloc against a section, but bfd_install_relocation will
2496 screw up if the symbol is defined, so we have to adjust val here
2497 to avoid the screw up later. */
2498 if (fixP
->fx_addsy
!= NULL
2499 && S_IS_WEAK (fixP
->fx_addsy
))
2500 val
-= S_GET_VALUE (fixP
->fx_addsy
);
2503 #ifndef BFD_ASSEMBLER
2504 if (fixP
->fx_r_type
== 0)
2506 if (fixP
->fx_size
== 2)
2507 fixP
->fx_r_type
= BFD_RELOC_16
;
2508 else if (fixP
->fx_size
== 4)
2509 fixP
->fx_r_type
= BFD_RELOC_32
;
2510 else if (fixP
->fx_size
== 1)
2511 fixP
->fx_r_type
= BFD_RELOC_8
;
2519 switch (fixP
->fx_r_type
)
2521 case BFD_RELOC_SH_IMM4
:
2523 *buf
= (*buf
& 0xf0) | (val
& 0xf);
2526 case BFD_RELOC_SH_IMM4BY2
:
2529 *buf
= (*buf
& 0xf0) | ((val
>> 1) & 0xf);
2532 case BFD_RELOC_SH_IMM4BY4
:
2535 *buf
= (*buf
& 0xf0) | ((val
>> 2) & 0xf);
2538 case BFD_RELOC_SH_IMM8BY2
:
2544 case BFD_RELOC_SH_IMM8BY4
:
2551 case BFD_RELOC_SH_IMM8
:
2552 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2553 sometimes it is not (e.g., and). We permit any 8 bit value.
2554 Note that adding further restrictions may invalidate
2555 reasonable looking assembly code, such as ``and -0x1,r0''. */
2561 case BFD_RELOC_SH_PCRELIMM8BY4
:
2562 /* The lower two bits of the PC are cleared before the
2563 displacement is added in. We can assume that the destination
2564 is on a 4 byte bounday. If this instruction is also on a 4
2565 byte boundary, then we want
2567 and target - here is a multiple of 4.
2568 Otherwise, we are on a 2 byte boundary, and we want
2569 (target - (here - 2)) / 4
2570 and target - here is not a multiple of 4. Computing
2571 (target - (here - 2)) / 4 == (target - here + 2) / 4
2572 works for both cases, since in the first case the addition of
2573 2 will be removed by the division. target - here is in the
2575 val
= (val
+ 2) / 4;
2577 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2581 case BFD_RELOC_SH_PCRELIMM8BY2
:
2584 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2588 case BFD_RELOC_SH_PCDISP8BY2
:
2590 if (val
< -0x80 || val
> 0x7f)
2591 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2595 case BFD_RELOC_SH_PCDISP12BY2
:
2597 if (val
< -0x800 || val
>= 0x7ff)
2598 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("pcrel too far"));
2599 buf
[lowbyte
] = val
& 0xff;
2600 buf
[highbyte
] |= (val
>> 8) & 0xf;
2604 if (! target_big_endian
)
2621 if (! target_big_endian
)
2633 case BFD_RELOC_SH_USES
:
2634 /* Pass the value into sh_coff_reloc_mangle. */
2635 fixP
->fx_addnumber
= val
;
2638 case BFD_RELOC_SH_COUNT
:
2639 case BFD_RELOC_SH_ALIGN
:
2640 case BFD_RELOC_SH_CODE
:
2641 case BFD_RELOC_SH_DATA
:
2642 case BFD_RELOC_SH_LABEL
:
2643 /* Nothing to do here. */
2646 case BFD_RELOC_VTABLE_INHERIT
:
2647 case BFD_RELOC_VTABLE_ENTRY
:
2649 #ifdef BFD_ASSEMBLER
2661 if ((val
& ((1 << shift
) - 1)) != 0)
2662 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("misaligned offset"));
2666 val
= ((val
>> shift
)
2667 | ((long) -1 & ~ ((long) -1 >> shift
)));
2669 if (max
!= 0 && (val
< min
|| val
> max
))
2670 as_bad_where (fixP
->fx_file
, fixP
->fx_line
, _("offset out of range"));
2672 #ifdef BFD_ASSEMBLER
2677 /* Called just before address relaxation. Return the length
2678 by which a fragment must grow to reach it's destination. */
2681 md_estimate_size_before_relax (fragP
, segment_type
)
2682 register fragS
*fragP
;
2683 register segT segment_type
;
2685 switch (fragP
->fr_subtype
)
2687 case C (UNCOND_JUMP
, UNDEF_DISP
):
2688 /* used to be a branch to somewhere which was unknown */
2689 if (!fragP
->fr_symbol
)
2691 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2692 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2694 else if (S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2696 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNCOND12
);
2697 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND12
)].rlx_length
;
2701 fragP
->fr_subtype
= C (UNCOND_JUMP
, UNDEF_WORD_DISP
);
2702 fragP
->fr_var
= md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2703 return md_relax_table
[C (UNCOND_JUMP
, UNCOND32
)].rlx_length
;
2709 case C (COND_JUMP
, UNDEF_DISP
):
2710 case C (COND_JUMP_DELAY
, UNDEF_DISP
):
2711 /* used to be a branch to somewhere which was unknown */
2712 if (fragP
->fr_symbol
2713 && S_GET_SEGMENT (fragP
->fr_symbol
) == segment_type
)
2715 int what
= GET_WHAT (fragP
->fr_subtype
);
2716 /* Got a symbol and it's defined in this segment, become byte
2717 sized - maybe it will fix up */
2718 fragP
->fr_subtype
= C (what
, COND8
);
2719 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2721 else if (fragP
->fr_symbol
)
2723 int what
= GET_WHAT (fragP
->fr_subtype
);
2724 /* Its got a segment, but its not ours, so it will always be long */
2725 fragP
->fr_subtype
= C (what
, UNDEF_WORD_DISP
);
2726 fragP
->fr_var
= md_relax_table
[C (what
, COND32
)].rlx_length
;
2727 return md_relax_table
[C (what
, COND32
)].rlx_length
;
2731 int what
= GET_WHAT (fragP
->fr_subtype
);
2732 /* We know the abs value */
2733 fragP
->fr_subtype
= C (what
, COND8
);
2734 fragP
->fr_var
= md_relax_table
[C (what
, COND8
)].rlx_length
;
2739 return fragP
->fr_var
;
2742 /* Put number into target byte order */
2745 md_number_to_chars (ptr
, use
, nbytes
)
2750 if (! target_big_endian
)
2751 number_to_chars_littleendian (ptr
, use
, nbytes
);
2753 number_to_chars_bigendian (ptr
, use
, nbytes
);
2757 md_pcrel_from (fixP
)
2760 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
+ 2;
2766 tc_coff_sizemachdep (frag
)
2769 return md_relax_table
[frag
->fr_subtype
].rlx_length
;
2772 #endif /* OBJ_COFF */
2774 /* When we align the .text section, insert the correct NOP pattern. */
2777 sh_do_align (n
, fill
, len
, max
)
2784 && subseg_text_p (now_seg
)
2787 static const unsigned char big_nop_pattern
[] = { 0x00, 0x09 };
2788 static const unsigned char little_nop_pattern
[] = { 0x09, 0x00 };
2790 /* First align to a 2 byte boundary, in case there is an odd
2792 frag_align (1, 0, 0);
2793 if (target_big_endian
)
2794 frag_align_pattern (n
, big_nop_pattern
, sizeof big_nop_pattern
, max
);
2796 frag_align_pattern (n
, little_nop_pattern
, sizeof little_nop_pattern
,
2804 #ifndef BFD_ASSEMBLER
2807 /* Map BFD relocs to SH COFF relocs. */
2811 bfd_reloc_code_real_type bfd_reloc
;
2815 static const struct reloc_map coff_reloc_map
[] =
2817 { BFD_RELOC_32
, R_SH_IMM32
},
2818 { BFD_RELOC_16
, R_SH_IMM16
},
2819 { BFD_RELOC_8
, R_SH_IMM8
},
2820 { BFD_RELOC_SH_PCDISP8BY2
, R_SH_PCDISP8BY2
},
2821 { BFD_RELOC_SH_PCDISP12BY2
, R_SH_PCDISP
},
2822 { BFD_RELOC_SH_IMM4
, R_SH_IMM4
},
2823 { BFD_RELOC_SH_IMM4BY2
, R_SH_IMM4BY2
},
2824 { BFD_RELOC_SH_IMM4BY4
, R_SH_IMM4BY4
},
2825 { BFD_RELOC_SH_IMM8
, R_SH_IMM8
},
2826 { BFD_RELOC_SH_IMM8BY2
, R_SH_IMM8BY2
},
2827 { BFD_RELOC_SH_IMM8BY4
, R_SH_IMM8BY4
},
2828 { BFD_RELOC_SH_PCRELIMM8BY2
, R_SH_PCRELIMM8BY2
},
2829 { BFD_RELOC_SH_PCRELIMM8BY4
, R_SH_PCRELIMM8BY4
},
2830 { BFD_RELOC_8_PCREL
, R_SH_SWITCH8
},
2831 { BFD_RELOC_SH_SWITCH16
, R_SH_SWITCH16
},
2832 { BFD_RELOC_SH_SWITCH32
, R_SH_SWITCH32
},
2833 { BFD_RELOC_SH_USES
, R_SH_USES
},
2834 { BFD_RELOC_SH_COUNT
, R_SH_COUNT
},
2835 { BFD_RELOC_SH_ALIGN
, R_SH_ALIGN
},
2836 { BFD_RELOC_SH_CODE
, R_SH_CODE
},
2837 { BFD_RELOC_SH_DATA
, R_SH_DATA
},
2838 { BFD_RELOC_SH_LABEL
, R_SH_LABEL
},
2839 { BFD_RELOC_UNUSED
, 0 }
2842 /* Adjust a reloc for the SH. This is similar to the generic code,
2843 but does some minor tweaking. */
2846 sh_coff_reloc_mangle (seg
, fix
, intr
, paddr
)
2847 segment_info_type
*seg
;
2849 struct internal_reloc
*intr
;
2852 symbolS
*symbol_ptr
= fix
->fx_addsy
;
2855 intr
->r_vaddr
= paddr
+ fix
->fx_frag
->fr_address
+ fix
->fx_where
;
2857 if (! SWITCH_TABLE (fix
))
2859 const struct reloc_map
*rm
;
2861 for (rm
= coff_reloc_map
; rm
->bfd_reloc
!= BFD_RELOC_UNUSED
; rm
++)
2862 if (rm
->bfd_reloc
== (bfd_reloc_code_real_type
) fix
->fx_r_type
)
2864 if (rm
->bfd_reloc
== BFD_RELOC_UNUSED
)
2865 as_bad_where (fix
->fx_file
, fix
->fx_line
,
2866 _("Can not represent %s relocation in this object file format"),
2867 bfd_get_reloc_code_name (fix
->fx_r_type
));
2868 intr
->r_type
= rm
->sh_reloc
;
2875 if (fix
->fx_r_type
== BFD_RELOC_16
)
2876 intr
->r_type
= R_SH_SWITCH16
;
2877 else if (fix
->fx_r_type
== BFD_RELOC_8
)
2878 intr
->r_type
= R_SH_SWITCH8
;
2879 else if (fix
->fx_r_type
== BFD_RELOC_32
)
2880 intr
->r_type
= R_SH_SWITCH32
;
2884 /* For a switch reloc, we set r_offset to the difference between
2885 the reloc address and the subtrahend. When the linker is
2886 doing relaxing, it can use the determine the starting and
2887 ending points of the switch difference expression. */
2888 intr
->r_offset
= intr
->r_vaddr
- S_GET_VALUE (fix
->fx_subsy
);
2891 /* PC relative relocs are always against the current section. */
2892 if (symbol_ptr
== NULL
)
2894 switch (fix
->fx_r_type
)
2896 case BFD_RELOC_SH_PCRELIMM8BY2
:
2897 case BFD_RELOC_SH_PCRELIMM8BY4
:
2898 case BFD_RELOC_SH_PCDISP8BY2
:
2899 case BFD_RELOC_SH_PCDISP12BY2
:
2900 case BFD_RELOC_SH_USES
:
2901 symbol_ptr
= seg
->dot
;
2908 if (fix
->fx_r_type
== BFD_RELOC_SH_USES
)
2910 /* We can't store the offset in the object file, since this
2911 reloc does not take up any space, so we store it in r_offset.
2912 The fx_addnumber field was set in md_apply_fix. */
2913 intr
->r_offset
= fix
->fx_addnumber
;
2915 else if (fix
->fx_r_type
== BFD_RELOC_SH_COUNT
)
2917 /* We can't store the count in the object file, since this reloc
2918 does not take up any space, so we store it in r_offset. The
2919 fx_offset field was set when the fixup was created in
2920 sh_coff_frob_file. */
2921 intr
->r_offset
= fix
->fx_offset
;
2922 /* This reloc is always absolute. */
2925 else if (fix
->fx_r_type
== BFD_RELOC_SH_ALIGN
)
2927 /* Store the alignment in the r_offset field. */
2928 intr
->r_offset
= fix
->fx_offset
;
2929 /* This reloc is always absolute. */
2932 else if (fix
->fx_r_type
== BFD_RELOC_SH_CODE
2933 || fix
->fx_r_type
== BFD_RELOC_SH_DATA
2934 || fix
->fx_r_type
== BFD_RELOC_SH_LABEL
)
2936 /* These relocs are always absolute. */
2940 /* Turn the segment of the symbol into an offset. */
2941 if (symbol_ptr
!= NULL
)
2943 dot
= segment_info
[S_GET_SEGMENT (symbol_ptr
)].dot
;
2945 intr
->r_symndx
= dot
->sy_number
;
2947 intr
->r_symndx
= symbol_ptr
->sy_number
;
2950 intr
->r_symndx
= -1;
2953 #endif /* OBJ_COFF */
2954 #endif /* ! BFD_ASSEMBLER */
2956 #ifdef BFD_ASSEMBLER
2958 /* Create a reloc. */
2961 tc_gen_reloc (section
, fixp
)
2966 bfd_reloc_code_real_type r_type
;
2968 rel
= (arelent
*) xmalloc (sizeof (arelent
));
2969 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
2970 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
2971 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
2973 r_type
= fixp
->fx_r_type
;
2975 if (SWITCH_TABLE (fixp
))
2977 rel
->addend
= rel
->address
- S_GET_VALUE (fixp
->fx_subsy
);
2978 if (r_type
== BFD_RELOC_16
)
2979 r_type
= BFD_RELOC_SH_SWITCH16
;
2980 else if (r_type
== BFD_RELOC_8
)
2981 r_type
= BFD_RELOC_8_PCREL
;
2982 else if (r_type
== BFD_RELOC_32
)
2983 r_type
= BFD_RELOC_SH_SWITCH32
;
2987 else if (r_type
== BFD_RELOC_SH_USES
)
2988 rel
->addend
= fixp
->fx_addnumber
;
2989 else if (r_type
== BFD_RELOC_SH_COUNT
)
2990 rel
->addend
= fixp
->fx_offset
;
2991 else if (r_type
== BFD_RELOC_SH_ALIGN
)
2992 rel
->addend
= fixp
->fx_offset
;
2993 else if (r_type
== BFD_RELOC_VTABLE_INHERIT
2994 || r_type
== BFD_RELOC_VTABLE_ENTRY
)
2995 rel
->addend
= fixp
->fx_offset
;
2996 else if (fixp
->fx_pcrel
)
2997 rel
->addend
= fixp
->fx_addnumber
;
3001 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
3002 if (rel
->howto
== NULL
)
3004 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
3005 _("Cannot represent relocation type %s"),
3006 bfd_get_reloc_code_name (r_type
));
3007 /* Set howto to a garbage value so that we can keep going. */
3008 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
3009 assert (rel
->howto
!= NULL
);
3015 #endif /* BFD_ASSEMBLER */