* config/tc-sh.c (md_begin): When encountering insn that are
[binutils.git] / gas / config / tc-sh.c
blobb8b452c274c57bb2b8949695588a85650f744576
1 /* tc-sh.c -- Assemble code for the Hitachi Super-H
2 Copyright (C) 1993, 94, 95, 96, 97, 98, 1999 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 Written By Steve Chamberlain
23 sac@cygnus.com
26 #include <stdio.h>
27 #include "as.h"
28 #include "bfd.h"
29 #include "subsegs.h"
30 #define DEFINE_TABLE
31 #include "opcodes/sh-opc.h"
32 #include <ctype.h>
34 #ifdef OBJ_ELF
35 #include "elf/sh.h"
36 #endif
38 const char comment_chars[] = "!";
39 const char line_separator_chars[] = ";";
40 const char line_comment_chars[] = "!#";
42 static void s_uses PARAMS ((int));
44 static void sh_count_relocs PARAMS ((bfd *, segT, PTR));
45 static void sh_frob_section PARAMS ((bfd *, segT, PTR));
47 void cons ();
48 void s_align_bytes ();
49 static void s_uacons PARAMS ((int));
50 static sh_opcode_info *find_cooked_opcode PARAMS ((char **));
51 static void assemble_ppi PARAMS ((char *, sh_opcode_info *));
53 int shl = 0;
55 static void
56 little (ignore)
57 int ignore;
59 shl = 1;
60 target_big_endian = 0;
63 /* This table describes all the machine specific pseudo-ops the assembler
64 has to support. The fields are:
65 pseudo-op name without dot
66 function to call to execute this pseudo-op
67 Integer arg to pass to the function
70 const pseudo_typeS md_pseudo_table[] =
72 {"int", cons, 4},
73 {"word", cons, 2},
74 {"form", listing_psize, 0},
75 {"little", little, 0},
76 {"heading", listing_title, 0},
77 {"import", s_ignore, 0},
78 {"page", listing_eject, 0},
79 {"program", s_ignore, 0},
80 {"uses", s_uses, 0},
81 {"uaword", s_uacons, 2},
82 {"ualong", s_uacons, 4},
83 {0, 0, 0}
86 /*int md_reloc_size; */
88 int sh_relax; /* set if -relax seen */
90 /* Whether -small was seen. */
92 int sh_small;
94 /* Whether -dsp was seen. */
96 static int sh_dsp;
98 /* The bit mask of architectures that could
99 accomodate the insns seen so far. */
100 static int valid_arch;
102 const char EXP_CHARS[] = "eE";
104 /* Chars that mean this number is a floating point constant */
105 /* As in 0f12.456 */
106 /* or 0d1.2345e12 */
107 const char FLT_CHARS[] = "rRsSfFdDxXpP";
109 #define C(a,b) ENCODE_RELAX(a,b)
111 #define JREG 14 /* Register used as a temp when relaxing */
112 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
113 #define GET_WHAT(x) ((x>>4))
115 /* These are the three types of relaxable instrction */
116 #define COND_JUMP 1
117 #define COND_JUMP_DELAY 2
118 #define UNCOND_JUMP 3
119 #define END 4
121 #define UNDEF_DISP 0
122 #define COND8 1
123 #define COND12 2
124 #define COND32 3
125 #define UNCOND12 1
126 #define UNCOND32 2
127 #define UNDEF_WORD_DISP 4
129 #define UNCOND12 1
130 #define UNCOND32 2
132 /* Branch displacements are from the address of the branch plus
133 four, thus all minimum and maximum values have 4 added to them. */
134 #define COND8_F 258
135 #define COND8_M -252
136 #define COND8_LENGTH 2
138 /* There is one extra instruction before the branch, so we must add
139 two more bytes to account for it. */
140 #define COND12_F 4100
141 #define COND12_M -4090
142 #define COND12_LENGTH 6
144 #define COND12_DELAY_LENGTH 4
146 /* ??? The minimum and maximum values are wrong, but this does not matter
147 since this relocation type is not supported yet. */
148 #define COND32_F (1<<30)
149 #define COND32_M -(1<<30)
150 #define COND32_LENGTH 14
152 #define UNCOND12_F 4098
153 #define UNCOND12_M -4092
154 #define UNCOND12_LENGTH 2
156 /* ??? The minimum and maximum values are wrong, but this does not matter
157 since this relocation type is not supported yet. */
158 #define UNCOND32_F (1<<30)
159 #define UNCOND32_M -(1<<30)
160 #define UNCOND32_LENGTH 14
162 const relax_typeS md_relax_table[C (END, 0)] = {
163 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
164 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
166 { 0 },
167 /* C (COND_JUMP, COND8) */
168 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
169 /* C (COND_JUMP, COND12) */
170 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
171 /* C (COND_JUMP, COND32) */
172 { COND32_F, COND32_M, COND32_LENGTH, 0, },
173 { 0 }, { 0 }, { 0 }, { 0 },
174 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
176 { 0 },
177 /* C (COND_JUMP_DELAY, COND8) */
178 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
179 /* C (COND_JUMP_DELAY, COND12) */
180 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
181 /* C (COND_JUMP_DELAY, COND32) */
182 { COND32_F, COND32_M, COND32_LENGTH, 0, },
183 { 0 }, { 0 }, { 0 }, { 0 },
184 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
186 { 0 },
187 /* C (UNCOND_JUMP, UNCOND12) */
188 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
189 /* C (UNCOND_JUMP, UNCOND32) */
190 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
191 { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
192 { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
195 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */
198 This function is called once, at assembler startup time. This should
199 set up all the tables, etc that the MD part of the assembler needs
202 void
203 md_begin ()
205 sh_opcode_info *opcode;
206 char *prev_name = "";
207 int target_arch;
209 #ifdef TE_PE
210 /* The WinCE OS only supports little endian executables. */
211 target_big_endian = 0;
212 #else
213 if (! shl)
214 target_big_endian = 1;
215 #endif
217 target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up);
218 valid_arch = target_arch;
220 opcode_hash_control = hash_new ();
222 /* Insert unique names into hash table */
223 for (opcode = sh_table; opcode->name; opcode++)
225 if (strcmp (prev_name, opcode->name))
227 if (! (opcode->arch & target_arch))
228 continue;
229 prev_name = opcode->name;
230 hash_insert (opcode_hash_control, opcode->name, (char *) opcode);
232 else
234 /* Make all the opcodes with the same name point to the same
235 string */
236 opcode->name = prev_name;
241 static int reg_m;
242 static int reg_n;
243 static int reg_x, reg_y;
244 static int reg_efg;
245 static int reg_b;
247 static expressionS immediate; /* absolute expression */
249 typedef struct
251 sh_arg_type type;
252 int reg;
255 sh_operand_info;
257 #define IDENT_CHAR(c) (isalnum (c) || (c) == '_')
259 /* try and parse a reg name, returns number of chars consumed */
260 static int
261 parse_reg (src, mode, reg)
262 char *src;
263 int *mode;
264 int *reg;
266 /* We use ! IDENT_CHAR for the next character after the register name, to
267 make sure that we won't accidentally recognize a symbol name such as
268 'sram' or sr_ram as being a reference to the register 'sr'. */
270 if (src[0] == 'r')
272 if (src[1] == '1')
274 if (src[2] >= '0' && src[2] <= '5'
275 && ! IDENT_CHAR ((unsigned char) src[3]))
277 *mode = A_REG_N;
278 *reg = 10 + src[2] - '0';
279 return 3;
282 if (src[1] >= '0' && src[1] <= '9'
283 && ! IDENT_CHAR ((unsigned char) src[2]))
285 *mode = A_REG_N;
286 *reg = (src[1] - '0');
287 return 2;
289 if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0
290 && ! IDENT_CHAR ((unsigned char) src[7]))
292 *mode = A_REG_B;
293 *reg = (src[1] - '0');
294 return 7;
297 if (src[1] == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
299 *mode = A_RE;
300 return 2;
302 if (src[1] == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
304 *mode = A_RS;
305 return 2;
309 if (src[0] == 'a')
311 if (src[1] == '0')
313 if (! IDENT_CHAR ((unsigned char) src[2]))
315 *mode = DSP_REG_N;
316 *reg = A_A0_NUM;
317 return 2;
319 if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
321 *mode = DSP_REG_N;
322 *reg = A_A0G_NUM;
323 return 3;
326 if (src[1] == '1')
328 if (! IDENT_CHAR ((unsigned char) src[2]))
330 *mode = DSP_REG_N;
331 *reg = A_A1_NUM;
332 return 2;
334 if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
336 *mode = DSP_REG_N;
337 *reg = A_A1G_NUM;
338 return 3;
342 if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1'
343 && ! IDENT_CHAR ((unsigned char) src[3]))
345 *mode = A_REG_N;
346 *reg = 4 + (src[1] - '0');
347 return 3;
349 if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1'
350 && ! IDENT_CHAR ((unsigned char) src[3]))
352 *mode = A_REG_N;
353 *reg = 6 + (src[1] - '0');
354 return 3;
356 if (src[1] == 's' && src[2] >= '0' && src[2] <= '3'
357 && ! IDENT_CHAR ((unsigned char) src[3]))
359 int n = src[1] - '0';
361 *mode = A_REG_N;
362 *reg = n | ((~n & 2) << 1);
363 return 3;
367 if (src[0] == 'i' && src[1] && ! IDENT_CHAR ((unsigned char) src[3]))
369 if (src[1] == 's')
371 *mode = A_REG_N;
372 *reg = 8;
373 return 2;
375 if (src[1] == 'x')
377 *mode = A_REG_N;
378 *reg = 8;
379 return 2;
381 if (src[1] == 'y')
383 *mode = A_REG_N;
384 *reg = 9;
385 return 2;
389 if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1'
390 && ! IDENT_CHAR ((unsigned char) src[2]))
392 *mode = DSP_REG_N;
393 *reg = A_X0_NUM + src[1] - '0';
394 return 2;
397 if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1'
398 && ! IDENT_CHAR ((unsigned char) src[2]))
400 *mode = DSP_REG_N;
401 *reg = A_Y0_NUM + src[1] - '0';
402 return 2;
405 if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1'
406 && ! IDENT_CHAR ((unsigned char) src[2]))
408 *mode = DSP_REG_N;
409 *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM;
410 return 2;
413 if (src[0] == 's'
414 && src[1] == 's'
415 && src[2] == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
417 *mode = A_SSR;
418 return 3;
421 if (src[0] == 's' && src[1] == 'p' && src[2] == 'c'
422 && ! IDENT_CHAR ((unsigned char) src[3]))
424 *mode = A_SPC;
425 return 3;
428 if (src[0] == 's' && src[1] == 'g' && src[2] == 'r'
429 && ! IDENT_CHAR ((unsigned char) src[3]))
431 *mode = A_SGR;
432 return 3;
435 if (src[0] == 'd' && src[1] == 's' && src[2] == 'r'
436 && ! IDENT_CHAR ((unsigned char) src[3]))
438 *mode = A_DSR;
439 return 3;
442 if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r'
443 && ! IDENT_CHAR ((unsigned char) src[3]))
445 *mode = A_DBR;
446 return 3;
449 if (src[0] == 's' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
451 *mode = A_SR;
452 return 2;
455 if (src[0] == 's' && src[1] == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
457 *mode = A_REG_N;
458 *reg = 15;
459 return 2;
462 if (src[0] == 'p' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
464 *mode = A_PR;
465 return 2;
467 if (src[0] == 'p' && src[1] == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
469 *mode = A_DISP_PC;
470 return 2;
472 if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r'
473 && ! IDENT_CHAR ((unsigned char) src[3]))
475 *mode = A_GBR;
476 return 3;
478 if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r'
479 && ! IDENT_CHAR ((unsigned char) src[3]))
481 *mode = A_VBR;
482 return 3;
485 if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c'
486 && ! IDENT_CHAR ((unsigned char) src[4]))
488 if (src[3] == 'l')
490 *mode = A_MACL;
491 return 4;
493 if (src[3] == 'h')
495 *mode = A_MACH;
496 return 4;
499 if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd'
500 && ! IDENT_CHAR ((unsigned char) src[4]))
502 *mode = A_MOD;
503 return 3;
505 if (src[0] == 'f' && src[1] == 'r')
507 if (src[2] == '1')
509 if (src[3] >= '0' && src[3] <= '5'
510 && ! IDENT_CHAR ((unsigned char) src[4]))
512 *mode = F_REG_N;
513 *reg = 10 + src[3] - '0';
514 return 4;
517 if (src[2] >= '0' && src[2] <= '9'
518 && ! IDENT_CHAR ((unsigned char) src[3]))
520 *mode = F_REG_N;
521 *reg = (src[2] - '0');
522 return 3;
525 if (src[0] == 'd' && src[1] == 'r')
527 if (src[2] == '1')
529 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
530 && ! IDENT_CHAR ((unsigned char) src[4]))
532 *mode = D_REG_N;
533 *reg = 10 + src[3] - '0';
534 return 4;
537 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
538 && ! IDENT_CHAR ((unsigned char) src[3]))
540 *mode = D_REG_N;
541 *reg = (src[2] - '0');
542 return 3;
545 if (src[0] == 'x' && src[1] == 'd')
547 if (src[2] == '1')
549 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
550 && ! IDENT_CHAR ((unsigned char) src[4]))
552 *mode = X_REG_N;
553 *reg = 11 + src[3] - '0';
554 return 4;
557 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
558 && ! IDENT_CHAR ((unsigned char) src[3]))
560 *mode = X_REG_N;
561 *reg = (src[2] - '0') + 1;
562 return 3;
565 if (src[0] == 'f' && src[1] == 'v')
567 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
569 *mode = V_REG_N;
570 *reg = 12;
571 return 4;
573 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
574 && ! IDENT_CHAR ((unsigned char) src[3]))
576 *mode = V_REG_N;
577 *reg = (src[2] - '0');
578 return 3;
581 if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l'
582 && ! IDENT_CHAR ((unsigned char) src[4]))
584 *mode = FPUL_N;
585 return 4;
588 if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c'
589 && src[4] == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
591 *mode = FPSCR_N;
592 return 5;
595 if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r'
596 && src[4] == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
598 *mode = XMTRX_M4;
599 return 5;
602 return 0;
605 static symbolS *dot()
607 const char *fake;
609 /* JF: '.' is pseudo symbol with value of current location
610 in current segment. */
611 fake = FAKE_LABEL_NAME;
612 return symbol_new (fake,
613 now_seg,
614 (valueT) frag_now_fix (),
615 frag_now);
620 static
621 char *
622 parse_exp (s)
623 char *s;
625 char *save;
626 char *new;
628 save = input_line_pointer;
629 input_line_pointer = s;
630 expression (&immediate);
631 if (immediate.X_op == O_absent)
632 as_bad (_("missing operand"));
633 new = input_line_pointer;
634 input_line_pointer = save;
635 return new;
639 /* The many forms of operand:
641 Rn Register direct
642 @Rn Register indirect
643 @Rn+ Autoincrement
644 @-Rn Autodecrement
645 @(disp:4,Rn)
646 @(disp:8,GBR)
647 @(disp:8,PC)
649 @(R0,Rn)
650 @(R0,GBR)
652 disp:8
653 disp:12
654 #imm8
655 pr, gbr, vbr, macl, mach
659 static
660 char *
661 parse_at (src, op)
662 char *src;
663 sh_operand_info *op;
665 int len;
666 int mode;
667 src++;
668 if (src[0] == '-')
670 /* Must be predecrement */
671 src++;
673 len = parse_reg (src, &mode, &(op->reg));
674 if (mode != A_REG_N)
675 as_bad (_("illegal register after @-"));
677 op->type = A_DEC_N;
678 src += len;
680 else if (src[0] == '(')
682 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
683 @(r0, rn) */
684 src++;
685 len = parse_reg (src, &mode, &(op->reg));
686 if (len && mode == A_REG_N)
688 src += len;
689 if (op->reg != 0)
691 as_bad (_("must be @(r0,...)"));
693 if (src[0] == ',')
694 src++;
695 /* Now can be rn or gbr */
696 len = parse_reg (src, &mode, &(op->reg));
697 if (mode == A_GBR)
699 op->type = A_R0_GBR;
701 else if (mode == A_REG_N)
703 op->type = A_IND_R0_REG_N;
705 else
707 as_bad (_("syntax error in @(r0,...)"));
710 else
712 /* Must be an @(disp,.. thing) */
713 src = parse_exp (src);
714 if (src[0] == ',')
715 src++;
716 /* Now can be rn, gbr or pc */
717 len = parse_reg (src, &mode, &op->reg);
718 if (len)
720 if (mode == A_REG_N)
722 op->type = A_DISP_REG_N;
724 else if (mode == A_GBR)
726 op->type = A_DISP_GBR;
728 else if (mode == A_DISP_PC)
730 /* Turn a plain @(4,pc) into @(.+4,pc) */
731 if (immediate.X_op == O_constant) {
732 immediate.X_add_symbol = dot();
733 immediate.X_op = O_symbol;
735 op->type = A_DISP_PC;
737 else
739 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
742 else
744 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
747 src += len;
748 if (src[0] != ')')
749 as_bad (_("expecting )"));
750 else
751 src++;
753 else
755 src += parse_reg (src, &mode, &(op->reg));
756 if (mode != A_REG_N)
758 as_bad (_("illegal register after @"));
760 if (src[0] == '+')
762 src++;
763 if ((src[0] == 'r' && src[1] == '8')
764 || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's')))
766 src += 2;
767 op->type = A_PMOD_N;
769 if ((src[0] == 'r' && src[1] == '9')
770 || (src[0] == 'i' && src[1] == 'y'))
772 src += 2;
773 op->type = A_PMODY_N;
775 else
776 op->type = A_INC_N;
778 else
780 op->type = A_IND_N;
783 return src;
786 static void
787 get_operand (ptr, op)
788 char **ptr;
789 sh_operand_info *op;
791 char *src = *ptr;
792 int mode = -1;
793 unsigned int len;
795 if (src[0] == '#')
797 src++;
798 *ptr = parse_exp (src);
799 op->type = A_IMM;
800 return;
803 else if (src[0] == '@')
805 *ptr = parse_at (src, op);
806 return;
808 len = parse_reg (src, &mode, &(op->reg));
809 if (len)
811 *ptr = src + len;
812 op->type = mode;
813 return;
815 else
817 /* Not a reg, the only thing left is a displacement */
818 *ptr = parse_exp (src);
819 op->type = A_DISP_PC;
820 return;
824 static
825 char *
826 get_operands (info, args, operand)
827 sh_opcode_info *info;
828 char *args;
829 sh_operand_info *operand;
832 char *ptr = args;
833 if (info->arg[0])
835 /* The pre-processor will eliminate whitespace in front of '@'
836 after the first argument; we may be called multiple times
837 from assemble_ppi, so don't insist on finding whitespace here. */
838 if (*ptr == ' ')
839 ptr++;
841 get_operand (&ptr, operand + 0);
842 if (info->arg[1])
844 if (*ptr == ',')
846 ptr++;
848 get_operand (&ptr, operand + 1);
849 if (info->arg[2])
851 if (*ptr == ',')
853 ptr++;
855 get_operand (&ptr, operand + 2);
857 else
859 operand[2].type = 0;
862 else
864 operand[1].type = 0;
865 operand[2].type = 0;
868 else
870 operand[0].type = 0;
871 operand[1].type = 0;
872 operand[2].type = 0;
874 return ptr;
877 /* Passed a pointer to a list of opcodes which use different
878 addressing modes, return the opcode which matches the opcodes
879 provided
882 static
883 sh_opcode_info *
884 get_specific (opcode, operands)
885 sh_opcode_info *opcode;
886 sh_operand_info *operands;
888 sh_opcode_info *this_try = opcode;
889 char *name = opcode->name;
890 int n = 0;
891 while (opcode->name)
893 this_try = opcode++;
894 if (this_try->name != name)
896 /* We've looked so far down the table that we've run out of
897 opcodes with the same name */
898 return 0;
900 /* look at both operands needed by the opcodes and provided by
901 the user - since an arg test will often fail on the same arg
902 again and again, we'll try and test the last failing arg the
903 first on each opcode try */
905 for (n = 0; this_try->arg[n]; n++)
907 sh_operand_info *user = operands + n;
908 sh_arg_type arg = this_try->arg[n];
909 switch (arg)
911 case A_IMM:
912 case A_BDISP12:
913 case A_BDISP8:
914 case A_DISP_GBR:
915 case A_DISP_PC:
916 case A_MACH:
917 case A_PR:
918 case A_MACL:
919 if (user->type != arg)
920 goto fail;
921 break;
922 case A_R0:
923 /* opcode needs r0 */
924 if (user->type != A_REG_N || user->reg != 0)
925 goto fail;
926 break;
927 case A_R0_GBR:
928 if (user->type != A_R0_GBR || user->reg != 0)
929 goto fail;
930 break;
931 case F_FR0:
932 if (user->type != F_REG_N || user->reg != 0)
933 goto fail;
934 break;
936 case A_REG_N:
937 case A_INC_N:
938 case A_DEC_N:
939 case A_IND_N:
940 case A_IND_R0_REG_N:
941 case A_DISP_REG_N:
942 case F_REG_N:
943 case D_REG_N:
944 case X_REG_N:
945 case V_REG_N:
946 case FPUL_N:
947 case FPSCR_N:
948 case A_PMOD_N:
949 case A_PMODY_N:
950 case DSP_REG_N:
951 /* Opcode needs rn */
952 if (user->type != arg)
953 goto fail;
954 reg_n = user->reg;
955 break;
956 case DX_REG_N:
957 if (user->type != D_REG_N && user->type != X_REG_N)
958 goto fail;
959 reg_n = user->reg;
960 break;
961 case A_GBR:
962 case A_SR:
963 case A_VBR:
964 case A_DSR:
965 case A_MOD:
966 case A_RE:
967 case A_RS:
968 case A_SSR:
969 case A_SPC:
970 case A_SGR:
971 case A_DBR:
972 if (user->type != arg)
973 goto fail;
974 break;
976 case A_REG_B:
977 if (user->type != arg)
978 goto fail;
979 reg_b = user->reg;
980 break;
982 case A_REG_M:
983 case A_INC_M:
984 case A_DEC_M:
985 case A_IND_M:
986 case A_IND_R0_REG_M:
987 case A_DISP_REG_M:
988 case DSP_REG_M:
989 /* Opcode needs rn */
990 if (user->type != arg - A_REG_M + A_REG_N)
991 goto fail;
992 reg_m = user->reg;
993 break;
995 case DSP_REG_X:
996 if (user->type != DSP_REG_N)
997 goto fail;
998 switch (user->reg)
1000 case A_X0_NUM:
1001 reg_x = 0;
1002 break;
1003 case A_X1_NUM:
1004 reg_x = 1;
1005 break;
1006 case A_A0_NUM:
1007 reg_x = 2;
1008 break;
1009 case A_A1_NUM:
1010 reg_x = 3;
1011 break;
1012 default:
1013 goto fail;
1015 break;
1017 case DSP_REG_Y:
1018 if (user->type != DSP_REG_N)
1019 goto fail;
1020 switch (user->reg)
1022 case A_Y0_NUM:
1023 reg_y = 0;
1024 break;
1025 case A_Y1_NUM:
1026 reg_y = 1;
1027 break;
1028 case A_M0_NUM:
1029 reg_y = 2;
1030 break;
1031 case A_M1_NUM:
1032 reg_y = 3;
1033 break;
1034 default:
1035 goto fail;
1037 break;
1039 case DSP_REG_E:
1040 if (user->type != DSP_REG_N)
1041 goto fail;
1042 switch (user->reg)
1044 case A_X0_NUM:
1045 reg_efg = 0 << 10;
1046 break;
1047 case A_X1_NUM:
1048 reg_efg = 1 << 10;
1049 break;
1050 case A_Y0_NUM:
1051 reg_efg = 2 << 10;
1052 break;
1053 case A_A1_NUM:
1054 reg_efg = 3 << 10;
1055 break;
1056 default:
1057 goto fail;
1059 break;
1061 case DSP_REG_F:
1062 if (user->type != DSP_REG_N)
1063 goto fail;
1064 switch (user->reg)
1066 case A_Y0_NUM:
1067 reg_efg |= 0 << 8;
1068 break;
1069 case A_Y1_NUM:
1070 reg_efg |= 1 << 8;
1071 break;
1072 case A_X0_NUM:
1073 reg_efg |= 2 << 8;
1074 break;
1075 case A_A1_NUM:
1076 reg_efg |= 3 << 8;
1077 break;
1078 default:
1079 goto fail;
1081 break;
1083 case DSP_REG_G:
1084 if (user->type != DSP_REG_N)
1085 goto fail;
1086 switch (user->reg)
1088 case A_M0_NUM:
1089 reg_efg |= 0 << 2;
1090 break;
1091 case A_M1_NUM:
1092 reg_efg |= 1 << 2;
1093 break;
1094 case A_A0_NUM:
1095 reg_efg |= 2 << 2;
1096 break;
1097 case A_A1_NUM:
1098 reg_efg |= 3 << 2;
1099 break;
1100 default:
1101 goto fail;
1103 break;
1105 case A_A0:
1106 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1107 goto fail;
1108 break;
1109 case A_X0:
1110 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1111 goto fail;
1112 break;
1113 case A_X1:
1114 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1115 goto fail;
1116 break;
1117 case A_Y0:
1118 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1119 goto fail;
1120 break;
1121 case A_Y1:
1122 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1123 goto fail;
1124 break;
1126 case F_REG_M:
1127 case D_REG_M:
1128 case X_REG_M:
1129 case V_REG_M:
1130 case FPUL_M:
1131 case FPSCR_M:
1132 /* Opcode needs rn */
1133 if (user->type != arg - F_REG_M + F_REG_N)
1134 goto fail;
1135 reg_m = user->reg;
1136 break;
1137 case DX_REG_M:
1138 if (user->type != D_REG_N && user->type != X_REG_N)
1139 goto fail;
1140 reg_m = user->reg;
1141 break;
1142 case XMTRX_M4:
1143 if (user->type != XMTRX_M4)
1144 goto fail;
1145 reg_m = 4;
1146 break;
1148 default:
1149 printf (_("unhandled %d\n"), arg);
1150 goto fail;
1153 if ( !(valid_arch & this_try->arch))
1154 goto fail;
1155 valid_arch &= this_try->arch;
1156 return this_try;
1157 fail:;
1160 return 0;
1164 check (operand, low, high)
1165 expressionS *operand;
1166 int low;
1167 int high;
1169 if (operand->X_op != O_constant
1170 || operand->X_add_number < low
1171 || operand->X_add_number > high)
1173 as_bad (_("operand must be absolute in range %d..%d"), low, high);
1175 return operand->X_add_number;
1179 static void
1180 insert (where, how, pcrel)
1181 char *where;
1182 int how;
1183 int pcrel;
1185 fix_new_exp (frag_now,
1186 where - frag_now->fr_literal,
1188 &immediate,
1189 pcrel,
1190 how);
1193 static void
1194 build_relax (opcode)
1195 sh_opcode_info *opcode;
1197 int high_byte = target_big_endian ? 0 : 1;
1198 char *p;
1200 if (opcode->arg[0] == A_BDISP8)
1202 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1203 p = frag_var (rs_machine_dependent,
1204 md_relax_table[C (what, COND32)].rlx_length,
1205 md_relax_table[C (what, COND8)].rlx_length,
1206 C (what, 0),
1207 immediate.X_add_symbol,
1208 immediate.X_add_number,
1210 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1212 else if (opcode->arg[0] == A_BDISP12)
1214 p = frag_var (rs_machine_dependent,
1215 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1216 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1217 C (UNCOND_JUMP, 0),
1218 immediate.X_add_symbol,
1219 immediate.X_add_number,
1221 p[high_byte] = (opcode->nibbles[0] << 4);
1226 /* Now we know what sort of opcodes it is, lets build the bytes -
1228 static void
1229 build_Mytes (opcode, operand)
1230 sh_opcode_info *opcode;
1231 sh_operand_info *operand;
1234 int index;
1235 char nbuf[4];
1236 char *output = frag_more (2);
1237 int low_byte = target_big_endian ? 1 : 0;
1238 nbuf[0] = 0;
1239 nbuf[1] = 0;
1240 nbuf[2] = 0;
1241 nbuf[3] = 0;
1243 for (index = 0; index < 4; index++)
1245 sh_nibble_type i = opcode->nibbles[index];
1246 if (i < 16)
1248 nbuf[index] = i;
1250 else
1252 switch (i)
1254 case REG_N:
1255 nbuf[index] = reg_n;
1256 break;
1257 case REG_M:
1258 nbuf[index] = reg_m;
1259 break;
1260 case SDT_REG_N:
1261 if (reg_n < 2 || reg_n > 5)
1262 as_bad (_("Invalid register: 'r%d'"), reg_n);
1263 nbuf[index] = (reg_n & 3) | 4;
1264 break;
1265 case REG_NM:
1266 nbuf[index] = reg_n | (reg_m >> 2);
1267 break;
1268 case REG_B:
1269 nbuf[index] = reg_b | 0x08;
1270 break;
1271 case DISP_4:
1272 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0);
1273 break;
1274 case IMM_4BY4:
1275 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0);
1276 break;
1277 case IMM_4BY2:
1278 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0);
1279 break;
1280 case IMM_4:
1281 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0);
1282 break;
1283 case IMM_8BY4:
1284 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0);
1285 break;
1286 case IMM_8BY2:
1287 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0);
1288 break;
1289 case IMM_8:
1290 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0);
1291 break;
1292 case PCRELIMM_8BY4:
1293 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1);
1294 break;
1295 case PCRELIMM_8BY2:
1296 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1);
1297 break;
1298 default:
1299 printf (_("failed for %d\n"), i);
1303 if (! target_big_endian) {
1304 output[1] = (nbuf[0] << 4) | (nbuf[1]);
1305 output[0] = (nbuf[2] << 4) | (nbuf[3]);
1307 else {
1308 output[0] = (nbuf[0] << 4) | (nbuf[1]);
1309 output[1] = (nbuf[2] << 4) | (nbuf[3]);
1313 /* Find an opcode at the start of *STR_P in the hash table, and set
1314 *STR_P to the first character after the last one read. */
1316 static sh_opcode_info *
1317 find_cooked_opcode (str_p)
1318 char **str_p;
1320 char *str = *str_p;
1321 unsigned char *op_start;
1322 unsigned char *op_end;
1323 char name[20];
1324 int nlen = 0;
1325 /* Drop leading whitespace */
1326 while (*str == ' ')
1327 str++;
1329 /* Find the op code end.
1330 The pre-processor will eliminate whitespace in front of
1331 any '@' after the first argument; we may be called from
1332 assemble_ppi, so the opcode might be terminated by an '@'. */
1333 for (op_start = op_end = (unsigned char *) (str);
1334 *op_end
1335 && nlen < 20
1336 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
1337 op_end++)
1339 unsigned char c = op_start[nlen];
1341 /* The machine independent code will convert CMP/EQ into cmp/EQ
1342 because it thinks the '/' is the end of the symbol. Moreover,
1343 all but the first sub-insn is a parallel processing insn won't
1344 be capitailzed. Instead of hacking up the machine independent
1345 code, we just deal with it here. */
1346 c = isupper (c) ? tolower (c) : c;
1347 name[nlen] = c;
1348 nlen++;
1350 name[nlen] = 0;
1351 *str_p = op_end;
1353 if (nlen == 0)
1355 as_bad (_("can't find opcode "));
1358 return (sh_opcode_info *) hash_find (opcode_hash_control, name);
1361 /* Assemble a parallel processing insn. */
1362 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
1363 static void
1364 assemble_ppi (op_end, opcode)
1365 char *op_end;
1366 sh_opcode_info *opcode;
1368 int movx = 0;
1369 int movy = 0;
1370 int cond = 0;
1371 int field_b = 0;
1372 char *output;
1373 int move_code;
1375 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
1376 Make sure we encode a defined insn pattern. */
1377 reg_x = 0;
1378 reg_y = 0;
1380 for (;;)
1382 sh_operand_info operand[3];
1384 if (opcode->arg[0] != A_END)
1385 op_end = get_operands (opcode, op_end, operand);
1386 opcode = get_specific (opcode, operand);
1387 if (opcode == 0)
1389 /* Couldn't find an opcode which matched the operands */
1390 char *where = frag_more (2);
1392 where[0] = 0x0;
1393 where[1] = 0x0;
1394 as_bad (_("invalid operands for opcode"));
1395 return;
1397 if (opcode->nibbles[0] != PPI)
1398 as_bad (_("insn can't be combined with parallel processing insn"));
1400 switch (opcode->nibbles[1])
1403 case NOPX:
1404 if (movx)
1405 as_bad (_("multiple movx specifications"));
1406 movx = DDT_BASE;
1407 break;
1408 case NOPY:
1409 if (movy)
1410 as_bad (_("multiple movy specifications"));
1411 movy = DDT_BASE;
1412 break;
1414 case MOVX:
1415 if (movx)
1416 as_bad (_("multiple movx specifications"));
1417 if (reg_n < 4 || reg_n > 5)
1418 as_bad (_("invalid movx address register"));
1419 if (opcode->nibbles[2] & 8)
1421 if (reg_m == A_A1_NUM)
1422 movx = 1 << 7;
1423 else if (reg_m != A_A0_NUM)
1424 as_bad (_("invalid movx dsp register"));
1426 else
1428 if (reg_x > 1)
1429 as_bad (_("invalid movx dsp register"));
1430 movx = reg_x << 7;
1432 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
1433 break;
1435 case MOVY:
1436 if (movy)
1437 as_bad (_("multiple movy specifications"));
1438 if (opcode->nibbles[2] & 8)
1440 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
1441 so add 8 more. */
1442 movy = 8;
1443 if (reg_m == A_A1_NUM)
1444 movy += 1 << 6;
1445 else if (reg_m != A_A0_NUM)
1446 as_bad (_("invalid movy dsp register"));
1448 else
1450 if (reg_y > 1)
1451 as_bad (_("invalid movy dsp register"));
1452 movy = reg_y << 6;
1454 if (reg_n < 6 || reg_n > 7)
1455 as_bad (_("invalid movy address register"));
1456 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
1457 break;
1459 case PSH:
1460 if (immediate.X_op != O_constant)
1461 as_bad (_("dsp immediate shift value not constant"));
1462 field_b = ((opcode->nibbles[2] << 12)
1463 | (immediate.X_add_number & 127) << 4
1464 | reg_n);
1465 break;
1466 case PPI3:
1467 if (field_b)
1468 as_bad (_("multiple parallel processing specifications"));
1469 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1470 + (reg_x << 6) + (reg_y << 4) + reg_n);
1471 break;
1472 case PDC:
1473 if (cond)
1474 as_bad (_("multiple condition specifications"));
1475 cond = opcode->nibbles[2] << 8;
1476 if (*op_end)
1477 goto skip_cond_check;
1478 break;
1479 case PPIC:
1480 if (field_b)
1481 as_bad (_("multiple parallel processing specifications"));
1482 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
1483 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
1484 cond = 0;
1485 break;
1486 case PMUL:
1487 if (field_b)
1489 if ((field_b & 0xef00) != 0xa100)
1490 as_bad (_("insn cannot be combined with pmuls"));
1491 field_b -= 0x8100;
1492 switch (field_b & 0xf)
1494 case A_X0_NUM:
1495 field_b += 0 - A_X0_NUM;
1496 break;
1497 case A_Y0_NUM:
1498 field_b += 1 - A_Y0_NUM;
1499 break;
1500 case A_A0_NUM:
1501 field_b += 2 - A_A0_NUM;
1502 break;
1503 case A_A1_NUM:
1504 field_b += 3 - A_A1_NUM;
1505 break;
1506 default:
1507 as_bad (_("bad padd / psub pmuls output operand"));
1510 field_b += 0x4000 + reg_efg;
1511 break;
1512 default:
1513 abort ();
1515 if (cond)
1517 as_bad (_("condition not followed by conditionalizable insn"));
1518 cond = 0;
1520 if (! *op_end)
1521 break;
1522 skip_cond_check:
1523 opcode = find_cooked_opcode (&op_end);
1524 if (opcode == NULL)
1526 (as_bad
1527 (_("unrecognized characters at end of parallel processing insn")));
1528 break;
1532 move_code = movx | movy;
1533 if (field_b)
1535 /* Parallel processing insn. */
1536 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b;
1538 output = frag_more (4);
1539 if (! target_big_endian)
1541 output[3] = ppi_code >> 8;
1542 output[2] = ppi_code;
1544 else
1546 output[2] = ppi_code >> 8;
1547 output[3] = ppi_code;
1549 move_code |= 0xf800;
1551 else
1552 /* Just a double data transfer. */
1553 output = frag_more (2);
1554 if (! target_big_endian)
1556 output[1] = move_code >> 8;
1557 output[0] = move_code;
1559 else
1561 output[0] = move_code >> 8;
1562 output[1] = move_code;
1566 /* This is the guts of the machine-dependent assembler. STR points to a
1567 machine dependent instruction. This function is supposed to emit
1568 the frags/bytes it assembles to.
1571 void
1572 md_assemble (str)
1573 char *str;
1575 unsigned char *op_end;
1576 sh_operand_info operand[3];
1577 sh_opcode_info *opcode;
1579 opcode = find_cooked_opcode (&str);
1580 op_end = str;
1582 if (opcode == NULL)
1584 as_bad (_("unknown opcode"));
1585 return;
1588 if (sh_relax
1589 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
1591 /* Output a CODE reloc to tell the linker that the following
1592 bytes are instructions, not data. */
1593 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1594 BFD_RELOC_SH_CODE);
1595 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
1598 if (opcode->nibbles[0] == PPI)
1600 assemble_ppi (op_end, opcode);
1601 return;
1604 if (opcode->arg[0] == A_BDISP12
1605 || opcode->arg[0] == A_BDISP8)
1607 parse_exp (op_end + 1);
1608 build_relax (opcode);
1610 else
1612 if (opcode->arg[0] == A_END)
1614 /* Ignore trailing whitespace. If there is any, it has already
1615 been compressed to a single space. */
1616 if (*op_end == ' ')
1617 op_end++;
1619 else
1621 op_end = get_operands (opcode, op_end, operand);
1623 opcode = get_specific (opcode, operand);
1625 if (opcode == 0)
1627 /* Couldn't find an opcode which matched the operands */
1628 char *where = frag_more (2);
1630 where[0] = 0x0;
1631 where[1] = 0x0;
1632 as_bad (_("invalid operands for opcode"));
1633 return;
1636 if (*op_end)
1637 as_bad (_("excess operands: '%s'"), op_end);
1639 build_Mytes (opcode, operand);
1644 /* This routine is called each time a label definition is seen. It
1645 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
1647 void
1648 sh_frob_label ()
1650 static fragS *last_label_frag;
1651 static int last_label_offset;
1653 if (sh_relax
1654 && seg_info (now_seg)->tc_segment_info_data.in_code)
1656 int offset;
1658 offset = frag_now_fix ();
1659 if (frag_now != last_label_frag
1660 || offset != last_label_offset)
1662 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
1663 last_label_frag = frag_now;
1664 last_label_offset = offset;
1669 /* This routine is called when the assembler is about to output some
1670 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
1672 void
1673 sh_flush_pending_output ()
1675 if (sh_relax
1676 && seg_info (now_seg)->tc_segment_info_data.in_code)
1678 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
1679 BFD_RELOC_SH_DATA);
1680 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
1684 symbolS *
1685 DEFUN (md_undefined_symbol, (name),
1686 char *name)
1688 return 0;
1691 #ifdef OBJ_COFF
1692 #ifndef BFD_ASSEMBLER
1694 void
1695 DEFUN (tc_crawl_symbol_chain, (headers),
1696 object_headers * headers)
1698 printf (_("call to tc_crawl_symbol_chain \n"));
1701 void
1702 DEFUN (tc_headers_hook, (headers),
1703 object_headers * headers)
1705 printf (_("call to tc_headers_hook \n"));
1708 #endif
1709 #endif
1711 /* Various routines to kill one day */
1712 /* Equal to MAX_PRECISION in atof-ieee.c */
1713 #define MAX_LITTLENUMS 6
1715 /* Turn a string in input_line_pointer into a floating point constant of type
1716 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
1717 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
1719 char *
1720 md_atof (type, litP, sizeP)
1721 int type;
1722 char *litP;
1723 int *sizeP;
1725 int prec;
1726 LITTLENUM_TYPE words[4];
1727 char *t;
1728 int i;
1730 switch (type)
1732 case 'f':
1733 prec = 2;
1734 break;
1736 case 'd':
1737 prec = 4;
1738 break;
1740 default:
1741 *sizeP = 0;
1742 return _("bad call to md_atof");
1745 t = atof_ieee (input_line_pointer, type, words);
1746 if (t)
1747 input_line_pointer = t;
1749 *sizeP = prec * 2;
1751 if (! target_big_endian)
1753 for (i = prec - 1; i >= 0; i--)
1755 md_number_to_chars (litP, (valueT) words[i], 2);
1756 litP += 2;
1759 else
1761 for (i = 0; i < prec; i++)
1763 md_number_to_chars (litP, (valueT) words[i], 2);
1764 litP += 2;
1768 return NULL;
1771 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
1772 call instruction. It refers to a label of the instruction which
1773 loads the register which the call uses. We use it to generate a
1774 special reloc for the linker. */
1776 static void
1777 s_uses (ignore)
1778 int ignore;
1780 expressionS ex;
1782 if (! sh_relax)
1783 as_warn (_(".uses pseudo-op seen when not relaxing"));
1785 expression (&ex);
1787 if (ex.X_op != O_symbol || ex.X_add_number != 0)
1789 as_bad (_("bad .uses format"));
1790 ignore_rest_of_line ();
1791 return;
1794 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
1796 demand_empty_rest_of_line ();
1799 CONST char *md_shortopts = "";
1800 struct option md_longopts[] = {
1802 #define OPTION_RELAX (OPTION_MD_BASE)
1803 #define OPTION_LITTLE (OPTION_MD_BASE + 1)
1804 #define OPTION_SMALL (OPTION_LITTLE + 1)
1805 #define OPTION_DSP (OPTION_SMALL + 1)
1807 {"relax", no_argument, NULL, OPTION_RELAX},
1808 {"little", no_argument, NULL, OPTION_LITTLE},
1809 {"small", no_argument, NULL, OPTION_SMALL},
1810 {"dsp", no_argument, NULL, OPTION_DSP},
1811 {NULL, no_argument, NULL, 0}
1813 size_t md_longopts_size = sizeof(md_longopts);
1816 md_parse_option (c, arg)
1817 int c;
1818 char *arg;
1820 switch (c)
1822 case OPTION_RELAX:
1823 sh_relax = 1;
1824 break;
1826 case OPTION_LITTLE:
1827 shl = 1;
1828 target_big_endian = 0;
1829 break;
1831 case OPTION_SMALL:
1832 sh_small = 1;
1833 break;
1835 case OPTION_DSP:
1836 sh_dsp = 1;
1837 break;
1839 default:
1840 return 0;
1843 return 1;
1846 void
1847 md_show_usage (stream)
1848 FILE *stream;
1850 fprintf(stream, _("\
1851 SH options:\n\
1852 -little generate little endian code\n\
1853 -relax alter jump instructions for long displacements\n\
1854 -small align sections to 4 byte boundaries, not 16\n
1855 -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n"));
1858 void
1859 tc_Nout_fix_to_chars ()
1861 printf (_("call to tc_Nout_fix_to_chars \n"));
1862 abort ();
1865 /* This struct is used to pass arguments to sh_count_relocs through
1866 bfd_map_over_sections. */
1868 struct sh_count_relocs
1870 /* Symbol we are looking for. */
1871 symbolS *sym;
1872 /* Count of relocs found. */
1873 int count;
1876 /* Count the number of fixups in a section which refer to a particular
1877 symbol. When using BFD_ASSEMBLER, this is called via
1878 bfd_map_over_sections. */
1880 /*ARGSUSED*/
1881 static void
1882 sh_count_relocs (abfd, sec, data)
1883 bfd *abfd;
1884 segT sec;
1885 PTR data;
1887 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
1888 segment_info_type *seginfo;
1889 symbolS *sym;
1890 fixS *fix;
1892 seginfo = seg_info (sec);
1893 if (seginfo == NULL)
1894 return;
1896 sym = info->sym;
1897 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
1899 if (fix->fx_addsy == sym)
1901 ++info->count;
1902 fix->fx_tcbit = 1;
1907 /* Handle the count relocs for a particular section. When using
1908 BFD_ASSEMBLER, this is called via bfd_map_over_sections. */
1910 /*ARGSUSED*/
1911 static void
1912 sh_frob_section (abfd, sec, ignore)
1913 bfd *abfd;
1914 segT sec;
1915 PTR ignore;
1917 segment_info_type *seginfo;
1918 fixS *fix;
1920 seginfo = seg_info (sec);
1921 if (seginfo == NULL)
1922 return;
1924 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
1926 symbolS *sym;
1927 bfd_vma val;
1928 fixS *fscan;
1929 struct sh_count_relocs info;
1931 if (fix->fx_r_type != BFD_RELOC_SH_USES)
1932 continue;
1934 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
1935 symbol in the same section. */
1936 sym = fix->fx_addsy;
1937 if (sym == NULL
1938 || fix->fx_subsy != NULL
1939 || fix->fx_addnumber != 0
1940 || S_GET_SEGMENT (sym) != sec
1941 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1942 || S_GET_STORAGE_CLASS (sym) == C_EXT
1943 #endif
1944 || S_IS_EXTERNAL (sym))
1946 as_warn_where (fix->fx_file, fix->fx_line,
1947 _(".uses does not refer to a local symbol in the same section"));
1948 continue;
1951 /* Look through the fixups again, this time looking for one
1952 at the same location as sym. */
1953 val = S_GET_VALUE (sym);
1954 for (fscan = seginfo->fix_root;
1955 fscan != NULL;
1956 fscan = fscan->fx_next)
1957 if (val == fscan->fx_frag->fr_address + fscan->fx_where
1958 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
1959 && fscan->fx_r_type != BFD_RELOC_SH_CODE
1960 && fscan->fx_r_type != BFD_RELOC_SH_DATA
1961 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
1962 break;
1963 if (fscan == NULL)
1965 as_warn_where (fix->fx_file, fix->fx_line,
1966 _("can't find fixup pointed to by .uses"));
1967 continue;
1970 if (fscan->fx_tcbit)
1972 /* We've already done this one. */
1973 continue;
1976 /* fscan should also be a fixup to a local symbol in the same
1977 section. */
1978 sym = fscan->fx_addsy;
1979 if (sym == NULL
1980 || fscan->fx_subsy != NULL
1981 || fscan->fx_addnumber != 0
1982 || S_GET_SEGMENT (sym) != sec
1983 #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF)
1984 || S_GET_STORAGE_CLASS (sym) == C_EXT
1985 #endif
1986 || S_IS_EXTERNAL (sym))
1988 as_warn_where (fix->fx_file, fix->fx_line,
1989 _(".uses target does not refer to a local symbol in the same section"));
1990 continue;
1993 /* Now we look through all the fixups of all the sections,
1994 counting the number of times we find a reference to sym. */
1995 info.sym = sym;
1996 info.count = 0;
1997 #ifdef BFD_ASSEMBLER
1998 bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info);
1999 #else
2001 int iscan;
2003 for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++)
2004 sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info);
2006 #endif
2008 if (info.count < 1)
2009 abort ();
2011 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2012 We have already adjusted the value of sym to include the
2013 fragment address, so we undo that adjustment here. */
2014 subseg_change (sec, 0);
2015 fix_new (symbol_get_frag (sym),
2016 S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address,
2017 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2021 /* This function is called after the symbol table has been completed,
2022 but before the relocs or section contents have been written out.
2023 If we have seen any .uses pseudo-ops, they point to an instruction
2024 which loads a register with the address of a function. We look
2025 through the fixups to find where the function address is being
2026 loaded from. We then generate a COUNT reloc giving the number of
2027 times that function address is referred to. The linker uses this
2028 information when doing relaxing, to decide when it can eliminate
2029 the stored function address entirely. */
2031 void
2032 sh_frob_file ()
2034 if (! sh_relax)
2035 return;
2037 #ifdef BFD_ASSEMBLER
2038 bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL);
2039 #else
2041 int iseg;
2043 for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++)
2044 sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL);
2046 #endif
2049 /* Called after relaxing. Set the correct sizes of the fragments, and
2050 create relocs so that md_apply_fix will fill in the correct values. */
2052 void
2053 md_convert_frag (headers, seg, fragP)
2054 #ifdef BFD_ASSEMBLER
2055 bfd *headers;
2056 #else
2057 object_headers *headers;
2058 #endif
2059 segT seg;
2060 fragS *fragP;
2062 int donerelax = 0;
2064 switch (fragP->fr_subtype)
2066 case C (COND_JUMP, COND8):
2067 case C (COND_JUMP_DELAY, COND8):
2068 subseg_change (seg, 0);
2069 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2070 1, BFD_RELOC_SH_PCDISP8BY2);
2071 fragP->fr_fix += 2;
2072 fragP->fr_var = 0;
2073 break;
2075 case C (UNCOND_JUMP, UNCOND12):
2076 subseg_change (seg, 0);
2077 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
2078 1, BFD_RELOC_SH_PCDISP12BY2);
2079 fragP->fr_fix += 2;
2080 fragP->fr_var = 0;
2081 break;
2083 case C (UNCOND_JUMP, UNCOND32):
2084 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
2085 if (fragP->fr_symbol == NULL)
2086 as_bad (_("at 0x%lx, displacement overflows 12-bit field"),
2087 (unsigned long) fragP->fr_address);
2088 else if (S_IS_DEFINED (fragP->fr_symbol))
2089 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"),
2090 (unsigned long) fragP->fr_address,
2091 S_GET_NAME (fragP->fr_symbol));
2092 else
2093 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"),
2094 (unsigned long) fragP->fr_address,
2095 S_GET_NAME (fragP->fr_symbol));
2097 #if 0 /* This code works, but generates poor code and the compiler
2098 should never produce a sequence that requires it to be used. */
2100 /* A jump wont fit in 12 bits, make code which looks like
2101 bra foo
2102 mov.w @(0, PC), r14
2103 .long disp
2104 foo: bra @r14
2106 int t = buffer[0] & 0x10;
2108 buffer[highbyte] = 0xa0; /* branch over move and disp */
2109 buffer[lowbyte] = 3;
2110 buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */
2111 buffer[lowbyte+2] = 0x00;
2113 buffer[highbyte+4] = 0; /* space for 32 bit jump disp */
2114 buffer[lowbyte+4] = 0;
2115 buffer[highbyte+6] = 0;
2116 buffer[lowbyte+6] = 0;
2118 buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */
2119 buffer[lowbyte+8] = t ? 0xb : 0x2b;
2121 buffer[highbyte+10] = 0x20; /* build nop */
2122 buffer[lowbyte+10] = 0x0b;
2124 /* Make reloc for the long disp */
2125 fix_new (fragP,
2126 fragP->fr_fix + 4,
2128 fragP->fr_symbol,
2129 fragP->fr_offset,
2131 BFD_RELOC_32);
2132 fragP->fr_fix += UNCOND32_LENGTH;
2133 fragP->fr_var = 0;
2134 donerelax = 1;
2135 #endif
2137 break;
2139 case C (COND_JUMP, COND12):
2140 case C (COND_JUMP_DELAY, COND12):
2141 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */
2142 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
2143 was due to gas incorrectly relaxing an out-of-range conditional
2144 branch with delay slot. It turned:
2145 bf.s L6 (slot mov.l r12,@(44,r0))
2146 into:
2148 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
2149 30: 00 09 nop
2150 32: 10 cb mov.l r12,@(44,r0)
2151 Therefore, branches with delay slots have to be handled
2152 differently from ones without delay slots. */
2154 unsigned char *buffer =
2155 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
2156 int highbyte = target_big_endian ? 0 : 1;
2157 int lowbyte = target_big_endian ? 1 : 0;
2158 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
2160 /* Toggle the true/false bit of the bcond. */
2161 buffer[highbyte] ^= 0x2;
2163 /* If this is a dalayed branch, we may not put the the bra in the
2164 slot. So we change it to a non-delayed branch, like that:
2165 b! cond slot_label; bra disp; slot_label: slot_insn
2166 ??? We should try if swapping the conditional branch and
2167 its delay-slot insn already makes the branch reach. */
2169 /* Build a relocation to six / four bytes farther on. */
2170 subseg_change (seg, 0);
2171 fix_new (fragP, fragP->fr_fix, 2,
2172 #ifdef BFD_ASSEMBLER
2173 section_symbol (seg),
2174 #else
2175 seg_info (seg)->dot,
2176 #endif
2177 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
2178 1, BFD_RELOC_SH_PCDISP8BY2);
2180 /* Set up a jump instruction. */
2181 buffer[highbyte + 2] = 0xa0;
2182 buffer[lowbyte + 2] = 0;
2183 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
2184 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
2186 if (delay)
2188 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
2189 fragP->fr_fix += 4;
2191 else
2193 /* Fill in a NOP instruction. */
2194 buffer[highbyte + 4] = 0x0;
2195 buffer[lowbyte + 4] = 0x9;
2197 fragP->fr_fix += 6;
2199 fragP->fr_var = 0;
2200 donerelax = 1;
2202 break;
2204 case C (COND_JUMP, COND32):
2205 case C (COND_JUMP_DELAY, COND32):
2206 case C (COND_JUMP, UNDEF_WORD_DISP):
2207 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
2208 if (fragP->fr_symbol == NULL)
2209 as_bad (_("at 0x%lx, displacement overflows 8-bit field"),
2210 (unsigned long) fragP->fr_address);
2211 else if (S_IS_DEFINED (fragP->fr_symbol))
2212 as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "),
2213 (unsigned long) fragP->fr_address,
2214 S_GET_NAME (fragP->fr_symbol));
2215 else
2216 as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "),
2217 (unsigned long) fragP->fr_address,
2218 S_GET_NAME (fragP->fr_symbol));
2220 #if 0 /* This code works, but generates poor code, and the compiler
2221 should never produce a sequence that requires it to be used. */
2223 /* A bcond won't fit and it won't go into a 12 bit
2224 displacement either, the code sequence looks like:
2225 b!cond foop
2226 mov.w @(n, PC), r14
2227 jmp @r14
2229 .long where
2230 foop:
2233 buffer[0] ^= 0x2; /* Toggle T/F bit */
2234 #define JREG 14
2235 buffer[1] = 5; /* branch over mov, jump, nop and ptr */
2236 buffer[2] = 0xd0 | JREG; /* Build mov insn */
2237 buffer[3] = 0x2;
2238 buffer[4] = 0x40 | JREG; /* Build jmp @JREG */
2239 buffer[5] = 0x0b;
2240 buffer[6] = 0x20; /* build nop */
2241 buffer[7] = 0x0b;
2242 buffer[8] = 0; /* space for 32 bit jump disp */
2243 buffer[9] = 0;
2244 buffer[10] = 0;
2245 buffer[11] = 0;
2246 buffer[12] = 0;
2247 buffer[13] = 0;
2248 /* Make reloc for the long disp */
2249 fix_new (fragP,
2250 fragP->fr_fix + 8,
2252 fragP->fr_symbol,
2253 fragP->fr_offset,
2255 BFD_RELOC_32);
2256 fragP->fr_fix += COND32_LENGTH;
2257 fragP->fr_var = 0;
2258 donerelax = 1;
2259 #endif
2261 break;
2263 default:
2264 abort ();
2267 if (donerelax && !sh_relax)
2268 as_warn_where (fragP->fr_file, fragP->fr_line,
2269 _("overflow in branch to %s; converted into longer instruction sequence"),
2270 (fragP->fr_symbol != NULL
2271 ? S_GET_NAME (fragP->fr_symbol)
2272 : ""));
2275 valueT
2276 DEFUN (md_section_align, (seg, size),
2277 segT seg AND
2278 valueT size)
2280 #ifdef BFD_ASSEMBLER
2281 #ifdef OBJ_ELF
2282 return size;
2283 #else /* ! OBJ_ELF */
2284 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1)
2285 & (-1 << bfd_get_section_alignment (stdoutput, seg)));
2286 #endif /* ! OBJ_ELF */
2287 #else /* ! BFD_ASSEMBLER */
2288 return ((size + (1 << section_alignment[(int) seg]) - 1)
2289 & (-1 << section_alignment[(int) seg]));
2290 #endif /* ! BFD_ASSEMBLER */
2293 /* This static variable is set by s_uacons to tell sh_cons_align that
2294 the expession does not need to be aligned. */
2296 static int sh_no_align_cons = 0;
2298 /* This handles the unaligned space allocation pseudo-ops, such as
2299 .uaword. .uaword is just like .word, but the value does not need
2300 to be aligned. */
2302 static void
2303 s_uacons (bytes)
2304 int bytes;
2306 /* Tell sh_cons_align not to align this value. */
2307 sh_no_align_cons = 1;
2308 cons (bytes);
2311 /* If a .word, et. al., pseud-op is seen, warn if the value is not
2312 aligned correctly. Note that this can cause warnings to be issued
2313 when assembling initialized structured which were declared with the
2314 packed attribute. FIXME: Perhaps we should require an option to
2315 enable this warning? */
2317 void
2318 sh_cons_align (nbytes)
2319 int nbytes;
2321 int nalign;
2322 char *p;
2324 if (sh_no_align_cons)
2326 /* This is an unaligned pseudo-op. */
2327 sh_no_align_cons = 0;
2328 return;
2331 nalign = 0;
2332 while ((nbytes & 1) == 0)
2334 ++nalign;
2335 nbytes >>= 1;
2338 if (nalign == 0)
2339 return;
2341 if (now_seg == absolute_section)
2343 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
2344 as_warn (_("misaligned data"));
2345 return;
2348 p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0,
2349 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
2351 record_alignment (now_seg, nalign);
2354 /* When relaxing, we need to output a reloc for any .align directive
2355 that requests alignment to a four byte boundary or larger. This is
2356 also where we check for misaligned data. */
2358 void
2359 sh_handle_align (frag)
2360 fragS *frag;
2362 if (sh_relax
2363 && frag->fr_type == rs_align
2364 && frag->fr_address + frag->fr_fix > 0
2365 && frag->fr_offset > 1
2366 && now_seg != bss_section)
2367 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
2368 BFD_RELOC_SH_ALIGN);
2370 if (frag->fr_type == rs_align_code
2371 && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0)
2372 as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data"));
2375 /* This macro decides whether a particular reloc is an entry in a
2376 switch table. It is used when relaxing, because the linker needs
2377 to know about all such entries so that it can adjust them if
2378 necessary. */
2380 #ifdef BFD_ASSEMBLER
2381 #define SWITCH_TABLE_CONS(fix) (0)
2382 #else
2383 #define SWITCH_TABLE_CONS(fix) \
2384 ((fix)->fx_r_type == 0 \
2385 && ((fix)->fx_size == 2 \
2386 || (fix)->fx_size == 1 \
2387 || (fix)->fx_size == 4))
2388 #endif
2390 #define SWITCH_TABLE(fix) \
2391 ((fix)->fx_addsy != NULL \
2392 && (fix)->fx_subsy != NULL \
2393 && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \
2394 && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \
2395 && ((fix)->fx_r_type == BFD_RELOC_32 \
2396 || (fix)->fx_r_type == BFD_RELOC_16 \
2397 || (fix)->fx_r_type == BFD_RELOC_8 \
2398 || SWITCH_TABLE_CONS (fix)))
2400 /* See whether we need to force a relocation into the output file.
2401 This is used to force out switch and PC relative relocations when
2402 relaxing. */
2405 sh_force_relocation (fix)
2406 fixS *fix;
2409 if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2410 || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2411 return 1;
2413 if (! sh_relax)
2414 return 0;
2416 return (fix->fx_pcrel
2417 || SWITCH_TABLE (fix)
2418 || fix->fx_r_type == BFD_RELOC_SH_COUNT
2419 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
2420 || fix->fx_r_type == BFD_RELOC_SH_CODE
2421 || fix->fx_r_type == BFD_RELOC_SH_DATA
2422 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
2425 #ifdef OBJ_ELF
2426 boolean
2427 sh_fix_adjustable (fixP)
2428 fixS *fixP;
2431 if (fixP->fx_addsy == NULL)
2432 return 1;
2434 /* We need the symbol name for the VTABLE entries */
2435 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2436 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2437 return 0;
2439 return 1;
2442 void sh_elf_final_processing()
2444 int val;
2446 /* Set file-specific flags to indicate if this code needs
2447 a processor with the sh-dsp / sh3e ISA to execute. */
2448 if (valid_arch & arch_sh1)
2449 val = EF_SH1;
2450 else if (valid_arch & arch_sh2)
2451 val = EF_SH2;
2452 else if (valid_arch & arch_sh_dsp)
2453 val = EF_SH_DSP;
2454 else if (valid_arch & arch_sh3)
2455 val = EF_SH3;
2456 else if (valid_arch & arch_sh3_dsp)
2457 val = EF_SH_DSP;
2458 else if (valid_arch & arch_sh3e)
2459 val = EF_SH3E;
2460 else if (valid_arch & arch_sh4)
2461 val = EF_SH4;
2462 else
2463 abort ();
2465 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
2466 elf_elfheader (stdoutput)->e_flags |= val;
2468 #endif
2470 /* Apply a fixup to the object file. */
2472 #ifdef BFD_ASSEMBLER
2474 md_apply_fix (fixP, valp)
2475 fixS *fixP;
2476 valueT *valp;
2477 #else
2478 void
2479 md_apply_fix (fixP, val)
2480 fixS *fixP;
2481 long val;
2482 #endif
2484 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2485 int lowbyte = target_big_endian ? 1 : 0;
2486 int highbyte = target_big_endian ? 0 : 1;
2487 #ifdef BFD_ASSEMBLER
2488 long val = *valp;
2489 #endif
2490 long max, min;
2491 int shift;
2493 #ifdef BFD_ASSEMBLER
2494 /* adjust_reloc_syms won't convert a reloc against a weak symbol
2495 into a reloc against a section, but bfd_install_relocation will
2496 screw up if the symbol is defined, so we have to adjust val here
2497 to avoid the screw up later. */
2498 if (fixP->fx_addsy != NULL
2499 && S_IS_WEAK (fixP->fx_addsy))
2500 val -= S_GET_VALUE (fixP->fx_addsy);
2501 #endif
2503 #ifndef BFD_ASSEMBLER
2504 if (fixP->fx_r_type == 0)
2506 if (fixP->fx_size == 2)
2507 fixP->fx_r_type = BFD_RELOC_16;
2508 else if (fixP->fx_size == 4)
2509 fixP->fx_r_type = BFD_RELOC_32;
2510 else if (fixP->fx_size == 1)
2511 fixP->fx_r_type = BFD_RELOC_8;
2512 else
2513 abort ();
2515 #endif
2517 max = min = 0;
2518 shift = 0;
2519 switch (fixP->fx_r_type)
2521 case BFD_RELOC_SH_IMM4:
2522 max = 0xf;
2523 *buf = (*buf & 0xf0) | (val & 0xf);
2524 break;
2526 case BFD_RELOC_SH_IMM4BY2:
2527 max = 0xf;
2528 shift = 1;
2529 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
2530 break;
2532 case BFD_RELOC_SH_IMM4BY4:
2533 max = 0xf;
2534 shift = 2;
2535 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
2536 break;
2538 case BFD_RELOC_SH_IMM8BY2:
2539 max = 0xff;
2540 shift = 1;
2541 *buf = val >> 1;
2542 break;
2544 case BFD_RELOC_SH_IMM8BY4:
2545 max = 0xff;
2546 shift = 2;
2547 *buf = val >> 2;
2548 break;
2550 case BFD_RELOC_8:
2551 case BFD_RELOC_SH_IMM8:
2552 /* Sometimes the 8 bit value is sign extended (e.g., add) and
2553 sometimes it is not (e.g., and). We permit any 8 bit value.
2554 Note that adding further restrictions may invalidate
2555 reasonable looking assembly code, such as ``and -0x1,r0''. */
2556 max = 0xff;
2557 min = - 0xff;
2558 *buf++ = val;
2559 break;
2561 case BFD_RELOC_SH_PCRELIMM8BY4:
2562 /* The lower two bits of the PC are cleared before the
2563 displacement is added in. We can assume that the destination
2564 is on a 4 byte bounday. If this instruction is also on a 4
2565 byte boundary, then we want
2566 (target - here) / 4
2567 and target - here is a multiple of 4.
2568 Otherwise, we are on a 2 byte boundary, and we want
2569 (target - (here - 2)) / 4
2570 and target - here is not a multiple of 4. Computing
2571 (target - (here - 2)) / 4 == (target - here + 2) / 4
2572 works for both cases, since in the first case the addition of
2573 2 will be removed by the division. target - here is in the
2574 variable val. */
2575 val = (val + 2) / 4;
2576 if (val & ~0xff)
2577 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2578 buf[lowbyte] = val;
2579 break;
2581 case BFD_RELOC_SH_PCRELIMM8BY2:
2582 val /= 2;
2583 if (val & ~0xff)
2584 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2585 buf[lowbyte] = val;
2586 break;
2588 case BFD_RELOC_SH_PCDISP8BY2:
2589 val /= 2;
2590 if (val < -0x80 || val > 0x7f)
2591 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2592 buf[lowbyte] = val;
2593 break;
2595 case BFD_RELOC_SH_PCDISP12BY2:
2596 val /= 2;
2597 if (val < -0x800 || val >= 0x7ff)
2598 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
2599 buf[lowbyte] = val & 0xff;
2600 buf[highbyte] |= (val >> 8) & 0xf;
2601 break;
2603 case BFD_RELOC_32:
2604 if (! target_big_endian)
2606 *buf++ = val >> 0;
2607 *buf++ = val >> 8;
2608 *buf++ = val >> 16;
2609 *buf++ = val >> 24;
2611 else
2613 *buf++ = val >> 24;
2614 *buf++ = val >> 16;
2615 *buf++ = val >> 8;
2616 *buf++ = val >> 0;
2618 break;
2620 case BFD_RELOC_16:
2621 if (! target_big_endian)
2623 *buf++ = val >> 0;
2624 *buf++ = val >> 8;
2626 else
2628 *buf++ = val >> 8;
2629 *buf++ = val >> 0;
2631 break;
2633 case BFD_RELOC_SH_USES:
2634 /* Pass the value into sh_coff_reloc_mangle. */
2635 fixP->fx_addnumber = val;
2636 break;
2638 case BFD_RELOC_SH_COUNT:
2639 case BFD_RELOC_SH_ALIGN:
2640 case BFD_RELOC_SH_CODE:
2641 case BFD_RELOC_SH_DATA:
2642 case BFD_RELOC_SH_LABEL:
2643 /* Nothing to do here. */
2644 break;
2646 case BFD_RELOC_VTABLE_INHERIT:
2647 case BFD_RELOC_VTABLE_ENTRY:
2648 fixP->fx_done = 0;
2649 #ifdef BFD_ASSEMBLER
2650 return 0;
2651 #else
2652 return;
2653 #endif
2655 default:
2656 abort ();
2659 if (shift != 0)
2661 if ((val & ((1 << shift) - 1)) != 0)
2662 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
2663 if (val >= 0)
2664 val >>= shift;
2665 else
2666 val = ((val >> shift)
2667 | ((long) -1 & ~ ((long) -1 >> shift)));
2669 if (max != 0 && (val < min || val > max))
2670 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
2672 #ifdef BFD_ASSEMBLER
2673 return 0;
2674 #endif
2677 /* Called just before address relaxation. Return the length
2678 by which a fragment must grow to reach it's destination. */
2681 md_estimate_size_before_relax (fragP, segment_type)
2682 register fragS *fragP;
2683 register segT segment_type;
2685 switch (fragP->fr_subtype)
2687 case C (UNCOND_JUMP, UNDEF_DISP):
2688 /* used to be a branch to somewhere which was unknown */
2689 if (!fragP->fr_symbol)
2691 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
2692 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length;
2694 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2696 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
2697 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length;
2699 else
2701 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
2702 fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length;
2703 return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length;
2705 break;
2707 default:
2708 abort ();
2709 case C (COND_JUMP, UNDEF_DISP):
2710 case C (COND_JUMP_DELAY, UNDEF_DISP):
2711 /* used to be a branch to somewhere which was unknown */
2712 if (fragP->fr_symbol
2713 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2715 int what = GET_WHAT (fragP->fr_subtype);
2716 /* Got a symbol and it's defined in this segment, become byte
2717 sized - maybe it will fix up */
2718 fragP->fr_subtype = C (what, COND8);
2719 fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length;
2721 else if (fragP->fr_symbol)
2723 int what = GET_WHAT (fragP->fr_subtype);
2724 /* Its got a segment, but its not ours, so it will always be long */
2725 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
2726 fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length;
2727 return md_relax_table[C (what, COND32)].rlx_length;
2729 else
2731 int what = GET_WHAT (fragP->fr_subtype);
2732 /* We know the abs value */
2733 fragP->fr_subtype = C (what, COND8);
2734 fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length;
2737 break;
2739 return fragP->fr_var;
2742 /* Put number into target byte order */
2744 void
2745 md_number_to_chars (ptr, use, nbytes)
2746 char *ptr;
2747 valueT use;
2748 int nbytes;
2750 if (! target_big_endian)
2751 number_to_chars_littleendian (ptr, use, nbytes);
2752 else
2753 number_to_chars_bigendian (ptr, use, nbytes);
2756 long
2757 md_pcrel_from (fixP)
2758 fixS *fixP;
2760 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
2763 #ifdef OBJ_COFF
2766 tc_coff_sizemachdep (frag)
2767 fragS *frag;
2769 return md_relax_table[frag->fr_subtype].rlx_length;
2772 #endif /* OBJ_COFF */
2774 /* When we align the .text section, insert the correct NOP pattern. */
2777 sh_do_align (n, fill, len, max)
2778 int n;
2779 const char *fill;
2780 int len;
2781 int max;
2783 if (fill == NULL
2784 && subseg_text_p (now_seg)
2785 && n > 1)
2787 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
2788 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
2790 /* First align to a 2 byte boundary, in case there is an odd
2791 .byte. */
2792 frag_align (1, 0, 0);
2793 if (target_big_endian)
2794 frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max);
2795 else
2796 frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern,
2797 max);
2798 return 1;
2801 return 0;
2804 #ifndef BFD_ASSEMBLER
2805 #ifdef OBJ_COFF
2807 /* Map BFD relocs to SH COFF relocs. */
2809 struct reloc_map
2811 bfd_reloc_code_real_type bfd_reloc;
2812 int sh_reloc;
2815 static const struct reloc_map coff_reloc_map[] =
2817 { BFD_RELOC_32, R_SH_IMM32 },
2818 { BFD_RELOC_16, R_SH_IMM16 },
2819 { BFD_RELOC_8, R_SH_IMM8 },
2820 { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 },
2821 { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP },
2822 { BFD_RELOC_SH_IMM4, R_SH_IMM4 },
2823 { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 },
2824 { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 },
2825 { BFD_RELOC_SH_IMM8, R_SH_IMM8 },
2826 { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 },
2827 { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 },
2828 { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 },
2829 { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 },
2830 { BFD_RELOC_8_PCREL, R_SH_SWITCH8 },
2831 { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 },
2832 { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 },
2833 { BFD_RELOC_SH_USES, R_SH_USES },
2834 { BFD_RELOC_SH_COUNT, R_SH_COUNT },
2835 { BFD_RELOC_SH_ALIGN, R_SH_ALIGN },
2836 { BFD_RELOC_SH_CODE, R_SH_CODE },
2837 { BFD_RELOC_SH_DATA, R_SH_DATA },
2838 { BFD_RELOC_SH_LABEL, R_SH_LABEL },
2839 { BFD_RELOC_UNUSED, 0 }
2842 /* Adjust a reloc for the SH. This is similar to the generic code,
2843 but does some minor tweaking. */
2845 void
2846 sh_coff_reloc_mangle (seg, fix, intr, paddr)
2847 segment_info_type *seg;
2848 fixS *fix;
2849 struct internal_reloc *intr;
2850 unsigned int paddr;
2852 symbolS *symbol_ptr = fix->fx_addsy;
2853 symbolS *dot;
2855 intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where;
2857 if (! SWITCH_TABLE (fix))
2859 const struct reloc_map *rm;
2861 for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++)
2862 if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type)
2863 break;
2864 if (rm->bfd_reloc == BFD_RELOC_UNUSED)
2865 as_bad_where (fix->fx_file, fix->fx_line,
2866 _("Can not represent %s relocation in this object file format"),
2867 bfd_get_reloc_code_name (fix->fx_r_type));
2868 intr->r_type = rm->sh_reloc;
2869 intr->r_offset = 0;
2871 else
2873 know (sh_relax);
2875 if (fix->fx_r_type == BFD_RELOC_16)
2876 intr->r_type = R_SH_SWITCH16;
2877 else if (fix->fx_r_type == BFD_RELOC_8)
2878 intr->r_type = R_SH_SWITCH8;
2879 else if (fix->fx_r_type == BFD_RELOC_32)
2880 intr->r_type = R_SH_SWITCH32;
2881 else
2882 abort ();
2884 /* For a switch reloc, we set r_offset to the difference between
2885 the reloc address and the subtrahend. When the linker is
2886 doing relaxing, it can use the determine the starting and
2887 ending points of the switch difference expression. */
2888 intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy);
2891 /* PC relative relocs are always against the current section. */
2892 if (symbol_ptr == NULL)
2894 switch (fix->fx_r_type)
2896 case BFD_RELOC_SH_PCRELIMM8BY2:
2897 case BFD_RELOC_SH_PCRELIMM8BY4:
2898 case BFD_RELOC_SH_PCDISP8BY2:
2899 case BFD_RELOC_SH_PCDISP12BY2:
2900 case BFD_RELOC_SH_USES:
2901 symbol_ptr = seg->dot;
2902 break;
2903 default:
2904 break;
2908 if (fix->fx_r_type == BFD_RELOC_SH_USES)
2910 /* We can't store the offset in the object file, since this
2911 reloc does not take up any space, so we store it in r_offset.
2912 The fx_addnumber field was set in md_apply_fix. */
2913 intr->r_offset = fix->fx_addnumber;
2915 else if (fix->fx_r_type == BFD_RELOC_SH_COUNT)
2917 /* We can't store the count in the object file, since this reloc
2918 does not take up any space, so we store it in r_offset. The
2919 fx_offset field was set when the fixup was created in
2920 sh_coff_frob_file. */
2921 intr->r_offset = fix->fx_offset;
2922 /* This reloc is always absolute. */
2923 symbol_ptr = NULL;
2925 else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN)
2927 /* Store the alignment in the r_offset field. */
2928 intr->r_offset = fix->fx_offset;
2929 /* This reloc is always absolute. */
2930 symbol_ptr = NULL;
2932 else if (fix->fx_r_type == BFD_RELOC_SH_CODE
2933 || fix->fx_r_type == BFD_RELOC_SH_DATA
2934 || fix->fx_r_type == BFD_RELOC_SH_LABEL)
2936 /* These relocs are always absolute. */
2937 symbol_ptr = NULL;
2940 /* Turn the segment of the symbol into an offset. */
2941 if (symbol_ptr != NULL)
2943 dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot;
2944 if (dot != NULL)
2945 intr->r_symndx = dot->sy_number;
2946 else
2947 intr->r_symndx = symbol_ptr->sy_number;
2949 else
2950 intr->r_symndx = -1;
2953 #endif /* OBJ_COFF */
2954 #endif /* ! BFD_ASSEMBLER */
2956 #ifdef BFD_ASSEMBLER
2958 /* Create a reloc. */
2960 arelent *
2961 tc_gen_reloc (section, fixp)
2962 asection *section;
2963 fixS *fixp;
2965 arelent *rel;
2966 bfd_reloc_code_real_type r_type;
2968 rel = (arelent *) xmalloc (sizeof (arelent));
2969 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2970 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2971 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2973 r_type = fixp->fx_r_type;
2975 if (SWITCH_TABLE (fixp))
2977 rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy);
2978 if (r_type == BFD_RELOC_16)
2979 r_type = BFD_RELOC_SH_SWITCH16;
2980 else if (r_type == BFD_RELOC_8)
2981 r_type = BFD_RELOC_8_PCREL;
2982 else if (r_type == BFD_RELOC_32)
2983 r_type = BFD_RELOC_SH_SWITCH32;
2984 else
2985 abort ();
2987 else if (r_type == BFD_RELOC_SH_USES)
2988 rel->addend = fixp->fx_addnumber;
2989 else if (r_type == BFD_RELOC_SH_COUNT)
2990 rel->addend = fixp->fx_offset;
2991 else if (r_type == BFD_RELOC_SH_ALIGN)
2992 rel->addend = fixp->fx_offset;
2993 else if (r_type == BFD_RELOC_VTABLE_INHERIT
2994 || r_type == BFD_RELOC_VTABLE_ENTRY)
2995 rel->addend = fixp->fx_offset;
2996 else if (fixp->fx_pcrel)
2997 rel->addend = fixp->fx_addnumber;
2998 else
2999 rel->addend = 0;
3001 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3002 if (rel->howto == NULL)
3004 as_bad_where (fixp->fx_file, fixp->fx_line,
3005 _("Cannot represent relocation type %s"),
3006 bfd_get_reloc_code_name (r_type));
3007 /* Set howto to a garbage value so that we can keep going. */
3008 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3009 assert (rel->howto != NULL);
3012 return rel;
3015 #endif /* BFD_ASSEMBLER */