1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
59 #define MIN(a,b) ((a) < (b) ? (a) : (b))
62 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
63 #define CURR_SLOT md.slot[md.curr_slot]
65 #define O_pseudo_fixup (O_max + 1)
69 /* IA-64 ABI section pseudo-ops. */
70 SPECIAL_SECTION_BSS
= 0,
72 SPECIAL_SECTION_SDATA
,
73 SPECIAL_SECTION_RODATA
,
74 SPECIAL_SECTION_COMMENT
,
75 SPECIAL_SECTION_UNWIND
,
76 SPECIAL_SECTION_UNWIND_INFO
,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY
,
79 SPECIAL_SECTION_FINI_ARRAY
,
96 FUNC_LT_FPTR_RELATIVE
,
106 REG_FR
= (REG_GR
+ 128),
107 REG_AR
= (REG_FR
+ 128),
108 REG_CR
= (REG_AR
+ 128),
109 REG_P
= (REG_CR
+ 128),
110 REG_BR
= (REG_P
+ 64),
111 REG_IP
= (REG_BR
+ 8),
118 /* The following are pseudo-registers for use by gas only. */
130 /* The following pseudo-registers are used for unwind directives only: */
138 DYNREG_GR
= 0, /* dynamic general purpose register */
139 DYNREG_FR
, /* dynamic floating point register */
140 DYNREG_PR
, /* dynamic predicate register */
144 enum operand_match_result
147 OPERAND_OUT_OF_RANGE
,
151 /* On the ia64, we can't know the address of a text label until the
152 instructions are packed into a bundle. To handle this, we keep
153 track of the list of labels that appear in front of each
157 struct label_fix
*next
;
161 /* This is the endianness of the current section. */
162 extern int target_big_endian
;
164 /* This is the default endianness. */
165 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
167 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
169 static void ia64_float_to_chars_bigendian
170 PARAMS ((char *, LITTLENUM_TYPE
*, int));
171 static void ia64_float_to_chars_littleendian
172 PARAMS ((char *, LITTLENUM_TYPE
*, int));
173 static void (*ia64_float_to_chars
)
174 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static struct hash_control
*alias_hash
;
177 static struct hash_control
*alias_name_hash
;
178 static struct hash_control
*secalias_hash
;
179 static struct hash_control
*secalias_name_hash
;
181 /* List of chars besides those in app.c:symbol_chars that can start an
182 operand. Used to prevent the scrubber eating vital white-space. */
183 const char ia64_symbol_chars
[] = "@?";
185 /* Characters which always start a comment. */
186 const char comment_chars
[] = "";
188 /* Characters which start a comment at the beginning of a line. */
189 const char line_comment_chars
[] = "#";
191 /* Characters which may be used to separate multiple commands on a
193 const char line_separator_chars
[] = ";";
195 /* Characters which are used to indicate an exponent in a floating
197 const char EXP_CHARS
[] = "eE";
199 /* Characters which mean that a number is a floating point constant,
201 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
203 /* ia64-specific option processing: */
205 const char *md_shortopts
= "m:N:x::";
207 struct option md_longopts
[] =
209 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
210 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
211 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
212 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
215 size_t md_longopts_size
= sizeof (md_longopts
);
219 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
220 struct hash_control
*reg_hash
; /* register name hash table */
221 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
222 struct hash_control
*const_hash
; /* constant hash table */
223 struct hash_control
*entry_hash
; /* code entry hint hash table */
225 symbolS
*regsym
[REG_NUM
];
227 /* If X_op is != O_absent, the registername for the instruction's
228 qualifying predicate. If NULL, p0 is assumed for instructions
229 that are predicatable. */
232 /* Optimize for which CPU. */
239 /* What to do when hint.b is used. */
251 explicit_mode
: 1, /* which mode we're in */
252 default_explicit_mode
: 1, /* which mode is the default */
253 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
255 keep_pending_output
: 1;
257 /* What to do when something is wrong with unwind directives. */
260 unwind_check_warning
,
264 /* Each bundle consists of up to three instructions. We keep
265 track of four most recent instructions so we can correctly set
266 the end_of_insn_group for the last instruction in a bundle. */
268 int num_slots_in_use
;
272 end_of_insn_group
: 1,
273 manual_bundling_on
: 1,
274 manual_bundling_off
: 1,
275 loc_directive_seen
: 1;
276 signed char user_template
; /* user-selected template, if any */
277 unsigned char qp_regno
; /* qualifying predicate */
278 /* This duplicates a good fraction of "struct fix" but we
279 can't use a "struct fix" instead since we can't call
280 fix_new_exp() until we know the address of the instruction. */
284 bfd_reloc_code_real_type code
;
285 enum ia64_opnd opnd
; /* type of operand in need of fix */
286 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
287 expressionS expr
; /* the value to be inserted */
289 fixup
[2]; /* at most two fixups per insn */
290 struct ia64_opcode
*idesc
;
291 struct label_fix
*label_fixups
;
292 struct label_fix
*tag_fixups
;
293 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
296 unsigned int src_line
;
297 struct dwarf2_line_info debug_line
;
305 struct dynreg
*next
; /* next dynamic register */
307 unsigned short base
; /* the base register number */
308 unsigned short num_regs
; /* # of registers in this set */
310 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
312 flagword flags
; /* ELF-header flags */
315 unsigned hint
:1; /* is this hint currently valid? */
316 bfd_vma offset
; /* mem.offset offset */
317 bfd_vma base
; /* mem.offset base */
320 int path
; /* number of alt. entry points seen */
321 const char **entry_labels
; /* labels of all alternate paths in
322 the current DV-checking block. */
323 int maxpaths
; /* size currently allocated for
326 int pointer_size
; /* size in bytes of a pointer */
327 int pointer_size_shift
; /* shift size of a pointer for alignment */
331 /* These are not const, because they are modified to MMI for non-itanium1
333 /* MFI bundle of nops. */
334 static unsigned char le_nop
[16] =
336 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
337 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
339 /* MFI bundle of nops with stop-bit. */
340 static unsigned char le_nop_stop
[16] =
342 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
343 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
346 /* application registers: */
352 #define AR_BSPSTORE 18
367 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
368 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
369 {"ar.rsc", 16}, {"ar.bsp", 17},
370 {"ar.bspstore", 18}, {"ar.rnat", 19},
371 {"ar.fcr", 21}, {"ar.eflag", 24},
372 {"ar.csd", 25}, {"ar.ssd", 26},
373 {"ar.cflg", 27}, {"ar.fsr", 28},
374 {"ar.fir", 29}, {"ar.fdr", 30},
375 {"ar.ccv", 32}, {"ar.unat", 36},
376 {"ar.fpsr", 40}, {"ar.itc", 44},
377 {"ar.pfs", 64}, {"ar.lc", 65},
398 /* control registers: */
440 static const struct const_desc
447 /* PSR constant masks: */
450 {"psr.be", ((valueT
) 1) << 1},
451 {"psr.up", ((valueT
) 1) << 2},
452 {"psr.ac", ((valueT
) 1) << 3},
453 {"psr.mfl", ((valueT
) 1) << 4},
454 {"psr.mfh", ((valueT
) 1) << 5},
456 {"psr.ic", ((valueT
) 1) << 13},
457 {"psr.i", ((valueT
) 1) << 14},
458 {"psr.pk", ((valueT
) 1) << 15},
460 {"psr.dt", ((valueT
) 1) << 17},
461 {"psr.dfl", ((valueT
) 1) << 18},
462 {"psr.dfh", ((valueT
) 1) << 19},
463 {"psr.sp", ((valueT
) 1) << 20},
464 {"psr.pp", ((valueT
) 1) << 21},
465 {"psr.di", ((valueT
) 1) << 22},
466 {"psr.si", ((valueT
) 1) << 23},
467 {"psr.db", ((valueT
) 1) << 24},
468 {"psr.lp", ((valueT
) 1) << 25},
469 {"psr.tb", ((valueT
) 1) << 26},
470 {"psr.rt", ((valueT
) 1) << 27},
471 /* 28-31: reserved */
472 /* 32-33: cpl (current privilege level) */
473 {"psr.is", ((valueT
) 1) << 34},
474 {"psr.mc", ((valueT
) 1) << 35},
475 {"psr.it", ((valueT
) 1) << 36},
476 {"psr.id", ((valueT
) 1) << 37},
477 {"psr.da", ((valueT
) 1) << 38},
478 {"psr.dd", ((valueT
) 1) << 39},
479 {"psr.ss", ((valueT
) 1) << 40},
480 /* 41-42: ri (restart instruction) */
481 {"psr.ed", ((valueT
) 1) << 43},
482 {"psr.bn", ((valueT
) 1) << 44},
485 /* indirect register-sets/memory: */
494 { "CPUID", IND_CPUID
},
495 { "cpuid", IND_CPUID
},
507 /* Pseudo functions used to indicate relocation types (these functions
508 start with an at sign (@). */
530 /* reloc pseudo functions (these must come first!): */
531 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
532 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
533 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
534 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
543 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
544 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
545 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
547 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
549 /* mbtype4 constants: */
550 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
551 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
552 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
553 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
554 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
556 /* fclass constants: */
557 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
558 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
559 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
560 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
561 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
562 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
563 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
564 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
565 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
567 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
569 /* hint constants: */
570 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
572 /* unwind-related constants: */
573 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
574 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
575 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
576 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
577 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
578 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
579 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
581 /* unwind-related registers: */
582 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
585 /* 41-bit nop opcodes (one per unit): */
586 static const bfd_vma nop
[IA64_NUM_UNITS
] =
588 0x0000000000LL
, /* NIL => break 0 */
589 0x0008000000LL
, /* I-unit nop */
590 0x0008000000LL
, /* M-unit nop */
591 0x4000000000LL
, /* B-unit nop */
592 0x0008000000LL
, /* F-unit nop */
593 0x0008000000LL
, /* L-"unit" nop */
594 0x0008000000LL
, /* X-unit nop */
597 /* Can't be `const' as it's passed to input routines (which have the
598 habit of setting temporary sentinels. */
599 static char special_section_name
[][20] =
601 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
602 {".IA_64.unwind"}, {".IA_64.unwind_info"},
603 {".init_array"}, {".fini_array"}
606 /* The best template for a particular sequence of up to three
608 #define N IA64_NUM_TYPES
609 static unsigned char best_template
[N
][N
][N
];
612 /* Resource dependencies currently in effect */
614 int depind
; /* dependency index */
615 const struct ia64_dependency
*dependency
; /* actual dependency */
616 unsigned specific
:1, /* is this a specific bit/regno? */
617 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
618 int index
; /* specific regno/bit within dependency */
619 int note
; /* optional qualifying note (0 if none) */
623 int insn_srlz
; /* current insn serialization state */
624 int data_srlz
; /* current data serialization state */
625 int qp_regno
; /* qualifying predicate for this usage */
626 char *file
; /* what file marked this dependency */
627 unsigned int line
; /* what line marked this dependency */
628 struct mem_offset mem_offset
; /* optional memory offset hint */
629 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
630 int path
; /* corresponding code entry index */
632 static int regdepslen
= 0;
633 static int regdepstotlen
= 0;
634 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
635 static const char *dv_sem
[] = { "none", "implied", "impliedf",
636 "data", "instr", "specific", "stop", "other" };
637 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
639 /* Current state of PR mutexation */
640 static struct qpmutex
{
643 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
644 static int qp_mutexeslen
= 0;
645 static int qp_mutexestotlen
= 0;
646 static valueT qp_safe_across_calls
= 0;
648 /* Current state of PR implications */
649 static struct qp_imply
{
652 unsigned p2_branched
:1;
654 } *qp_implies
= NULL
;
655 static int qp_implieslen
= 0;
656 static int qp_impliestotlen
= 0;
658 /* Keep track of static GR values so that indirect register usage can
659 sometimes be tracked. */
670 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
676 /* Remember the alignment frag. */
677 static fragS
*align_frag
;
679 /* These are the routines required to output the various types of
682 /* A slot_number is a frag address plus the slot index (0-2). We use the
683 frag address here so that if there is a section switch in the middle of
684 a function, then instructions emitted to a different section are not
685 counted. Since there may be more than one frag for a function, this
686 means we also need to keep track of which frag this address belongs to
687 so we can compute inter-frag distances. This also nicely solves the
688 problem with nops emitted for align directives, which can't easily be
689 counted, but can easily be derived from frag sizes. */
691 typedef struct unw_rec_list
{
693 unsigned long slot_number
;
695 unsigned long next_slot_number
;
696 fragS
*next_slot_frag
;
697 struct unw_rec_list
*next
;
700 #define SLOT_NUM_NOT_SET (unsigned)-1
702 /* Linked list of saved prologue counts. A very poor
703 implementation of a map from label numbers to prologue counts. */
704 typedef struct label_prologue_count
706 struct label_prologue_count
*next
;
707 unsigned long label_number
;
708 unsigned int prologue_count
;
709 } label_prologue_count
;
713 /* Maintain a list of unwind entries for the current function. */
717 /* Any unwind entires that should be attached to the current slot
718 that an insn is being constructed for. */
719 unw_rec_list
*current_entry
;
721 /* These are used to create the unwind table entry for this function. */
723 symbolS
*info
; /* pointer to unwind info */
724 symbolS
*personality_routine
;
726 subsegT saved_text_subseg
;
727 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
729 /* TRUE if processing unwind directives in a prologue region. */
730 unsigned int prologue
: 1;
731 unsigned int prologue_mask
: 4;
732 unsigned int body
: 1;
733 unsigned int insn
: 1;
734 unsigned int prologue_count
; /* number of .prologues seen so far */
735 /* Prologue counts at previous .label_state directives. */
736 struct label_prologue_count
* saved_prologue_counts
;
739 /* The input value is a negated offset from psp, and specifies an address
740 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
741 must add 16 and divide by 4 to get the encoded value. */
743 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
745 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
747 /* Forward declarations: */
748 static void set_section
PARAMS ((char *name
));
749 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
750 unsigned int, unsigned int));
751 static void dot_align (int);
752 static void dot_radix
PARAMS ((int));
753 static void dot_special_section
PARAMS ((int));
754 static void dot_proc
PARAMS ((int));
755 static void dot_fframe
PARAMS ((int));
756 static void dot_vframe
PARAMS ((int));
757 static void dot_vframesp
PARAMS ((int));
758 static void dot_vframepsp
PARAMS ((int));
759 static void dot_save
PARAMS ((int));
760 static void dot_restore
PARAMS ((int));
761 static void dot_restorereg
PARAMS ((int));
762 static void dot_restorereg_p
PARAMS ((int));
763 static void dot_handlerdata
PARAMS ((int));
764 static void dot_unwentry
PARAMS ((int));
765 static void dot_altrp
PARAMS ((int));
766 static void dot_savemem
PARAMS ((int));
767 static void dot_saveg
PARAMS ((int));
768 static void dot_savef
PARAMS ((int));
769 static void dot_saveb
PARAMS ((int));
770 static void dot_savegf
PARAMS ((int));
771 static void dot_spill
PARAMS ((int));
772 static void dot_spillreg
PARAMS ((int));
773 static void dot_spillmem
PARAMS ((int));
774 static void dot_spillreg_p
PARAMS ((int));
775 static void dot_spillmem_p
PARAMS ((int));
776 static void dot_label_state
PARAMS ((int));
777 static void dot_copy_state
PARAMS ((int));
778 static void dot_unwabi
PARAMS ((int));
779 static void dot_personality
PARAMS ((int));
780 static void dot_body
PARAMS ((int));
781 static void dot_prologue
PARAMS ((int));
782 static void dot_endp
PARAMS ((int));
783 static void dot_template
PARAMS ((int));
784 static void dot_regstk
PARAMS ((int));
785 static void dot_rot
PARAMS ((int));
786 static void dot_byteorder
PARAMS ((int));
787 static void dot_psr
PARAMS ((int));
788 static void dot_alias
PARAMS ((int));
789 static void dot_ln
PARAMS ((int));
790 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
791 static void dot_xdata
PARAMS ((int));
792 static void stmt_float_cons
PARAMS ((int));
793 static void stmt_cons_ua
PARAMS ((int));
794 static void dot_xfloat_cons
PARAMS ((int));
795 static void dot_xstringer
PARAMS ((int));
796 static void dot_xdata_ua
PARAMS ((int));
797 static void dot_xfloat_cons_ua
PARAMS ((int));
798 static void print_prmask
PARAMS ((valueT mask
));
799 static void dot_pred_rel
PARAMS ((int));
800 static void dot_reg_val
PARAMS ((int));
801 static void dot_serialize
PARAMS ((int));
802 static void dot_dv_mode
PARAMS ((int));
803 static void dot_entry
PARAMS ((int));
804 static void dot_mem_offset
PARAMS ((int));
805 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
806 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
807 static void declare_register_set
PARAMS ((const char *, int, int));
808 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
809 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
812 static int parse_operand
PARAMS ((expressionS
*e
));
813 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
814 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
815 static void emit_one_bundle
PARAMS ((void));
816 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
817 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
818 bfd_reloc_code_real_type r_type
));
819 static void insn_group_break
PARAMS ((int, int, int));
820 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
821 struct rsrc
*, int depind
, int path
));
822 static void add_qp_mutex
PARAMS((valueT mask
));
823 static void add_qp_imply
PARAMS((int p1
, int p2
));
824 static void clear_qp_branch_flag
PARAMS((valueT mask
));
825 static void clear_qp_mutex
PARAMS((valueT mask
));
826 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
827 static int has_suffix_p
PARAMS((const char *, const char *));
828 static void clear_register_values
PARAMS ((void));
829 static void print_dependency
PARAMS ((const char *action
, int depind
));
830 static void instruction_serialization
PARAMS ((void));
831 static void data_serialization
PARAMS ((void));
832 static void remove_marked_resource
PARAMS ((struct rsrc
*));
833 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
834 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
835 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
836 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
837 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
838 struct ia64_opcode
*, int, struct rsrc
[], int, int));
839 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
840 static void check_dependencies
PARAMS((struct ia64_opcode
*));
841 static void mark_resources
PARAMS((struct ia64_opcode
*));
842 static void update_dependencies
PARAMS((struct ia64_opcode
*));
843 static void note_register_values
PARAMS((struct ia64_opcode
*));
844 static int qp_mutex
PARAMS ((int, int, int));
845 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
846 static void output_vbyte_mem
PARAMS ((int, char *, char *));
847 static void count_output
PARAMS ((int, char *, char *));
848 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
849 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
850 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
851 static void output_P1_format
PARAMS ((vbyte_func
, int));
852 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
853 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
854 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
855 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
856 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
857 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
858 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
859 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
860 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
861 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
862 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
863 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
864 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
865 static char format_ab_reg
PARAMS ((int, int));
866 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
868 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
869 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
871 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
872 static unw_rec_list
*output_endp
PARAMS ((void));
873 static unw_rec_list
*output_prologue
PARAMS ((void));
874 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
875 static unw_rec_list
*output_body
PARAMS ((void));
876 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
877 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
878 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
879 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
880 static unw_rec_list
*output_rp_when
PARAMS ((void));
881 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
882 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
883 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
884 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_pfs_when
PARAMS ((void));
886 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
887 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
888 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_preds_when
PARAMS ((void));
890 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
891 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
892 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
894 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
895 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
896 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
897 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
898 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
899 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
900 static unw_rec_list
*output_unat_when
PARAMS ((void));
901 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
902 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
903 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
904 static unw_rec_list
*output_lc_when
PARAMS ((void));
905 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
906 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
907 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
908 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
909 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
910 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
911 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
912 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
913 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
914 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
915 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
916 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
917 static unw_rec_list
*output_bsp_when
PARAMS ((void));
918 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
919 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
920 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
922 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
923 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
925 static unw_rec_list
*output_rnat_when
PARAMS ((void));
926 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
927 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
928 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
929 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
930 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
931 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
932 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
933 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
934 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
935 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
937 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
939 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
941 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
942 unsigned int, unsigned int));
943 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
944 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
945 static int calc_record_size
PARAMS ((unw_rec_list
*));
946 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
947 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
948 unsigned long, fragS
*,
950 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
951 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
952 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
953 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
954 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
955 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
956 static void free_saved_prologue_counts
PARAMS ((void));
958 /* Determine if application register REGNUM resides only in the integer
959 unit (as opposed to the memory unit). */
961 ar_is_only_in_integer_unit (int reg
)
964 return reg
>= 64 && reg
<= 111;
967 /* Determine if application register REGNUM resides only in the memory
968 unit (as opposed to the integer unit). */
970 ar_is_only_in_memory_unit (int reg
)
973 return reg
>= 0 && reg
<= 47;
976 /* Switch to section NAME and create section if necessary. It's
977 rather ugly that we have to manipulate input_line_pointer but I
978 don't see any other way to accomplish the same thing without
979 changing obj-elf.c (which may be the Right Thing, in the end). */
984 char *saved_input_line_pointer
;
986 saved_input_line_pointer
= input_line_pointer
;
987 input_line_pointer
= name
;
989 input_line_pointer
= saved_input_line_pointer
;
992 /* Map 's' to SHF_IA_64_SHORT. */
995 ia64_elf_section_letter (letter
, ptr_msg
)
1000 return SHF_IA_64_SHORT
;
1001 else if (letter
== 'o')
1002 return SHF_LINK_ORDER
;
1004 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1008 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1011 ia64_elf_section_flags (flags
, attr
, type
)
1013 int attr
, type ATTRIBUTE_UNUSED
;
1015 if (attr
& SHF_IA_64_SHORT
)
1016 flags
|= SEC_SMALL_DATA
;
1021 ia64_elf_section_type (str
, len
)
1025 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1027 if (STREQ (ELF_STRING_ia64_unwind_info
))
1028 return SHT_PROGBITS
;
1030 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1031 return SHT_PROGBITS
;
1033 if (STREQ (ELF_STRING_ia64_unwind
))
1034 return SHT_IA_64_UNWIND
;
1036 if (STREQ (ELF_STRING_ia64_unwind_once
))
1037 return SHT_IA_64_UNWIND
;
1039 if (STREQ ("unwind"))
1040 return SHT_IA_64_UNWIND
;
1047 set_regstack (ins
, locs
, outs
, rots
)
1048 unsigned int ins
, locs
, outs
, rots
;
1050 /* Size of frame. */
1053 sof
= ins
+ locs
+ outs
;
1056 as_bad ("Size of frame exceeds maximum of 96 registers");
1061 as_warn ("Size of rotating registers exceeds frame size");
1064 md
.in
.base
= REG_GR
+ 32;
1065 md
.loc
.base
= md
.in
.base
+ ins
;
1066 md
.out
.base
= md
.loc
.base
+ locs
;
1068 md
.in
.num_regs
= ins
;
1069 md
.loc
.num_regs
= locs
;
1070 md
.out
.num_regs
= outs
;
1071 md
.rot
.num_regs
= rots
;
1078 struct label_fix
*lfix
;
1080 subsegT saved_subseg
;
1083 if (!md
.last_text_seg
)
1086 saved_seg
= now_seg
;
1087 saved_subseg
= now_subseg
;
1089 subseg_set (md
.last_text_seg
, 0);
1091 while (md
.num_slots_in_use
> 0)
1092 emit_one_bundle (); /* force out queued instructions */
1094 /* In case there are labels following the last instruction, resolve
1096 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1098 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1099 symbol_set_frag (lfix
->sym
, frag_now
);
1101 CURR_SLOT
.label_fixups
= 0;
1102 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1104 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1105 symbol_set_frag (lfix
->sym
, frag_now
);
1107 CURR_SLOT
.tag_fixups
= 0;
1109 /* In case there are unwind directives following the last instruction,
1110 resolve those now. We only handle prologue, body, and endp directives
1111 here. Give an error for others. */
1112 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1114 switch (ptr
->r
.type
)
1120 ptr
->slot_number
= (unsigned long) frag_more (0);
1121 ptr
->slot_frag
= frag_now
;
1124 /* Allow any record which doesn't have a "t" field (i.e.,
1125 doesn't relate to a particular instruction). */
1141 as_bad (_("Unwind directive not followed by an instruction."));
1145 unwind
.current_entry
= NULL
;
1147 subseg_set (saved_seg
, saved_subseg
);
1149 if (md
.qp
.X_op
== O_register
)
1150 as_bad ("qualifying predicate not followed by instruction");
1154 ia64_do_align (int nbytes
)
1156 char *saved_input_line_pointer
= input_line_pointer
;
1158 input_line_pointer
= "";
1159 s_align_bytes (nbytes
);
1160 input_line_pointer
= saved_input_line_pointer
;
1164 ia64_cons_align (nbytes
)
1169 char *saved_input_line_pointer
= input_line_pointer
;
1170 input_line_pointer
= "";
1171 s_align_bytes (nbytes
);
1172 input_line_pointer
= saved_input_line_pointer
;
1176 /* Output COUNT bytes to a memory location. */
1177 static char *vbyte_mem_ptr
= NULL
;
1180 output_vbyte_mem (count
, ptr
, comment
)
1183 char *comment ATTRIBUTE_UNUSED
;
1186 if (vbyte_mem_ptr
== NULL
)
1191 for (x
= 0; x
< count
; x
++)
1192 *(vbyte_mem_ptr
++) = ptr
[x
];
1195 /* Count the number of bytes required for records. */
1196 static int vbyte_count
= 0;
1198 count_output (count
, ptr
, comment
)
1200 char *ptr ATTRIBUTE_UNUSED
;
1201 char *comment ATTRIBUTE_UNUSED
;
1203 vbyte_count
+= count
;
1207 output_R1_format (f
, rtype
, rlen
)
1209 unw_record_type rtype
;
1216 output_R3_format (f
, rtype
, rlen
);
1222 else if (rtype
!= prologue
)
1223 as_bad ("record type is not valid");
1225 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1226 (*f
) (1, &byte
, NULL
);
1230 output_R2_format (f
, mask
, grsave
, rlen
)
1237 mask
= (mask
& 0x0f);
1238 grsave
= (grsave
& 0x7f);
1240 bytes
[0] = (UNW_R2
| (mask
>> 1));
1241 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1242 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1243 (*f
) (count
, bytes
, NULL
);
1247 output_R3_format (f
, rtype
, rlen
)
1249 unw_record_type rtype
;
1256 output_R1_format (f
, rtype
, rlen
);
1262 else if (rtype
!= prologue
)
1263 as_bad ("record type is not valid");
1264 bytes
[0] = (UNW_R3
| r
);
1265 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1266 (*f
) (count
+ 1, bytes
, NULL
);
1270 output_P1_format (f
, brmask
)
1275 byte
= UNW_P1
| (brmask
& 0x1f);
1276 (*f
) (1, &byte
, NULL
);
1280 output_P2_format (f
, brmask
, gr
)
1286 brmask
= (brmask
& 0x1f);
1287 bytes
[0] = UNW_P2
| (brmask
>> 1);
1288 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1289 (*f
) (2, bytes
, NULL
);
1293 output_P3_format (f
, rtype
, reg
)
1295 unw_record_type rtype
;
1340 as_bad ("Invalid record type for P3 format.");
1342 bytes
[0] = (UNW_P3
| (r
>> 1));
1343 bytes
[1] = (((r
& 1) << 7) | reg
);
1344 (*f
) (2, bytes
, NULL
);
1348 output_P4_format (f
, imask
, imask_size
)
1350 unsigned char *imask
;
1351 unsigned long imask_size
;
1354 (*f
) (imask_size
, (char *) imask
, NULL
);
1358 output_P5_format (f
, grmask
, frmask
)
1361 unsigned long frmask
;
1364 grmask
= (grmask
& 0x0f);
1367 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1368 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1369 bytes
[3] = (frmask
& 0x000000ff);
1370 (*f
) (4, bytes
, NULL
);
1374 output_P6_format (f
, rtype
, rmask
)
1376 unw_record_type rtype
;
1382 if (rtype
== gr_mem
)
1384 else if (rtype
!= fr_mem
)
1385 as_bad ("Invalid record type for format P6");
1386 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1387 (*f
) (1, &byte
, NULL
);
1391 output_P7_format (f
, rtype
, w1
, w2
)
1393 unw_record_type rtype
;
1400 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1405 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1455 bytes
[0] = (UNW_P7
| r
);
1456 (*f
) (count
, bytes
, NULL
);
1460 output_P8_format (f
, rtype
, t
)
1462 unw_record_type rtype
;
1501 case bspstore_psprel
:
1504 case bspstore_sprel
:
1516 case priunat_when_gr
:
1519 case priunat_psprel
:
1525 case priunat_when_mem
:
1532 count
+= output_leb128 (bytes
+ 2, t
, 0);
1533 (*f
) (count
, bytes
, NULL
);
1537 output_P9_format (f
, grmask
, gr
)
1544 bytes
[1] = (grmask
& 0x0f);
1545 bytes
[2] = (gr
& 0x7f);
1546 (*f
) (3, bytes
, NULL
);
1550 output_P10_format (f
, abi
, context
)
1557 bytes
[1] = (abi
& 0xff);
1558 bytes
[2] = (context
& 0xff);
1559 (*f
) (3, bytes
, NULL
);
1563 output_B1_format (f
, rtype
, label
)
1565 unw_record_type rtype
;
1566 unsigned long label
;
1572 output_B4_format (f
, rtype
, label
);
1575 if (rtype
== copy_state
)
1577 else if (rtype
!= label_state
)
1578 as_bad ("Invalid record type for format B1");
1580 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1581 (*f
) (1, &byte
, NULL
);
1585 output_B2_format (f
, ecount
, t
)
1587 unsigned long ecount
;
1594 output_B3_format (f
, ecount
, t
);
1597 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1598 count
+= output_leb128 (bytes
+ 1, t
, 0);
1599 (*f
) (count
, bytes
, NULL
);
1603 output_B3_format (f
, ecount
, t
)
1605 unsigned long ecount
;
1612 output_B2_format (f
, ecount
, t
);
1616 count
+= output_leb128 (bytes
+ 1, t
, 0);
1617 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1618 (*f
) (count
, bytes
, NULL
);
1622 output_B4_format (f
, rtype
, label
)
1624 unw_record_type rtype
;
1625 unsigned long label
;
1632 output_B1_format (f
, rtype
, label
);
1636 if (rtype
== copy_state
)
1638 else if (rtype
!= label_state
)
1639 as_bad ("Invalid record type for format B1");
1641 bytes
[0] = (UNW_B4
| (r
<< 3));
1642 count
+= output_leb128 (bytes
+ 1, label
, 0);
1643 (*f
) (count
, bytes
, NULL
);
1647 format_ab_reg (ab
, reg
)
1654 ret
= (ab
<< 5) | reg
;
1659 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1661 unw_record_type rtype
;
1671 if (rtype
== spill_sprel
)
1673 else if (rtype
!= spill_psprel
)
1674 as_bad ("Invalid record type for format X1");
1675 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1676 count
+= output_leb128 (bytes
+ 2, t
, 0);
1677 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1678 (*f
) (count
, bytes
, NULL
);
1682 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1691 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1692 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1693 count
+= output_leb128 (bytes
+ 3, t
, 0);
1694 (*f
) (count
, bytes
, NULL
);
1698 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1700 unw_record_type rtype
;
1711 if (rtype
== spill_sprel_p
)
1713 else if (rtype
!= spill_psprel_p
)
1714 as_bad ("Invalid record type for format X3");
1715 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1716 bytes
[2] = format_ab_reg (ab
, reg
);
1717 count
+= output_leb128 (bytes
+ 3, t
, 0);
1718 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1719 (*f
) (count
, bytes
, NULL
);
1723 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1733 bytes
[1] = (qp
& 0x3f);
1734 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1735 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1736 count
+= output_leb128 (bytes
+ 4, t
, 0);
1737 (*f
) (count
, bytes
, NULL
);
1740 /* This function allocates a record list structure, and initializes fields. */
1742 static unw_rec_list
*
1743 alloc_record (unw_record_type t
)
1746 ptr
= xmalloc (sizeof (*ptr
));
1748 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1750 ptr
->next_slot_number
= 0;
1751 ptr
->next_slot_frag
= 0;
1755 /* Dummy unwind record used for calculating the length of the last prologue or
1758 static unw_rec_list
*
1761 unw_rec_list
*ptr
= alloc_record (endp
);
1765 static unw_rec_list
*
1768 unw_rec_list
*ptr
= alloc_record (prologue
);
1769 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1773 static unw_rec_list
*
1774 output_prologue_gr (saved_mask
, reg
)
1775 unsigned int saved_mask
;
1778 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1779 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1780 ptr
->r
.record
.r
.grmask
= saved_mask
;
1781 ptr
->r
.record
.r
.grsave
= reg
;
1785 static unw_rec_list
*
1788 unw_rec_list
*ptr
= alloc_record (body
);
1792 static unw_rec_list
*
1793 output_mem_stack_f (size
)
1796 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1797 ptr
->r
.record
.p
.size
= size
;
1801 static unw_rec_list
*
1802 output_mem_stack_v ()
1804 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1808 static unw_rec_list
*
1812 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1813 ptr
->r
.record
.p
.gr
= gr
;
1817 static unw_rec_list
*
1818 output_psp_sprel (offset
)
1819 unsigned int offset
;
1821 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1822 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1826 static unw_rec_list
*
1829 unw_rec_list
*ptr
= alloc_record (rp_when
);
1833 static unw_rec_list
*
1837 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1838 ptr
->r
.record
.p
.gr
= gr
;
1842 static unw_rec_list
*
1846 unw_rec_list
*ptr
= alloc_record (rp_br
);
1847 ptr
->r
.record
.p
.br
= br
;
1851 static unw_rec_list
*
1852 output_rp_psprel (offset
)
1853 unsigned int offset
;
1855 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1856 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1860 static unw_rec_list
*
1861 output_rp_sprel (offset
)
1862 unsigned int offset
;
1864 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1865 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1869 static unw_rec_list
*
1872 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1876 static unw_rec_list
*
1880 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1881 ptr
->r
.record
.p
.gr
= gr
;
1885 static unw_rec_list
*
1886 output_pfs_psprel (offset
)
1887 unsigned int offset
;
1889 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1890 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1894 static unw_rec_list
*
1895 output_pfs_sprel (offset
)
1896 unsigned int offset
;
1898 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1899 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1903 static unw_rec_list
*
1904 output_preds_when ()
1906 unw_rec_list
*ptr
= alloc_record (preds_when
);
1910 static unw_rec_list
*
1911 output_preds_gr (gr
)
1914 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1915 ptr
->r
.record
.p
.gr
= gr
;
1919 static unw_rec_list
*
1920 output_preds_psprel (offset
)
1921 unsigned int offset
;
1923 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1924 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1928 static unw_rec_list
*
1929 output_preds_sprel (offset
)
1930 unsigned int offset
;
1932 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1933 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1937 static unw_rec_list
*
1938 output_fr_mem (mask
)
1941 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1942 ptr
->r
.record
.p
.rmask
= mask
;
1946 static unw_rec_list
*
1947 output_frgr_mem (gr_mask
, fr_mask
)
1948 unsigned int gr_mask
;
1949 unsigned int fr_mask
;
1951 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1952 ptr
->r
.record
.p
.grmask
= gr_mask
;
1953 ptr
->r
.record
.p
.frmask
= fr_mask
;
1957 static unw_rec_list
*
1958 output_gr_gr (mask
, reg
)
1962 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1963 ptr
->r
.record
.p
.grmask
= mask
;
1964 ptr
->r
.record
.p
.gr
= reg
;
1968 static unw_rec_list
*
1969 output_gr_mem (mask
)
1972 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1973 ptr
->r
.record
.p
.rmask
= mask
;
1977 static unw_rec_list
*
1978 output_br_mem (unsigned int mask
)
1980 unw_rec_list
*ptr
= alloc_record (br_mem
);
1981 ptr
->r
.record
.p
.brmask
= mask
;
1985 static unw_rec_list
*
1986 output_br_gr (save_mask
, reg
)
1987 unsigned int save_mask
;
1990 unw_rec_list
*ptr
= alloc_record (br_gr
);
1991 ptr
->r
.record
.p
.brmask
= save_mask
;
1992 ptr
->r
.record
.p
.gr
= reg
;
1996 static unw_rec_list
*
1997 output_spill_base (offset
)
1998 unsigned int offset
;
2000 unw_rec_list
*ptr
= alloc_record (spill_base
);
2001 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2005 static unw_rec_list
*
2008 unw_rec_list
*ptr
= alloc_record (unat_when
);
2012 static unw_rec_list
*
2016 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2017 ptr
->r
.record
.p
.gr
= gr
;
2021 static unw_rec_list
*
2022 output_unat_psprel (offset
)
2023 unsigned int offset
;
2025 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2026 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2030 static unw_rec_list
*
2031 output_unat_sprel (offset
)
2032 unsigned int offset
;
2034 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2035 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2039 static unw_rec_list
*
2042 unw_rec_list
*ptr
= alloc_record (lc_when
);
2046 static unw_rec_list
*
2050 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2051 ptr
->r
.record
.p
.gr
= gr
;
2055 static unw_rec_list
*
2056 output_lc_psprel (offset
)
2057 unsigned int offset
;
2059 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2060 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2064 static unw_rec_list
*
2065 output_lc_sprel (offset
)
2066 unsigned int offset
;
2068 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2069 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2073 static unw_rec_list
*
2076 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2080 static unw_rec_list
*
2084 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2085 ptr
->r
.record
.p
.gr
= gr
;
2089 static unw_rec_list
*
2090 output_fpsr_psprel (offset
)
2091 unsigned int offset
;
2093 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2094 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2098 static unw_rec_list
*
2099 output_fpsr_sprel (offset
)
2100 unsigned int offset
;
2102 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2103 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2107 static unw_rec_list
*
2108 output_priunat_when_gr ()
2110 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2114 static unw_rec_list
*
2115 output_priunat_when_mem ()
2117 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2121 static unw_rec_list
*
2122 output_priunat_gr (gr
)
2125 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2126 ptr
->r
.record
.p
.gr
= gr
;
2130 static unw_rec_list
*
2131 output_priunat_psprel (offset
)
2132 unsigned int offset
;
2134 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2135 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2139 static unw_rec_list
*
2140 output_priunat_sprel (offset
)
2141 unsigned int offset
;
2143 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2144 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2148 static unw_rec_list
*
2151 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2155 static unw_rec_list
*
2159 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2160 ptr
->r
.record
.p
.gr
= gr
;
2164 static unw_rec_list
*
2165 output_bsp_psprel (offset
)
2166 unsigned int offset
;
2168 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2169 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2173 static unw_rec_list
*
2174 output_bsp_sprel (offset
)
2175 unsigned int offset
;
2177 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2178 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2182 static unw_rec_list
*
2183 output_bspstore_when ()
2185 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2189 static unw_rec_list
*
2190 output_bspstore_gr (gr
)
2193 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2194 ptr
->r
.record
.p
.gr
= gr
;
2198 static unw_rec_list
*
2199 output_bspstore_psprel (offset
)
2200 unsigned int offset
;
2202 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2203 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2207 static unw_rec_list
*
2208 output_bspstore_sprel (offset
)
2209 unsigned int offset
;
2211 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2212 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2216 static unw_rec_list
*
2219 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2223 static unw_rec_list
*
2227 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2228 ptr
->r
.record
.p
.gr
= gr
;
2232 static unw_rec_list
*
2233 output_rnat_psprel (offset
)
2234 unsigned int offset
;
2236 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2237 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2241 static unw_rec_list
*
2242 output_rnat_sprel (offset
)
2243 unsigned int offset
;
2245 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2246 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2250 static unw_rec_list
*
2251 output_unwabi (abi
, context
)
2253 unsigned long context
;
2255 unw_rec_list
*ptr
= alloc_record (unwabi
);
2256 ptr
->r
.record
.p
.abi
= abi
;
2257 ptr
->r
.record
.p
.context
= context
;
2261 static unw_rec_list
*
2262 output_epilogue (unsigned long ecount
)
2264 unw_rec_list
*ptr
= alloc_record (epilogue
);
2265 ptr
->r
.record
.b
.ecount
= ecount
;
2269 static unw_rec_list
*
2270 output_label_state (unsigned long label
)
2272 unw_rec_list
*ptr
= alloc_record (label_state
);
2273 ptr
->r
.record
.b
.label
= label
;
2277 static unw_rec_list
*
2278 output_copy_state (unsigned long label
)
2280 unw_rec_list
*ptr
= alloc_record (copy_state
);
2281 ptr
->r
.record
.b
.label
= label
;
2285 static unw_rec_list
*
2286 output_spill_psprel (ab
, reg
, offset
)
2289 unsigned int offset
;
2291 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2292 ptr
->r
.record
.x
.ab
= ab
;
2293 ptr
->r
.record
.x
.reg
= reg
;
2294 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2298 static unw_rec_list
*
2299 output_spill_sprel (ab
, reg
, offset
)
2302 unsigned int offset
;
2304 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2305 ptr
->r
.record
.x
.ab
= ab
;
2306 ptr
->r
.record
.x
.reg
= reg
;
2307 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2311 static unw_rec_list
*
2312 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2315 unsigned int offset
;
2316 unsigned int predicate
;
2318 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2319 ptr
->r
.record
.x
.ab
= ab
;
2320 ptr
->r
.record
.x
.reg
= reg
;
2321 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2322 ptr
->r
.record
.x
.qp
= predicate
;
2326 static unw_rec_list
*
2327 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2330 unsigned int offset
;
2331 unsigned int predicate
;
2333 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2334 ptr
->r
.record
.x
.ab
= ab
;
2335 ptr
->r
.record
.x
.reg
= reg
;
2336 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2337 ptr
->r
.record
.x
.qp
= predicate
;
2341 static unw_rec_list
*
2342 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2345 unsigned int targ_reg
;
2348 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2349 ptr
->r
.record
.x
.ab
= ab
;
2350 ptr
->r
.record
.x
.reg
= reg
;
2351 ptr
->r
.record
.x
.treg
= targ_reg
;
2352 ptr
->r
.record
.x
.xy
= xy
;
2356 static unw_rec_list
*
2357 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2360 unsigned int targ_reg
;
2362 unsigned int predicate
;
2364 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2365 ptr
->r
.record
.x
.ab
= ab
;
2366 ptr
->r
.record
.x
.reg
= reg
;
2367 ptr
->r
.record
.x
.treg
= targ_reg
;
2368 ptr
->r
.record
.x
.xy
= xy
;
2369 ptr
->r
.record
.x
.qp
= predicate
;
2373 /* Given a unw_rec_list process the correct format with the
2374 specified function. */
2377 process_one_record (ptr
, f
)
2381 unsigned long fr_mask
, gr_mask
;
2383 switch (ptr
->r
.type
)
2385 /* This is a dummy record that takes up no space in the output. */
2393 /* These are taken care of by prologue/prologue_gr. */
2398 if (ptr
->r
.type
== prologue_gr
)
2399 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2400 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2402 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2404 /* Output descriptor(s) for union of register spills (if any). */
2405 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2406 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2409 if ((fr_mask
& ~0xfUL
) == 0)
2410 output_P6_format (f
, fr_mem
, fr_mask
);
2413 output_P5_format (f
, gr_mask
, fr_mask
);
2418 output_P6_format (f
, gr_mem
, gr_mask
);
2419 if (ptr
->r
.record
.r
.mask
.br_mem
)
2420 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2422 /* output imask descriptor if necessary: */
2423 if (ptr
->r
.record
.r
.mask
.i
)
2424 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2425 ptr
->r
.record
.r
.imask_size
);
2429 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2433 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2434 ptr
->r
.record
.p
.size
);
2447 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2450 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2453 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2461 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2470 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2480 case bspstore_sprel
:
2482 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2485 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2488 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2491 as_bad ("spill_mask record unimplemented.");
2493 case priunat_when_gr
:
2494 case priunat_when_mem
:
2498 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2500 case priunat_psprel
:
2502 case bspstore_psprel
:
2504 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2507 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2510 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2514 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2517 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2518 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2519 ptr
->r
.record
.x
.pspoff
);
2522 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2523 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2524 ptr
->r
.record
.x
.spoff
);
2527 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2528 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2529 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2531 case spill_psprel_p
:
2532 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2533 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2534 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2537 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2538 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2539 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2542 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2543 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2544 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2548 as_bad ("record_type_not_valid");
2553 /* Given a unw_rec_list list, process all the records with
2554 the specified function. */
2556 process_unw_records (list
, f
)
2561 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2562 process_one_record (ptr
, f
);
2565 /* Determine the size of a record list in bytes. */
2567 calc_record_size (list
)
2571 process_unw_records (list
, count_output
);
2575 /* Update IMASK bitmask to reflect the fact that one or more registers
2576 of type TYPE are saved starting at instruction with index T. If N
2577 bits are set in REGMASK, it is assumed that instructions T through
2578 T+N-1 save these registers.
2582 1: instruction saves next fp reg
2583 2: instruction saves next general reg
2584 3: instruction saves next branch reg */
2586 set_imask (region
, regmask
, t
, type
)
2587 unw_rec_list
*region
;
2588 unsigned long regmask
;
2592 unsigned char *imask
;
2593 unsigned long imask_size
;
2597 imask
= region
->r
.record
.r
.mask
.i
;
2598 imask_size
= region
->r
.record
.r
.imask_size
;
2601 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2602 imask
= xmalloc (imask_size
);
2603 memset (imask
, 0, imask_size
);
2605 region
->r
.record
.r
.imask_size
= imask_size
;
2606 region
->r
.record
.r
.mask
.i
= imask
;
2610 pos
= 2 * (3 - t
% 4);
2613 if (i
>= imask_size
)
2615 as_bad ("Ignoring attempt to spill beyond end of region");
2619 imask
[i
] |= (type
& 0x3) << pos
;
2621 regmask
&= (regmask
- 1);
2631 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2632 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2633 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2637 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2638 unsigned long slot_addr
;
2640 unsigned long first_addr
;
2644 unsigned long index
= 0;
2646 /* First time we are called, the initial address and frag are invalid. */
2647 if (first_addr
== 0)
2650 /* If the two addresses are in different frags, then we need to add in
2651 the remaining size of this frag, and then the entire size of intermediate
2653 while (slot_frag
!= first_frag
)
2655 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2659 /* We can get the final addresses only during and after
2661 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2662 index
+= 3 * ((first_frag
->fr_next
->fr_address
2663 - first_frag
->fr_address
2664 - first_frag
->fr_fix
) >> 4);
2667 /* We don't know what the final addresses will be. We try our
2668 best to estimate. */
2669 switch (first_frag
->fr_type
)
2675 as_fatal ("only constant space allocation is supported");
2681 /* Take alignment into account. Assume the worst case
2682 before relaxation. */
2683 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2687 if (first_frag
->fr_symbol
)
2689 as_fatal ("only constant offsets are supported");
2693 index
+= 3 * (first_frag
->fr_offset
>> 4);
2697 /* Add in the full size of the frag converted to instruction slots. */
2698 index
+= 3 * (first_frag
->fr_fix
>> 4);
2699 /* Subtract away the initial part before first_addr. */
2700 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2701 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2703 /* Move to the beginning of the next frag. */
2704 first_frag
= first_frag
->fr_next
;
2705 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2708 /* Add in the used part of the last frag. */
2709 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2710 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2714 /* Optimize unwind record directives. */
2716 static unw_rec_list
*
2717 optimize_unw_records (list
)
2723 /* If the only unwind record is ".prologue" or ".prologue" followed
2724 by ".body", then we can optimize the unwind directives away. */
2725 if (list
->r
.type
== prologue
2726 && (list
->next
->r
.type
== endp
2727 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2733 /* Given a complete record list, process any records which have
2734 unresolved fields, (ie length counts for a prologue). After
2735 this has been run, all necessary information should be available
2736 within each record to generate an image. */
2739 fixup_unw_records (list
, before_relax
)
2743 unw_rec_list
*ptr
, *region
= 0;
2744 unsigned long first_addr
= 0, rlen
= 0, t
;
2745 fragS
*first_frag
= 0;
2747 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2749 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2750 as_bad (" Insn slot not set in unwind record.");
2751 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2752 first_addr
, first_frag
, before_relax
);
2753 switch (ptr
->r
.type
)
2761 unsigned long last_addr
= 0;
2762 fragS
*last_frag
= NULL
;
2764 first_addr
= ptr
->slot_number
;
2765 first_frag
= ptr
->slot_frag
;
2766 /* Find either the next body/prologue start, or the end of
2767 the function, and determine the size of the region. */
2768 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2769 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2770 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2772 last_addr
= last
->slot_number
;
2773 last_frag
= last
->slot_frag
;
2776 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2778 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2779 if (ptr
->r
.type
== body
)
2780 /* End of region. */
2788 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2790 /* This happens when a memory-stack-less procedure uses a
2791 ".restore sp" directive at the end of a region to pop
2793 ptr
->r
.record
.b
.t
= 0;
2804 case priunat_when_gr
:
2805 case priunat_when_mem
:
2809 ptr
->r
.record
.p
.t
= t
;
2817 case spill_psprel_p
:
2818 ptr
->r
.record
.x
.t
= t
;
2824 as_bad ("frgr_mem record before region record!");
2827 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2828 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2829 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2830 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2835 as_bad ("fr_mem record before region record!");
2838 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2839 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2844 as_bad ("gr_mem record before region record!");
2847 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2848 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2853 as_bad ("br_mem record before region record!");
2856 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2857 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2863 as_bad ("gr_gr record before region record!");
2866 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2871 as_bad ("br_gr record before region record!");
2874 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2883 /* Estimate the size of a frag before relaxing. We only have one type of frag
2884 to handle here, which is the unwind info frag. */
2887 ia64_estimate_size_before_relax (fragS
*frag
,
2888 asection
*segtype ATTRIBUTE_UNUSED
)
2893 /* ??? This code is identical to the first part of ia64_convert_frag. */
2894 list
= (unw_rec_list
*) frag
->fr_opcode
;
2895 fixup_unw_records (list
, 0);
2897 len
= calc_record_size (list
);
2898 /* pad to pointer-size boundary. */
2899 pad
= len
% md
.pointer_size
;
2901 len
+= md
.pointer_size
- pad
;
2902 /* Add 8 for the header. */
2904 /* Add a pointer for the personality offset. */
2905 if (frag
->fr_offset
)
2906 size
+= md
.pointer_size
;
2908 /* fr_var carries the max_chars that we created the fragment with.
2909 We must, of course, have allocated enough memory earlier. */
2910 assert (frag
->fr_var
>= size
);
2912 return frag
->fr_fix
+ size
;
2915 /* This function converts a rs_machine_dependent variant frag into a
2916 normal fill frag with the unwind image from the the record list. */
2918 ia64_convert_frag (fragS
*frag
)
2924 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2925 list
= (unw_rec_list
*) frag
->fr_opcode
;
2926 fixup_unw_records (list
, 0);
2928 len
= calc_record_size (list
);
2929 /* pad to pointer-size boundary. */
2930 pad
= len
% md
.pointer_size
;
2932 len
+= md
.pointer_size
- pad
;
2933 /* Add 8 for the header. */
2935 /* Add a pointer for the personality offset. */
2936 if (frag
->fr_offset
)
2937 size
+= md
.pointer_size
;
2939 /* fr_var carries the max_chars that we created the fragment with.
2940 We must, of course, have allocated enough memory earlier. */
2941 assert (frag
->fr_var
>= size
);
2943 /* Initialize the header area. fr_offset is initialized with
2944 unwind.personality_routine. */
2945 if (frag
->fr_offset
)
2947 if (md
.flags
& EF_IA_64_ABI64
)
2948 flag_value
= (bfd_vma
) 3 << 32;
2950 /* 32-bit unwind info block. */
2951 flag_value
= (bfd_vma
) 0x1003 << 32;
2956 md_number_to_chars (frag
->fr_literal
,
2957 (((bfd_vma
) 1 << 48) /* Version. */
2958 | flag_value
/* U & E handler flags. */
2959 | (len
/ md
.pointer_size
)), /* Length. */
2962 /* Skip the header. */
2963 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2964 process_unw_records (list
, output_vbyte_mem
);
2966 /* Fill the padding bytes with zeros. */
2968 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2969 md
.pointer_size
- pad
);
2971 frag
->fr_fix
+= size
;
2972 frag
->fr_type
= rs_fill
;
2974 frag
->fr_offset
= 0;
2978 convert_expr_to_ab_reg (e
, ab
, regp
)
2985 if (e
->X_op
!= O_register
)
2988 reg
= e
->X_add_number
;
2989 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2992 *regp
= reg
- REG_GR
;
2994 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2995 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2998 *regp
= reg
- REG_FR
;
3000 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3003 *regp
= reg
- REG_BR
;
3010 case REG_PR
: *regp
= 0; break;
3011 case REG_PSP
: *regp
= 1; break;
3012 case REG_PRIUNAT
: *regp
= 2; break;
3013 case REG_BR
+ 0: *regp
= 3; break;
3014 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3015 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3016 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3017 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3018 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3019 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3020 case REG_AR
+ AR_LC
: *regp
= 10; break;
3030 convert_expr_to_xy_reg (e
, xy
, regp
)
3037 if (e
->X_op
!= O_register
)
3040 reg
= e
->X_add_number
;
3042 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3045 *regp
= reg
- REG_GR
;
3047 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3050 *regp
= reg
- REG_FR
;
3052 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3055 *regp
= reg
- REG_BR
;
3065 /* The current frag is an alignment frag. */
3066 align_frag
= frag_now
;
3067 s_align_bytes (arg
);
3072 int dummy ATTRIBUTE_UNUSED
;
3077 radix
= *input_line_pointer
++;
3079 if (radix
!= 'C' && !is_end_of_line
[(unsigned char) radix
])
3081 as_bad ("Radix `%c' unsupported", *input_line_pointer
);
3082 ignore_rest_of_line ();
3087 /* Helper function for .loc directives. If the assembler is not generating
3088 line number info, then we need to remember which instructions have a .loc
3089 directive, and only call dwarf2_gen_line_info for those instructions. */
3094 CURR_SLOT
.loc_directive_seen
= 1;
3095 dwarf2_directive_loc (x
);
3098 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3100 dot_special_section (which
)
3103 set_section ((char *) special_section_name
[which
]);
3106 /* Return -1 for warning and 0 for error. */
3109 unwind_diagnostic (const char * region
, const char *directive
)
3111 if (md
.unwind_check
== unwind_check_warning
)
3113 as_warn (".%s outside of %s", directive
, region
);
3118 as_bad (".%s outside of %s", directive
, region
);
3119 ignore_rest_of_line ();
3124 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3125 a procedure but the unwind directive check is set to warning, 0 if
3126 a directive isn't in a procedure and the unwind directive check is set
3130 in_procedure (const char *directive
)
3132 if (unwind
.proc_start
3133 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3135 return unwind_diagnostic ("procedure", directive
);
3138 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3139 a prologue but the unwind directive check is set to warning, 0 if
3140 a directive isn't in a prologue and the unwind directive check is set
3144 in_prologue (const char *directive
)
3146 int in
= in_procedure (directive
);
3149 /* We are in a procedure. Check if we are in a prologue. */
3150 if (unwind
.prologue
)
3152 /* We only want to issue one message. */
3154 return unwind_diagnostic ("prologue", directive
);
3161 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3162 a body but the unwind directive check is set to warning, 0 if
3163 a directive isn't in a body and the unwind directive check is set
3167 in_body (const char *directive
)
3169 int in
= in_procedure (directive
);
3172 /* We are in a procedure. Check if we are in a body. */
3175 /* We only want to issue one message. */
3177 return unwind_diagnostic ("body region", directive
);
3185 add_unwind_entry (ptr
)
3189 unwind
.tail
->next
= ptr
;
3194 /* The current entry can in fact be a chain of unwind entries. */
3195 if (unwind
.current_entry
== NULL
)
3196 unwind
.current_entry
= ptr
;
3201 int dummy ATTRIBUTE_UNUSED
;
3205 if (!in_prologue ("fframe"))
3210 if (e
.X_op
!= O_constant
)
3211 as_bad ("Operand to .fframe must be a constant");
3213 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3218 int dummy ATTRIBUTE_UNUSED
;
3223 if (!in_prologue ("vframe"))
3227 reg
= e
.X_add_number
- REG_GR
;
3228 if (e
.X_op
== O_register
&& reg
< 128)
3230 add_unwind_entry (output_mem_stack_v ());
3231 if (! (unwind
.prologue_mask
& 2))
3232 add_unwind_entry (output_psp_gr (reg
));
3235 as_bad ("First operand to .vframe must be a general register");
3239 dot_vframesp (dummy
)
3240 int dummy ATTRIBUTE_UNUSED
;
3244 if (!in_prologue ("vframesp"))
3248 if (e
.X_op
== O_constant
)
3250 add_unwind_entry (output_mem_stack_v ());
3251 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3254 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3258 dot_vframepsp (dummy
)
3259 int dummy ATTRIBUTE_UNUSED
;
3263 if (!in_prologue ("vframepsp"))
3267 if (e
.X_op
== O_constant
)
3269 add_unwind_entry (output_mem_stack_v ());
3270 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3273 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3278 int dummy ATTRIBUTE_UNUSED
;
3284 if (!in_prologue ("save"))
3287 sep
= parse_operand (&e1
);
3289 as_bad ("No second operand to .save");
3290 sep
= parse_operand (&e2
);
3292 reg1
= e1
.X_add_number
;
3293 reg2
= e2
.X_add_number
- REG_GR
;
3295 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3296 if (e1
.X_op
== O_register
)
3298 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3302 case REG_AR
+ AR_BSP
:
3303 add_unwind_entry (output_bsp_when ());
3304 add_unwind_entry (output_bsp_gr (reg2
));
3306 case REG_AR
+ AR_BSPSTORE
:
3307 add_unwind_entry (output_bspstore_when ());
3308 add_unwind_entry (output_bspstore_gr (reg2
));
3310 case REG_AR
+ AR_RNAT
:
3311 add_unwind_entry (output_rnat_when ());
3312 add_unwind_entry (output_rnat_gr (reg2
));
3314 case REG_AR
+ AR_UNAT
:
3315 add_unwind_entry (output_unat_when ());
3316 add_unwind_entry (output_unat_gr (reg2
));
3318 case REG_AR
+ AR_FPSR
:
3319 add_unwind_entry (output_fpsr_when ());
3320 add_unwind_entry (output_fpsr_gr (reg2
));
3322 case REG_AR
+ AR_PFS
:
3323 add_unwind_entry (output_pfs_when ());
3324 if (! (unwind
.prologue_mask
& 4))
3325 add_unwind_entry (output_pfs_gr (reg2
));
3327 case REG_AR
+ AR_LC
:
3328 add_unwind_entry (output_lc_when ());
3329 add_unwind_entry (output_lc_gr (reg2
));
3332 add_unwind_entry (output_rp_when ());
3333 if (! (unwind
.prologue_mask
& 8))
3334 add_unwind_entry (output_rp_gr (reg2
));
3337 add_unwind_entry (output_preds_when ());
3338 if (! (unwind
.prologue_mask
& 1))
3339 add_unwind_entry (output_preds_gr (reg2
));
3342 add_unwind_entry (output_priunat_when_gr ());
3343 add_unwind_entry (output_priunat_gr (reg2
));
3346 as_bad ("First operand not a valid register");
3350 as_bad (" Second operand not a valid register");
3353 as_bad ("First operand not a register");
3358 int dummy ATTRIBUTE_UNUSED
;
3361 unsigned long ecount
; /* # of _additional_ regions to pop */
3364 if (!in_body ("restore"))
3367 sep
= parse_operand (&e1
);
3368 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3370 as_bad ("First operand to .restore must be stack pointer (sp)");
3376 parse_operand (&e2
);
3377 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3379 as_bad ("Second operand to .restore must be a constant >= 0");
3382 ecount
= e2
.X_add_number
;
3385 ecount
= unwind
.prologue_count
- 1;
3387 if (ecount
>= unwind
.prologue_count
)
3389 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3390 ecount
+ 1, unwind
.prologue_count
);
3394 add_unwind_entry (output_epilogue (ecount
));
3396 if (ecount
< unwind
.prologue_count
)
3397 unwind
.prologue_count
-= ecount
+ 1;
3399 unwind
.prologue_count
= 0;
3403 dot_restorereg (dummy
)
3404 int dummy ATTRIBUTE_UNUSED
;
3406 unsigned int ab
, reg
;
3409 if (!in_procedure ("restorereg"))
3414 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3416 as_bad ("First operand to .restorereg must be a preserved register");
3419 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3423 dot_restorereg_p (dummy
)
3424 int dummy ATTRIBUTE_UNUSED
;
3426 unsigned int qp
, ab
, reg
;
3430 if (!in_procedure ("restorereg.p"))
3433 sep
= parse_operand (&e1
);
3436 as_bad ("No second operand to .restorereg.p");
3440 parse_operand (&e2
);
3442 qp
= e1
.X_add_number
- REG_P
;
3443 if (e1
.X_op
!= O_register
|| qp
> 63)
3445 as_bad ("First operand to .restorereg.p must be a predicate");
3449 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3451 as_bad ("Second operand to .restorereg.p must be a preserved register");
3454 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3457 static char *special_linkonce_name
[] =
3459 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3463 start_unwind_section (const segT text_seg
, int sec_index
, int linkonce_empty
)
3466 Use a slightly ugly scheme to derive the unwind section names from
3467 the text section name:
3469 text sect. unwind table sect.
3470 name: name: comments:
3471 ---------- ----------------- --------------------------------
3473 .text.foo .IA_64.unwind.text.foo
3474 .foo .IA_64.unwind.foo
3476 .gnu.linkonce.ia64unw.foo
3477 _info .IA_64.unwind_info gas issues error message (ditto)
3478 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3480 This mapping is done so that:
3482 (a) An object file with unwind info only in .text will use
3483 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3484 This follows the letter of the ABI and also ensures backwards
3485 compatibility with older toolchains.
3487 (b) An object file with unwind info in multiple text sections
3488 will use separate unwind sections for each text section.
3489 This allows us to properly set the "sh_info" and "sh_link"
3490 fields in SHT_IA_64_UNWIND as required by the ABI and also
3491 lets GNU ld support programs with multiple segments
3492 containing unwind info (as might be the case for certain
3493 embedded applications).
3495 (c) An error is issued if there would be a name clash.
3498 const char *text_name
, *sec_text_name
;
3500 const char *prefix
= special_section_name
[sec_index
];
3502 size_t prefix_len
, suffix_len
, sec_name_len
;
3504 sec_text_name
= segment_name (text_seg
);
3505 text_name
= sec_text_name
;
3506 if (strncmp (text_name
, "_info", 5) == 0)
3508 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3510 ignore_rest_of_line ();
3513 if (strcmp (text_name
, ".text") == 0)
3516 /* Build the unwind section name by appending the (possibly stripped)
3517 text section name to the unwind prefix. */
3519 if (strncmp (text_name
, ".gnu.linkonce.t.",
3520 sizeof (".gnu.linkonce.t.") - 1) == 0)
3522 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3523 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3525 else if (linkonce_empty
)
3528 prefix_len
= strlen (prefix
);
3529 suffix_len
= strlen (suffix
);
3530 sec_name_len
= prefix_len
+ suffix_len
;
3531 sec_name
= alloca (sec_name_len
+ 1);
3532 memcpy (sec_name
, prefix
, prefix_len
);
3533 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3534 sec_name
[sec_name_len
] = '\0';
3536 /* Handle COMDAT group. */
3537 if (suffix
== text_name
&& (text_seg
->flags
& SEC_LINK_ONCE
) != 0)
3540 size_t len
, group_name_len
;
3541 const char *group_name
= elf_group_name (text_seg
);
3543 if (group_name
== NULL
)
3545 as_bad ("Group section `%s' has no group signature",
3547 ignore_rest_of_line ();
3550 /* We have to construct a fake section directive. */
3551 group_name_len
= strlen (group_name
);
3553 + 16 /* ,"aG",@progbits, */
3554 + group_name_len
/* ,group_name */
3557 section
= alloca (len
+ 1);
3558 memcpy (section
, sec_name
, sec_name_len
);
3559 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3560 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3561 memcpy (section
+ len
- 7, ",comdat", 7);
3562 section
[len
] = '\0';
3563 set_section (section
);
3567 set_section (sec_name
);
3568 bfd_set_section_flags (stdoutput
, now_seg
,
3569 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3572 elf_linked_to_section (now_seg
) = text_seg
;
3576 generate_unwind_image (const segT text_seg
)
3581 /* Mark the end of the unwind info, so that we can compute the size of the
3582 last unwind region. */
3583 add_unwind_entry (output_endp ());
3585 /* Force out pending instructions, to make sure all unwind records have
3586 a valid slot_number field. */
3587 ia64_flush_insns ();
3589 /* Generate the unwind record. */
3590 list
= optimize_unw_records (unwind
.list
);
3591 fixup_unw_records (list
, 1);
3592 size
= calc_record_size (list
);
3594 if (size
> 0 || unwind
.force_unwind_entry
)
3596 unwind
.force_unwind_entry
= 0;
3597 /* pad to pointer-size boundary. */
3598 pad
= size
% md
.pointer_size
;
3600 size
+= md
.pointer_size
- pad
;
3601 /* Add 8 for the header. */
3603 /* Add a pointer for the personality offset. */
3604 if (unwind
.personality_routine
)
3605 size
+= md
.pointer_size
;
3608 /* If there are unwind records, switch sections, and output the info. */
3612 bfd_reloc_code_real_type reloc
;
3614 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 0);
3616 /* Make sure the section has 4 byte alignment for ILP32 and
3617 8 byte alignment for LP64. */
3618 frag_align (md
.pointer_size_shift
, 0, 0);
3619 record_alignment (now_seg
, md
.pointer_size_shift
);
3621 /* Set expression which points to start of unwind descriptor area. */
3622 unwind
.info
= expr_build_dot ();
3624 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3625 (offsetT
) (long) unwind
.personality_routine
,
3628 /* Add the personality address to the image. */
3629 if (unwind
.personality_routine
!= 0)
3631 exp
.X_op
= O_symbol
;
3632 exp
.X_add_symbol
= unwind
.personality_routine
;
3633 exp
.X_add_number
= 0;
3635 if (md
.flags
& EF_IA_64_BE
)
3637 if (md
.flags
& EF_IA_64_ABI64
)
3638 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3640 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3644 if (md
.flags
& EF_IA_64_ABI64
)
3645 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3647 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3650 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3651 md
.pointer_size
, &exp
, 0, reloc
);
3652 unwind
.personality_routine
= 0;
3656 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
, 1);
3658 free_saved_prologue_counts ();
3659 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3663 dot_handlerdata (dummy
)
3664 int dummy ATTRIBUTE_UNUSED
;
3666 if (!in_procedure ("handlerdata"))
3668 unwind
.force_unwind_entry
= 1;
3670 /* Remember which segment we're in so we can switch back after .endp */
3671 unwind
.saved_text_seg
= now_seg
;
3672 unwind
.saved_text_subseg
= now_subseg
;
3674 /* Generate unwind info into unwind-info section and then leave that
3675 section as the currently active one so dataXX directives go into
3676 the language specific data area of the unwind info block. */
3677 generate_unwind_image (now_seg
);
3678 demand_empty_rest_of_line ();
3682 dot_unwentry (dummy
)
3683 int dummy ATTRIBUTE_UNUSED
;
3685 if (!in_procedure ("unwentry"))
3687 unwind
.force_unwind_entry
= 1;
3688 demand_empty_rest_of_line ();
3693 int dummy ATTRIBUTE_UNUSED
;
3698 if (!in_prologue ("altrp"))
3702 reg
= e
.X_add_number
- REG_BR
;
3703 if (e
.X_op
== O_register
&& reg
< 8)
3704 add_unwind_entry (output_rp_br (reg
));
3706 as_bad ("First operand not a valid branch register");
3710 dot_savemem (psprel
)
3717 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3720 sep
= parse_operand (&e1
);
3722 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3723 sep
= parse_operand (&e2
);
3725 reg1
= e1
.X_add_number
;
3726 val
= e2
.X_add_number
;
3728 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3729 if (e1
.X_op
== O_register
)
3731 if (e2
.X_op
== O_constant
)
3735 case REG_AR
+ AR_BSP
:
3736 add_unwind_entry (output_bsp_when ());
3737 add_unwind_entry ((psprel
3739 : output_bsp_sprel
) (val
));
3741 case REG_AR
+ AR_BSPSTORE
:
3742 add_unwind_entry (output_bspstore_when ());
3743 add_unwind_entry ((psprel
3744 ? output_bspstore_psprel
3745 : output_bspstore_sprel
) (val
));
3747 case REG_AR
+ AR_RNAT
:
3748 add_unwind_entry (output_rnat_when ());
3749 add_unwind_entry ((psprel
3750 ? output_rnat_psprel
3751 : output_rnat_sprel
) (val
));
3753 case REG_AR
+ AR_UNAT
:
3754 add_unwind_entry (output_unat_when ());
3755 add_unwind_entry ((psprel
3756 ? output_unat_psprel
3757 : output_unat_sprel
) (val
));
3759 case REG_AR
+ AR_FPSR
:
3760 add_unwind_entry (output_fpsr_when ());
3761 add_unwind_entry ((psprel
3762 ? output_fpsr_psprel
3763 : output_fpsr_sprel
) (val
));
3765 case REG_AR
+ AR_PFS
:
3766 add_unwind_entry (output_pfs_when ());
3767 add_unwind_entry ((psprel
3769 : output_pfs_sprel
) (val
));
3771 case REG_AR
+ AR_LC
:
3772 add_unwind_entry (output_lc_when ());
3773 add_unwind_entry ((psprel
3775 : output_lc_sprel
) (val
));
3778 add_unwind_entry (output_rp_when ());
3779 add_unwind_entry ((psprel
3781 : output_rp_sprel
) (val
));
3784 add_unwind_entry (output_preds_when ());
3785 add_unwind_entry ((psprel
3786 ? output_preds_psprel
3787 : output_preds_sprel
) (val
));
3790 add_unwind_entry (output_priunat_when_mem ());
3791 add_unwind_entry ((psprel
3792 ? output_priunat_psprel
3793 : output_priunat_sprel
) (val
));
3796 as_bad ("First operand not a valid register");
3800 as_bad (" Second operand not a valid constant");
3803 as_bad ("First operand not a register");
3808 int dummy ATTRIBUTE_UNUSED
;
3813 if (!in_prologue ("save.g"))
3816 sep
= parse_operand (&e1
);
3818 parse_operand (&e2
);
3820 if (e1
.X_op
!= O_constant
)
3821 as_bad ("First operand to .save.g must be a constant.");
3824 int grmask
= e1
.X_add_number
;
3826 add_unwind_entry (output_gr_mem (grmask
));
3829 int reg
= e2
.X_add_number
- REG_GR
;
3830 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3831 add_unwind_entry (output_gr_gr (grmask
, reg
));
3833 as_bad ("Second operand is an invalid register.");
3840 int dummy ATTRIBUTE_UNUSED
;
3845 if (!in_prologue ("save.f"))
3848 sep
= parse_operand (&e1
);
3850 if (e1
.X_op
!= O_constant
)
3851 as_bad ("Operand to .save.f must be a constant.");
3853 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3858 int dummy ATTRIBUTE_UNUSED
;
3865 if (!in_prologue ("save.b"))
3868 sep
= parse_operand (&e1
);
3869 if (e1
.X_op
!= O_constant
)
3871 as_bad ("First operand to .save.b must be a constant.");
3874 brmask
= e1
.X_add_number
;
3878 sep
= parse_operand (&e2
);
3879 reg
= e2
.X_add_number
- REG_GR
;
3880 if (e2
.X_op
!= O_register
|| reg
> 127)
3882 as_bad ("Second operand to .save.b must be a general register.");
3885 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3888 add_unwind_entry (output_br_mem (brmask
));
3890 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3891 demand_empty_rest_of_line ();
3896 int dummy ATTRIBUTE_UNUSED
;
3901 if (!in_prologue ("save.gf"))
3904 sep
= parse_operand (&e1
);
3906 parse_operand (&e2
);
3908 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3909 as_bad ("Both operands of .save.gf must be constants.");
3912 int grmask
= e1
.X_add_number
;
3913 int frmask
= e2
.X_add_number
;
3914 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3920 int dummy ATTRIBUTE_UNUSED
;
3925 if (!in_prologue ("spill"))
3928 sep
= parse_operand (&e
);
3929 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3930 demand_empty_rest_of_line ();
3932 if (e
.X_op
!= O_constant
)
3933 as_bad ("Operand to .spill must be a constant");
3935 add_unwind_entry (output_spill_base (e
.X_add_number
));
3939 dot_spillreg (dummy
)
3940 int dummy ATTRIBUTE_UNUSED
;
3943 unsigned int ab
, xy
, reg
, treg
;
3946 if (!in_procedure ("spillreg"))
3949 sep
= parse_operand (&e1
);
3952 as_bad ("No second operand to .spillreg");
3956 parse_operand (&e2
);
3958 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3960 as_bad ("First operand to .spillreg must be a preserved register");
3964 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3966 as_bad ("Second operand to .spillreg must be a register");
3970 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3974 dot_spillmem (psprel
)
3979 unsigned int ab
, reg
;
3981 if (!in_procedure ("spillmem"))
3984 sep
= parse_operand (&e1
);
3987 as_bad ("Second operand missing");
3991 parse_operand (&e2
);
3993 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3995 as_bad ("First operand to .spill%s must be a preserved register",
3996 psprel
? "psp" : "sp");
4000 if (e2
.X_op
!= O_constant
)
4002 as_bad ("Second operand to .spill%s must be a constant",
4003 psprel
? "psp" : "sp");
4008 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
4010 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
4014 dot_spillreg_p (dummy
)
4015 int dummy ATTRIBUTE_UNUSED
;
4018 unsigned int ab
, xy
, reg
, treg
;
4019 expressionS e1
, e2
, e3
;
4022 if (!in_procedure ("spillreg.p"))
4025 sep
= parse_operand (&e1
);
4028 as_bad ("No second and third operand to .spillreg.p");
4032 sep
= parse_operand (&e2
);
4035 as_bad ("No third operand to .spillreg.p");
4039 parse_operand (&e3
);
4041 qp
= e1
.X_add_number
- REG_P
;
4043 if (e1
.X_op
!= O_register
|| qp
> 63)
4045 as_bad ("First operand to .spillreg.p must be a predicate");
4049 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4051 as_bad ("Second operand to .spillreg.p must be a preserved register");
4055 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4057 as_bad ("Third operand to .spillreg.p must be a register");
4061 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4065 dot_spillmem_p (psprel
)
4068 expressionS e1
, e2
, e3
;
4070 unsigned int ab
, reg
;
4073 if (!in_procedure ("spillmem.p"))
4076 sep
= parse_operand (&e1
);
4079 as_bad ("Second operand missing");
4083 parse_operand (&e2
);
4086 as_bad ("Second operand missing");
4090 parse_operand (&e3
);
4092 qp
= e1
.X_add_number
- REG_P
;
4093 if (e1
.X_op
!= O_register
|| qp
> 63)
4095 as_bad ("First operand to .spill%s_p must be a predicate",
4096 psprel
? "psp" : "sp");
4100 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4102 as_bad ("Second operand to .spill%s_p must be a preserved register",
4103 psprel
? "psp" : "sp");
4107 if (e3
.X_op
!= O_constant
)
4109 as_bad ("Third operand to .spill%s_p must be a constant",
4110 psprel
? "psp" : "sp");
4115 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4117 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4121 get_saved_prologue_count (lbl
)
4124 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4126 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4130 return lpc
->prologue_count
;
4132 as_bad ("Missing .label_state %ld", lbl
);
4137 save_prologue_count (lbl
, count
)
4141 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4143 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4147 lpc
->prologue_count
= count
;
4150 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4152 new_lpc
->next
= unwind
.saved_prologue_counts
;
4153 new_lpc
->label_number
= lbl
;
4154 new_lpc
->prologue_count
= count
;
4155 unwind
.saved_prologue_counts
= new_lpc
;
4160 free_saved_prologue_counts ()
4162 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4163 label_prologue_count
*next
;
4172 unwind
.saved_prologue_counts
= NULL
;
4176 dot_label_state (dummy
)
4177 int dummy ATTRIBUTE_UNUSED
;
4181 if (!in_body ("label_state"))
4185 if (e
.X_op
!= O_constant
)
4187 as_bad ("Operand to .label_state must be a constant");
4190 add_unwind_entry (output_label_state (e
.X_add_number
));
4191 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4195 dot_copy_state (dummy
)
4196 int dummy ATTRIBUTE_UNUSED
;
4200 if (!in_body ("copy_state"))
4204 if (e
.X_op
!= O_constant
)
4206 as_bad ("Operand to .copy_state must be a constant");
4209 add_unwind_entry (output_copy_state (e
.X_add_number
));
4210 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4215 int dummy ATTRIBUTE_UNUSED
;
4220 if (!in_procedure ("unwabi"))
4223 sep
= parse_operand (&e1
);
4226 as_bad ("Second operand to .unwabi missing");
4229 sep
= parse_operand (&e2
);
4230 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4231 demand_empty_rest_of_line ();
4233 if (e1
.X_op
!= O_constant
)
4235 as_bad ("First operand to .unwabi must be a constant");
4239 if (e2
.X_op
!= O_constant
)
4241 as_bad ("Second operand to .unwabi must be a constant");
4245 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4249 dot_personality (dummy
)
4250 int dummy ATTRIBUTE_UNUSED
;
4253 if (!in_procedure ("personality"))
4256 name
= input_line_pointer
;
4257 c
= get_symbol_end ();
4258 p
= input_line_pointer
;
4259 unwind
.personality_routine
= symbol_find_or_make (name
);
4260 unwind
.force_unwind_entry
= 1;
4263 demand_empty_rest_of_line ();
4268 int dummy ATTRIBUTE_UNUSED
;
4273 unwind
.proc_start
= 0;
4274 /* Parse names of main and alternate entry points and mark them as
4275 function symbols: */
4279 name
= input_line_pointer
;
4280 c
= get_symbol_end ();
4281 p
= input_line_pointer
;
4283 as_bad ("Empty argument of .proc");
4286 sym
= symbol_find_or_make (name
);
4287 if (S_IS_DEFINED (sym
))
4288 as_bad ("`%s' was already defined", name
);
4289 else if (unwind
.proc_start
== 0)
4291 unwind
.proc_start
= sym
;
4293 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4297 if (*input_line_pointer
!= ',')
4299 ++input_line_pointer
;
4301 if (unwind
.proc_start
== 0)
4302 unwind
.proc_start
= expr_build_dot ();
4303 demand_empty_rest_of_line ();
4306 unwind
.prologue
= 0;
4307 unwind
.prologue_count
= 0;
4310 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4311 unwind
.personality_routine
= 0;
4316 int dummy ATTRIBUTE_UNUSED
;
4318 if (!in_procedure ("body"))
4320 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4321 as_warn ("Initial .body should precede any instructions");
4323 unwind
.prologue
= 0;
4324 unwind
.prologue_mask
= 0;
4327 add_unwind_entry (output_body ());
4328 demand_empty_rest_of_line ();
4332 dot_prologue (dummy
)
4333 int dummy ATTRIBUTE_UNUSED
;
4336 int mask
= 0, grsave
= 0;
4338 if (!in_procedure ("prologue"))
4340 if (unwind
.prologue
)
4342 as_bad (".prologue within prologue");
4343 ignore_rest_of_line ();
4346 if (!unwind
.body
&& unwind
.insn
)
4347 as_warn ("Initial .prologue should precede any instructions");
4349 if (!is_it_end_of_statement ())
4352 sep
= parse_operand (&e1
);
4354 as_bad ("No second operand to .prologue");
4355 sep
= parse_operand (&e2
);
4356 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4357 demand_empty_rest_of_line ();
4359 if (e1
.X_op
== O_constant
)
4361 mask
= e1
.X_add_number
;
4363 if (e2
.X_op
== O_constant
)
4364 grsave
= e2
.X_add_number
;
4365 else if (e2
.X_op
== O_register
4366 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4369 as_bad ("Second operand not a constant or general register");
4371 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4374 as_bad ("First operand not a constant");
4377 add_unwind_entry (output_prologue ());
4379 unwind
.prologue
= 1;
4380 unwind
.prologue_mask
= mask
;
4382 ++unwind
.prologue_count
;
4387 int dummy ATTRIBUTE_UNUSED
;
4391 int bytes_per_address
;
4394 subsegT saved_subseg
;
4395 char *name
, *default_name
, *p
, c
;
4397 int unwind_check
= md
.unwind_check
;
4399 md
.unwind_check
= unwind_check_error
;
4400 if (!in_procedure ("endp"))
4402 md
.unwind_check
= unwind_check
;
4404 if (unwind
.saved_text_seg
)
4406 saved_seg
= unwind
.saved_text_seg
;
4407 saved_subseg
= unwind
.saved_text_subseg
;
4408 unwind
.saved_text_seg
= NULL
;
4412 saved_seg
= now_seg
;
4413 saved_subseg
= now_subseg
;
4416 insn_group_break (1, 0, 0);
4418 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4420 generate_unwind_image (saved_seg
);
4422 if (unwind
.info
|| unwind
.force_unwind_entry
)
4426 subseg_set (md
.last_text_seg
, 0);
4427 proc_end
= expr_build_dot ();
4429 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 0);
4431 /* Make sure that section has 4 byte alignment for ILP32 and
4432 8 byte alignment for LP64. */
4433 record_alignment (now_seg
, md
.pointer_size_shift
);
4435 /* Need space for 3 pointers for procedure start, procedure end,
4437 ptr
= frag_more (3 * md
.pointer_size
);
4438 where
= frag_now_fix () - (3 * md
.pointer_size
);
4439 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4441 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4442 e
.X_op
= O_pseudo_fixup
;
4443 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4445 e
.X_add_symbol
= unwind
.proc_start
;
4446 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4448 e
.X_op
= O_pseudo_fixup
;
4449 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4451 e
.X_add_symbol
= proc_end
;
4452 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4453 bytes_per_address
, &e
);
4457 e
.X_op
= O_pseudo_fixup
;
4458 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4460 e
.X_add_symbol
= unwind
.info
;
4461 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4462 bytes_per_address
, &e
);
4465 md_number_to_chars (ptr
+ (bytes_per_address
* 2), 0,
4470 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
, 1);
4472 subseg_set (saved_seg
, saved_subseg
);
4474 if (unwind
.proc_start
)
4475 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4477 default_name
= NULL
;
4479 /* Parse names of main and alternate entry points and set symbol sizes. */
4483 name
= input_line_pointer
;
4484 c
= get_symbol_end ();
4485 p
= input_line_pointer
;
4488 if (md
.unwind_check
== unwind_check_warning
)
4492 as_warn ("Empty argument of .endp. Use the default name `%s'",
4494 name
= default_name
;
4497 as_warn ("Empty argument of .endp");
4500 as_bad ("Empty argument of .endp");
4504 sym
= symbol_find (name
);
4506 && md
.unwind_check
== unwind_check_warning
4508 && default_name
!= name
)
4510 /* We have a bad name. Try the default one if needed. */
4511 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4512 name
, default_name
);
4513 name
= default_name
;
4514 sym
= symbol_find (name
);
4516 if (!sym
|| !S_IS_DEFINED (sym
))
4517 as_bad ("`%s' was not defined within procedure", name
);
4518 else if (unwind
.proc_start
4519 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4520 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4522 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4523 fragS
*frag
= symbol_get_frag (sym
);
4525 /* Check whether the function label is at or beyond last
4527 while (fr
&& fr
!= frag
)
4531 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4532 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4535 symbol_get_obj (sym
)->size
=
4536 (expressionS
*) xmalloc (sizeof (expressionS
));
4537 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4538 symbol_get_obj (sym
)->size
->X_add_symbol
4539 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4540 frag_now_fix (), frag_now
);
4541 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4542 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4549 if (*input_line_pointer
!= ',')
4551 ++input_line_pointer
;
4553 demand_empty_rest_of_line ();
4554 unwind
.proc_start
= unwind
.info
= 0;
4558 dot_template (template)
4561 CURR_SLOT
.user_template
= template;
4566 int dummy ATTRIBUTE_UNUSED
;
4568 int ins
, locs
, outs
, rots
;
4570 if (is_it_end_of_statement ())
4571 ins
= locs
= outs
= rots
= 0;
4574 ins
= get_absolute_expression ();
4575 if (*input_line_pointer
++ != ',')
4577 locs
= get_absolute_expression ();
4578 if (*input_line_pointer
++ != ',')
4580 outs
= get_absolute_expression ();
4581 if (*input_line_pointer
++ != ',')
4583 rots
= get_absolute_expression ();
4585 set_regstack (ins
, locs
, outs
, rots
);
4589 as_bad ("Comma expected");
4590 ignore_rest_of_line ();
4597 unsigned num_regs
, num_alloced
= 0;
4598 struct dynreg
**drpp
, *dr
;
4599 int ch
, base_reg
= 0;
4605 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4606 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4607 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4611 /* First, remove existing names from hash table. */
4612 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4614 hash_delete (md
.dynreg_hash
, dr
->name
);
4615 /* FIXME: Free dr->name. */
4619 drpp
= &md
.dynreg
[type
];
4622 start
= input_line_pointer
;
4623 ch
= get_symbol_end ();
4624 len
= strlen (ia64_canonicalize_symbol_name (start
));
4625 *input_line_pointer
= ch
;
4628 if (*input_line_pointer
!= '[')
4630 as_bad ("Expected '['");
4633 ++input_line_pointer
; /* skip '[' */
4635 num_regs
= get_absolute_expression ();
4637 if (*input_line_pointer
++ != ']')
4639 as_bad ("Expected ']'");
4644 num_alloced
+= num_regs
;
4648 if (num_alloced
> md
.rot
.num_regs
)
4650 as_bad ("Used more than the declared %d rotating registers",
4656 if (num_alloced
> 96)
4658 as_bad ("Used more than the available 96 rotating registers");
4663 if (num_alloced
> 48)
4665 as_bad ("Used more than the available 48 rotating registers");
4676 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4677 memset (*drpp
, 0, sizeof (*dr
));
4680 name
= obstack_alloc (¬es
, len
+ 1);
4681 memcpy (name
, start
, len
);
4686 dr
->num_regs
= num_regs
;
4687 dr
->base
= base_reg
;
4689 base_reg
+= num_regs
;
4691 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4693 as_bad ("Attempt to redefine register set `%s'", name
);
4694 obstack_free (¬es
, name
);
4698 if (*input_line_pointer
!= ',')
4700 ++input_line_pointer
; /* skip comma */
4703 demand_empty_rest_of_line ();
4707 ignore_rest_of_line ();
4711 dot_byteorder (byteorder
)
4714 segment_info_type
*seginfo
= seg_info (now_seg
);
4716 if (byteorder
== -1)
4718 if (seginfo
->tc_segment_info_data
.endian
== 0)
4719 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4720 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4723 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4725 if (target_big_endian
!= byteorder
)
4727 target_big_endian
= byteorder
;
4728 if (target_big_endian
)
4730 ia64_number_to_chars
= number_to_chars_bigendian
;
4731 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4735 ia64_number_to_chars
= number_to_chars_littleendian
;
4736 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4743 int dummy ATTRIBUTE_UNUSED
;
4750 option
= input_line_pointer
;
4751 ch
= get_symbol_end ();
4752 if (strcmp (option
, "lsb") == 0)
4753 md
.flags
&= ~EF_IA_64_BE
;
4754 else if (strcmp (option
, "msb") == 0)
4755 md
.flags
|= EF_IA_64_BE
;
4756 else if (strcmp (option
, "abi32") == 0)
4757 md
.flags
&= ~EF_IA_64_ABI64
;
4758 else if (strcmp (option
, "abi64") == 0)
4759 md
.flags
|= EF_IA_64_ABI64
;
4761 as_bad ("Unknown psr option `%s'", option
);
4762 *input_line_pointer
= ch
;
4765 if (*input_line_pointer
!= ',')
4768 ++input_line_pointer
;
4771 demand_empty_rest_of_line ();
4776 int dummy ATTRIBUTE_UNUSED
;
4778 new_logical_line (0, get_absolute_expression ());
4779 demand_empty_rest_of_line ();
4783 cross_section (ref
, cons
, ua
)
4785 void (*cons
) PARAMS((int));
4789 int saved_auto_align
;
4790 unsigned int section_count
;
4793 start
= input_line_pointer
;
4799 name
= demand_copy_C_string (&len
);
4800 obstack_free(¬es
, name
);
4803 ignore_rest_of_line ();
4809 char c
= get_symbol_end ();
4811 if (input_line_pointer
== start
)
4813 as_bad ("Missing section name");
4814 ignore_rest_of_line ();
4817 *input_line_pointer
= c
;
4819 end
= input_line_pointer
;
4821 if (*input_line_pointer
!= ',')
4823 as_bad ("Comma expected after section name");
4824 ignore_rest_of_line ();
4828 end
= input_line_pointer
+ 1; /* skip comma */
4829 input_line_pointer
= start
;
4830 md
.keep_pending_output
= 1;
4831 section_count
= bfd_count_sections(stdoutput
);
4832 obj_elf_section (0);
4833 if (section_count
!= bfd_count_sections(stdoutput
))
4834 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4835 input_line_pointer
= end
;
4836 saved_auto_align
= md
.auto_align
;
4841 md
.auto_align
= saved_auto_align
;
4842 obj_elf_previous (0);
4843 md
.keep_pending_output
= 0;
4850 cross_section (size
, cons
, 0);
4853 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4856 stmt_float_cons (kind
)
4877 ia64_do_align (alignment
);
4885 int saved_auto_align
= md
.auto_align
;
4889 md
.auto_align
= saved_auto_align
;
4893 dot_xfloat_cons (kind
)
4896 cross_section (kind
, stmt_float_cons
, 0);
4900 dot_xstringer (zero
)
4903 cross_section (zero
, stringer
, 0);
4910 cross_section (size
, cons
, 1);
4914 dot_xfloat_cons_ua (kind
)
4917 cross_section (kind
, float_cons
, 1);
4920 /* .reg.val <regname>,value */
4924 int dummy ATTRIBUTE_UNUSED
;
4929 if (reg
.X_op
!= O_register
)
4931 as_bad (_("Register name expected"));
4932 ignore_rest_of_line ();
4934 else if (*input_line_pointer
++ != ',')
4936 as_bad (_("Comma expected"));
4937 ignore_rest_of_line ();
4941 valueT value
= get_absolute_expression ();
4942 int regno
= reg
.X_add_number
;
4943 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4944 as_warn (_("Register value annotation ignored"));
4947 gr_values
[regno
- REG_GR
].known
= 1;
4948 gr_values
[regno
- REG_GR
].value
= value
;
4949 gr_values
[regno
- REG_GR
].path
= md
.path
;
4952 demand_empty_rest_of_line ();
4957 .serialize.instruction
4960 dot_serialize (type
)
4963 insn_group_break (0, 0, 0);
4965 instruction_serialization ();
4967 data_serialization ();
4968 insn_group_break (0, 0, 0);
4969 demand_empty_rest_of_line ();
4972 /* select dv checking mode
4977 A stop is inserted when changing modes
4984 if (md
.manual_bundling
)
4985 as_warn (_("Directive invalid within a bundle"));
4987 if (type
== 'E' || type
== 'A')
4988 md
.mode_explicitly_set
= 0;
4990 md
.mode_explicitly_set
= 1;
4997 if (md
.explicit_mode
)
4998 insn_group_break (1, 0, 0);
4999 md
.explicit_mode
= 0;
5003 if (!md
.explicit_mode
)
5004 insn_group_break (1, 0, 0);
5005 md
.explicit_mode
= 1;
5009 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5010 insn_group_break (1, 0, 0);
5011 md
.explicit_mode
= md
.default_explicit_mode
;
5012 md
.mode_explicitly_set
= 0;
5023 for (regno
= 0; regno
< 64; regno
++)
5025 if (mask
& ((valueT
) 1 << regno
))
5027 fprintf (stderr
, "%s p%d", comma
, regno
);
5034 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5035 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5036 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5037 .pred.safe_across_calls p1 [, p2 [,...]]
5046 int p1
= -1, p2
= -1;
5050 if (*input_line_pointer
== '"')
5053 char *form
= demand_copy_C_string (&len
);
5055 if (strcmp (form
, "mutex") == 0)
5057 else if (strcmp (form
, "clear") == 0)
5059 else if (strcmp (form
, "imply") == 0)
5061 obstack_free (¬es
, form
);
5063 else if (*input_line_pointer
== '@')
5065 char *form
= ++input_line_pointer
;
5066 char c
= get_symbol_end();
5068 if (strcmp (form
, "mutex") == 0)
5070 else if (strcmp (form
, "clear") == 0)
5072 else if (strcmp (form
, "imply") == 0)
5074 *input_line_pointer
= c
;
5078 as_bad (_("Missing predicate relation type"));
5079 ignore_rest_of_line ();
5084 as_bad (_("Unrecognized predicate relation type"));
5085 ignore_rest_of_line ();
5088 if (*input_line_pointer
== ',')
5089 ++input_line_pointer
;
5098 expressionS pr
, *pr1
, *pr2
;
5101 if (pr
.X_op
== O_register
5102 && pr
.X_add_number
>= REG_P
5103 && pr
.X_add_number
<= REG_P
+ 63)
5105 regno
= pr
.X_add_number
- REG_P
;
5113 else if (type
!= 'i'
5114 && pr
.X_op
== O_subtract
5115 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5116 && pr1
->X_op
== O_register
5117 && pr1
->X_add_number
>= REG_P
5118 && pr1
->X_add_number
<= REG_P
+ 63
5119 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5120 && pr2
->X_op
== O_register
5121 && pr2
->X_add_number
>= REG_P
5122 && pr2
->X_add_number
<= REG_P
+ 63)
5127 regno
= pr1
->X_add_number
- REG_P
;
5128 stop
= pr2
->X_add_number
- REG_P
;
5131 as_bad (_("Bad register range"));
5132 ignore_rest_of_line ();
5135 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5136 count
+= stop
- regno
+ 1;
5140 as_bad (_("Predicate register expected"));
5141 ignore_rest_of_line ();
5145 as_warn (_("Duplicate predicate register ignored"));
5147 if (*input_line_pointer
!= ',')
5149 ++input_line_pointer
;
5158 clear_qp_mutex (mask
);
5159 clear_qp_implies (mask
, (valueT
) 0);
5162 if (count
!= 2 || p1
== -1 || p2
== -1)
5163 as_bad (_("Predicate source and target required"));
5164 else if (p1
== 0 || p2
== 0)
5165 as_bad (_("Use of p0 is not valid in this context"));
5167 add_qp_imply (p1
, p2
);
5172 as_bad (_("At least two PR arguments expected"));
5177 as_bad (_("Use of p0 is not valid in this context"));
5180 add_qp_mutex (mask
);
5183 /* note that we don't override any existing relations */
5186 as_bad (_("At least one PR argument expected"));
5191 fprintf (stderr
, "Safe across calls: ");
5192 print_prmask (mask
);
5193 fprintf (stderr
, "\n");
5195 qp_safe_across_calls
= mask
;
5198 demand_empty_rest_of_line ();
5201 /* .entry label [, label [, ...]]
5202 Hint to DV code that the given labels are to be considered entry points.
5203 Otherwise, only global labels are considered entry points. */
5207 int dummy ATTRIBUTE_UNUSED
;
5216 name
= input_line_pointer
;
5217 c
= get_symbol_end ();
5218 symbolP
= symbol_find_or_make (name
);
5220 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5222 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5225 *input_line_pointer
= c
;
5227 c
= *input_line_pointer
;
5230 input_line_pointer
++;
5232 if (*input_line_pointer
== '\n')
5238 demand_empty_rest_of_line ();
5241 /* .mem.offset offset, base
5242 "base" is used to distinguish between offsets from a different base. */
5245 dot_mem_offset (dummy
)
5246 int dummy ATTRIBUTE_UNUSED
;
5248 md
.mem_offset
.hint
= 1;
5249 md
.mem_offset
.offset
= get_absolute_expression ();
5250 if (*input_line_pointer
!= ',')
5252 as_bad (_("Comma expected"));
5253 ignore_rest_of_line ();
5256 ++input_line_pointer
;
5257 md
.mem_offset
.base
= get_absolute_expression ();
5258 demand_empty_rest_of_line ();
5261 /* ia64-specific pseudo-ops: */
5262 const pseudo_typeS md_pseudo_table
[] =
5264 { "radix", dot_radix
, 0 },
5265 { "lcomm", s_lcomm_bytes
, 1 },
5266 { "loc", dot_loc
, 0 },
5267 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5268 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5269 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5270 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5271 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5272 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5273 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5274 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5275 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5276 { "proc", dot_proc
, 0 },
5277 { "body", dot_body
, 0 },
5278 { "prologue", dot_prologue
, 0 },
5279 { "endp", dot_endp
, 0 },
5281 { "fframe", dot_fframe
, 0 },
5282 { "vframe", dot_vframe
, 0 },
5283 { "vframesp", dot_vframesp
, 0 },
5284 { "vframepsp", dot_vframepsp
, 0 },
5285 { "save", dot_save
, 0 },
5286 { "restore", dot_restore
, 0 },
5287 { "restorereg", dot_restorereg
, 0 },
5288 { "restorereg.p", dot_restorereg_p
, 0 },
5289 { "handlerdata", dot_handlerdata
, 0 },
5290 { "unwentry", dot_unwentry
, 0 },
5291 { "altrp", dot_altrp
, 0 },
5292 { "savesp", dot_savemem
, 0 },
5293 { "savepsp", dot_savemem
, 1 },
5294 { "save.g", dot_saveg
, 0 },
5295 { "save.f", dot_savef
, 0 },
5296 { "save.b", dot_saveb
, 0 },
5297 { "save.gf", dot_savegf
, 0 },
5298 { "spill", dot_spill
, 0 },
5299 { "spillreg", dot_spillreg
, 0 },
5300 { "spillsp", dot_spillmem
, 0 },
5301 { "spillpsp", dot_spillmem
, 1 },
5302 { "spillreg.p", dot_spillreg_p
, 0 },
5303 { "spillsp.p", dot_spillmem_p
, 0 },
5304 { "spillpsp.p", dot_spillmem_p
, 1 },
5305 { "label_state", dot_label_state
, 0 },
5306 { "copy_state", dot_copy_state
, 0 },
5307 { "unwabi", dot_unwabi
, 0 },
5308 { "personality", dot_personality
, 0 },
5309 { "mii", dot_template
, 0x0 },
5310 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5311 { "mlx", dot_template
, 0x2 },
5312 { "mmi", dot_template
, 0x4 },
5313 { "mfi", dot_template
, 0x6 },
5314 { "mmf", dot_template
, 0x7 },
5315 { "mib", dot_template
, 0x8 },
5316 { "mbb", dot_template
, 0x9 },
5317 { "bbb", dot_template
, 0xb },
5318 { "mmb", dot_template
, 0xc },
5319 { "mfb", dot_template
, 0xe },
5320 { "align", dot_align
, 0 },
5321 { "regstk", dot_regstk
, 0 },
5322 { "rotr", dot_rot
, DYNREG_GR
},
5323 { "rotf", dot_rot
, DYNREG_FR
},
5324 { "rotp", dot_rot
, DYNREG_PR
},
5325 { "lsb", dot_byteorder
, 0 },
5326 { "msb", dot_byteorder
, 1 },
5327 { "psr", dot_psr
, 0 },
5328 { "alias", dot_alias
, 0 },
5329 { "secalias", dot_alias
, 1 },
5330 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5332 { "xdata1", dot_xdata
, 1 },
5333 { "xdata2", dot_xdata
, 2 },
5334 { "xdata4", dot_xdata
, 4 },
5335 { "xdata8", dot_xdata
, 8 },
5336 { "xdata16", dot_xdata
, 16 },
5337 { "xreal4", dot_xfloat_cons
, 'f' },
5338 { "xreal8", dot_xfloat_cons
, 'd' },
5339 { "xreal10", dot_xfloat_cons
, 'x' },
5340 { "xreal16", dot_xfloat_cons
, 'X' },
5341 { "xstring", dot_xstringer
, 0 },
5342 { "xstringz", dot_xstringer
, 1 },
5344 /* unaligned versions: */
5345 { "xdata2.ua", dot_xdata_ua
, 2 },
5346 { "xdata4.ua", dot_xdata_ua
, 4 },
5347 { "xdata8.ua", dot_xdata_ua
, 8 },
5348 { "xdata16.ua", dot_xdata_ua
, 16 },
5349 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5350 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5351 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5352 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5354 /* annotations/DV checking support */
5355 { "entry", dot_entry
, 0 },
5356 { "mem.offset", dot_mem_offset
, 0 },
5357 { "pred.rel", dot_pred_rel
, 0 },
5358 { "pred.rel.clear", dot_pred_rel
, 'c' },
5359 { "pred.rel.imply", dot_pred_rel
, 'i' },
5360 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5361 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5362 { "reg.val", dot_reg_val
, 0 },
5363 { "serialize.data", dot_serialize
, 0 },
5364 { "serialize.instruction", dot_serialize
, 1 },
5365 { "auto", dot_dv_mode
, 'a' },
5366 { "explicit", dot_dv_mode
, 'e' },
5367 { "default", dot_dv_mode
, 'd' },
5369 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5370 IA-64 aligns data allocation pseudo-ops by default, so we have to
5371 tell it that these ones are supposed to be unaligned. Long term,
5372 should rewrite so that only IA-64 specific data allocation pseudo-ops
5373 are aligned by default. */
5374 {"2byte", stmt_cons_ua
, 2},
5375 {"4byte", stmt_cons_ua
, 4},
5376 {"8byte", stmt_cons_ua
, 8},
5381 static const struct pseudo_opcode
5384 void (*handler
) (int);
5389 /* these are more like pseudo-ops, but don't start with a dot */
5390 { "data1", cons
, 1 },
5391 { "data2", cons
, 2 },
5392 { "data4", cons
, 4 },
5393 { "data8", cons
, 8 },
5394 { "data16", cons
, 16 },
5395 { "real4", stmt_float_cons
, 'f' },
5396 { "real8", stmt_float_cons
, 'd' },
5397 { "real10", stmt_float_cons
, 'x' },
5398 { "real16", stmt_float_cons
, 'X' },
5399 { "string", stringer
, 0 },
5400 { "stringz", stringer
, 1 },
5402 /* unaligned versions: */
5403 { "data2.ua", stmt_cons_ua
, 2 },
5404 { "data4.ua", stmt_cons_ua
, 4 },
5405 { "data8.ua", stmt_cons_ua
, 8 },
5406 { "data16.ua", stmt_cons_ua
, 16 },
5407 { "real4.ua", float_cons
, 'f' },
5408 { "real8.ua", float_cons
, 'd' },
5409 { "real10.ua", float_cons
, 'x' },
5410 { "real16.ua", float_cons
, 'X' },
5413 /* Declare a register by creating a symbol for it and entering it in
5414 the symbol table. */
5417 declare_register (name
, regnum
)
5424 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5426 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5428 as_fatal ("Inserting \"%s\" into register table failed: %s",
5435 declare_register_set (prefix
, num_regs
, base_regnum
)
5443 for (i
= 0; i
< num_regs
; ++i
)
5445 sprintf (name
, "%s%u", prefix
, i
);
5446 declare_register (name
, base_regnum
+ i
);
5451 operand_width (opnd
)
5452 enum ia64_opnd opnd
;
5454 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5455 unsigned int bits
= 0;
5459 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5460 bits
+= odesc
->field
[i
].bits
;
5465 static enum operand_match_result
5466 operand_match (idesc
, index
, e
)
5467 const struct ia64_opcode
*idesc
;
5471 enum ia64_opnd opnd
= idesc
->operands
[index
];
5472 int bits
, relocatable
= 0;
5473 struct insn_fix
*fix
;
5480 case IA64_OPND_AR_CCV
:
5481 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5482 return OPERAND_MATCH
;
5485 case IA64_OPND_AR_CSD
:
5486 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5487 return OPERAND_MATCH
;
5490 case IA64_OPND_AR_PFS
:
5491 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5492 return OPERAND_MATCH
;
5496 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5497 return OPERAND_MATCH
;
5501 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5502 return OPERAND_MATCH
;
5506 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5507 return OPERAND_MATCH
;
5510 case IA64_OPND_PR_ROT
:
5511 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5512 return OPERAND_MATCH
;
5516 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5517 return OPERAND_MATCH
;
5520 case IA64_OPND_PSR_L
:
5521 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5522 return OPERAND_MATCH
;
5525 case IA64_OPND_PSR_UM
:
5526 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5527 return OPERAND_MATCH
;
5531 if (e
->X_op
== O_constant
)
5533 if (e
->X_add_number
== 1)
5534 return OPERAND_MATCH
;
5536 return OPERAND_OUT_OF_RANGE
;
5541 if (e
->X_op
== O_constant
)
5543 if (e
->X_add_number
== 8)
5544 return OPERAND_MATCH
;
5546 return OPERAND_OUT_OF_RANGE
;
5551 if (e
->X_op
== O_constant
)
5553 if (e
->X_add_number
== 16)
5554 return OPERAND_MATCH
;
5556 return OPERAND_OUT_OF_RANGE
;
5560 /* register operands: */
5563 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5564 && e
->X_add_number
< REG_AR
+ 128)
5565 return OPERAND_MATCH
;
5570 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5571 && e
->X_add_number
< REG_BR
+ 8)
5572 return OPERAND_MATCH
;
5576 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5577 && e
->X_add_number
< REG_CR
+ 128)
5578 return OPERAND_MATCH
;
5585 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5586 && e
->X_add_number
< REG_FR
+ 128)
5587 return OPERAND_MATCH
;
5592 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5593 && e
->X_add_number
< REG_P
+ 64)
5594 return OPERAND_MATCH
;
5600 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5601 && e
->X_add_number
< REG_GR
+ 128)
5602 return OPERAND_MATCH
;
5605 case IA64_OPND_R3_2
:
5606 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5608 if (e
->X_add_number
< REG_GR
+ 4)
5609 return OPERAND_MATCH
;
5610 else if (e
->X_add_number
< REG_GR
+ 128)
5611 return OPERAND_OUT_OF_RANGE
;
5615 /* indirect operands: */
5616 case IA64_OPND_CPUID_R3
:
5617 case IA64_OPND_DBR_R3
:
5618 case IA64_OPND_DTR_R3
:
5619 case IA64_OPND_ITR_R3
:
5620 case IA64_OPND_IBR_R3
:
5621 case IA64_OPND_MSR_R3
:
5622 case IA64_OPND_PKR_R3
:
5623 case IA64_OPND_PMC_R3
:
5624 case IA64_OPND_PMD_R3
:
5625 case IA64_OPND_RR_R3
:
5626 if (e
->X_op
== O_index
&& e
->X_op_symbol
5627 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5628 == opnd
- IA64_OPND_CPUID_R3
))
5629 return OPERAND_MATCH
;
5633 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5634 return OPERAND_MATCH
;
5637 /* immediate operands: */
5638 case IA64_OPND_CNT2a
:
5639 case IA64_OPND_LEN4
:
5640 case IA64_OPND_LEN6
:
5641 bits
= operand_width (idesc
->operands
[index
]);
5642 if (e
->X_op
== O_constant
)
5644 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5645 return OPERAND_MATCH
;
5647 return OPERAND_OUT_OF_RANGE
;
5651 case IA64_OPND_CNT2b
:
5652 if (e
->X_op
== O_constant
)
5654 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5655 return OPERAND_MATCH
;
5657 return OPERAND_OUT_OF_RANGE
;
5661 case IA64_OPND_CNT2c
:
5662 val
= e
->X_add_number
;
5663 if (e
->X_op
== O_constant
)
5665 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5666 return OPERAND_MATCH
;
5668 return OPERAND_OUT_OF_RANGE
;
5673 /* SOR must be an integer multiple of 8 */
5674 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5675 return OPERAND_OUT_OF_RANGE
;
5678 if (e
->X_op
== O_constant
)
5680 if ((bfd_vma
) e
->X_add_number
<= 96)
5681 return OPERAND_MATCH
;
5683 return OPERAND_OUT_OF_RANGE
;
5687 case IA64_OPND_IMMU62
:
5688 if (e
->X_op
== O_constant
)
5690 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5691 return OPERAND_MATCH
;
5693 return OPERAND_OUT_OF_RANGE
;
5697 /* FIXME -- need 62-bit relocation type */
5698 as_bad (_("62-bit relocation not yet implemented"));
5702 case IA64_OPND_IMMU64
:
5703 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5704 || e
->X_op
== O_subtract
)
5706 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5707 fix
->code
= BFD_RELOC_IA64_IMM64
;
5708 if (e
->X_op
!= O_subtract
)
5710 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5711 if (e
->X_op
== O_pseudo_fixup
)
5715 fix
->opnd
= idesc
->operands
[index
];
5718 ++CURR_SLOT
.num_fixups
;
5719 return OPERAND_MATCH
;
5721 else if (e
->X_op
== O_constant
)
5722 return OPERAND_MATCH
;
5725 case IA64_OPND_CCNT5
:
5726 case IA64_OPND_CNT5
:
5727 case IA64_OPND_CNT6
:
5728 case IA64_OPND_CPOS6a
:
5729 case IA64_OPND_CPOS6b
:
5730 case IA64_OPND_CPOS6c
:
5731 case IA64_OPND_IMMU2
:
5732 case IA64_OPND_IMMU7a
:
5733 case IA64_OPND_IMMU7b
:
5734 case IA64_OPND_IMMU21
:
5735 case IA64_OPND_IMMU24
:
5736 case IA64_OPND_MBTYPE4
:
5737 case IA64_OPND_MHTYPE8
:
5738 case IA64_OPND_POS6
:
5739 bits
= operand_width (idesc
->operands
[index
]);
5740 if (e
->X_op
== O_constant
)
5742 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5743 return OPERAND_MATCH
;
5745 return OPERAND_OUT_OF_RANGE
;
5749 case IA64_OPND_IMMU9
:
5750 bits
= operand_width (idesc
->operands
[index
]);
5751 if (e
->X_op
== O_constant
)
5753 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5755 int lobits
= e
->X_add_number
& 0x3;
5756 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5757 e
->X_add_number
|= (bfd_vma
) 0x3;
5758 return OPERAND_MATCH
;
5761 return OPERAND_OUT_OF_RANGE
;
5765 case IA64_OPND_IMM44
:
5766 /* least 16 bits must be zero */
5767 if ((e
->X_add_number
& 0xffff) != 0)
5768 /* XXX technically, this is wrong: we should not be issuing warning
5769 messages until we're sure this instruction pattern is going to
5771 as_warn (_("lower 16 bits of mask ignored"));
5773 if (e
->X_op
== O_constant
)
5775 if (((e
->X_add_number
>= 0
5776 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5777 || (e
->X_add_number
< 0
5778 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5781 if (e
->X_add_number
>= 0
5782 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5784 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5786 return OPERAND_MATCH
;
5789 return OPERAND_OUT_OF_RANGE
;
5793 case IA64_OPND_IMM17
:
5794 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5795 if (e
->X_op
== O_constant
)
5797 if (((e
->X_add_number
>= 0
5798 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5799 || (e
->X_add_number
< 0
5800 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5803 if (e
->X_add_number
>= 0
5804 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5806 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5808 return OPERAND_MATCH
;
5811 return OPERAND_OUT_OF_RANGE
;
5815 case IA64_OPND_IMM14
:
5816 case IA64_OPND_IMM22
:
5818 case IA64_OPND_IMM1
:
5819 case IA64_OPND_IMM8
:
5820 case IA64_OPND_IMM8U4
:
5821 case IA64_OPND_IMM8M1
:
5822 case IA64_OPND_IMM8M1U4
:
5823 case IA64_OPND_IMM8M1U8
:
5824 case IA64_OPND_IMM9a
:
5825 case IA64_OPND_IMM9b
:
5826 bits
= operand_width (idesc
->operands
[index
]);
5827 if (relocatable
&& (e
->X_op
== O_symbol
5828 || e
->X_op
== O_subtract
5829 || e
->X_op
== O_pseudo_fixup
))
5831 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5833 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5834 fix
->code
= BFD_RELOC_IA64_IMM14
;
5836 fix
->code
= BFD_RELOC_IA64_IMM22
;
5838 if (e
->X_op
!= O_subtract
)
5840 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5841 if (e
->X_op
== O_pseudo_fixup
)
5845 fix
->opnd
= idesc
->operands
[index
];
5848 ++CURR_SLOT
.num_fixups
;
5849 return OPERAND_MATCH
;
5851 else if (e
->X_op
!= O_constant
5852 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5853 return OPERAND_MISMATCH
;
5855 if (opnd
== IA64_OPND_IMM8M1U4
)
5857 /* Zero is not valid for unsigned compares that take an adjusted
5858 constant immediate range. */
5859 if (e
->X_add_number
== 0)
5860 return OPERAND_OUT_OF_RANGE
;
5862 /* Sign-extend 32-bit unsigned numbers, so that the following range
5863 checks will work. */
5864 val
= e
->X_add_number
;
5865 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5866 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5867 val
= ((val
<< 32) >> 32);
5869 /* Check for 0x100000000. This is valid because
5870 0x100000000-1 is the same as ((uint32_t) -1). */
5871 if (val
== ((bfd_signed_vma
) 1 << 32))
5872 return OPERAND_MATCH
;
5876 else if (opnd
== IA64_OPND_IMM8M1U8
)
5878 /* Zero is not valid for unsigned compares that take an adjusted
5879 constant immediate range. */
5880 if (e
->X_add_number
== 0)
5881 return OPERAND_OUT_OF_RANGE
;
5883 /* Check for 0x10000000000000000. */
5884 if (e
->X_op
== O_big
)
5886 if (generic_bignum
[0] == 0
5887 && generic_bignum
[1] == 0
5888 && generic_bignum
[2] == 0
5889 && generic_bignum
[3] == 0
5890 && generic_bignum
[4] == 1)
5891 return OPERAND_MATCH
;
5893 return OPERAND_OUT_OF_RANGE
;
5896 val
= e
->X_add_number
- 1;
5898 else if (opnd
== IA64_OPND_IMM8M1
)
5899 val
= e
->X_add_number
- 1;
5900 else if (opnd
== IA64_OPND_IMM8U4
)
5902 /* Sign-extend 32-bit unsigned numbers, so that the following range
5903 checks will work. */
5904 val
= e
->X_add_number
;
5905 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5906 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5907 val
= ((val
<< 32) >> 32);
5910 val
= e
->X_add_number
;
5912 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5913 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5914 return OPERAND_MATCH
;
5916 return OPERAND_OUT_OF_RANGE
;
5918 case IA64_OPND_INC3
:
5919 /* +/- 1, 4, 8, 16 */
5920 val
= e
->X_add_number
;
5923 if (e
->X_op
== O_constant
)
5925 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5926 return OPERAND_MATCH
;
5928 return OPERAND_OUT_OF_RANGE
;
5932 case IA64_OPND_TGT25
:
5933 case IA64_OPND_TGT25b
:
5934 case IA64_OPND_TGT25c
:
5935 case IA64_OPND_TGT64
:
5936 if (e
->X_op
== O_symbol
)
5938 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5939 if (opnd
== IA64_OPND_TGT25
)
5940 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5941 else if (opnd
== IA64_OPND_TGT25b
)
5942 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5943 else if (opnd
== IA64_OPND_TGT25c
)
5944 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5945 else if (opnd
== IA64_OPND_TGT64
)
5946 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5950 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5951 fix
->opnd
= idesc
->operands
[index
];
5954 ++CURR_SLOT
.num_fixups
;
5955 return OPERAND_MATCH
;
5957 case IA64_OPND_TAG13
:
5958 case IA64_OPND_TAG13b
:
5962 return OPERAND_MATCH
;
5965 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5966 /* There are no external relocs for TAG13/TAG13b fields, so we
5967 create a dummy reloc. This will not live past md_apply_fix3. */
5968 fix
->code
= BFD_RELOC_UNUSED
;
5969 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5970 fix
->opnd
= idesc
->operands
[index
];
5973 ++CURR_SLOT
.num_fixups
;
5974 return OPERAND_MATCH
;
5981 case IA64_OPND_LDXMOV
:
5982 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5983 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5984 fix
->opnd
= idesc
->operands
[index
];
5987 ++CURR_SLOT
.num_fixups
;
5988 return OPERAND_MATCH
;
5993 return OPERAND_MISMATCH
;
6002 memset (e
, 0, sizeof (*e
));
6005 if (*input_line_pointer
!= '}')
6007 sep
= *input_line_pointer
++;
6011 if (!md
.manual_bundling
)
6012 as_warn ("Found '}' when manual bundling is off");
6014 CURR_SLOT
.manual_bundling_off
= 1;
6015 md
.manual_bundling
= 0;
6021 /* Returns the next entry in the opcode table that matches the one in
6022 IDESC, and frees the entry in IDESC. If no matching entry is
6023 found, NULL is returned instead. */
6025 static struct ia64_opcode
*
6026 get_next_opcode (struct ia64_opcode
*idesc
)
6028 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6029 ia64_free_opcode (idesc
);
6033 /* Parse the operands for the opcode and find the opcode variant that
6034 matches the specified operands, or NULL if no match is possible. */
6036 static struct ia64_opcode
*
6037 parse_operands (idesc
)
6038 struct ia64_opcode
*idesc
;
6040 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6041 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6044 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6045 enum operand_match_result result
;
6047 char *first_arg
= 0, *end
, *saved_input_pointer
;
6050 assert (strlen (idesc
->name
) <= 128);
6052 strcpy (mnemonic
, idesc
->name
);
6053 if (idesc
->operands
[2] == IA64_OPND_SOF
6054 || idesc
->operands
[1] == IA64_OPND_SOF
)
6056 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6057 can't parse the first operand until we have parsed the
6058 remaining operands of the "alloc" instruction. */
6060 first_arg
= input_line_pointer
;
6061 end
= strchr (input_line_pointer
, '=');
6064 as_bad ("Expected separator `='");
6067 input_line_pointer
= end
+ 1;
6074 if (i
< NELEMS (CURR_SLOT
.opnd
))
6076 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6077 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6084 sep
= parse_operand (&dummy
);
6085 if (dummy
.X_op
== O_absent
)
6091 if (sep
!= '=' && sep
!= ',')
6096 if (num_outputs
> 0)
6097 as_bad ("Duplicate equal sign (=) in instruction");
6099 num_outputs
= i
+ 1;
6104 as_bad ("Illegal operand separator `%c'", sep
);
6108 if (idesc
->operands
[2] == IA64_OPND_SOF
6109 || idesc
->operands
[1] == IA64_OPND_SOF
)
6111 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6112 know (strcmp (idesc
->name
, "alloc") == 0);
6113 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6114 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6115 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6116 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6117 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6118 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6119 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6121 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6122 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6123 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6124 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6126 /* now we can parse the first arg: */
6127 saved_input_pointer
= input_line_pointer
;
6128 input_line_pointer
= first_arg
;
6129 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6131 --num_outputs
; /* force error */
6132 input_line_pointer
= saved_input_pointer
;
6134 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6135 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6136 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6137 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6141 highest_unmatched_operand
= -4;
6142 curr_out_of_range_pos
= -1;
6144 for (; idesc
; idesc
= get_next_opcode (idesc
))
6146 if (num_outputs
!= idesc
->num_outputs
)
6147 continue; /* mismatch in # of outputs */
6148 if (highest_unmatched_operand
< 0)
6149 highest_unmatched_operand
|= 1;
6150 if (num_operands
> NELEMS (idesc
->operands
)
6151 || (num_operands
< NELEMS (idesc
->operands
)
6152 && idesc
->operands
[num_operands
])
6153 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6154 continue; /* mismatch in number of arguments */
6155 if (highest_unmatched_operand
< 0)
6156 highest_unmatched_operand
|= 2;
6158 CURR_SLOT
.num_fixups
= 0;
6160 /* Try to match all operands. If we see an out-of-range operand,
6161 then continue trying to match the rest of the operands, since if
6162 the rest match, then this idesc will give the best error message. */
6164 out_of_range_pos
= -1;
6165 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6167 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6168 if (result
!= OPERAND_MATCH
)
6170 if (result
!= OPERAND_OUT_OF_RANGE
)
6172 if (out_of_range_pos
< 0)
6173 /* remember position of the first out-of-range operand: */
6174 out_of_range_pos
= i
;
6178 /* If we did not match all operands, or if at least one operand was
6179 out-of-range, then this idesc does not match. Keep track of which
6180 idesc matched the most operands before failing. If we have two
6181 idescs that failed at the same position, and one had an out-of-range
6182 operand, then prefer the out-of-range operand. Thus if we have
6183 "add r0=0x1000000,r1" we get an error saying the constant is out
6184 of range instead of an error saying that the constant should have been
6187 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6189 if (i
> highest_unmatched_operand
6190 || (i
== highest_unmatched_operand
6191 && out_of_range_pos
> curr_out_of_range_pos
))
6193 highest_unmatched_operand
= i
;
6194 if (out_of_range_pos
>= 0)
6196 expected_operand
= idesc
->operands
[out_of_range_pos
];
6197 error_pos
= out_of_range_pos
;
6201 expected_operand
= idesc
->operands
[i
];
6204 curr_out_of_range_pos
= out_of_range_pos
;
6213 if (expected_operand
)
6214 as_bad ("Operand %u of `%s' should be %s",
6215 error_pos
+ 1, mnemonic
,
6216 elf64_ia64_operands
[expected_operand
].desc
);
6217 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6218 as_bad ("Wrong number of output operands");
6219 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6220 as_bad ("Wrong number of input operands");
6222 as_bad ("Operand mismatch");
6226 /* Check that the instruction doesn't use
6227 - r0, f0, or f1 as output operands
6228 - the same predicate twice as output operands
6229 - r0 as address of a base update load or store
6230 - the same GR as output and address of a base update load
6231 - two even- or two odd-numbered FRs as output operands of a floating
6232 point parallel load.
6233 At most two (conflicting) output (or output-like) operands can exist,
6234 (floating point parallel loads have three outputs, but the base register,
6235 if updated, cannot conflict with the actual outputs). */
6237 for (i
= 0; i
< num_operands
; ++i
)
6242 switch (idesc
->operands
[i
])
6247 if (i
< num_outputs
)
6249 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6252 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6254 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6259 if (i
< num_outputs
)
6262 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6264 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6271 if (i
< num_outputs
)
6273 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6274 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6277 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6280 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6282 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6286 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6288 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6291 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6293 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6304 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6307 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6313 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6318 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6323 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6331 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6333 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6334 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6335 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6336 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6337 && ! ((reg1
^ reg2
) & 1))
6338 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6339 reg1
- REG_FR
, reg2
- REG_FR
);
6340 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6341 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6342 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6343 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6344 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6345 reg1
- REG_FR
, reg2
- REG_FR
);
6350 build_insn (slot
, insnp
)
6354 const struct ia64_operand
*odesc
, *o2desc
;
6355 struct ia64_opcode
*idesc
= slot
->idesc
;
6361 insn
= idesc
->opcode
| slot
->qp_regno
;
6363 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6365 if (slot
->opnd
[i
].X_op
== O_register
6366 || slot
->opnd
[i
].X_op
== O_constant
6367 || slot
->opnd
[i
].X_op
== O_index
)
6368 val
= slot
->opnd
[i
].X_add_number
;
6369 else if (slot
->opnd
[i
].X_op
== O_big
)
6371 /* This must be the value 0x10000000000000000. */
6372 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6378 switch (idesc
->operands
[i
])
6380 case IA64_OPND_IMMU64
:
6381 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6382 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6383 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6384 | (((val
>> 63) & 0x1) << 36));
6387 case IA64_OPND_IMMU62
:
6388 val
&= 0x3fffffffffffffffULL
;
6389 if (val
!= slot
->opnd
[i
].X_add_number
)
6390 as_warn (_("Value truncated to 62 bits"));
6391 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6392 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6395 case IA64_OPND_TGT64
:
6397 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6398 insn
|= ((((val
>> 59) & 0x1) << 36)
6399 | (((val
>> 0) & 0xfffff) << 13));
6430 case IA64_OPND_R3_2
:
6431 case IA64_OPND_CPUID_R3
:
6432 case IA64_OPND_DBR_R3
:
6433 case IA64_OPND_DTR_R3
:
6434 case IA64_OPND_ITR_R3
:
6435 case IA64_OPND_IBR_R3
:
6437 case IA64_OPND_MSR_R3
:
6438 case IA64_OPND_PKR_R3
:
6439 case IA64_OPND_PMC_R3
:
6440 case IA64_OPND_PMD_R3
:
6441 case IA64_OPND_RR_R3
:
6449 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6450 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6452 as_bad_where (slot
->src_file
, slot
->src_line
,
6453 "Bad operand value: %s", err
);
6454 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6456 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6457 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6459 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6460 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6462 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6463 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6464 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6466 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6467 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6477 int manual_bundling_off
= 0, manual_bundling
= 0;
6478 enum ia64_unit required_unit
, insn_unit
= 0;
6479 enum ia64_insn_type type
[3], insn_type
;
6480 unsigned int template, orig_template
;
6481 bfd_vma insn
[3] = { -1, -1, -1 };
6482 struct ia64_opcode
*idesc
;
6483 int end_of_insn_group
= 0, user_template
= -1;
6484 int n
, i
, j
, first
, curr
, last_slot
;
6485 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6486 bfd_vma t0
= 0, t1
= 0;
6487 struct label_fix
*lfix
;
6488 struct insn_fix
*ifix
;
6494 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6495 know (first
>= 0 & first
< NUM_SLOTS
);
6496 n
= MIN (3, md
.num_slots_in_use
);
6498 /* Determine template: user user_template if specified, best match
6501 if (md
.slot
[first
].user_template
>= 0)
6502 user_template
= template = md
.slot
[first
].user_template
;
6505 /* Auto select appropriate template. */
6506 memset (type
, 0, sizeof (type
));
6508 for (i
= 0; i
< n
; ++i
)
6510 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6512 type
[i
] = md
.slot
[curr
].idesc
->type
;
6513 curr
= (curr
+ 1) % NUM_SLOTS
;
6515 template = best_template
[type
[0]][type
[1]][type
[2]];
6518 /* initialize instructions with appropriate nops: */
6519 for (i
= 0; i
< 3; ++i
)
6520 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6524 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6525 from the start of the frag. */
6526 addr_mod
= frag_now_fix () & 15;
6527 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6528 as_bad (_("instruction address is not a multiple of 16"));
6529 frag_now
->insn_addr
= addr_mod
;
6530 frag_now
->has_code
= 1;
6532 /* now fill in slots with as many insns as possible: */
6534 idesc
= md
.slot
[curr
].idesc
;
6535 end_of_insn_group
= 0;
6537 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6539 /* If we have unwind records, we may need to update some now. */
6540 ptr
= md
.slot
[curr
].unwind_record
;
6543 /* Find the last prologue/body record in the list for the current
6544 insn, and set the slot number for all records up to that point.
6545 This needs to be done now, because prologue/body records refer to
6546 the current point, not the point after the instruction has been
6547 issued. This matters because there may have been nops emitted
6548 meanwhile. Any non-prologue non-body record followed by a
6549 prologue/body record must also refer to the current point. */
6551 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6552 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6553 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6554 || ptr
->r
.type
== body
)
6558 /* Make last_ptr point one after the last prologue/body
6560 last_ptr
= last_ptr
->next
;
6561 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6564 ptr
->slot_number
= (unsigned long) f
+ i
;
6565 ptr
->slot_frag
= frag_now
;
6567 /* Remove the initialized records, so that we won't accidentally
6568 update them again if we insert a nop and continue. */
6569 md
.slot
[curr
].unwind_record
= last_ptr
;
6573 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6574 if (md
.slot
[curr
].manual_bundling_on
)
6577 manual_bundling
= 1;
6579 break; /* Need to start a new bundle. */
6582 /* If this instruction specifies a template, then it must be the first
6583 instruction of a bundle. */
6584 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6587 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6589 if (manual_bundling
&& !manual_bundling_off
)
6591 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6592 "`%s' must be last in bundle", idesc
->name
);
6594 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6598 if (idesc
->flags
& IA64_OPCODE_LAST
)
6601 unsigned int required_template
;
6603 /* If we need a stop bit after an M slot, our only choice is
6604 template 5 (M;;MI). If we need a stop bit after a B
6605 slot, our only choice is to place it at the end of the
6606 bundle, because the only available templates are MIB,
6607 MBB, BBB, MMB, and MFB. We don't handle anything other
6608 than M and B slots because these are the only kind of
6609 instructions that can have the IA64_OPCODE_LAST bit set. */
6610 required_template
= template;
6611 switch (idesc
->type
)
6615 required_template
= 5;
6623 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6624 "Internal error: don't know how to force %s to end"
6625 "of instruction group", idesc
->name
);
6630 && (i
> required_slot
6631 || (required_slot
== 2 && !manual_bundling_off
)
6632 || (user_template
>= 0
6633 /* Changing from MMI to M;MI is OK. */
6634 && (template ^ required_template
) > 1)))
6636 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6637 "`%s' must be last in instruction group",
6639 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6640 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6642 if (required_slot
< i
)
6643 /* Can't fit this instruction. */
6647 if (required_template
!= template)
6649 /* If we switch the template, we need to reset the NOPs
6650 after slot i. The slot-types of the instructions ahead
6651 of i never change, so we don't need to worry about
6652 changing NOPs in front of this slot. */
6653 for (j
= i
; j
< 3; ++j
)
6654 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6656 template = required_template
;
6658 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6660 if (manual_bundling
)
6662 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6663 "Label must be first in a bundle");
6664 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6666 /* This insn must go into the first slot of a bundle. */
6670 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6672 /* We need an instruction group boundary in the middle of a
6673 bundle. See if we can switch to an other template with
6674 an appropriate boundary. */
6676 orig_template
= template;
6677 if (i
== 1 && (user_template
== 4
6678 || (user_template
< 0
6679 && (ia64_templ_desc
[template].exec_unit
[0]
6683 end_of_insn_group
= 0;
6685 else if (i
== 2 && (user_template
== 0
6686 || (user_template
< 0
6687 && (ia64_templ_desc
[template].exec_unit
[1]
6689 /* This test makes sure we don't switch the template if
6690 the next instruction is one that needs to be first in
6691 an instruction group. Since all those instructions are
6692 in the M group, there is no way such an instruction can
6693 fit in this bundle even if we switch the template. The
6694 reason we have to check for this is that otherwise we
6695 may end up generating "MI;;I M.." which has the deadly
6696 effect that the second M instruction is no longer the
6697 first in the group! --davidm 99/12/16 */
6698 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6701 end_of_insn_group
= 0;
6704 && user_template
== 0
6705 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6706 /* Use the next slot. */
6708 else if (curr
!= first
)
6709 /* can't fit this insn */
6712 if (template != orig_template
)
6713 /* if we switch the template, we need to reset the NOPs
6714 after slot i. The slot-types of the instructions ahead
6715 of i never change, so we don't need to worry about
6716 changing NOPs in front of this slot. */
6717 for (j
= i
; j
< 3; ++j
)
6718 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6720 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6722 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6723 if (idesc
->type
== IA64_TYPE_DYN
)
6725 enum ia64_opnd opnd1
, opnd2
;
6727 if ((strcmp (idesc
->name
, "nop") == 0)
6728 || (strcmp (idesc
->name
, "break") == 0))
6729 insn_unit
= required_unit
;
6730 else if (strcmp (idesc
->name
, "hint") == 0)
6732 insn_unit
= required_unit
;
6733 if (required_unit
== IA64_UNIT_B
)
6739 case hint_b_warning
:
6740 as_warn ("hint in B unit may be treated as nop");
6743 /* When manual bundling is off and there is no
6744 user template, we choose a different unit so
6745 that hint won't go into the current slot. We
6746 will fill the current bundle with nops and
6747 try to put hint into the next bundle. */
6748 if (!manual_bundling
&& user_template
< 0)
6749 insn_unit
= IA64_UNIT_I
;
6751 as_bad ("hint in B unit can't be used");
6756 else if (strcmp (idesc
->name
, "chk.s") == 0
6757 || strcmp (idesc
->name
, "mov") == 0)
6759 insn_unit
= IA64_UNIT_M
;
6760 if (required_unit
== IA64_UNIT_I
6761 || (required_unit
== IA64_UNIT_F
&& template == 6))
6762 insn_unit
= IA64_UNIT_I
;
6765 as_fatal ("emit_one_bundle: unexpected dynamic op");
6767 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6768 opnd1
= idesc
->operands
[0];
6769 opnd2
= idesc
->operands
[1];
6770 ia64_free_opcode (idesc
);
6771 idesc
= ia64_find_opcode (mnemonic
);
6772 /* moves to/from ARs have collisions */
6773 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6775 while (idesc
!= NULL
6776 && (idesc
->operands
[0] != opnd1
6777 || idesc
->operands
[1] != opnd2
))
6778 idesc
= get_next_opcode (idesc
);
6780 md
.slot
[curr
].idesc
= idesc
;
6784 insn_type
= idesc
->type
;
6785 insn_unit
= IA64_UNIT_NIL
;
6789 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6790 insn_unit
= required_unit
;
6792 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6793 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6794 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6795 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6796 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6801 if (insn_unit
!= required_unit
)
6802 continue; /* Try next slot. */
6804 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6806 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6808 md
.slot
[curr
].loc_directive_seen
= 0;
6809 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6812 build_insn (md
.slot
+ curr
, insn
+ i
);
6814 ptr
= md
.slot
[curr
].unwind_record
;
6817 /* Set slot numbers for all remaining unwind records belonging to the
6818 current insn. There can not be any prologue/body unwind records
6820 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6821 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6823 ptr
->slot_number
= (unsigned long) f
+ i
;
6824 ptr
->slot_frag
= frag_now
;
6826 md
.slot
[curr
].unwind_record
= NULL
;
6829 if (required_unit
== IA64_UNIT_L
)
6832 /* skip one slot for long/X-unit instructions */
6835 --md
.num_slots_in_use
;
6838 /* now is a good time to fix up the labels for this insn: */
6839 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6841 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6842 symbol_set_frag (lfix
->sym
, frag_now
);
6844 /* and fix up the tags also. */
6845 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6847 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6848 symbol_set_frag (lfix
->sym
, frag_now
);
6851 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6853 ifix
= md
.slot
[curr
].fixup
+ j
;
6854 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6855 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6856 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6857 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6858 fix
->fx_file
= md
.slot
[curr
].src_file
;
6859 fix
->fx_line
= md
.slot
[curr
].src_line
;
6862 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6865 ia64_free_opcode (md
.slot
[curr
].idesc
);
6866 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6867 md
.slot
[curr
].user_template
= -1;
6869 if (manual_bundling_off
)
6871 manual_bundling
= 0;
6874 curr
= (curr
+ 1) % NUM_SLOTS
;
6875 idesc
= md
.slot
[curr
].idesc
;
6877 if (manual_bundling
> 0)
6879 if (md
.num_slots_in_use
> 0)
6882 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6883 "`%s' does not fit into bundle", idesc
->name
);
6884 else if (last_slot
< 0)
6886 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6887 "`%s' does not fit into %s template",
6888 idesc
->name
, ia64_templ_desc
[template].name
);
6889 /* Drop first insn so we don't livelock. */
6890 --md
.num_slots_in_use
;
6891 know (curr
== first
);
6892 ia64_free_opcode (md
.slot
[curr
].idesc
);
6893 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6894 md
.slot
[curr
].user_template
= -1;
6902 else if (last_slot
== 0)
6903 where
= "slots 2 or 3";
6906 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6907 "`%s' can't go in %s of %s template",
6908 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6912 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6913 "Missing '}' at end of file");
6915 know (md
.num_slots_in_use
< NUM_SLOTS
);
6917 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6918 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6920 number_to_chars_littleendian (f
+ 0, t0
, 8);
6921 number_to_chars_littleendian (f
+ 8, t1
, 8);
6925 unwind
.list
->next_slot_number
= (unsigned long) f
+ 16;
6926 unwind
.list
->next_slot_frag
= frag_now
;
6931 md_parse_option (c
, arg
)
6938 /* Switches from the Intel assembler. */
6940 if (strcmp (arg
, "ilp64") == 0
6941 || strcmp (arg
, "lp64") == 0
6942 || strcmp (arg
, "p64") == 0)
6944 md
.flags
|= EF_IA_64_ABI64
;
6946 else if (strcmp (arg
, "ilp32") == 0)
6948 md
.flags
&= ~EF_IA_64_ABI64
;
6950 else if (strcmp (arg
, "le") == 0)
6952 md
.flags
&= ~EF_IA_64_BE
;
6953 default_big_endian
= 0;
6955 else if (strcmp (arg
, "be") == 0)
6957 md
.flags
|= EF_IA_64_BE
;
6958 default_big_endian
= 1;
6960 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6963 if (strcmp (arg
, "warning") == 0)
6964 md
.unwind_check
= unwind_check_warning
;
6965 else if (strcmp (arg
, "error") == 0)
6966 md
.unwind_check
= unwind_check_error
;
6970 else if (strncmp (arg
, "hint.b=", 7) == 0)
6973 if (strcmp (arg
, "ok") == 0)
6974 md
.hint_b
= hint_b_ok
;
6975 else if (strcmp (arg
, "warning") == 0)
6976 md
.hint_b
= hint_b_warning
;
6977 else if (strcmp (arg
, "error") == 0)
6978 md
.hint_b
= hint_b_error
;
6982 else if (strncmp (arg
, "tune=", 5) == 0)
6985 if (strcmp (arg
, "itanium1") == 0)
6987 else if (strcmp (arg
, "itanium2") == 0)
6997 if (strcmp (arg
, "so") == 0)
6999 /* Suppress signon message. */
7001 else if (strcmp (arg
, "pi") == 0)
7003 /* Reject privileged instructions. FIXME */
7005 else if (strcmp (arg
, "us") == 0)
7007 /* Allow union of signed and unsigned range. FIXME */
7009 else if (strcmp (arg
, "close_fcalls") == 0)
7011 /* Do not resolve global function calls. */
7018 /* temp[="prefix"] Insert temporary labels into the object file
7019 symbol table prefixed by "prefix".
7020 Default prefix is ":temp:".
7025 /* indirect=<tgt> Assume unannotated indirect branches behavior
7026 according to <tgt> --
7027 exit: branch out from the current context (default)
7028 labels: all labels in context may be branch targets
7030 if (strncmp (arg
, "indirect=", 9) != 0)
7035 /* -X conflicts with an ignored option, use -x instead */
7037 if (!arg
|| strcmp (arg
, "explicit") == 0)
7039 /* set default mode to explicit */
7040 md
.default_explicit_mode
= 1;
7043 else if (strcmp (arg
, "auto") == 0)
7045 md
.default_explicit_mode
= 0;
7047 else if (strcmp (arg
, "none") == 0)
7051 else if (strcmp (arg
, "debug") == 0)
7055 else if (strcmp (arg
, "debugx") == 0)
7057 md
.default_explicit_mode
= 1;
7060 else if (strcmp (arg
, "debugn") == 0)
7067 as_bad (_("Unrecognized option '-x%s'"), arg
);
7072 /* nops Print nops statistics. */
7075 /* GNU specific switches for gcc. */
7076 case OPTION_MCONSTANT_GP
:
7077 md
.flags
|= EF_IA_64_CONS_GP
;
7080 case OPTION_MAUTO_PIC
:
7081 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7092 md_show_usage (stream
)
7097 --mconstant-gp mark output file as using the constant-GP model\n\
7098 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7099 --mauto-pic mark output file as using the constant-GP model\n\
7100 without function descriptors (sets ELF header flag\n\
7101 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7102 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7103 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7104 -mtune=[itanium1|itanium2]\n\
7105 tune for a specific CPU (default -mtune=itanium2)\n\
7106 -munwind-check=[warning|error]\n\
7107 unwind directive check (default -munwind-check=warning)\n\
7108 -mhint.b=[ok|warning|error]\n\
7109 hint.b check (default -mhint.b=error)\n\
7110 -x | -xexplicit turn on dependency violation checking\n\
7111 -xauto automagically remove dependency violations (default)\n\
7112 -xnone turn off dependency violation checking\n\
7113 -xdebug debug dependency violation checker\n\
7114 -xdebugn debug dependency violation checker but turn off\n\
7115 dependency violation checking\n\
7116 -xdebugx debug dependency violation checker and turn on\n\
7117 dependency violation checking\n"),
7122 ia64_after_parse_args ()
7124 if (debug_type
== DEBUG_STABS
)
7125 as_fatal (_("--gstabs is not supported for ia64"));
7128 /* Return true if TYPE fits in TEMPL at SLOT. */
7131 match (int templ
, int type
, int slot
)
7133 enum ia64_unit unit
;
7136 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7139 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7141 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7143 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7144 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7145 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7146 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7147 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7148 default: result
= 0; break;
7153 /* Add a bit of extra goodness if a nop of type F or B would fit
7154 in TEMPL at SLOT. */
7157 extra_goodness (int templ
, int slot
)
7162 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7164 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7170 if (match (templ
, IA64_TYPE_M
, slot
)
7171 || match (templ
, IA64_TYPE_I
, slot
))
7172 /* Favor M- and I-unit NOPs. We definitely want to avoid
7173 F-unit and B-unit may cause split-issue or less-than-optimal
7174 branch-prediction. */
7185 /* This function is called once, at assembler startup time. It sets
7186 up all the tables, etc. that the MD part of the assembler will need
7187 that can be determined before arguments are parsed. */
7191 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7196 md
.explicit_mode
= md
.default_explicit_mode
;
7198 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7200 /* Make sure function pointers get initialized. */
7201 target_big_endian
= -1;
7202 dot_byteorder (default_big_endian
);
7204 alias_hash
= hash_new ();
7205 alias_name_hash
= hash_new ();
7206 secalias_hash
= hash_new ();
7207 secalias_name_hash
= hash_new ();
7209 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7210 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7211 &zero_address_frag
);
7213 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7214 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7215 &zero_address_frag
);
7217 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7218 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7219 &zero_address_frag
);
7221 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7222 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7223 &zero_address_frag
);
7225 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7226 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7227 &zero_address_frag
);
7229 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7230 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7231 &zero_address_frag
);
7233 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7234 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7235 &zero_address_frag
);
7237 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7238 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7239 &zero_address_frag
);
7241 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7242 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7243 &zero_address_frag
);
7245 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7246 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7250 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7254 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7258 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7262 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7266 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7267 &zero_address_frag
);
7269 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7270 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7271 &zero_address_frag
);
7273 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7274 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7275 &zero_address_frag
);
7277 if (md
.tune
!= itanium1
)
7279 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7281 le_nop_stop
[0] = 0x9;
7284 /* Compute the table of best templates. We compute goodness as a
7285 base 4 value, in which each match counts for 3. Match-failures
7286 result in NOPs and we use extra_goodness() to pick the execution
7287 units that are best suited for issuing the NOP. */
7288 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7289 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7290 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7293 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7296 if (match (t
, i
, 0))
7298 if (match (t
, j
, 1))
7300 if (match (t
, k
, 2))
7301 goodness
= 3 + 3 + 3;
7303 goodness
= 3 + 3 + extra_goodness (t
, 2);
7305 else if (match (t
, j
, 2))
7306 goodness
= 3 + 3 + extra_goodness (t
, 1);
7310 goodness
+= extra_goodness (t
, 1);
7311 goodness
+= extra_goodness (t
, 2);
7314 else if (match (t
, i
, 1))
7316 if (match (t
, j
, 2))
7319 goodness
= 3 + extra_goodness (t
, 2);
7321 else if (match (t
, i
, 2))
7322 goodness
= 3 + extra_goodness (t
, 1);
7324 if (goodness
> best
)
7327 best_template
[i
][j
][k
] = t
;
7332 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7333 md
.slot
[i
].user_template
= -1;
7335 md
.pseudo_hash
= hash_new ();
7336 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7338 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7339 (void *) (pseudo_opcode
+ i
));
7341 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7342 pseudo_opcode
[i
].name
, err
);
7345 md
.reg_hash
= hash_new ();
7346 md
.dynreg_hash
= hash_new ();
7347 md
.const_hash
= hash_new ();
7348 md
.entry_hash
= hash_new ();
7350 /* general registers: */
7353 for (i
= 0; i
< total
; ++i
)
7355 sprintf (name
, "r%d", i
- REG_GR
);
7356 md
.regsym
[i
] = declare_register (name
, i
);
7359 /* floating point registers: */
7361 for (; i
< total
; ++i
)
7363 sprintf (name
, "f%d", i
- REG_FR
);
7364 md
.regsym
[i
] = declare_register (name
, i
);
7367 /* application registers: */
7370 for (; i
< total
; ++i
)
7372 sprintf (name
, "ar%d", i
- REG_AR
);
7373 md
.regsym
[i
] = declare_register (name
, i
);
7376 /* control registers: */
7379 for (; i
< total
; ++i
)
7381 sprintf (name
, "cr%d", i
- REG_CR
);
7382 md
.regsym
[i
] = declare_register (name
, i
);
7385 /* predicate registers: */
7387 for (; i
< total
; ++i
)
7389 sprintf (name
, "p%d", i
- REG_P
);
7390 md
.regsym
[i
] = declare_register (name
, i
);
7393 /* branch registers: */
7395 for (; i
< total
; ++i
)
7397 sprintf (name
, "b%d", i
- REG_BR
);
7398 md
.regsym
[i
] = declare_register (name
, i
);
7401 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7402 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7403 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7404 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7405 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7406 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7407 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7409 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7411 regnum
= indirect_reg
[i
].regnum
;
7412 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7415 /* define synonyms for application registers: */
7416 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7417 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7418 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7420 /* define synonyms for control registers: */
7421 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7422 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7423 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7425 declare_register ("gp", REG_GR
+ 1);
7426 declare_register ("sp", REG_GR
+ 12);
7427 declare_register ("rp", REG_BR
+ 0);
7429 /* pseudo-registers used to specify unwind info: */
7430 declare_register ("psp", REG_PSP
);
7432 declare_register_set ("ret", 4, REG_GR
+ 8);
7433 declare_register_set ("farg", 8, REG_FR
+ 8);
7434 declare_register_set ("fret", 8, REG_FR
+ 8);
7436 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7438 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7439 (PTR
) (const_bits
+ i
));
7441 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7445 /* Set the architecture and machine depending on defaults and command line
7447 if (md
.flags
& EF_IA_64_ABI64
)
7448 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7450 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7453 as_warn (_("Could not set architecture and machine"));
7455 /* Set the pointer size and pointer shift size depending on md.flags */
7457 if (md
.flags
& EF_IA_64_ABI64
)
7459 md
.pointer_size
= 8; /* pointers are 8 bytes */
7460 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7464 md
.pointer_size
= 4; /* pointers are 4 bytes */
7465 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7468 md
.mem_offset
.hint
= 0;
7471 md
.entry_labels
= NULL
;
7474 /* Set the default options in md. Cannot do this in md_begin because
7475 that is called after md_parse_option which is where we set the
7476 options in md based on command line options. */
7479 ia64_init (argc
, argv
)
7480 int argc ATTRIBUTE_UNUSED
;
7481 char **argv ATTRIBUTE_UNUSED
;
7483 md
.flags
= MD_FLAGS_DEFAULT
;
7485 /* FIXME: We should change it to unwind_check_error someday. */
7486 md
.unwind_check
= unwind_check_warning
;
7487 md
.hint_b
= hint_b_error
;
7491 /* Return a string for the target object file format. */
7494 ia64_target_format ()
7496 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7498 if (md
.flags
& EF_IA_64_BE
)
7500 if (md
.flags
& EF_IA_64_ABI64
)
7501 #if defined(TE_AIX50)
7502 return "elf64-ia64-aix-big";
7503 #elif defined(TE_HPUX)
7504 return "elf64-ia64-hpux-big";
7506 return "elf64-ia64-big";
7509 #if defined(TE_AIX50)
7510 return "elf32-ia64-aix-big";
7511 #elif defined(TE_HPUX)
7512 return "elf32-ia64-hpux-big";
7514 return "elf32-ia64-big";
7519 if (md
.flags
& EF_IA_64_ABI64
)
7521 return "elf64-ia64-aix-little";
7523 return "elf64-ia64-little";
7527 return "elf32-ia64-aix-little";
7529 return "elf32-ia64-little";
7534 return "unknown-format";
7538 ia64_end_of_source ()
7540 /* terminate insn group upon reaching end of file: */
7541 insn_group_break (1, 0, 0);
7543 /* emits slots we haven't written yet: */
7544 ia64_flush_insns ();
7546 bfd_set_private_flags (stdoutput
, md
.flags
);
7548 md
.mem_offset
.hint
= 0;
7554 if (md
.qp
.X_op
== O_register
)
7555 as_bad ("qualifying predicate not followed by instruction");
7556 md
.qp
.X_op
= O_absent
;
7558 if (ignore_input ())
7561 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7563 if (md
.detect_dv
&& !md
.explicit_mode
)
7570 as_warn (_("Explicit stops are ignored in auto mode"));
7574 insn_group_break (1, 0, 0);
7578 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7580 static int defining_tag
= 0;
7583 ia64_unrecognized_line (ch
)
7589 expression (&md
.qp
);
7590 if (*input_line_pointer
++ != ')')
7592 as_bad ("Expected ')'");
7595 if (md
.qp
.X_op
!= O_register
)
7597 as_bad ("Qualifying predicate expected");
7600 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7602 as_bad ("Predicate register expected");
7608 if (md
.manual_bundling
)
7609 as_warn ("Found '{' when manual bundling is already turned on");
7611 CURR_SLOT
.manual_bundling_on
= 1;
7612 md
.manual_bundling
= 1;
7614 /* Bundling is only acceptable in explicit mode
7615 or when in default automatic mode. */
7616 if (md
.detect_dv
&& !md
.explicit_mode
)
7618 if (!md
.mode_explicitly_set
7619 && !md
.default_explicit_mode
)
7622 as_warn (_("Found '{' after explicit switch to automatic mode"));
7627 if (!md
.manual_bundling
)
7628 as_warn ("Found '}' when manual bundling is off");
7630 PREV_SLOT
.manual_bundling_off
= 1;
7631 md
.manual_bundling
= 0;
7633 /* switch back to automatic mode, if applicable */
7636 && !md
.mode_explicitly_set
7637 && !md
.default_explicit_mode
)
7640 /* Allow '{' to follow on the same line. We also allow ";;", but that
7641 happens automatically because ';' is an end of line marker. */
7643 if (input_line_pointer
[0] == '{')
7645 input_line_pointer
++;
7646 return ia64_unrecognized_line ('{');
7649 demand_empty_rest_of_line ();
7659 if (md
.qp
.X_op
== O_register
)
7661 as_bad ("Tag must come before qualifying predicate.");
7665 /* This implements just enough of read_a_source_file in read.c to
7666 recognize labels. */
7667 if (is_name_beginner (*input_line_pointer
))
7669 s
= input_line_pointer
;
7670 c
= get_symbol_end ();
7672 else if (LOCAL_LABELS_FB
7673 && ISDIGIT (*input_line_pointer
))
7676 while (ISDIGIT (*input_line_pointer
))
7677 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7678 fb_label_instance_inc (temp
);
7679 s
= fb_label_name (temp
, 0);
7680 c
= *input_line_pointer
;
7689 /* Put ':' back for error messages' sake. */
7690 *input_line_pointer
++ = ':';
7691 as_bad ("Expected ':'");
7698 /* Put ':' back for error messages' sake. */
7699 *input_line_pointer
++ = ':';
7700 if (*input_line_pointer
++ != ']')
7702 as_bad ("Expected ']'");
7707 as_bad ("Tag name expected");
7717 /* Not a valid line. */
7722 ia64_frob_label (sym
)
7725 struct label_fix
*fix
;
7727 /* Tags need special handling since they are not bundle breaks like
7731 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7733 fix
->next
= CURR_SLOT
.tag_fixups
;
7734 CURR_SLOT
.tag_fixups
= fix
;
7739 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7741 md
.last_text_seg
= now_seg
;
7742 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7744 fix
->next
= CURR_SLOT
.label_fixups
;
7745 CURR_SLOT
.label_fixups
= fix
;
7747 /* Keep track of how many code entry points we've seen. */
7748 if (md
.path
== md
.maxpaths
)
7751 md
.entry_labels
= (const char **)
7752 xrealloc ((void *) md
.entry_labels
,
7753 md
.maxpaths
* sizeof (char *));
7755 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7760 /* The HP-UX linker will give unresolved symbol errors for symbols
7761 that are declared but unused. This routine removes declared,
7762 unused symbols from an object. */
7764 ia64_frob_symbol (sym
)
7767 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7768 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7769 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7770 && ! S_IS_EXTERNAL (sym
)))
7777 ia64_flush_pending_output ()
7779 if (!md
.keep_pending_output
7780 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7782 /* ??? This causes many unnecessary stop bits to be emitted.
7783 Unfortunately, it isn't clear if it is safe to remove this. */
7784 insn_group_break (1, 0, 0);
7785 ia64_flush_insns ();
7789 /* Do ia64-specific expression optimization. All that's done here is
7790 to transform index expressions that are either due to the indexing
7791 of rotating registers or due to the indexing of indirect register
7794 ia64_optimize_expr (l
, op
, r
)
7803 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7805 num_regs
= (l
->X_add_number
>> 16);
7806 if ((unsigned) r
->X_add_number
>= num_regs
)
7809 as_bad ("No current frame");
7811 as_bad ("Index out of range 0..%u", num_regs
- 1);
7812 r
->X_add_number
= 0;
7814 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7817 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7819 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7820 || l
->X_add_number
== IND_MEM
)
7822 as_bad ("Indirect register set name expected");
7823 l
->X_add_number
= IND_CPUID
;
7826 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7827 l
->X_add_number
= r
->X_add_number
;
7835 ia64_parse_name (name
, e
, nextcharP
)
7840 struct const_desc
*cdesc
;
7841 struct dynreg
*dr
= 0;
7848 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7850 /* Find what relocation pseudo-function we're dealing with. */
7851 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7852 if (pseudo_func
[idx
].name
7853 && pseudo_func
[idx
].name
[0] == name
[1]
7854 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7856 pseudo_type
= pseudo_func
[idx
].type
;
7859 switch (pseudo_type
)
7861 case PSEUDO_FUNC_RELOC
:
7862 end
= input_line_pointer
;
7863 if (*nextcharP
!= '(')
7865 as_bad ("Expected '('");
7869 ++input_line_pointer
;
7871 if (*input_line_pointer
!= ')')
7873 as_bad ("Missing ')'");
7877 ++input_line_pointer
;
7878 if (e
->X_op
!= O_symbol
)
7880 if (e
->X_op
!= O_pseudo_fixup
)
7882 as_bad ("Not a symbolic expression");
7885 if (idx
!= FUNC_LT_RELATIVE
)
7887 as_bad ("Illegal combination of relocation functions");
7890 switch (S_GET_VALUE (e
->X_op_symbol
))
7892 case FUNC_FPTR_RELATIVE
:
7893 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7894 case FUNC_DTP_MODULE
:
7895 idx
= FUNC_LT_DTP_MODULE
; break;
7896 case FUNC_DTP_RELATIVE
:
7897 idx
= FUNC_LT_DTP_RELATIVE
; break;
7898 case FUNC_TP_RELATIVE
:
7899 idx
= FUNC_LT_TP_RELATIVE
; break;
7901 as_bad ("Illegal combination of relocation functions");
7905 /* Make sure gas doesn't get rid of local symbols that are used
7907 e
->X_op
= O_pseudo_fixup
;
7908 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7910 *nextcharP
= *input_line_pointer
;
7913 case PSEUDO_FUNC_CONST
:
7914 e
->X_op
= O_constant
;
7915 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7918 case PSEUDO_FUNC_REG
:
7919 e
->X_op
= O_register
;
7920 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7929 /* first see if NAME is a known register name: */
7930 sym
= hash_find (md
.reg_hash
, name
);
7933 e
->X_op
= O_register
;
7934 e
->X_add_number
= S_GET_VALUE (sym
);
7938 cdesc
= hash_find (md
.const_hash
, name
);
7941 e
->X_op
= O_constant
;
7942 e
->X_add_number
= cdesc
->value
;
7946 /* check for inN, locN, or outN: */
7951 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7959 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7967 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7978 /* Ignore register numbers with leading zeroes, except zero itself. */
7979 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7981 unsigned long regnum
;
7983 /* The name is inN, locN, or outN; parse the register number. */
7984 regnum
= strtoul (name
+ idx
, &end
, 10);
7985 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7987 if (regnum
>= dr
->num_regs
)
7990 as_bad ("No current frame");
7992 as_bad ("Register number out of range 0..%u",
7996 e
->X_op
= O_register
;
7997 e
->X_add_number
= dr
->base
+ regnum
;
8002 end
= alloca (strlen (name
) + 1);
8004 name
= ia64_canonicalize_symbol_name (end
);
8005 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8007 /* We've got ourselves the name of a rotating register set.
8008 Store the base register number in the low 16 bits of
8009 X_add_number and the size of the register set in the top 16
8011 e
->X_op
= O_register
;
8012 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8018 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8021 ia64_canonicalize_symbol_name (name
)
8024 size_t len
= strlen (name
), full
= len
;
8026 while (len
> 0 && name
[len
- 1] == '#')
8031 as_bad ("Standalone `#' is illegal");
8033 as_bad ("Zero-length symbol is illegal");
8035 else if (len
< full
- 1)
8036 as_warn ("Redundant `#' suffix operators");
8041 /* Return true if idesc is a conditional branch instruction. This excludes
8042 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8043 because they always read/write resources regardless of the value of the
8044 qualifying predicate. br.ia must always use p0, and hence is always
8045 taken. Thus this function returns true for branches which can fall
8046 through, and which use no resources if they do fall through. */
8049 is_conditional_branch (idesc
)
8050 struct ia64_opcode
*idesc
;
8052 /* br is a conditional branch. Everything that starts with br. except
8053 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8054 Everything that starts with brl is a conditional branch. */
8055 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8056 && (idesc
->name
[2] == '\0'
8057 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8058 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8059 || idesc
->name
[2] == 'l'
8060 /* br.cond, br.call, br.clr */
8061 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8062 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8063 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8066 /* Return whether the given opcode is a taken branch. If there's any doubt,
8070 is_taken_branch (idesc
)
8071 struct ia64_opcode
*idesc
;
8073 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8074 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8077 /* Return whether the given opcode is an interruption or rfi. If there's any
8078 doubt, returns zero. */
8081 is_interruption_or_rfi (idesc
)
8082 struct ia64_opcode
*idesc
;
8084 if (strcmp (idesc
->name
, "rfi") == 0)
8089 /* Returns the index of the given dependency in the opcode's list of chks, or
8090 -1 if there is no dependency. */
8093 depends_on (depind
, idesc
)
8095 struct ia64_opcode
*idesc
;
8098 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8099 for (i
= 0; i
< dep
->nchks
; i
++)
8101 if (depind
== DEP (dep
->chks
[i
]))
8107 /* Determine a set of specific resources used for a particular resource
8108 class. Returns the number of specific resources identified For those
8109 cases which are not determinable statically, the resource returned is
8112 Meanings of value in 'NOTE':
8113 1) only read/write when the register number is explicitly encoded in the
8115 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8116 accesses CFM when qualifying predicate is in the rotating region.
8117 3) general register value is used to specify an indirect register; not
8118 determinable statically.
8119 4) only read the given resource when bits 7:0 of the indirect index
8120 register value does not match the register number of the resource; not
8121 determinable statically.
8122 5) all rules are implementation specific.
8123 6) only when both the index specified by the reader and the index specified
8124 by the writer have the same value in bits 63:61; not determinable
8126 7) only access the specified resource when the corresponding mask bit is
8128 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8129 only read when these insns reference FR2-31
8130 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8131 written when these insns write FR32-127
8132 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8134 11) The target predicates are written independently of PR[qp], but source
8135 registers are only read if PR[qp] is true. Since the state of PR[qp]
8136 cannot statically be determined, all source registers are marked used.
8137 12) This insn only reads the specified predicate register when that
8138 register is the PR[qp].
8139 13) This reference to ld-c only applies to teh GR whose value is loaded
8140 with data returned from memory, not the post-incremented address register.
8141 14) The RSE resource includes the implementation-specific RSE internal
8142 state resources. At least one (and possibly more) of these resources are
8143 read by each instruction listed in IC:rse-readers. At least one (and
8144 possibly more) of these resources are written by each insn listed in
8146 15+16) Represents reserved instructions, which the assembler does not
8149 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8150 this code; there are no dependency violations based on memory access.
8153 #define MAX_SPECS 256
8158 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8159 const struct ia64_dependency
*dep
;
8160 struct ia64_opcode
*idesc
;
8161 int type
; /* is this a DV chk or a DV reg? */
8162 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8163 int note
; /* resource note for this insn's usage */
8164 int path
; /* which execution path to examine */
8171 if (dep
->mode
== IA64_DV_WAW
8172 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8173 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8176 /* template for any resources we identify */
8177 tmpl
.dependency
= dep
;
8179 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8180 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8181 tmpl
.link_to_qp_branch
= 1;
8182 tmpl
.mem_offset
.hint
= 0;
8185 tmpl
.cmp_type
= CMP_NONE
;
8188 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8189 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8190 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8192 /* we don't need to track these */
8193 if (dep
->semantics
== IA64_DVS_NONE
)
8196 switch (dep
->specifier
)
8201 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8203 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8204 if (regno
>= 0 && regno
<= 7)
8206 specs
[count
] = tmpl
;
8207 specs
[count
++].index
= regno
;
8213 for (i
= 0; i
< 8; i
++)
8215 specs
[count
] = tmpl
;
8216 specs
[count
++].index
= i
;
8225 case IA64_RS_AR_UNAT
:
8226 /* This is a mov =AR or mov AR= instruction. */
8227 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8229 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8230 if (regno
== AR_UNAT
)
8232 specs
[count
++] = tmpl
;
8237 /* This is a spill/fill, or other instruction that modifies the
8240 /* Unless we can determine the specific bits used, mark the whole
8241 thing; bits 8:3 of the memory address indicate the bit used in
8242 UNAT. The .mem.offset hint may be used to eliminate a small
8243 subset of conflicts. */
8244 specs
[count
] = tmpl
;
8245 if (md
.mem_offset
.hint
)
8248 fprintf (stderr
, " Using hint for spill/fill\n");
8249 /* The index isn't actually used, just set it to something
8250 approximating the bit index. */
8251 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8252 specs
[count
].mem_offset
.hint
= 1;
8253 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8254 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8258 specs
[count
++].specific
= 0;
8266 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8268 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8269 if ((regno
>= 8 && regno
<= 15)
8270 || (regno
>= 20 && regno
<= 23)
8271 || (regno
>= 31 && regno
<= 39)
8272 || (regno
>= 41 && regno
<= 47)
8273 || (regno
>= 67 && regno
<= 111))
8275 specs
[count
] = tmpl
;
8276 specs
[count
++].index
= regno
;
8289 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8291 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8292 if ((regno
>= 48 && regno
<= 63)
8293 || (regno
>= 112 && regno
<= 127))
8295 specs
[count
] = tmpl
;
8296 specs
[count
++].index
= regno
;
8302 for (i
= 48; i
< 64; i
++)
8304 specs
[count
] = tmpl
;
8305 specs
[count
++].index
= i
;
8307 for (i
= 112; i
< 128; i
++)
8309 specs
[count
] = tmpl
;
8310 specs
[count
++].index
= i
;
8328 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8329 if (idesc
->operands
[i
] == IA64_OPND_B1
8330 || idesc
->operands
[i
] == IA64_OPND_B2
)
8332 specs
[count
] = tmpl
;
8333 specs
[count
++].index
=
8334 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8339 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8340 if (idesc
->operands
[i
] == IA64_OPND_B1
8341 || idesc
->operands
[i
] == IA64_OPND_B2
)
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
=
8345 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8351 case IA64_RS_CPUID
: /* four or more registers */
8354 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8356 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8357 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8360 specs
[count
] = tmpl
;
8361 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8365 specs
[count
] = tmpl
;
8366 specs
[count
++].specific
= 0;
8376 case IA64_RS_DBR
: /* four or more registers */
8379 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8381 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8382 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8385 specs
[count
] = tmpl
;
8386 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8390 specs
[count
] = tmpl
;
8391 specs
[count
++].specific
= 0;
8395 else if (note
== 0 && !rsrc_write
)
8397 specs
[count
] = tmpl
;
8398 specs
[count
++].specific
= 0;
8406 case IA64_RS_IBR
: /* four or more registers */
8409 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8411 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8412 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8415 specs
[count
] = tmpl
;
8416 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8420 specs
[count
] = tmpl
;
8421 specs
[count
++].specific
= 0;
8434 /* These are implementation specific. Force all references to
8435 conflict with all other references. */
8436 specs
[count
] = tmpl
;
8437 specs
[count
++].specific
= 0;
8445 case IA64_RS_PKR
: /* 16 or more registers */
8446 if (note
== 3 || note
== 4)
8448 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8450 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8451 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8456 specs
[count
] = tmpl
;
8457 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8460 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8462 /* Uses all registers *except* the one in R3. */
8463 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8465 specs
[count
] = tmpl
;
8466 specs
[count
++].index
= i
;
8472 specs
[count
] = tmpl
;
8473 specs
[count
++].specific
= 0;
8480 specs
[count
] = tmpl
;
8481 specs
[count
++].specific
= 0;
8485 case IA64_RS_PMC
: /* four or more registers */
8488 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8489 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8492 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8494 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8495 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8498 specs
[count
] = tmpl
;
8499 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8503 specs
[count
] = tmpl
;
8504 specs
[count
++].specific
= 0;
8514 case IA64_RS_PMD
: /* four or more registers */
8517 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8519 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8520 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8523 specs
[count
] = tmpl
;
8524 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8528 specs
[count
] = tmpl
;
8529 specs
[count
++].specific
= 0;
8539 case IA64_RS_RR
: /* eight registers */
8542 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8544 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8545 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8548 specs
[count
] = tmpl
;
8549 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8553 specs
[count
] = tmpl
;
8554 specs
[count
++].specific
= 0;
8558 else if (note
== 0 && !rsrc_write
)
8560 specs
[count
] = tmpl
;
8561 specs
[count
++].specific
= 0;
8569 case IA64_RS_CR_IRR
:
8572 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8573 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8575 && idesc
->operands
[1] == IA64_OPND_CR3
8578 for (i
= 0; i
< 4; i
++)
8580 specs
[count
] = tmpl
;
8581 specs
[count
++].index
= CR_IRR0
+ i
;
8587 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8588 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8590 && regno
<= CR_IRR3
)
8592 specs
[count
] = tmpl
;
8593 specs
[count
++].index
= regno
;
8602 case IA64_RS_CR_LRR
:
8609 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8610 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8611 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8613 specs
[count
] = tmpl
;
8614 specs
[count
++].index
= regno
;
8622 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8624 specs
[count
] = tmpl
;
8625 specs
[count
++].index
=
8626 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8641 else if (rsrc_write
)
8643 if (dep
->specifier
== IA64_RS_FRb
8644 && idesc
->operands
[0] == IA64_OPND_F1
)
8646 specs
[count
] = tmpl
;
8647 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8652 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8654 if (idesc
->operands
[i
] == IA64_OPND_F2
8655 || idesc
->operands
[i
] == IA64_OPND_F3
8656 || idesc
->operands
[i
] == IA64_OPND_F4
)
8658 specs
[count
] = tmpl
;
8659 specs
[count
++].index
=
8660 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8669 /* This reference applies only to the GR whose value is loaded with
8670 data returned from memory. */
8671 specs
[count
] = tmpl
;
8672 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8678 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8679 if (idesc
->operands
[i
] == IA64_OPND_R1
8680 || idesc
->operands
[i
] == IA64_OPND_R2
8681 || idesc
->operands
[i
] == IA64_OPND_R3
)
8683 specs
[count
] = tmpl
;
8684 specs
[count
++].index
=
8685 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8687 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8688 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8689 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8691 specs
[count
] = tmpl
;
8692 specs
[count
++].index
=
8693 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8698 /* Look for anything that reads a GR. */
8699 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8701 if (idesc
->operands
[i
] == IA64_OPND_MR3
8702 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8703 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8704 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8705 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8706 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8707 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8708 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8709 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8710 || ((i
>= idesc
->num_outputs
)
8711 && (idesc
->operands
[i
] == IA64_OPND_R1
8712 || idesc
->operands
[i
] == IA64_OPND_R2
8713 || idesc
->operands
[i
] == IA64_OPND_R3
8714 /* addl source register. */
8715 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8717 specs
[count
] = tmpl
;
8718 specs
[count
++].index
=
8719 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8730 /* This is the same as IA64_RS_PRr, except that the register range is
8731 from 1 - 15, and there are no rotating register reads/writes here. */
8735 for (i
= 1; i
< 16; i
++)
8737 specs
[count
] = tmpl
;
8738 specs
[count
++].index
= i
;
8744 /* Mark only those registers indicated by the mask. */
8747 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8748 for (i
= 1; i
< 16; i
++)
8749 if (mask
& ((valueT
) 1 << i
))
8751 specs
[count
] = tmpl
;
8752 specs
[count
++].index
= i
;
8760 else if (note
== 11) /* note 11 implies note 1 as well */
8764 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8766 if (idesc
->operands
[i
] == IA64_OPND_P1
8767 || idesc
->operands
[i
] == IA64_OPND_P2
)
8769 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8770 if (regno
>= 1 && regno
< 16)
8772 specs
[count
] = tmpl
;
8773 specs
[count
++].index
= regno
;
8783 else if (note
== 12)
8785 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8787 specs
[count
] = tmpl
;
8788 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8795 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8796 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8797 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8798 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8800 if ((idesc
->operands
[0] == IA64_OPND_P1
8801 || idesc
->operands
[0] == IA64_OPND_P2
)
8802 && p1
>= 1 && p1
< 16)
8804 specs
[count
] = tmpl
;
8805 specs
[count
].cmp_type
=
8806 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8807 specs
[count
++].index
= p1
;
8809 if ((idesc
->operands
[1] == IA64_OPND_P1
8810 || idesc
->operands
[1] == IA64_OPND_P2
)
8811 && p2
>= 1 && p2
< 16)
8813 specs
[count
] = tmpl
;
8814 specs
[count
].cmp_type
=
8815 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8816 specs
[count
++].index
= p2
;
8821 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8823 specs
[count
] = tmpl
;
8824 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8826 if (idesc
->operands
[1] == IA64_OPND_PR
)
8828 for (i
= 1; i
< 16; i
++)
8830 specs
[count
] = tmpl
;
8831 specs
[count
++].index
= i
;
8842 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8843 simplified cases of this. */
8847 for (i
= 16; i
< 63; i
++)
8849 specs
[count
] = tmpl
;
8850 specs
[count
++].index
= i
;
8856 /* Mark only those registers indicated by the mask. */
8858 && idesc
->operands
[0] == IA64_OPND_PR
)
8860 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8861 if (mask
& ((valueT
) 1 << 16))
8862 for (i
= 16; i
< 63; i
++)
8864 specs
[count
] = tmpl
;
8865 specs
[count
++].index
= i
;
8869 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8871 for (i
= 16; i
< 63; i
++)
8873 specs
[count
] = tmpl
;
8874 specs
[count
++].index
= i
;
8882 else if (note
== 11) /* note 11 implies note 1 as well */
8886 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8888 if (idesc
->operands
[i
] == IA64_OPND_P1
8889 || idesc
->operands
[i
] == IA64_OPND_P2
)
8891 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8892 if (regno
>= 16 && regno
< 63)
8894 specs
[count
] = tmpl
;
8895 specs
[count
++].index
= regno
;
8905 else if (note
== 12)
8907 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8909 specs
[count
] = tmpl
;
8910 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8917 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8918 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8919 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8920 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8922 if ((idesc
->operands
[0] == IA64_OPND_P1
8923 || idesc
->operands
[0] == IA64_OPND_P2
)
8924 && p1
>= 16 && p1
< 63)
8926 specs
[count
] = tmpl
;
8927 specs
[count
].cmp_type
=
8928 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8929 specs
[count
++].index
= p1
;
8931 if ((idesc
->operands
[1] == IA64_OPND_P1
8932 || idesc
->operands
[1] == IA64_OPND_P2
)
8933 && p2
>= 16 && p2
< 63)
8935 specs
[count
] = tmpl
;
8936 specs
[count
].cmp_type
=
8937 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8938 specs
[count
++].index
= p2
;
8943 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8945 specs
[count
] = tmpl
;
8946 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8948 if (idesc
->operands
[1] == IA64_OPND_PR
)
8950 for (i
= 16; i
< 63; i
++)
8952 specs
[count
] = tmpl
;
8953 specs
[count
++].index
= i
;
8965 /* Verify that the instruction is using the PSR bit indicated in
8969 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8971 if (dep
->regindex
< 6)
8973 specs
[count
++] = tmpl
;
8976 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8978 if (dep
->regindex
< 32
8979 || dep
->regindex
== 35
8980 || dep
->regindex
== 36
8981 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8983 specs
[count
++] = tmpl
;
8986 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8988 if (dep
->regindex
< 32
8989 || dep
->regindex
== 35
8990 || dep
->regindex
== 36
8991 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
8993 specs
[count
++] = tmpl
;
8998 /* Several PSR bits have very specific dependencies. */
8999 switch (dep
->regindex
)
9002 specs
[count
++] = tmpl
;
9007 specs
[count
++] = tmpl
;
9011 /* Only certain CR accesses use PSR.ic */
9012 if (idesc
->operands
[0] == IA64_OPND_CR3
9013 || idesc
->operands
[1] == IA64_OPND_CR3
)
9016 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9019 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9034 specs
[count
++] = tmpl
;
9043 specs
[count
++] = tmpl
;
9047 /* Only some AR accesses use cpl */
9048 if (idesc
->operands
[0] == IA64_OPND_AR3
9049 || idesc
->operands
[1] == IA64_OPND_AR3
)
9052 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9055 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9062 && regno
<= AR_K7
))))
9064 specs
[count
++] = tmpl
;
9069 specs
[count
++] = tmpl
;
9079 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9081 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9087 if (mask
& ((valueT
) 1 << dep
->regindex
))
9089 specs
[count
++] = tmpl
;
9094 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9095 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9096 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9097 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9099 if (idesc
->operands
[i
] == IA64_OPND_F1
9100 || idesc
->operands
[i
] == IA64_OPND_F2
9101 || idesc
->operands
[i
] == IA64_OPND_F3
9102 || idesc
->operands
[i
] == IA64_OPND_F4
)
9104 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9105 if (reg
>= min
&& reg
<= max
)
9107 specs
[count
++] = tmpl
;
9114 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9115 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9116 /* mfh is read on writes to FR32-127; mfl is read on writes to
9118 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9120 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9122 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9123 if (reg
>= min
&& reg
<= max
)
9125 specs
[count
++] = tmpl
;
9130 else if (note
== 10)
9132 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9134 if (idesc
->operands
[i
] == IA64_OPND_R1
9135 || idesc
->operands
[i
] == IA64_OPND_R2
9136 || idesc
->operands
[i
] == IA64_OPND_R3
)
9138 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9139 if (regno
>= 16 && regno
<= 31)
9141 specs
[count
++] = tmpl
;
9152 case IA64_RS_AR_FPSR
:
9153 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9155 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9156 if (regno
== AR_FPSR
)
9158 specs
[count
++] = tmpl
;
9163 specs
[count
++] = tmpl
;
9168 /* Handle all AR[REG] resources */
9169 if (note
== 0 || note
== 1)
9171 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9172 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9173 && regno
== dep
->regindex
)
9175 specs
[count
++] = tmpl
;
9177 /* other AR[REG] resources may be affected by AR accesses */
9178 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9181 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9182 switch (dep
->regindex
)
9188 if (regno
== AR_BSPSTORE
)
9190 specs
[count
++] = tmpl
;
9194 (regno
== AR_BSPSTORE
9195 || regno
== AR_RNAT
))
9197 specs
[count
++] = tmpl
;
9202 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9205 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9206 switch (dep
->regindex
)
9211 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9213 specs
[count
++] = tmpl
;
9220 specs
[count
++] = tmpl
;
9230 /* Handle all CR[REG] resources */
9231 if (note
== 0 || note
== 1)
9233 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9235 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9236 if (regno
== dep
->regindex
)
9238 specs
[count
++] = tmpl
;
9240 else if (!rsrc_write
)
9242 /* Reads from CR[IVR] affect other resources. */
9243 if (regno
== CR_IVR
)
9245 if ((dep
->regindex
>= CR_IRR0
9246 && dep
->regindex
<= CR_IRR3
)
9247 || dep
->regindex
== CR_TPR
)
9249 specs
[count
++] = tmpl
;
9256 specs
[count
++] = tmpl
;
9265 case IA64_RS_INSERVICE
:
9266 /* look for write of EOI (67) or read of IVR (65) */
9267 if ((idesc
->operands
[0] == IA64_OPND_CR3
9268 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9269 || (idesc
->operands
[1] == IA64_OPND_CR3
9270 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9272 specs
[count
++] = tmpl
;
9279 specs
[count
++] = tmpl
;
9290 specs
[count
++] = tmpl
;
9294 /* Check if any of the registers accessed are in the rotating region.
9295 mov to/from pr accesses CFM only when qp_regno is in the rotating
9297 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9299 if (idesc
->operands
[i
] == IA64_OPND_R1
9300 || idesc
->operands
[i
] == IA64_OPND_R2
9301 || idesc
->operands
[i
] == IA64_OPND_R3
)
9303 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9304 /* Assumes that md.rot.num_regs is always valid */
9305 if (md
.rot
.num_regs
> 0
9307 && num
< 31 + md
.rot
.num_regs
)
9309 specs
[count
] = tmpl
;
9310 specs
[count
++].specific
= 0;
9313 else if (idesc
->operands
[i
] == IA64_OPND_F1
9314 || idesc
->operands
[i
] == IA64_OPND_F2
9315 || idesc
->operands
[i
] == IA64_OPND_F3
9316 || idesc
->operands
[i
] == IA64_OPND_F4
)
9318 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9321 specs
[count
] = tmpl
;
9322 specs
[count
++].specific
= 0;
9325 else if (idesc
->operands
[i
] == IA64_OPND_P1
9326 || idesc
->operands
[i
] == IA64_OPND_P2
)
9328 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9331 specs
[count
] = tmpl
;
9332 specs
[count
++].specific
= 0;
9336 if (CURR_SLOT
.qp_regno
> 15)
9338 specs
[count
] = tmpl
;
9339 specs
[count
++].specific
= 0;
9344 /* This is the same as IA64_RS_PRr, except simplified to account for
9345 the fact that there is only one register. */
9349 specs
[count
++] = tmpl
;
9354 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9355 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9356 if (mask
& ((valueT
) 1 << 63))
9357 specs
[count
++] = tmpl
;
9359 else if (note
== 11)
9361 if ((idesc
->operands
[0] == IA64_OPND_P1
9362 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9363 || (idesc
->operands
[1] == IA64_OPND_P2
9364 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9366 specs
[count
++] = tmpl
;
9369 else if (note
== 12)
9371 if (CURR_SLOT
.qp_regno
== 63)
9373 specs
[count
++] = tmpl
;
9380 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9381 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9382 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9383 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9386 && (idesc
->operands
[0] == IA64_OPND_P1
9387 || idesc
->operands
[0] == IA64_OPND_P2
))
9389 specs
[count
] = tmpl
;
9390 specs
[count
++].cmp_type
=
9391 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9394 && (idesc
->operands
[1] == IA64_OPND_P1
9395 || idesc
->operands
[1] == IA64_OPND_P2
))
9397 specs
[count
] = tmpl
;
9398 specs
[count
++].cmp_type
=
9399 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9404 if (CURR_SLOT
.qp_regno
== 63)
9406 specs
[count
++] = tmpl
;
9417 /* FIXME we can identify some individual RSE written resources, but RSE
9418 read resources have not yet been completely identified, so for now
9419 treat RSE as a single resource */
9420 if (strncmp (idesc
->name
, "mov", 3) == 0)
9424 if (idesc
->operands
[0] == IA64_OPND_AR3
9425 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9427 specs
[count
++] = tmpl
;
9432 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9434 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9435 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9437 specs
[count
++] = tmpl
;
9440 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9442 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9443 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9444 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9446 specs
[count
++] = tmpl
;
9453 specs
[count
++] = tmpl
;
9458 /* FIXME -- do any of these need to be non-specific? */
9459 specs
[count
++] = tmpl
;
9463 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9470 /* Clear branch flags on marked resources. This breaks the link between the
9471 QP of the marking instruction and a subsequent branch on the same QP. */
9474 clear_qp_branch_flag (mask
)
9478 for (i
= 0; i
< regdepslen
; i
++)
9480 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9481 if ((bit
& mask
) != 0)
9483 regdeps
[i
].link_to_qp_branch
= 0;
9488 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9489 any mutexes which contain one of the PRs and create new ones when
9493 update_qp_mutex (valueT mask
)
9499 while (i
< qp_mutexeslen
)
9501 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9503 /* If it destroys and creates the same mutex, do nothing. */
9504 if (qp_mutexes
[i
].prmask
== mask
9505 && qp_mutexes
[i
].path
== md
.path
)
9516 fprintf (stderr
, " Clearing mutex relation");
9517 print_prmask (qp_mutexes
[i
].prmask
);
9518 fprintf (stderr
, "\n");
9521 /* Deal with the old mutex with more than 3+ PRs only if
9522 the new mutex on the same execution path with it.
9524 FIXME: The 3+ mutex support is incomplete.
9525 dot_pred_rel () may be a better place to fix it. */
9526 if (qp_mutexes
[i
].path
== md
.path
)
9528 /* If it is a proper subset of the mutex, create a
9531 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9534 qp_mutexes
[i
].prmask
&= ~mask
;
9535 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9537 /* Modify the mutex if there are more than one
9545 /* Remove the mutex. */
9546 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9554 add_qp_mutex (mask
);
9559 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9561 Any changes to a PR clears the mutex relations which include that PR. */
9564 clear_qp_mutex (mask
)
9570 while (i
< qp_mutexeslen
)
9572 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9576 fprintf (stderr
, " Clearing mutex relation");
9577 print_prmask (qp_mutexes
[i
].prmask
);
9578 fprintf (stderr
, "\n");
9580 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9587 /* Clear implies relations which contain PRs in the given masks.
9588 P1_MASK indicates the source of the implies relation, while P2_MASK
9589 indicates the implied PR. */
9592 clear_qp_implies (p1_mask
, p2_mask
)
9599 while (i
< qp_implieslen
)
9601 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9602 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9605 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9606 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9607 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9614 /* Add the PRs specified to the list of implied relations. */
9617 add_qp_imply (p1
, p2
)
9624 /* p0 is not meaningful here. */
9625 if (p1
== 0 || p2
== 0)
9631 /* If it exists already, ignore it. */
9632 for (i
= 0; i
< qp_implieslen
; i
++)
9634 if (qp_implies
[i
].p1
== p1
9635 && qp_implies
[i
].p2
== p2
9636 && qp_implies
[i
].path
== md
.path
9637 && !qp_implies
[i
].p2_branched
)
9641 if (qp_implieslen
== qp_impliestotlen
)
9643 qp_impliestotlen
+= 20;
9644 qp_implies
= (struct qp_imply
*)
9645 xrealloc ((void *) qp_implies
,
9646 qp_impliestotlen
* sizeof (struct qp_imply
));
9649 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9650 qp_implies
[qp_implieslen
].p1
= p1
;
9651 qp_implies
[qp_implieslen
].p2
= p2
;
9652 qp_implies
[qp_implieslen
].path
= md
.path
;
9653 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9655 /* Add in the implied transitive relations; for everything that p2 implies,
9656 make p1 imply that, too; for everything that implies p1, make it imply p2
9658 for (i
= 0; i
< qp_implieslen
; i
++)
9660 if (qp_implies
[i
].p1
== p2
)
9661 add_qp_imply (p1
, qp_implies
[i
].p2
);
9662 if (qp_implies
[i
].p2
== p1
)
9663 add_qp_imply (qp_implies
[i
].p1
, p2
);
9665 /* Add in mutex relations implied by this implies relation; for each mutex
9666 relation containing p2, duplicate it and replace p2 with p1. */
9667 bit
= (valueT
) 1 << p1
;
9668 mask
= (valueT
) 1 << p2
;
9669 for (i
= 0; i
< qp_mutexeslen
; i
++)
9671 if (qp_mutexes
[i
].prmask
& mask
)
9672 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9676 /* Add the PRs specified in the mask to the mutex list; this means that only
9677 one of the PRs can be true at any time. PR0 should never be included in
9687 if (qp_mutexeslen
== qp_mutexestotlen
)
9689 qp_mutexestotlen
+= 20;
9690 qp_mutexes
= (struct qpmutex
*)
9691 xrealloc ((void *) qp_mutexes
,
9692 qp_mutexestotlen
* sizeof (struct qpmutex
));
9696 fprintf (stderr
, " Registering mutex on");
9697 print_prmask (mask
);
9698 fprintf (stderr
, "\n");
9700 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9701 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9705 has_suffix_p (name
, suffix
)
9709 size_t namelen
= strlen (name
);
9710 size_t sufflen
= strlen (suffix
);
9712 if (namelen
<= sufflen
)
9714 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9718 clear_register_values ()
9722 fprintf (stderr
, " Clearing register values\n");
9723 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9724 gr_values
[i
].known
= 0;
9727 /* Keep track of register values/changes which affect DV tracking.
9729 optimization note: should add a flag to classes of insns where otherwise we
9730 have to examine a group of strings to identify them. */
9733 note_register_values (idesc
)
9734 struct ia64_opcode
*idesc
;
9736 valueT qp_changemask
= 0;
9739 /* Invalidate values for registers being written to. */
9740 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9742 if (idesc
->operands
[i
] == IA64_OPND_R1
9743 || idesc
->operands
[i
] == IA64_OPND_R2
9744 || idesc
->operands
[i
] == IA64_OPND_R3
)
9746 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9747 if (regno
> 0 && regno
< NELEMS (gr_values
))
9748 gr_values
[regno
].known
= 0;
9750 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9752 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9753 if (regno
> 0 && regno
< 4)
9754 gr_values
[regno
].known
= 0;
9756 else if (idesc
->operands
[i
] == IA64_OPND_P1
9757 || idesc
->operands
[i
] == IA64_OPND_P2
)
9759 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9760 qp_changemask
|= (valueT
) 1 << regno
;
9762 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9764 if (idesc
->operands
[2] & (valueT
) 0x10000)
9765 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9767 qp_changemask
= idesc
->operands
[2];
9770 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9772 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9773 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9775 qp_changemask
= idesc
->operands
[1];
9776 qp_changemask
&= ~(valueT
) 0xFFFF;
9781 /* Always clear qp branch flags on any PR change. */
9782 /* FIXME there may be exceptions for certain compares. */
9783 clear_qp_branch_flag (qp_changemask
);
9785 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9786 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9788 qp_changemask
|= ~(valueT
) 0xFFFF;
9789 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9791 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9792 gr_values
[i
].known
= 0;
9794 clear_qp_mutex (qp_changemask
);
9795 clear_qp_implies (qp_changemask
, qp_changemask
);
9797 /* After a call, all register values are undefined, except those marked
9799 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9800 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9802 /* FIXME keep GR values which are marked as "safe_across_calls" */
9803 clear_register_values ();
9804 clear_qp_mutex (~qp_safe_across_calls
);
9805 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9806 clear_qp_branch_flag (~qp_safe_across_calls
);
9808 else if (is_interruption_or_rfi (idesc
)
9809 || is_taken_branch (idesc
))
9811 clear_register_values ();
9812 clear_qp_mutex (~(valueT
) 0);
9813 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9815 /* Look for mutex and implies relations. */
9816 else if ((idesc
->operands
[0] == IA64_OPND_P1
9817 || idesc
->operands
[0] == IA64_OPND_P2
)
9818 && (idesc
->operands
[1] == IA64_OPND_P1
9819 || idesc
->operands
[1] == IA64_OPND_P2
))
9821 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9822 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9823 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9824 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9826 /* If both PRs are PR0, we can't really do anything. */
9827 if (p1
== 0 && p2
== 0)
9830 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9832 /* In general, clear mutexes and implies which include P1 or P2,
9833 with the following exceptions. */
9834 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9835 || has_suffix_p (idesc
->name
, ".and.orcm"))
9837 clear_qp_implies (p2mask
, p1mask
);
9839 else if (has_suffix_p (idesc
->name
, ".andcm")
9840 || has_suffix_p (idesc
->name
, ".and"))
9842 clear_qp_implies (0, p1mask
| p2mask
);
9844 else if (has_suffix_p (idesc
->name
, ".orcm")
9845 || has_suffix_p (idesc
->name
, ".or"))
9847 clear_qp_mutex (p1mask
| p2mask
);
9848 clear_qp_implies (p1mask
| p2mask
, 0);
9854 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9856 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9857 if (p1
== 0 || p2
== 0)
9858 clear_qp_mutex (p1mask
| p2mask
);
9860 added
= update_qp_mutex (p1mask
| p2mask
);
9862 if (CURR_SLOT
.qp_regno
== 0
9863 || has_suffix_p (idesc
->name
, ".unc"))
9865 if (added
== 0 && p1
&& p2
)
9866 add_qp_mutex (p1mask
| p2mask
);
9867 if (CURR_SLOT
.qp_regno
!= 0)
9870 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9872 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9877 /* Look for mov imm insns into GRs. */
9878 else if (idesc
->operands
[0] == IA64_OPND_R1
9879 && (idesc
->operands
[1] == IA64_OPND_IMM22
9880 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9881 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9882 && (strcmp (idesc
->name
, "mov") == 0
9883 || strcmp (idesc
->name
, "movl") == 0))
9885 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9886 if (regno
> 0 && regno
< NELEMS (gr_values
))
9888 gr_values
[regno
].known
= 1;
9889 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9890 gr_values
[regno
].path
= md
.path
;
9893 fprintf (stderr
, " Know gr%d = ", regno
);
9894 fprintf_vma (stderr
, gr_values
[regno
].value
);
9895 fputs ("\n", stderr
);
9899 /* Look for dep.z imm insns. */
9900 else if (idesc
->operands
[0] == IA64_OPND_R1
9901 && idesc
->operands
[1] == IA64_OPND_IMM8
9902 && strcmp (idesc
->name
, "dep.z") == 0)
9904 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9905 if (regno
> 0 && regno
< NELEMS (gr_values
))
9907 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9909 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9910 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9911 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9912 gr_values
[regno
].known
= 1;
9913 gr_values
[regno
].value
= value
;
9914 gr_values
[regno
].path
= md
.path
;
9917 fprintf (stderr
, " Know gr%d = ", regno
);
9918 fprintf_vma (stderr
, gr_values
[regno
].value
);
9919 fputs ("\n", stderr
);
9925 clear_qp_mutex (qp_changemask
);
9926 clear_qp_implies (qp_changemask
, qp_changemask
);
9930 /* Return whether the given predicate registers are currently mutex. */
9933 qp_mutex (p1
, p2
, path
)
9943 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9944 for (i
= 0; i
< qp_mutexeslen
; i
++)
9946 if (qp_mutexes
[i
].path
>= path
9947 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9954 /* Return whether the given resource is in the given insn's list of chks
9955 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9959 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9961 struct ia64_opcode
*idesc
;
9966 struct rsrc specs
[MAX_SPECS
];
9969 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9970 we don't need to check. One exception is note 11, which indicates that
9971 target predicates are written regardless of PR[qp]. */
9972 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9976 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9979 /* UNAT checking is a bit more specific than other resources */
9980 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9981 && specs
[count
].mem_offset
.hint
9982 && rs
->mem_offset
.hint
)
9984 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9986 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9987 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
9994 /* Skip apparent PR write conflicts where both writes are an AND or both
9995 writes are an OR. */
9996 if (rs
->dependency
->specifier
== IA64_RS_PR
9997 || rs
->dependency
->specifier
== IA64_RS_PRr
9998 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10000 if (specs
[count
].cmp_type
!= CMP_NONE
10001 && specs
[count
].cmp_type
== rs
->cmp_type
)
10004 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10005 dv_mode
[rs
->dependency
->mode
],
10006 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10007 specs
[count
].index
: 63);
10012 " %s on parallel compare conflict %s vs %s on PR%d\n",
10013 dv_mode
[rs
->dependency
->mode
],
10014 dv_cmp_type
[rs
->cmp_type
],
10015 dv_cmp_type
[specs
[count
].cmp_type
],
10016 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10017 specs
[count
].index
: 63);
10021 /* If either resource is not specific, conservatively assume a conflict
10023 if (!specs
[count
].specific
|| !rs
->specific
)
10025 else if (specs
[count
].index
== rs
->index
)
10032 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10033 insert a stop to create the break. Update all resource dependencies
10034 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10035 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10036 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10040 insn_group_break (insert_stop
, qp_regno
, save_current
)
10047 if (insert_stop
&& md
.num_slots_in_use
> 0)
10048 PREV_SLOT
.end_of_insn_group
= 1;
10052 fprintf (stderr
, " Insn group break%s",
10053 (insert_stop
? " (w/stop)" : ""));
10055 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10056 fprintf (stderr
, "\n");
10060 while (i
< regdepslen
)
10062 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10065 && regdeps
[i
].qp_regno
!= qp_regno
)
10072 && CURR_SLOT
.src_file
== regdeps
[i
].file
10073 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10079 /* clear dependencies which are automatically cleared by a stop, or
10080 those that have reached the appropriate state of insn serialization */
10081 if (dep
->semantics
== IA64_DVS_IMPLIED
10082 || dep
->semantics
== IA64_DVS_IMPLIEDF
10083 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10085 print_dependency ("Removing", i
);
10086 regdeps
[i
] = regdeps
[--regdepslen
];
10090 if (dep
->semantics
== IA64_DVS_DATA
10091 || dep
->semantics
== IA64_DVS_INSTR
10092 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10094 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10095 regdeps
[i
].insn_srlz
= STATE_STOP
;
10096 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10097 regdeps
[i
].data_srlz
= STATE_STOP
;
10104 /* Add the given resource usage spec to the list of active dependencies. */
10107 mark_resource (idesc
, dep
, spec
, depind
, path
)
10108 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10109 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10114 if (regdepslen
== regdepstotlen
)
10116 regdepstotlen
+= 20;
10117 regdeps
= (struct rsrc
*)
10118 xrealloc ((void *) regdeps
,
10119 regdepstotlen
* sizeof (struct rsrc
));
10122 regdeps
[regdepslen
] = *spec
;
10123 regdeps
[regdepslen
].depind
= depind
;
10124 regdeps
[regdepslen
].path
= path
;
10125 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10126 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10128 print_dependency ("Adding", regdepslen
);
10134 print_dependency (action
, depind
)
10135 const char *action
;
10140 fprintf (stderr
, " %s %s '%s'",
10141 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10142 (regdeps
[depind
].dependency
)->name
);
10143 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10144 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10145 if (regdeps
[depind
].mem_offset
.hint
)
10147 fputs (" ", stderr
);
10148 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10149 fputs ("+", stderr
);
10150 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10152 fprintf (stderr
, "\n");
10157 instruction_serialization ()
10161 fprintf (stderr
, " Instruction serialization\n");
10162 for (i
= 0; i
< regdepslen
; i
++)
10163 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10164 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10168 data_serialization ()
10172 fprintf (stderr
, " Data serialization\n");
10173 while (i
< regdepslen
)
10175 if (regdeps
[i
].data_srlz
== STATE_STOP
10176 /* Note: as of 991210, all "other" dependencies are cleared by a
10177 data serialization. This might change with new tables */
10178 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10180 print_dependency ("Removing", i
);
10181 regdeps
[i
] = regdeps
[--regdepslen
];
10188 /* Insert stops and serializations as needed to avoid DVs. */
10191 remove_marked_resource (rs
)
10194 switch (rs
->dependency
->semantics
)
10196 case IA64_DVS_SPECIFIC
:
10198 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10199 /* ...fall through... */
10200 case IA64_DVS_INSTR
:
10202 fprintf (stderr
, "Inserting instr serialization\n");
10203 if (rs
->insn_srlz
< STATE_STOP
)
10204 insn_group_break (1, 0, 0);
10205 if (rs
->insn_srlz
< STATE_SRLZ
)
10207 struct slot oldslot
= CURR_SLOT
;
10208 /* Manually jam a srlz.i insn into the stream */
10209 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10210 CURR_SLOT
.user_template
= -1;
10211 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10212 instruction_serialization ();
10213 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10214 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10215 emit_one_bundle ();
10216 CURR_SLOT
= oldslot
;
10218 insn_group_break (1, 0, 0);
10220 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10221 "other" types of DV are eliminated
10222 by a data serialization */
10223 case IA64_DVS_DATA
:
10225 fprintf (stderr
, "Inserting data serialization\n");
10226 if (rs
->data_srlz
< STATE_STOP
)
10227 insn_group_break (1, 0, 0);
10229 struct slot oldslot
= CURR_SLOT
;
10230 /* Manually jam a srlz.d insn into the stream */
10231 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10232 CURR_SLOT
.user_template
= -1;
10233 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10234 data_serialization ();
10235 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10236 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10237 emit_one_bundle ();
10238 CURR_SLOT
= oldslot
;
10241 case IA64_DVS_IMPLIED
:
10242 case IA64_DVS_IMPLIEDF
:
10244 fprintf (stderr
, "Inserting stop\n");
10245 insn_group_break (1, 0, 0);
10252 /* Check the resources used by the given opcode against the current dependency
10255 The check is run once for each execution path encountered. In this case,
10256 a unique execution path is the sequence of instructions following a code
10257 entry point, e.g. the following has three execution paths, one starting
10258 at L0, one at L1, and one at L2.
10267 check_dependencies (idesc
)
10268 struct ia64_opcode
*idesc
;
10270 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10274 /* Note that the number of marked resources may change within the
10275 loop if in auto mode. */
10277 while (i
< regdepslen
)
10279 struct rsrc
*rs
= ®deps
[i
];
10280 const struct ia64_dependency
*dep
= rs
->dependency
;
10283 int start_over
= 0;
10285 if (dep
->semantics
== IA64_DVS_NONE
10286 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10292 note
= NOTE (opdeps
->chks
[chkind
]);
10294 /* Check this resource against each execution path seen thus far. */
10295 for (path
= 0; path
<= md
.path
; path
++)
10299 /* If the dependency wasn't on the path being checked, ignore it. */
10300 if (rs
->path
< path
)
10303 /* If the QP for this insn implies a QP which has branched, don't
10304 bother checking. Ed. NOTE: I don't think this check is terribly
10305 useful; what's the point of generating code which will only be
10306 reached if its QP is zero?
10307 This code was specifically inserted to handle the following code,
10308 based on notes from Intel's DV checking code, where p1 implies p2.
10314 if (CURR_SLOT
.qp_regno
!= 0)
10318 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10320 if (qp_implies
[implies
].path
>= path
10321 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10322 && qp_implies
[implies
].p2_branched
)
10332 if ((matchtype
= resources_match (rs
, idesc
, note
,
10333 CURR_SLOT
.qp_regno
, path
)) != 0)
10336 char pathmsg
[256] = "";
10337 char indexmsg
[256] = "";
10338 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10341 sprintf (pathmsg
, " when entry is at label '%s'",
10342 md
.entry_labels
[path
- 1]);
10343 if (matchtype
== 1 && rs
->index
>= 0)
10344 sprintf (indexmsg
, ", specific resource number is %d",
10346 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10348 (certain
? "violates" : "may violate"),
10349 dv_mode
[dep
->mode
], dep
->name
,
10350 dv_sem
[dep
->semantics
],
10351 pathmsg
, indexmsg
);
10353 if (md
.explicit_mode
)
10355 as_warn ("%s", msg
);
10356 if (path
< md
.path
)
10357 as_warn (_("Only the first path encountering the conflict "
10359 as_warn_where (rs
->file
, rs
->line
,
10360 _("This is the location of the "
10361 "conflicting usage"));
10362 /* Don't bother checking other paths, to avoid duplicating
10363 the same warning */
10369 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10371 remove_marked_resource (rs
);
10373 /* since the set of dependencies has changed, start over */
10374 /* FIXME -- since we're removing dvs as we go, we
10375 probably don't really need to start over... */
10388 /* Register new dependencies based on the given opcode. */
10391 mark_resources (idesc
)
10392 struct ia64_opcode
*idesc
;
10395 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10396 int add_only_qp_reads
= 0;
10398 /* A conditional branch only uses its resources if it is taken; if it is
10399 taken, we stop following that path. The other branch types effectively
10400 *always* write their resources. If it's not taken, register only QP
10402 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10404 add_only_qp_reads
= 1;
10408 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10410 for (i
= 0; i
< opdeps
->nregs
; i
++)
10412 const struct ia64_dependency
*dep
;
10413 struct rsrc specs
[MAX_SPECS
];
10418 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10419 note
= NOTE (opdeps
->regs
[i
]);
10421 if (add_only_qp_reads
10422 && !(dep
->mode
== IA64_DV_WAR
10423 && (dep
->specifier
== IA64_RS_PR
10424 || dep
->specifier
== IA64_RS_PRr
10425 || dep
->specifier
== IA64_RS_PR63
)))
10428 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10430 while (count
-- > 0)
10432 mark_resource (idesc
, dep
, &specs
[count
],
10433 DEP (opdeps
->regs
[i
]), md
.path
);
10436 /* The execution path may affect register values, which may in turn
10437 affect which indirect-access resources are accessed. */
10438 switch (dep
->specifier
)
10442 case IA64_RS_CPUID
:
10450 for (path
= 0; path
< md
.path
; path
++)
10452 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10453 while (count
-- > 0)
10454 mark_resource (idesc
, dep
, &specs
[count
],
10455 DEP (opdeps
->regs
[i
]), path
);
10462 /* Remove dependencies when they no longer apply. */
10465 update_dependencies (idesc
)
10466 struct ia64_opcode
*idesc
;
10470 if (strcmp (idesc
->name
, "srlz.i") == 0)
10472 instruction_serialization ();
10474 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10476 data_serialization ();
10478 else if (is_interruption_or_rfi (idesc
)
10479 || is_taken_branch (idesc
))
10481 /* Although technically the taken branch doesn't clear dependencies
10482 which require a srlz.[id], we don't follow the branch; the next
10483 instruction is assumed to start with a clean slate. */
10487 else if (is_conditional_branch (idesc
)
10488 && CURR_SLOT
.qp_regno
!= 0)
10490 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10492 for (i
= 0; i
< qp_implieslen
; i
++)
10494 /* If the conditional branch's predicate is implied by the predicate
10495 in an existing dependency, remove that dependency. */
10496 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10499 /* Note that this implied predicate takes a branch so that if
10500 a later insn generates a DV but its predicate implies this
10501 one, we can avoid the false DV warning. */
10502 qp_implies
[i
].p2_branched
= 1;
10503 while (depind
< regdepslen
)
10505 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10507 print_dependency ("Removing", depind
);
10508 regdeps
[depind
] = regdeps
[--regdepslen
];
10515 /* Any marked resources which have this same predicate should be
10516 cleared, provided that the QP hasn't been modified between the
10517 marking instruction and the branch. */
10520 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10525 while (i
< regdepslen
)
10527 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10528 && regdeps
[i
].link_to_qp_branch
10529 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10530 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10532 /* Treat like a taken branch */
10533 print_dependency ("Removing", i
);
10534 regdeps
[i
] = regdeps
[--regdepslen
];
10543 /* Examine the current instruction for dependency violations. */
10547 struct ia64_opcode
*idesc
;
10551 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10552 idesc
->name
, CURR_SLOT
.src_line
,
10553 idesc
->dependencies
->nchks
,
10554 idesc
->dependencies
->nregs
);
10557 /* Look through the list of currently marked resources; if the current
10558 instruction has the dependency in its chks list which uses that resource,
10559 check against the specific resources used. */
10560 check_dependencies (idesc
);
10562 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10563 then add them to the list of marked resources. */
10564 mark_resources (idesc
);
10566 /* There are several types of dependency semantics, and each has its own
10567 requirements for being cleared
10569 Instruction serialization (insns separated by interruption, rfi, or
10570 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10572 Data serialization (instruction serialization, or writer + srlz.d +
10573 reader, where writer and srlz.d are in separate groups) clears
10574 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10575 always be the case).
10577 Instruction group break (groups separated by stop, taken branch,
10578 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10580 update_dependencies (idesc
);
10582 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10583 warning. Keep track of as many as possible that are useful. */
10584 note_register_values (idesc
);
10586 /* We don't need or want this anymore. */
10587 md
.mem_offset
.hint
= 0;
10592 /* Translate one line of assembly. Pseudo ops and labels do not show
10598 char *saved_input_line_pointer
, *mnemonic
;
10599 const struct pseudo_opcode
*pdesc
;
10600 struct ia64_opcode
*idesc
;
10601 unsigned char qp_regno
;
10602 unsigned int flags
;
10605 saved_input_line_pointer
= input_line_pointer
;
10606 input_line_pointer
= str
;
10608 /* extract the opcode (mnemonic): */
10610 mnemonic
= input_line_pointer
;
10611 ch
= get_symbol_end ();
10612 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10615 *input_line_pointer
= ch
;
10616 (*pdesc
->handler
) (pdesc
->arg
);
10620 /* Find the instruction descriptor matching the arguments. */
10622 idesc
= ia64_find_opcode (mnemonic
);
10623 *input_line_pointer
= ch
;
10626 as_bad ("Unknown opcode `%s'", mnemonic
);
10630 idesc
= parse_operands (idesc
);
10634 /* Handle the dynamic ops we can handle now: */
10635 if (idesc
->type
== IA64_TYPE_DYN
)
10637 if (strcmp (idesc
->name
, "add") == 0)
10639 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10640 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10644 ia64_free_opcode (idesc
);
10645 idesc
= ia64_find_opcode (mnemonic
);
10647 else if (strcmp (idesc
->name
, "mov") == 0)
10649 enum ia64_opnd opnd1
, opnd2
;
10652 opnd1
= idesc
->operands
[0];
10653 opnd2
= idesc
->operands
[1];
10654 if (opnd1
== IA64_OPND_AR3
)
10656 else if (opnd2
== IA64_OPND_AR3
)
10660 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10662 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10663 mnemonic
= "mov.i";
10664 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10665 mnemonic
= "mov.m";
10673 ia64_free_opcode (idesc
);
10674 idesc
= ia64_find_opcode (mnemonic
);
10675 while (idesc
!= NULL
10676 && (idesc
->operands
[0] != opnd1
10677 || idesc
->operands
[1] != opnd2
))
10678 idesc
= get_next_opcode (idesc
);
10682 else if (strcmp (idesc
->name
, "mov.i") == 0
10683 || strcmp (idesc
->name
, "mov.m") == 0)
10685 enum ia64_opnd opnd1
, opnd2
;
10688 opnd1
= idesc
->operands
[0];
10689 opnd2
= idesc
->operands
[1];
10690 if (opnd1
== IA64_OPND_AR3
)
10692 else if (opnd2
== IA64_OPND_AR3
)
10696 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10699 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10701 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10703 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10704 as_bad ("AR %d cannot be accessed by %c-unit",
10705 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10709 else if (strcmp (idesc
->name
, "hint.b") == 0)
10715 case hint_b_warning
:
10716 as_warn ("hint.b may be treated as nop");
10719 as_bad ("hint.b shouldn't be used");
10725 if (md
.qp
.X_op
== O_register
)
10727 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10728 md
.qp
.X_op
= O_absent
;
10731 flags
= idesc
->flags
;
10733 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10735 /* The alignment frag has to end with a stop bit only if the
10736 next instruction after the alignment directive has to be
10737 the first instruction in an instruction group. */
10740 while (align_frag
->fr_type
!= rs_align_code
)
10742 align_frag
= align_frag
->fr_next
;
10746 /* align_frag can be NULL if there are directives in
10748 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10749 align_frag
->tc_frag_data
= 1;
10752 insn_group_break (1, 0, 0);
10756 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10758 as_bad ("`%s' cannot be predicated", idesc
->name
);
10762 /* Build the instruction. */
10763 CURR_SLOT
.qp_regno
= qp_regno
;
10764 CURR_SLOT
.idesc
= idesc
;
10765 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10766 dwarf2_where (&CURR_SLOT
.debug_line
);
10768 /* Add unwind entry, if there is one. */
10769 if (unwind
.current_entry
)
10771 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10772 unwind
.current_entry
= NULL
;
10774 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10777 /* Check for dependency violations. */
10781 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10782 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10783 emit_one_bundle ();
10785 if ((flags
& IA64_OPCODE_LAST
) != 0)
10786 insn_group_break (1, 0, 0);
10788 md
.last_text_seg
= now_seg
;
10791 input_line_pointer
= saved_input_line_pointer
;
10794 /* Called when symbol NAME cannot be found in the symbol table.
10795 Should be used for dynamic valued symbols only. */
10798 md_undefined_symbol (name
)
10799 char *name ATTRIBUTE_UNUSED
;
10804 /* Called for any expression that can not be recognized. When the
10805 function is called, `input_line_pointer' will point to the start of
10812 switch (*input_line_pointer
)
10815 ++input_line_pointer
;
10817 if (*input_line_pointer
!= ']')
10819 as_bad ("Closing bracket missing");
10824 if (e
->X_op
!= O_register
)
10825 as_bad ("Register expected as index");
10827 ++input_line_pointer
;
10838 ignore_rest_of_line ();
10841 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10842 a section symbol plus some offset. For relocs involving @fptr(),
10843 directives we don't want such adjustments since we need to have the
10844 original symbol's name in the reloc. */
10846 ia64_fix_adjustable (fix
)
10849 /* Prevent all adjustments to global symbols */
10850 if (S_IS_EXTERN (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10853 switch (fix
->fx_r_type
)
10855 case BFD_RELOC_IA64_FPTR64I
:
10856 case BFD_RELOC_IA64_FPTR32MSB
:
10857 case BFD_RELOC_IA64_FPTR32LSB
:
10858 case BFD_RELOC_IA64_FPTR64MSB
:
10859 case BFD_RELOC_IA64_FPTR64LSB
:
10860 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10861 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10871 ia64_force_relocation (fix
)
10874 switch (fix
->fx_r_type
)
10876 case BFD_RELOC_IA64_FPTR64I
:
10877 case BFD_RELOC_IA64_FPTR32MSB
:
10878 case BFD_RELOC_IA64_FPTR32LSB
:
10879 case BFD_RELOC_IA64_FPTR64MSB
:
10880 case BFD_RELOC_IA64_FPTR64LSB
:
10882 case BFD_RELOC_IA64_LTOFF22
:
10883 case BFD_RELOC_IA64_LTOFF64I
:
10884 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10885 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10886 case BFD_RELOC_IA64_PLTOFF22
:
10887 case BFD_RELOC_IA64_PLTOFF64I
:
10888 case BFD_RELOC_IA64_PLTOFF64MSB
:
10889 case BFD_RELOC_IA64_PLTOFF64LSB
:
10891 case BFD_RELOC_IA64_LTOFF22X
:
10892 case BFD_RELOC_IA64_LDXMOV
:
10899 return generic_force_reloc (fix
);
10902 /* Decide from what point a pc-relative relocation is relative to,
10903 relative to the pc-relative fixup. Er, relatively speaking. */
10905 ia64_pcrel_from_section (fix
, sec
)
10909 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10911 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10918 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10920 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10924 expr
.X_op
= O_pseudo_fixup
;
10925 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10926 expr
.X_add_number
= 0;
10927 expr
.X_add_symbol
= symbol
;
10928 emit_expr (&expr
, size
);
10931 /* This is called whenever some data item (not an instruction) needs a
10932 fixup. We pick the right reloc code depending on the byteorder
10933 currently in effect. */
10935 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10941 bfd_reloc_code_real_type code
;
10946 /* There are no reloc for 8 and 16 bit quantities, but we allow
10947 them here since they will work fine as long as the expression
10948 is fully defined at the end of the pass over the source file. */
10949 case 1: code
= BFD_RELOC_8
; break;
10950 case 2: code
= BFD_RELOC_16
; break;
10952 if (target_big_endian
)
10953 code
= BFD_RELOC_IA64_DIR32MSB
;
10955 code
= BFD_RELOC_IA64_DIR32LSB
;
10959 /* In 32-bit mode, data8 could mean function descriptors too. */
10960 if (exp
->X_op
== O_pseudo_fixup
10961 && exp
->X_op_symbol
10962 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10963 && !(md
.flags
& EF_IA_64_ABI64
))
10965 if (target_big_endian
)
10966 code
= BFD_RELOC_IA64_IPLTMSB
;
10968 code
= BFD_RELOC_IA64_IPLTLSB
;
10969 exp
->X_op
= O_symbol
;
10974 if (target_big_endian
)
10975 code
= BFD_RELOC_IA64_DIR64MSB
;
10977 code
= BFD_RELOC_IA64_DIR64LSB
;
10982 if (exp
->X_op
== O_pseudo_fixup
10983 && exp
->X_op_symbol
10984 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10986 if (target_big_endian
)
10987 code
= BFD_RELOC_IA64_IPLTMSB
;
10989 code
= BFD_RELOC_IA64_IPLTLSB
;
10990 exp
->X_op
= O_symbol
;
10996 as_bad ("Unsupported fixup size %d", nbytes
);
10997 ignore_rest_of_line ();
11001 if (exp
->X_op
== O_pseudo_fixup
)
11003 exp
->X_op
= O_symbol
;
11004 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11005 /* ??? If code unchanged, unsupported. */
11008 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11009 /* We need to store the byte order in effect in case we're going
11010 to fix an 8 or 16 bit relocation (for which there no real
11011 relocs available). See md_apply_fix3(). */
11012 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11015 /* Return the actual relocation we wish to associate with the pseudo
11016 reloc described by SYM and R_TYPE. SYM should be one of the
11017 symbols in the pseudo_func array, or NULL. */
11019 static bfd_reloc_code_real_type
11020 ia64_gen_real_reloc_type (sym
, r_type
)
11021 struct symbol
*sym
;
11022 bfd_reloc_code_real_type r_type
;
11024 bfd_reloc_code_real_type
new = 0;
11025 const char *type
= NULL
, *suffix
= "";
11032 switch (S_GET_VALUE (sym
))
11034 case FUNC_FPTR_RELATIVE
:
11037 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11038 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11039 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11040 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11041 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11042 default: type
= "FPTR"; break;
11046 case FUNC_GP_RELATIVE
:
11049 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11050 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11051 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11052 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11053 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11054 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11055 default: type
= "GPREL"; break;
11059 case FUNC_LT_RELATIVE
:
11062 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11063 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11064 default: type
= "LTOFF"; break;
11068 case FUNC_LT_RELATIVE_X
:
11071 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11072 default: type
= "LTOFF"; suffix
= "X"; break;
11076 case FUNC_PC_RELATIVE
:
11079 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11080 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11081 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11082 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11083 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11084 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11085 default: type
= "PCREL"; break;
11089 case FUNC_PLT_RELATIVE
:
11092 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11093 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11094 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11095 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11096 default: type
= "PLTOFF"; break;
11100 case FUNC_SEC_RELATIVE
:
11103 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11104 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11105 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11106 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11107 default: type
= "SECREL"; break;
11111 case FUNC_SEG_RELATIVE
:
11114 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11115 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11116 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11117 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11118 default: type
= "SEGREL"; break;
11122 case FUNC_LTV_RELATIVE
:
11125 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11126 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11127 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11128 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11129 default: type
= "LTV"; break;
11133 case FUNC_LT_FPTR_RELATIVE
:
11136 case BFD_RELOC_IA64_IMM22
:
11137 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11138 case BFD_RELOC_IA64_IMM64
:
11139 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11140 case BFD_RELOC_IA64_DIR32MSB
:
11141 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11142 case BFD_RELOC_IA64_DIR32LSB
:
11143 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11144 case BFD_RELOC_IA64_DIR64MSB
:
11145 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11146 case BFD_RELOC_IA64_DIR64LSB
:
11147 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11149 type
= "LTOFF_FPTR"; break;
11153 case FUNC_TP_RELATIVE
:
11156 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11157 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11158 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11159 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11160 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11161 default: type
= "TPREL"; break;
11165 case FUNC_LT_TP_RELATIVE
:
11168 case BFD_RELOC_IA64_IMM22
:
11169 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11171 type
= "LTOFF_TPREL"; break;
11175 case FUNC_DTP_MODULE
:
11178 case BFD_RELOC_IA64_DIR64MSB
:
11179 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11180 case BFD_RELOC_IA64_DIR64LSB
:
11181 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11183 type
= "DTPMOD"; break;
11187 case FUNC_LT_DTP_MODULE
:
11190 case BFD_RELOC_IA64_IMM22
:
11191 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11193 type
= "LTOFF_DTPMOD"; break;
11197 case FUNC_DTP_RELATIVE
:
11200 case BFD_RELOC_IA64_DIR32MSB
:
11201 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11202 case BFD_RELOC_IA64_DIR32LSB
:
11203 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11204 case BFD_RELOC_IA64_DIR64MSB
:
11205 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11206 case BFD_RELOC_IA64_DIR64LSB
:
11207 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11208 case BFD_RELOC_IA64_IMM14
:
11209 new = BFD_RELOC_IA64_DTPREL14
; break;
11210 case BFD_RELOC_IA64_IMM22
:
11211 new = BFD_RELOC_IA64_DTPREL22
; break;
11212 case BFD_RELOC_IA64_IMM64
:
11213 new = BFD_RELOC_IA64_DTPREL64I
; break;
11215 type
= "DTPREL"; break;
11219 case FUNC_LT_DTP_RELATIVE
:
11222 case BFD_RELOC_IA64_IMM22
:
11223 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11225 type
= "LTOFF_DTPREL"; break;
11229 case FUNC_IPLT_RELOC
:
11232 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11233 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11234 default: type
= "IPLT"; break;
11252 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11253 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11254 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11255 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11256 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11257 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11258 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11262 /* This should be an error, but since previously there wasn't any
11263 diagnostic here, dont't make it fail because of this for now. */
11264 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11269 /* Here is where generate the appropriate reloc for pseudo relocation
11272 ia64_validate_fix (fix
)
11275 switch (fix
->fx_r_type
)
11277 case BFD_RELOC_IA64_FPTR64I
:
11278 case BFD_RELOC_IA64_FPTR32MSB
:
11279 case BFD_RELOC_IA64_FPTR64LSB
:
11280 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11281 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11282 if (fix
->fx_offset
!= 0)
11283 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11284 "No addend allowed in @fptr() relocation");
11292 fix_insn (fix
, odesc
, value
)
11294 const struct ia64_operand
*odesc
;
11297 bfd_vma insn
[3], t0
, t1
, control_bits
;
11302 slot
= fix
->fx_where
& 0x3;
11303 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11305 /* Bundles are always in little-endian byte order */
11306 t0
= bfd_getl64 (fixpos
);
11307 t1
= bfd_getl64 (fixpos
+ 8);
11308 control_bits
= t0
& 0x1f;
11309 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11310 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11311 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11314 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11316 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11317 insn
[2] |= (((value
& 0x7f) << 13)
11318 | (((value
>> 7) & 0x1ff) << 27)
11319 | (((value
>> 16) & 0x1f) << 22)
11320 | (((value
>> 21) & 0x1) << 21)
11321 | (((value
>> 63) & 0x1) << 36));
11323 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11325 if (value
& ~0x3fffffffffffffffULL
)
11326 err
= "integer operand out of range";
11327 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11328 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11330 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11333 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11334 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11335 | (((value
>> 0) & 0xfffff) << 13));
11338 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11341 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11343 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11344 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11345 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11346 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11349 /* Attempt to simplify or even eliminate a fixup. The return value is
11350 ignored; perhaps it was once meaningful, but now it is historical.
11351 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11353 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11357 md_apply_fix3 (fix
, valP
, seg
)
11360 segT seg ATTRIBUTE_UNUSED
;
11363 valueT value
= *valP
;
11365 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11369 switch (fix
->fx_r_type
)
11371 case BFD_RELOC_IA64_PCREL21B
: break;
11372 case BFD_RELOC_IA64_PCREL21BI
: break;
11373 case BFD_RELOC_IA64_PCREL21F
: break;
11374 case BFD_RELOC_IA64_PCREL21M
: break;
11375 case BFD_RELOC_IA64_PCREL60B
: break;
11376 case BFD_RELOC_IA64_PCREL22
: break;
11377 case BFD_RELOC_IA64_PCREL64I
: break;
11378 case BFD_RELOC_IA64_PCREL32MSB
: break;
11379 case BFD_RELOC_IA64_PCREL32LSB
: break;
11380 case BFD_RELOC_IA64_PCREL64MSB
: break;
11381 case BFD_RELOC_IA64_PCREL64LSB
: break;
11383 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11390 switch (fix
->fx_r_type
)
11392 case BFD_RELOC_UNUSED
:
11393 /* This must be a TAG13 or TAG13b operand. There are no external
11394 relocs defined for them, so we must give an error. */
11395 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11396 "%s must have a constant value",
11397 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11401 case BFD_RELOC_IA64_TPREL14
:
11402 case BFD_RELOC_IA64_TPREL22
:
11403 case BFD_RELOC_IA64_TPREL64I
:
11404 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11405 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11406 case BFD_RELOC_IA64_DTPREL14
:
11407 case BFD_RELOC_IA64_DTPREL22
:
11408 case BFD_RELOC_IA64_DTPREL64I
:
11409 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11410 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11417 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11419 if (fix
->tc_fix_data
.bigendian
)
11420 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11422 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11427 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11432 /* Generate the BFD reloc to be stuck in the object file from the
11433 fixup used internally in the assembler. */
11436 tc_gen_reloc (sec
, fixp
)
11437 asection
*sec ATTRIBUTE_UNUSED
;
11442 reloc
= xmalloc (sizeof (*reloc
));
11443 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11444 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11445 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11446 reloc
->addend
= fixp
->fx_offset
;
11447 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11451 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11452 "Cannot represent %s relocation in object file",
11453 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11458 /* Turn a string in input_line_pointer into a floating point constant
11459 of type TYPE, and store the appropriate bytes in *LIT. The number
11460 of LITTLENUMS emitted is stored in *SIZE. An error message is
11461 returned, or NULL on OK. */
11463 #define MAX_LITTLENUMS 5
11466 md_atof (type
, lit
, size
)
11471 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11501 return "Bad call to MD_ATOF()";
11503 t
= atof_ieee (input_line_pointer
, type
, words
);
11505 input_line_pointer
= t
;
11507 (*ia64_float_to_chars
) (lit
, words
, prec
);
11511 /* It is 10 byte floating point with 6 byte padding. */
11512 memset (&lit
[10], 0, 6);
11513 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11516 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11521 /* Handle ia64 specific semantics of the align directive. */
11524 ia64_md_do_align (n
, fill
, len
, max
)
11525 int n ATTRIBUTE_UNUSED
;
11526 const char *fill ATTRIBUTE_UNUSED
;
11527 int len ATTRIBUTE_UNUSED
;
11528 int max ATTRIBUTE_UNUSED
;
11530 if (subseg_text_p (now_seg
))
11531 ia64_flush_insns ();
11534 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11535 of an rs_align_code fragment. */
11538 ia64_handle_align (fragp
)
11543 const unsigned char *nop
;
11545 if (fragp
->fr_type
!= rs_align_code
)
11548 /* Check if this frag has to end with a stop bit. */
11549 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11551 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11552 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11554 /* If no paddings are needed, we check if we need a stop bit. */
11555 if (!bytes
&& fragp
->tc_frag_data
)
11557 if (fragp
->fr_fix
< 16)
11559 /* FIXME: It won't work with
11561 alloc r32=ar.pfs,1,2,4,0
11565 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11566 _("Can't add stop bit to mark end of instruction group"));
11569 /* Bundles are always in little-endian byte order. Make sure
11570 the previous bundle has the stop bit. */
11574 /* Make sure we are on a 16-byte boundary, in case someone has been
11575 putting data into a text section. */
11578 int fix
= bytes
& 15;
11579 memset (p
, 0, fix
);
11582 fragp
->fr_fix
+= fix
;
11585 /* Instruction bundles are always little-endian. */
11586 memcpy (p
, nop
, 16);
11587 fragp
->fr_var
= 16;
11591 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11596 number_to_chars_bigendian (lit
, (long) (*words
++),
11597 sizeof (LITTLENUM_TYPE
));
11598 lit
+= sizeof (LITTLENUM_TYPE
);
11603 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11608 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11609 sizeof (LITTLENUM_TYPE
));
11610 lit
+= sizeof (LITTLENUM_TYPE
);
11615 ia64_elf_section_change_hook (void)
11617 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11618 && elf_linked_to_section (now_seg
) == NULL
)
11619 elf_linked_to_section (now_seg
) = text_section
;
11620 dot_byteorder (-1);
11623 /* Check if a label should be made global. */
11625 ia64_check_label (symbolS
*label
)
11627 if (*input_line_pointer
== ':')
11629 S_SET_EXTERNAL (label
);
11630 input_line_pointer
++;
11634 /* Used to remember where .alias and .secalias directives are seen. We
11635 will rename symbol and section names when we are about to output
11636 the relocatable file. */
11639 char *file
; /* The file where the directive is seen. */
11640 unsigned int line
; /* The line number the directive is at. */
11641 const char *name
; /* The orignale name of the symbol. */
11644 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11645 .secalias. Otherwise, it is .alias. */
11647 dot_alias (int section
)
11649 char *name
, *alias
;
11653 const char *error_string
;
11656 struct hash_control
*ahash
, *nhash
;
11659 name
= input_line_pointer
;
11660 delim
= get_symbol_end ();
11661 end_name
= input_line_pointer
;
11664 if (name
== end_name
)
11666 as_bad (_("expected symbol name"));
11667 discard_rest_of_line ();
11671 SKIP_WHITESPACE ();
11673 if (*input_line_pointer
!= ',')
11676 as_bad (_("expected comma after \"%s\""), name
);
11678 ignore_rest_of_line ();
11682 input_line_pointer
++;
11684 ia64_canonicalize_symbol_name (name
);
11686 /* We call demand_copy_C_string to check if alias string is valid.
11687 There should be a closing `"' and no `\0' in the string. */
11688 alias
= demand_copy_C_string (&len
);
11691 ignore_rest_of_line ();
11695 /* Make a copy of name string. */
11696 len
= strlen (name
) + 1;
11697 obstack_grow (¬es
, name
, len
);
11698 name
= obstack_finish (¬es
);
11703 ahash
= secalias_hash
;
11704 nhash
= secalias_name_hash
;
11709 ahash
= alias_hash
;
11710 nhash
= alias_name_hash
;
11713 /* Check if alias has been used before. */
11714 h
= (struct alias
*) hash_find (ahash
, alias
);
11717 if (strcmp (h
->name
, name
))
11718 as_bad (_("`%s' is already the alias of %s `%s'"),
11719 alias
, kind
, h
->name
);
11723 /* Check if name already has an alias. */
11724 a
= (const char *) hash_find (nhash
, name
);
11727 if (strcmp (a
, alias
))
11728 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11732 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11733 as_where (&h
->file
, &h
->line
);
11736 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11739 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11740 alias
, kind
, error_string
);
11744 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11747 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11748 alias
, kind
, error_string
);
11750 obstack_free (¬es
, name
);
11751 obstack_free (¬es
, alias
);
11754 demand_empty_rest_of_line ();
11757 /* It renames the original symbol name to its alias. */
11759 do_alias (const char *alias
, PTR value
)
11761 struct alias
*h
= (struct alias
*) value
;
11762 symbolS
*sym
= symbol_find (h
->name
);
11765 as_warn_where (h
->file
, h
->line
,
11766 _("symbol `%s' aliased to `%s' is not used"),
11769 S_SET_NAME (sym
, (char *) alias
);
11772 /* Called from write_object_file. */
11774 ia64_adjust_symtab (void)
11776 hash_traverse (alias_hash
, do_alias
);
11779 /* It renames the original section name to its alias. */
11781 do_secalias (const char *alias
, PTR value
)
11783 struct alias
*h
= (struct alias
*) value
;
11784 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11787 as_warn_where (h
->file
, h
->line
,
11788 _("section `%s' aliased to `%s' is not used"),
11794 /* Called from write_object_file. */
11796 ia64_frob_file (void)
11798 hash_traverse (secalias_hash
, do_secalias
);