1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 MA 02110-1301, USA. */
28 BFD maintains relocations in much the same way it maintains
29 symbols: they are left alone until required, then read in
30 en-masse and translated into an internal form. A common
31 routine <<bfd_perform_relocation>> acts upon the
32 canonical form to do the fixup.
34 Relocations are maintained on a per section basis,
35 while symbols are maintained on a per BFD basis.
37 All that a back end has to do to fit the BFD interface is to create
38 a <<struct reloc_cache_entry>> for each relocation
39 in a particular section, and fill in the right bits of the structures.
48 /* DO compile in the reloc_code name table from libbfd.h. */
49 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
58 typedef arelent, howto manager, Relocations, Relocations
63 This is the structure of a relocation entry:
67 .typedef enum bfd_reloc_status
69 . {* No errors detected. *}
72 . {* The relocation was performed, but there was an overflow. *}
75 . {* The address to relocate was not within the section supplied. *}
76 . bfd_reloc_outofrange,
78 . {* Used by special functions. *}
81 . {* Unsupported relocation size requested. *}
82 . bfd_reloc_notsupported,
87 . {* The symbol to relocate against was undefined. *}
88 . bfd_reloc_undefined,
90 . {* The relocation was performed, but may not be ok - presently
91 . generated only when linking i960 coff files with i960 b.out
92 . symbols. If this type is returned, the error_message argument
93 . to bfd_perform_relocation will be set. *}
96 . bfd_reloc_status_type;
99 .typedef struct reloc_cache_entry
101 . {* A pointer into the canonical table of pointers. *}
102 . struct bfd_symbol **sym_ptr_ptr;
104 . {* offset in section. *}
105 . bfd_size_type address;
107 . {* addend for relocation value. *}
110 . {* Pointer to how to perform the required relocation. *}
111 . reloc_howto_type *howto;
121 Here is a description of each of the fields within an <<arelent>>:
125 The symbol table pointer points to a pointer to the symbol
126 associated with the relocation request. It is the pointer
127 into the table returned by the back end's
128 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
129 referenced through a pointer to a pointer so that tools like
130 the linker can fix up all the symbols of the same name by
131 modifying only one pointer. The relocation routine looks in
132 the symbol and uses the base of the section the symbol is
133 attached to and the value of the symbol as the initial
134 relocation offset. If the symbol pointer is zero, then the
135 section provided is looked up.
139 The <<address>> field gives the offset in bytes from the base of
140 the section data which owns the relocation record to the first
141 byte of relocatable information. The actual data relocated
142 will be relative to this point; for example, a relocation
143 type which modifies the bottom two bytes of a four byte word
144 would not touch the first byte pointed to in a big endian
149 The <<addend>> is a value provided by the back end to be added (!)
150 to the relocation offset. Its interpretation is dependent upon
151 the howto. For example, on the 68k the code:
156 | return foo[0x12345678];
159 Could be compiled into:
162 | moveb @@#12345678,d0
167 This could create a reloc pointing to <<foo>>, but leave the
168 offset in the data, something like:
170 |RELOCATION RECORDS FOR [.text]:
174 |00000000 4e56 fffc ; linkw fp,#-4
175 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
176 |0000000a 49c0 ; extbl d0
177 |0000000c 4e5e ; unlk fp
180 Using coff and an 88k, some instructions don't have enough
181 space in them to represent the full address range, and
182 pointers have to be loaded in two parts. So you'd get something like:
184 | or.u r13,r0,hi16(_foo+0x12345678)
185 | ld.b r2,r13,lo16(_foo+0x12345678)
188 This should create two relocs, both pointing to <<_foo>>, and with
189 0x12340000 in their addend field. The data would consist of:
191 |RELOCATION RECORDS FOR [.text]:
193 |00000002 HVRT16 _foo+0x12340000
194 |00000006 LVRT16 _foo+0x12340000
196 |00000000 5da05678 ; or.u r13,r0,0x5678
197 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
198 |00000008 f400c001 ; jmp r1
200 The relocation routine digs out the value from the data, adds
201 it to the addend to get the original offset, and then adds the
202 value of <<_foo>>. Note that all 32 bits have to be kept around
203 somewhere, to cope with carry from bit 15 to bit 16.
205 One further example is the sparc and the a.out format. The
206 sparc has a similar problem to the 88k, in that some
207 instructions don't have room for an entire offset, but on the
208 sparc the parts are created in odd sized lumps. The designers of
209 the a.out format chose to not use the data within the section
210 for storing part of the offset; all the offset is kept within
211 the reloc. Anything in the data should be ignored.
214 | sethi %hi(_foo+0x12345678),%g2
215 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
219 Both relocs contain a pointer to <<foo>>, and the offsets
222 |RELOCATION RECORDS FOR [.text]:
224 |00000004 HI22 _foo+0x12345678
225 |00000008 LO10 _foo+0x12345678
227 |00000000 9de3bf90 ; save %sp,-112,%sp
228 |00000004 05000000 ; sethi %hi(_foo+0),%g2
229 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
230 |0000000c 81c7e008 ; ret
231 |00000010 81e80000 ; restore
235 The <<howto>> field can be imagined as a
236 relocation instruction. It is a pointer to a structure which
237 contains information on what to do with all of the other
238 information in the reloc record and data section. A back end
239 would normally have a relocation instruction set and turn
240 relocations into pointers to the correct structure on input -
241 but it would be possible to create each howto field on demand.
247 <<enum complain_overflow>>
249 Indicates what sort of overflow checking should be done when
250 performing a relocation.
254 .enum complain_overflow
256 . {* Do not complain on overflow. *}
257 . complain_overflow_dont,
259 . {* Complain if the value overflows when considered as a signed
260 . number one bit larger than the field. ie. A bitfield of N bits
261 . is allowed to represent -2**n to 2**n-1. *}
262 . complain_overflow_bitfield,
264 . {* Complain if the value overflows when considered as a signed
266 . complain_overflow_signed,
268 . {* Complain if the value overflows when considered as an
269 . unsigned number. *}
270 . complain_overflow_unsigned
279 The <<reloc_howto_type>> is a structure which contains all the
280 information that libbfd needs to know to tie up a back end's data.
283 .struct bfd_symbol; {* Forward declaration. *}
285 .struct reloc_howto_struct
287 . {* The type field has mainly a documentary use - the back end can
288 . do what it wants with it, though normally the back end's
289 . external idea of what a reloc number is stored
290 . in this field. For example, a PC relative word relocation
291 . in a coff environment has the type 023 - because that's
292 . what the outside world calls a R_PCRWORD reloc. *}
295 . {* The value the final relocation is shifted right by. This drops
296 . unwanted data from the relocation. *}
297 . unsigned int rightshift;
299 . {* The size of the item to be relocated. This is *not* a
300 . power-of-two measure. To get the number of bytes operated
301 . on by a type of relocation, use bfd_get_reloc_size. *}
304 . {* The number of bits in the item to be relocated. This is used
305 . when doing overflow checking. *}
306 . unsigned int bitsize;
308 . {* Notes that the relocation is relative to the location in the
309 . data section of the addend. The relocation function will
310 . subtract from the relocation value the address of the location
311 . being relocated. *}
312 . bfd_boolean pc_relative;
314 . {* The bit position of the reloc value in the destination.
315 . The relocated value is left shifted by this amount. *}
316 . unsigned int bitpos;
318 . {* What type of overflow error should be checked for when
320 . enum complain_overflow complain_on_overflow;
322 . {* If this field is non null, then the supplied function is
323 . called rather than the normal function. This allows really
324 . strange relocation methods to be accommodated (e.g., i960 callj
326 . bfd_reloc_status_type (*special_function)
327 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
330 . {* The textual name of the relocation type. *}
333 . {* Some formats record a relocation addend in the section contents
334 . rather than with the relocation. For ELF formats this is the
335 . distinction between USE_REL and USE_RELA (though the code checks
336 . for USE_REL == 1/0). The value of this field is TRUE if the
337 . addend is recorded with the section contents; when performing a
338 . partial link (ld -r) the section contents (the data) will be
339 . modified. The value of this field is FALSE if addends are
340 . recorded with the relocation (in arelent.addend); when performing
341 . a partial link the relocation will be modified.
342 . All relocations for all ELF USE_RELA targets should set this field
343 . to FALSE (values of TRUE should be looked on with suspicion).
344 . However, the converse is not true: not all relocations of all ELF
345 . USE_REL targets set this field to TRUE. Why this is so is peculiar
346 . to each particular target. For relocs that aren't used in partial
347 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
348 . bfd_boolean partial_inplace;
350 . {* src_mask selects the part of the instruction (or data) to be used
351 . in the relocation sum. If the target relocations don't have an
352 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
353 . dst_mask to extract the addend from the section contents. If
354 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
355 . field should be zero. Non-zero values for ELF USE_RELA targets are
356 . bogus as in those cases the value in the dst_mask part of the
357 . section contents should be treated as garbage. *}
360 . {* dst_mask selects which parts of the instruction (or data) are
361 . replaced with a relocated value. *}
364 . {* When some formats create PC relative instructions, they leave
365 . the value of the pc of the place being relocated in the offset
366 . slot of the instruction, so that a PC relative relocation can
367 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
368 . Some formats leave the displacement part of an instruction
369 . empty (e.g., m88k bcs); this flag signals the fact. *}
370 . bfd_boolean pcrel_offset;
380 The HOWTO define is horrible and will go away.
382 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
383 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
386 And will be replaced with the totally magic way. But for the
387 moment, we are compatible, so do it this way.
389 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
390 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
391 . NAME, FALSE, 0, 0, IN)
395 This is used to fill in an empty howto entry in an array.
397 .#define EMPTY_HOWTO(C) \
398 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
399 . NULL, FALSE, 0, 0, FALSE)
403 Helper routine to turn a symbol into a relocation value.
405 .#define HOWTO_PREPARE(relocation, symbol) \
407 . if (symbol != NULL) \
409 . if (bfd_is_com_section (symbol->section)) \
415 . relocation = symbol->value; \
427 unsigned int bfd_get_reloc_size (reloc_howto_type *);
430 For a reloc_howto_type that operates on a fixed number of bytes,
431 this returns the number of bytes operated on.
435 bfd_get_reloc_size (reloc_howto_type
*howto
)
456 How relocs are tied together in an <<asection>>:
458 .typedef struct relent_chain
461 . struct relent_chain *next;
467 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
468 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
475 bfd_reloc_status_type bfd_check_overflow
476 (enum complain_overflow how,
477 unsigned int bitsize,
478 unsigned int rightshift,
479 unsigned int addrsize,
483 Perform overflow checking on @var{relocation} which has
484 @var{bitsize} significant bits and will be shifted right by
485 @var{rightshift} bits, on a machine with addresses containing
486 @var{addrsize} significant bits. The result is either of
487 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
491 bfd_reloc_status_type
492 bfd_check_overflow (enum complain_overflow how
,
493 unsigned int bitsize
,
494 unsigned int rightshift
,
495 unsigned int addrsize
,
498 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
499 bfd_reloc_status_type flag
= bfd_reloc_ok
;
501 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
502 we'll be permissive: extra bits in the field mask will
503 automatically extend the address mask for purposes of the
505 fieldmask
= N_ONES (bitsize
);
506 signmask
= ~fieldmask
;
507 addrmask
= N_ONES (addrsize
) | fieldmask
;
508 a
= (relocation
& addrmask
) >> rightshift
;;
512 case complain_overflow_dont
:
515 case complain_overflow_signed
:
516 /* If any sign bits are set, all sign bits must be set. That
517 is, A must be a valid negative address after shifting. */
518 signmask
= ~ (fieldmask
>> 1);
521 case complain_overflow_bitfield
:
522 /* Bitfields are sometimes signed, sometimes unsigned. We
523 explicitly allow an address wrap too, which means a bitfield
524 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
525 if the value has some, but not all, bits set outside the
528 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
529 flag
= bfd_reloc_overflow
;
532 case complain_overflow_unsigned
:
533 /* We have an overflow if the address does not fit in the field. */
534 if ((a
& signmask
) != 0)
535 flag
= bfd_reloc_overflow
;
547 bfd_perform_relocation
550 bfd_reloc_status_type bfd_perform_relocation
552 arelent *reloc_entry,
554 asection *input_section,
556 char **error_message);
559 If @var{output_bfd} is supplied to this function, the
560 generated image will be relocatable; the relocations are
561 copied to the output file after they have been changed to
562 reflect the new state of the world. There are two ways of
563 reflecting the results of partial linkage in an output file:
564 by modifying the output data in place, and by modifying the
565 relocation record. Some native formats (e.g., basic a.out and
566 basic coff) have no way of specifying an addend in the
567 relocation type, so the addend has to go in the output data.
568 This is no big deal since in these formats the output data
569 slot will always be big enough for the addend. Complex reloc
570 types with addends were invented to solve just this problem.
571 The @var{error_message} argument is set to an error message if
572 this return @code{bfd_reloc_dangerous}.
576 bfd_reloc_status_type
577 bfd_perform_relocation (bfd
*abfd
,
578 arelent
*reloc_entry
,
580 asection
*input_section
,
582 char **error_message
)
585 bfd_reloc_status_type flag
= bfd_reloc_ok
;
586 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
587 bfd_vma output_base
= 0;
588 reloc_howto_type
*howto
= reloc_entry
->howto
;
589 asection
*reloc_target_output_section
;
592 symbol
= *(reloc_entry
->sym_ptr_ptr
);
593 if (bfd_is_abs_section (symbol
->section
)
594 && output_bfd
!= NULL
)
596 reloc_entry
->address
+= input_section
->output_offset
;
600 /* If we are not producing relocatable output, return an error if
601 the symbol is not defined. An undefined weak symbol is
602 considered to have a value of zero (SVR4 ABI, p. 4-27). */
603 if (bfd_is_und_section (symbol
->section
)
604 && (symbol
->flags
& BSF_WEAK
) == 0
605 && output_bfd
== NULL
)
606 flag
= bfd_reloc_undefined
;
608 /* If there is a function supplied to handle this relocation type,
609 call it. It'll return `bfd_reloc_continue' if further processing
611 if (howto
->special_function
)
613 bfd_reloc_status_type cont
;
614 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
615 input_section
, output_bfd
,
617 if (cont
!= bfd_reloc_continue
)
621 /* Is the address of the relocation really within the section? */
622 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
623 return bfd_reloc_outofrange
;
625 /* Work out which section the relocation is targeted at and the
626 initial relocation command value. */
628 /* Get symbol value. (Common symbols are special.) */
629 if (bfd_is_com_section (symbol
->section
))
632 relocation
= symbol
->value
;
634 reloc_target_output_section
= symbol
->section
->output_section
;
636 /* Convert input-section-relative symbol value to absolute. */
637 if ((output_bfd
&& ! howto
->partial_inplace
)
638 || reloc_target_output_section
== NULL
)
641 output_base
= reloc_target_output_section
->vma
;
643 relocation
+= output_base
+ symbol
->section
->output_offset
;
645 /* Add in supplied addend. */
646 relocation
+= reloc_entry
->addend
;
648 /* Here the variable relocation holds the final address of the
649 symbol we are relocating against, plus any addend. */
651 if (howto
->pc_relative
)
653 /* This is a PC relative relocation. We want to set RELOCATION
654 to the distance between the address of the symbol and the
655 location. RELOCATION is already the address of the symbol.
657 We start by subtracting the address of the section containing
660 If pcrel_offset is set, we must further subtract the position
661 of the location within the section. Some targets arrange for
662 the addend to be the negative of the position of the location
663 within the section; for example, i386-aout does this. For
664 i386-aout, pcrel_offset is FALSE. Some other targets do not
665 include the position of the location; for example, m88kbcs,
666 or ELF. For those targets, pcrel_offset is TRUE.
668 If we are producing relocatable output, then we must ensure
669 that this reloc will be correctly computed when the final
670 relocation is done. If pcrel_offset is FALSE we want to wind
671 up with the negative of the location within the section,
672 which means we must adjust the existing addend by the change
673 in the location within the section. If pcrel_offset is TRUE
674 we do not want to adjust the existing addend at all.
676 FIXME: This seems logical to me, but for the case of
677 producing relocatable output it is not what the code
678 actually does. I don't want to change it, because it seems
679 far too likely that something will break. */
682 input_section
->output_section
->vma
+ input_section
->output_offset
;
684 if (howto
->pcrel_offset
)
685 relocation
-= reloc_entry
->address
;
688 if (output_bfd
!= NULL
)
690 if (! howto
->partial_inplace
)
692 /* This is a partial relocation, and we want to apply the relocation
693 to the reloc entry rather than the raw data. Modify the reloc
694 inplace to reflect what we now know. */
695 reloc_entry
->addend
= relocation
;
696 reloc_entry
->address
+= input_section
->output_offset
;
701 /* This is a partial relocation, but inplace, so modify the
704 If we've relocated with a symbol with a section, change
705 into a ref to the section belonging to the symbol. */
707 reloc_entry
->address
+= input_section
->output_offset
;
710 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
711 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
712 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
714 /* For m68k-coff, the addend was being subtracted twice during
715 relocation with -r. Removing the line below this comment
716 fixes that problem; see PR 2953.
718 However, Ian wrote the following, regarding removing the line below,
719 which explains why it is still enabled: --djm
721 If you put a patch like that into BFD you need to check all the COFF
722 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
723 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
724 problem in a different way. There may very well be a reason that the
725 code works as it does.
727 Hmmm. The first obvious point is that bfd_perform_relocation should
728 not have any tests that depend upon the flavour. It's seem like
729 entirely the wrong place for such a thing. The second obvious point
730 is that the current code ignores the reloc addend when producing
731 relocatable output for COFF. That's peculiar. In fact, I really
732 have no idea what the point of the line you want to remove is.
734 A typical COFF reloc subtracts the old value of the symbol and adds in
735 the new value to the location in the object file (if it's a pc
736 relative reloc it adds the difference between the symbol value and the
737 location). When relocating we need to preserve that property.
739 BFD handles this by setting the addend to the negative of the old
740 value of the symbol. Unfortunately it handles common symbols in a
741 non-standard way (it doesn't subtract the old value) but that's a
742 different story (we can't change it without losing backward
743 compatibility with old object files) (coff-i386 does subtract the old
744 value, to be compatible with existing coff-i386 targets, like SCO).
746 So everything works fine when not producing relocatable output. When
747 we are producing relocatable output, logically we should do exactly
748 what we do when not producing relocatable output. Therefore, your
749 patch is correct. In fact, it should probably always just set
750 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
751 add the value into the object file. This won't hurt the COFF code,
752 which doesn't use the addend; I'm not sure what it will do to other
753 formats (the thing to check for would be whether any formats both use
754 the addend and set partial_inplace).
756 When I wanted to make coff-i386 produce relocatable output, I ran
757 into the problem that you are running into: I wanted to remove that
758 line. Rather than risk it, I made the coff-i386 relocs use a special
759 function; it's coff_i386_reloc in coff-i386.c. The function
760 specifically adds the addend field into the object file, knowing that
761 bfd_perform_relocation is not going to. If you remove that line, then
762 coff-i386.c will wind up adding the addend field in twice. It's
763 trivial to fix; it just needs to be done.
765 The problem with removing the line is just that it may break some
766 working code. With BFD it's hard to be sure of anything. The right
767 way to deal with this is simply to build and test at least all the
768 supported COFF targets. It should be straightforward if time and disk
769 space consuming. For each target:
771 2) generate some executable, and link it using -r (I would
772 probably use paranoia.o and link against newlib/libc.a, which
773 for all the supported targets would be available in
774 /usr/cygnus/progressive/H-host/target/lib/libc.a).
775 3) make the change to reloc.c
776 4) rebuild the linker
778 6) if the resulting object files are the same, you have at least
780 7) if they are different you have to figure out which version is
783 relocation
-= reloc_entry
->addend
;
784 reloc_entry
->addend
= 0;
788 reloc_entry
->addend
= relocation
;
794 reloc_entry
->addend
= 0;
797 /* FIXME: This overflow checking is incomplete, because the value
798 might have overflowed before we get here. For a correct check we
799 need to compute the value in a size larger than bitsize, but we
800 can't reasonably do that for a reloc the same size as a host
802 FIXME: We should also do overflow checking on the result after
803 adding in the value contained in the object file. */
804 if (howto
->complain_on_overflow
!= complain_overflow_dont
805 && flag
== bfd_reloc_ok
)
806 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
809 bfd_arch_bits_per_address (abfd
),
812 /* Either we are relocating all the way, or we don't want to apply
813 the relocation to the reloc entry (probably because there isn't
814 any room in the output format to describe addends to relocs). */
816 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
817 (OSF version 1.3, compiler version 3.11). It miscompiles the
831 x <<= (unsigned long) s.i0;
835 printf ("succeeded (%lx)\n", x);
839 relocation
>>= (bfd_vma
) howto
->rightshift
;
841 /* Shift everything up to where it's going to be used. */
842 relocation
<<= (bfd_vma
) howto
->bitpos
;
844 /* Wait for the day when all have the mask in them. */
847 i instruction to be left alone
848 o offset within instruction
849 r relocation offset to apply
858 (( i i i i i o o o o o from bfd_get<size>
859 and S S S S S) to get the size offset we want
860 + r r r r r r r r r r) to get the final value to place
861 and D D D D D to chop to right size
862 -----------------------
865 ( i i i i i o o o o o from bfd_get<size>
866 and N N N N N ) get instruction
867 -----------------------
873 -----------------------
874 = R R R R R R R R R R put into bfd_put<size>
878 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
884 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
886 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
892 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
894 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
899 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
901 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
906 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
907 relocation
= -relocation
;
909 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
915 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
916 relocation
= -relocation
;
918 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
929 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
931 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
938 return bfd_reloc_other
;
946 bfd_install_relocation
949 bfd_reloc_status_type bfd_install_relocation
951 arelent *reloc_entry,
952 void *data, bfd_vma data_start,
953 asection *input_section,
954 char **error_message);
957 This looks remarkably like <<bfd_perform_relocation>>, except it
958 does not expect that the section contents have been filled in.
959 I.e., it's suitable for use when creating, rather than applying
962 For now, this function should be considered reserved for the
966 bfd_reloc_status_type
967 bfd_install_relocation (bfd
*abfd
,
968 arelent
*reloc_entry
,
970 bfd_vma data_start_offset
,
971 asection
*input_section
,
972 char **error_message
)
975 bfd_reloc_status_type flag
= bfd_reloc_ok
;
976 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
977 bfd_vma output_base
= 0;
978 reloc_howto_type
*howto
= reloc_entry
->howto
;
979 asection
*reloc_target_output_section
;
983 symbol
= *(reloc_entry
->sym_ptr_ptr
);
984 if (bfd_is_abs_section (symbol
->section
))
986 reloc_entry
->address
+= input_section
->output_offset
;
990 /* If there is a function supplied to handle this relocation type,
991 call it. It'll return `bfd_reloc_continue' if further processing
993 if (howto
->special_function
)
995 bfd_reloc_status_type cont
;
997 /* XXX - The special_function calls haven't been fixed up to deal
998 with creating new relocations and section contents. */
999 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1000 /* XXX - Non-portable! */
1001 ((bfd_byte
*) data_start
1002 - data_start_offset
),
1003 input_section
, abfd
, error_message
);
1004 if (cont
!= bfd_reloc_continue
)
1008 /* Is the address of the relocation really within the section? */
1009 if (reloc_entry
->address
> bfd_get_section_limit (abfd
, input_section
))
1010 return bfd_reloc_outofrange
;
1012 /* Work out which section the relocation is targeted at and the
1013 initial relocation command value. */
1015 /* Get symbol value. (Common symbols are special.) */
1016 if (bfd_is_com_section (symbol
->section
))
1019 relocation
= symbol
->value
;
1021 reloc_target_output_section
= symbol
->section
->output_section
;
1023 /* Convert input-section-relative symbol value to absolute. */
1024 if (! howto
->partial_inplace
)
1027 output_base
= reloc_target_output_section
->vma
;
1029 relocation
+= output_base
+ symbol
->section
->output_offset
;
1031 /* Add in supplied addend. */
1032 relocation
+= reloc_entry
->addend
;
1034 /* Here the variable relocation holds the final address of the
1035 symbol we are relocating against, plus any addend. */
1037 if (howto
->pc_relative
)
1039 /* This is a PC relative relocation. We want to set RELOCATION
1040 to the distance between the address of the symbol and the
1041 location. RELOCATION is already the address of the symbol.
1043 We start by subtracting the address of the section containing
1046 If pcrel_offset is set, we must further subtract the position
1047 of the location within the section. Some targets arrange for
1048 the addend to be the negative of the position of the location
1049 within the section; for example, i386-aout does this. For
1050 i386-aout, pcrel_offset is FALSE. Some other targets do not
1051 include the position of the location; for example, m88kbcs,
1052 or ELF. For those targets, pcrel_offset is TRUE.
1054 If we are producing relocatable output, then we must ensure
1055 that this reloc will be correctly computed when the final
1056 relocation is done. If pcrel_offset is FALSE we want to wind
1057 up with the negative of the location within the section,
1058 which means we must adjust the existing addend by the change
1059 in the location within the section. If pcrel_offset is TRUE
1060 we do not want to adjust the existing addend at all.
1062 FIXME: This seems logical to me, but for the case of
1063 producing relocatable output it is not what the code
1064 actually does. I don't want to change it, because it seems
1065 far too likely that something will break. */
1068 input_section
->output_section
->vma
+ input_section
->output_offset
;
1070 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1071 relocation
-= reloc_entry
->address
;
1074 if (! howto
->partial_inplace
)
1076 /* This is a partial relocation, and we want to apply the relocation
1077 to the reloc entry rather than the raw data. Modify the reloc
1078 inplace to reflect what we now know. */
1079 reloc_entry
->addend
= relocation
;
1080 reloc_entry
->address
+= input_section
->output_offset
;
1085 /* This is a partial relocation, but inplace, so modify the
1088 If we've relocated with a symbol with a section, change
1089 into a ref to the section belonging to the symbol. */
1090 reloc_entry
->address
+= input_section
->output_offset
;
1093 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1094 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1095 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1098 /* For m68k-coff, the addend was being subtracted twice during
1099 relocation with -r. Removing the line below this comment
1100 fixes that problem; see PR 2953.
1102 However, Ian wrote the following, regarding removing the line below,
1103 which explains why it is still enabled: --djm
1105 If you put a patch like that into BFD you need to check all the COFF
1106 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1107 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1108 problem in a different way. There may very well be a reason that the
1109 code works as it does.
1111 Hmmm. The first obvious point is that bfd_install_relocation should
1112 not have any tests that depend upon the flavour. It's seem like
1113 entirely the wrong place for such a thing. The second obvious point
1114 is that the current code ignores the reloc addend when producing
1115 relocatable output for COFF. That's peculiar. In fact, I really
1116 have no idea what the point of the line you want to remove is.
1118 A typical COFF reloc subtracts the old value of the symbol and adds in
1119 the new value to the location in the object file (if it's a pc
1120 relative reloc it adds the difference between the symbol value and the
1121 location). When relocating we need to preserve that property.
1123 BFD handles this by setting the addend to the negative of the old
1124 value of the symbol. Unfortunately it handles common symbols in a
1125 non-standard way (it doesn't subtract the old value) but that's a
1126 different story (we can't change it without losing backward
1127 compatibility with old object files) (coff-i386 does subtract the old
1128 value, to be compatible with existing coff-i386 targets, like SCO).
1130 So everything works fine when not producing relocatable output. When
1131 we are producing relocatable output, logically we should do exactly
1132 what we do when not producing relocatable output. Therefore, your
1133 patch is correct. In fact, it should probably always just set
1134 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1135 add the value into the object file. This won't hurt the COFF code,
1136 which doesn't use the addend; I'm not sure what it will do to other
1137 formats (the thing to check for would be whether any formats both use
1138 the addend and set partial_inplace).
1140 When I wanted to make coff-i386 produce relocatable output, I ran
1141 into the problem that you are running into: I wanted to remove that
1142 line. Rather than risk it, I made the coff-i386 relocs use a special
1143 function; it's coff_i386_reloc in coff-i386.c. The function
1144 specifically adds the addend field into the object file, knowing that
1145 bfd_install_relocation is not going to. If you remove that line, then
1146 coff-i386.c will wind up adding the addend field in twice. It's
1147 trivial to fix; it just needs to be done.
1149 The problem with removing the line is just that it may break some
1150 working code. With BFD it's hard to be sure of anything. The right
1151 way to deal with this is simply to build and test at least all the
1152 supported COFF targets. It should be straightforward if time and disk
1153 space consuming. For each target:
1155 2) generate some executable, and link it using -r (I would
1156 probably use paranoia.o and link against newlib/libc.a, which
1157 for all the supported targets would be available in
1158 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1159 3) make the change to reloc.c
1160 4) rebuild the linker
1162 6) if the resulting object files are the same, you have at least
1164 7) if they are different you have to figure out which version is
1166 relocation
-= reloc_entry
->addend
;
1167 /* FIXME: There should be no target specific code here... */
1168 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1169 reloc_entry
->addend
= 0;
1173 reloc_entry
->addend
= relocation
;
1177 /* FIXME: This overflow checking is incomplete, because the value
1178 might have overflowed before we get here. For a correct check we
1179 need to compute the value in a size larger than bitsize, but we
1180 can't reasonably do that for a reloc the same size as a host
1182 FIXME: We should also do overflow checking on the result after
1183 adding in the value contained in the object file. */
1184 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1185 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1188 bfd_arch_bits_per_address (abfd
),
1191 /* Either we are relocating all the way, or we don't want to apply
1192 the relocation to the reloc entry (probably because there isn't
1193 any room in the output format to describe addends to relocs). */
1195 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1196 (OSF version 1.3, compiler version 3.11). It miscompiles the
1210 x <<= (unsigned long) s.i0;
1212 printf ("failed\n");
1214 printf ("succeeded (%lx)\n", x);
1218 relocation
>>= (bfd_vma
) howto
->rightshift
;
1220 /* Shift everything up to where it's going to be used. */
1221 relocation
<<= (bfd_vma
) howto
->bitpos
;
1223 /* Wait for the day when all have the mask in them. */
1226 i instruction to be left alone
1227 o offset within instruction
1228 r relocation offset to apply
1237 (( i i i i i o o o o o from bfd_get<size>
1238 and S S S S S) to get the size offset we want
1239 + r r r r r r r r r r) to get the final value to place
1240 and D D D D D to chop to right size
1241 -----------------------
1244 ( i i i i i o o o o o from bfd_get<size>
1245 and N N N N N ) get instruction
1246 -----------------------
1252 -----------------------
1253 = R R R R R R R R R R put into bfd_put<size>
1257 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1259 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1261 switch (howto
->size
)
1265 char x
= bfd_get_8 (abfd
, data
);
1267 bfd_put_8 (abfd
, x
, data
);
1273 short x
= bfd_get_16 (abfd
, data
);
1275 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1280 long x
= bfd_get_32 (abfd
, data
);
1282 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1287 long x
= bfd_get_32 (abfd
, data
);
1288 relocation
= -relocation
;
1290 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1300 bfd_vma x
= bfd_get_64 (abfd
, data
);
1302 bfd_put_64 (abfd
, x
, data
);
1306 return bfd_reloc_other
;
1312 /* This relocation routine is used by some of the backend linkers.
1313 They do not construct asymbol or arelent structures, so there is no
1314 reason for them to use bfd_perform_relocation. Also,
1315 bfd_perform_relocation is so hacked up it is easier to write a new
1316 function than to try to deal with it.
1318 This routine does a final relocation. Whether it is useful for a
1319 relocatable link depends upon how the object format defines
1322 FIXME: This routine ignores any special_function in the HOWTO,
1323 since the existing special_function values have been written for
1324 bfd_perform_relocation.
1326 HOWTO is the reloc howto information.
1327 INPUT_BFD is the BFD which the reloc applies to.
1328 INPUT_SECTION is the section which the reloc applies to.
1329 CONTENTS is the contents of the section.
1330 ADDRESS is the address of the reloc within INPUT_SECTION.
1331 VALUE is the value of the symbol the reloc refers to.
1332 ADDEND is the addend of the reloc. */
1334 bfd_reloc_status_type
1335 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1337 asection
*input_section
,
1345 /* Sanity check the address. */
1346 if (address
> bfd_get_section_limit (input_bfd
, input_section
))
1347 return bfd_reloc_outofrange
;
1349 /* This function assumes that we are dealing with a basic relocation
1350 against a symbol. We want to compute the value of the symbol to
1351 relocate to. This is just VALUE, the value of the symbol, plus
1352 ADDEND, any addend associated with the reloc. */
1353 relocation
= value
+ addend
;
1355 /* If the relocation is PC relative, we want to set RELOCATION to
1356 the distance between the symbol (currently in RELOCATION) and the
1357 location we are relocating. Some targets (e.g., i386-aout)
1358 arrange for the contents of the section to be the negative of the
1359 offset of the location within the section; for such targets
1360 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1361 simply leave the contents of the section as zero; for such
1362 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1363 need to subtract out the offset of the location within the
1364 section (which is just ADDRESS). */
1365 if (howto
->pc_relative
)
1367 relocation
-= (input_section
->output_section
->vma
1368 + input_section
->output_offset
);
1369 if (howto
->pcrel_offset
)
1370 relocation
-= address
;
1373 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1374 contents
+ address
);
1377 /* Relocate a given location using a given value and howto. */
1379 bfd_reloc_status_type
1380 _bfd_relocate_contents (reloc_howto_type
*howto
,
1387 bfd_reloc_status_type flag
;
1388 unsigned int rightshift
= howto
->rightshift
;
1389 unsigned int bitpos
= howto
->bitpos
;
1391 /* If the size is negative, negate RELOCATION. This isn't very
1393 if (howto
->size
< 0)
1394 relocation
= -relocation
;
1396 /* Get the value we are going to relocate. */
1397 size
= bfd_get_reloc_size (howto
);
1404 x
= bfd_get_8 (input_bfd
, location
);
1407 x
= bfd_get_16 (input_bfd
, location
);
1410 x
= bfd_get_32 (input_bfd
, location
);
1414 x
= bfd_get_64 (input_bfd
, location
);
1421 /* Check for overflow. FIXME: We may drop bits during the addition
1422 which we don't check for. We must either check at every single
1423 operation, which would be tedious, or we must do the computations
1424 in a type larger than bfd_vma, which would be inefficient. */
1425 flag
= bfd_reloc_ok
;
1426 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1428 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1431 /* Get the values to be added together. For signed and unsigned
1432 relocations, we assume that all values should be truncated to
1433 the size of an address. For bitfields, all the bits matter.
1434 See also bfd_check_overflow. */
1435 fieldmask
= N_ONES (howto
->bitsize
);
1436 signmask
= ~fieldmask
;
1437 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1438 a
= (relocation
& addrmask
) >> rightshift
;
1439 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1441 switch (howto
->complain_on_overflow
)
1443 case complain_overflow_signed
:
1444 /* If any sign bits are set, all sign bits must be set.
1445 That is, A must be a valid negative address after
1447 signmask
= ~(fieldmask
>> 1);
1450 case complain_overflow_bitfield
:
1451 /* Much like the signed check, but for a field one bit
1452 wider. We allow a bitfield to represent numbers in the
1453 range -2**n to 2**n-1, where n is the number of bits in the
1454 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1455 can't overflow, which is exactly what we want. */
1457 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1458 flag
= bfd_reloc_overflow
;
1460 /* We only need this next bit of code if the sign bit of B
1461 is below the sign bit of A. This would only happen if
1462 SRC_MASK had fewer bits than BITSIZE. Note that if
1463 SRC_MASK has more bits than BITSIZE, we can get into
1464 trouble; we would need to verify that B is in range, as
1465 we do for A above. */
1466 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1469 /* Set all the bits above the sign bit. */
1472 /* Now we can do the addition. */
1475 /* See if the result has the correct sign. Bits above the
1476 sign bit are junk now; ignore them. If the sum is
1477 positive, make sure we did not have all negative inputs;
1478 if the sum is negative, make sure we did not have all
1479 positive inputs. The test below looks only at the sign
1480 bits, and it really just
1481 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1483 We mask with addrmask here to explicitly allow an address
1484 wrap-around. The Linux kernel relies on it, and it is
1485 the only way to write assembler code which can run when
1486 loaded at a location 0x80000000 away from the location at
1487 which it is linked. */
1488 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1489 flag
= bfd_reloc_overflow
;
1492 case complain_overflow_unsigned
:
1493 /* Checking for an unsigned overflow is relatively easy:
1494 trim the addresses and add, and trim the result as well.
1495 Overflow is normally indicated when the result does not
1496 fit in the field. However, we also need to consider the
1497 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1498 input is 0x80000000, and bfd_vma is only 32 bits; then we
1499 will get sum == 0, but there is an overflow, since the
1500 inputs did not fit in the field. Instead of doing a
1501 separate test, we can check for this by or-ing in the
1502 operands when testing for the sum overflowing its final
1504 sum
= (a
+ b
) & addrmask
;
1505 if ((a
| b
| sum
) & signmask
)
1506 flag
= bfd_reloc_overflow
;
1514 /* Put RELOCATION in the right bits. */
1515 relocation
>>= (bfd_vma
) rightshift
;
1516 relocation
<<= (bfd_vma
) bitpos
;
1518 /* Add RELOCATION to the right bits of X. */
1519 x
= ((x
& ~howto
->dst_mask
)
1520 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1522 /* Put the relocated value back in the object file. */
1528 bfd_put_8 (input_bfd
, x
, location
);
1531 bfd_put_16 (input_bfd
, x
, location
);
1534 bfd_put_32 (input_bfd
, x
, location
);
1538 bfd_put_64 (input_bfd
, x
, location
);
1548 /* Clear a given location using a given howto, by applying a relocation value
1549 of zero and discarding any in-place addend. This is used for fixed-up
1550 relocations against discarded symbols, to make ignorable debug or unwind
1551 information more obvious. */
1554 _bfd_clear_contents (reloc_howto_type
*howto
,
1561 /* Get the value we are going to relocate. */
1562 size
= bfd_get_reloc_size (howto
);
1569 x
= bfd_get_8 (input_bfd
, location
);
1572 x
= bfd_get_16 (input_bfd
, location
);
1575 x
= bfd_get_32 (input_bfd
, location
);
1579 x
= bfd_get_64 (input_bfd
, location
);
1586 /* Zero out the unwanted bits of X. */
1587 x
&= ~howto
->dst_mask
;
1589 /* Put the relocated value back in the object file. */
1596 bfd_put_8 (input_bfd
, x
, location
);
1599 bfd_put_16 (input_bfd
, x
, location
);
1602 bfd_put_32 (input_bfd
, x
, location
);
1606 bfd_put_64 (input_bfd
, x
, location
);
1617 howto manager, , typedef arelent, Relocations
1622 When an application wants to create a relocation, but doesn't
1623 know what the target machine might call it, it can find out by
1624 using this bit of code.
1633 The insides of a reloc code. The idea is that, eventually, there
1634 will be one enumerator for every type of relocation we ever do.
1635 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1636 return a howto pointer.
1638 This does mean that the application must determine the correct
1639 enumerator value; you can't get a howto pointer from a random set
1660 Basic absolute relocations of N bits.
1675 PC-relative relocations. Sometimes these are relative to the address
1676 of the relocation itself; sometimes they are relative to the start of
1677 the section containing the relocation. It depends on the specific target.
1679 The 24-bit relocation is used in some Intel 960 configurations.
1684 Section relative relocations. Some targets need this for DWARF2.
1687 BFD_RELOC_32_GOT_PCREL
1689 BFD_RELOC_16_GOT_PCREL
1691 BFD_RELOC_8_GOT_PCREL
1697 BFD_RELOC_LO16_GOTOFF
1699 BFD_RELOC_HI16_GOTOFF
1701 BFD_RELOC_HI16_S_GOTOFF
1705 BFD_RELOC_64_PLT_PCREL
1707 BFD_RELOC_32_PLT_PCREL
1709 BFD_RELOC_24_PLT_PCREL
1711 BFD_RELOC_16_PLT_PCREL
1713 BFD_RELOC_8_PLT_PCREL
1721 BFD_RELOC_LO16_PLTOFF
1723 BFD_RELOC_HI16_PLTOFF
1725 BFD_RELOC_HI16_S_PLTOFF
1732 BFD_RELOC_68K_GLOB_DAT
1734 BFD_RELOC_68K_JMP_SLOT
1736 BFD_RELOC_68K_RELATIVE
1738 Relocations used by 68K ELF.
1741 BFD_RELOC_32_BASEREL
1743 BFD_RELOC_16_BASEREL
1745 BFD_RELOC_LO16_BASEREL
1747 BFD_RELOC_HI16_BASEREL
1749 BFD_RELOC_HI16_S_BASEREL
1755 Linkage-table relative.
1760 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1763 BFD_RELOC_32_PCREL_S2
1765 BFD_RELOC_16_PCREL_S2
1767 BFD_RELOC_23_PCREL_S2
1769 These PC-relative relocations are stored as word displacements --
1770 i.e., byte displacements shifted right two bits. The 30-bit word
1771 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1772 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1773 signed 16-bit displacement is used on the MIPS, and the 23-bit
1774 displacement is used on the Alpha.
1781 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1782 the target word. These are used on the SPARC.
1789 For systems that allocate a Global Pointer register, these are
1790 displacements off that register. These relocation types are
1791 handled specially, because the value the register will have is
1792 decided relatively late.
1795 BFD_RELOC_I960_CALLJ
1797 Reloc types used for i960/b.out.
1802 BFD_RELOC_SPARC_WDISP22
1808 BFD_RELOC_SPARC_GOT10
1810 BFD_RELOC_SPARC_GOT13
1812 BFD_RELOC_SPARC_GOT22
1814 BFD_RELOC_SPARC_PC10
1816 BFD_RELOC_SPARC_PC22
1818 BFD_RELOC_SPARC_WPLT30
1820 BFD_RELOC_SPARC_COPY
1822 BFD_RELOC_SPARC_GLOB_DAT
1824 BFD_RELOC_SPARC_JMP_SLOT
1826 BFD_RELOC_SPARC_RELATIVE
1828 BFD_RELOC_SPARC_UA16
1830 BFD_RELOC_SPARC_UA32
1832 BFD_RELOC_SPARC_UA64
1834 SPARC ELF relocations. There is probably some overlap with other
1835 relocation types already defined.
1838 BFD_RELOC_SPARC_BASE13
1840 BFD_RELOC_SPARC_BASE22
1842 I think these are specific to SPARC a.out (e.g., Sun 4).
1852 BFD_RELOC_SPARC_OLO10
1854 BFD_RELOC_SPARC_HH22
1856 BFD_RELOC_SPARC_HM10
1858 BFD_RELOC_SPARC_LM22
1860 BFD_RELOC_SPARC_PC_HH22
1862 BFD_RELOC_SPARC_PC_HM10
1864 BFD_RELOC_SPARC_PC_LM22
1866 BFD_RELOC_SPARC_WDISP16
1868 BFD_RELOC_SPARC_WDISP19
1876 BFD_RELOC_SPARC_DISP64
1879 BFD_RELOC_SPARC_PLT32
1881 BFD_RELOC_SPARC_PLT64
1883 BFD_RELOC_SPARC_HIX22
1885 BFD_RELOC_SPARC_LOX10
1893 BFD_RELOC_SPARC_REGISTER
1898 BFD_RELOC_SPARC_REV32
1900 SPARC little endian relocation
1902 BFD_RELOC_SPARC_TLS_GD_HI22
1904 BFD_RELOC_SPARC_TLS_GD_LO10
1906 BFD_RELOC_SPARC_TLS_GD_ADD
1908 BFD_RELOC_SPARC_TLS_GD_CALL
1910 BFD_RELOC_SPARC_TLS_LDM_HI22
1912 BFD_RELOC_SPARC_TLS_LDM_LO10
1914 BFD_RELOC_SPARC_TLS_LDM_ADD
1916 BFD_RELOC_SPARC_TLS_LDM_CALL
1918 BFD_RELOC_SPARC_TLS_LDO_HIX22
1920 BFD_RELOC_SPARC_TLS_LDO_LOX10
1922 BFD_RELOC_SPARC_TLS_LDO_ADD
1924 BFD_RELOC_SPARC_TLS_IE_HI22
1926 BFD_RELOC_SPARC_TLS_IE_LO10
1928 BFD_RELOC_SPARC_TLS_IE_LD
1930 BFD_RELOC_SPARC_TLS_IE_LDX
1932 BFD_RELOC_SPARC_TLS_IE_ADD
1934 BFD_RELOC_SPARC_TLS_LE_HIX22
1936 BFD_RELOC_SPARC_TLS_LE_LOX10
1938 BFD_RELOC_SPARC_TLS_DTPMOD32
1940 BFD_RELOC_SPARC_TLS_DTPMOD64
1942 BFD_RELOC_SPARC_TLS_DTPOFF32
1944 BFD_RELOC_SPARC_TLS_DTPOFF64
1946 BFD_RELOC_SPARC_TLS_TPOFF32
1948 BFD_RELOC_SPARC_TLS_TPOFF64
1950 SPARC TLS relocations
1959 BFD_RELOC_SPU_IMM10W
1963 BFD_RELOC_SPU_IMM16W
1967 BFD_RELOC_SPU_PCREL9a
1969 BFD_RELOC_SPU_PCREL9b
1971 BFD_RELOC_SPU_PCREL16
1984 BFD_RELOC_ALPHA_GPDISP_HI16
1986 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1987 "addend" in some special way.
1988 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1989 writing; when reading, it will be the absolute section symbol. The
1990 addend is the displacement in bytes of the "lda" instruction from
1991 the "ldah" instruction (which is at the address of this reloc).
1993 BFD_RELOC_ALPHA_GPDISP_LO16
1995 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1996 with GPDISP_HI16 relocs. The addend is ignored when writing the
1997 relocations out, and is filled in with the file's GP value on
1998 reading, for convenience.
2001 BFD_RELOC_ALPHA_GPDISP
2003 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
2004 relocation except that there is no accompanying GPDISP_LO16
2008 BFD_RELOC_ALPHA_LITERAL
2010 BFD_RELOC_ALPHA_ELF_LITERAL
2012 BFD_RELOC_ALPHA_LITUSE
2014 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
2015 the assembler turns it into a LDQ instruction to load the address of
2016 the symbol, and then fills in a register in the real instruction.
2018 The LITERAL reloc, at the LDQ instruction, refers to the .lita
2019 section symbol. The addend is ignored when writing, but is filled
2020 in with the file's GP value on reading, for convenience, as with the
2023 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
2024 It should refer to the symbol to be referenced, as with 16_GOTOFF,
2025 but it generates output not based on the position within the .got
2026 section, but relative to the GP value chosen for the file during the
2029 The LITUSE reloc, on the instruction using the loaded address, gives
2030 information to the linker that it might be able to use to optimize
2031 away some literal section references. The symbol is ignored (read
2032 as the absolute section symbol), and the "addend" indicates the type
2033 of instruction using the register:
2034 1 - "memory" fmt insn
2035 2 - byte-manipulation (byte offset reg)
2036 3 - jsr (target of branch)
2039 BFD_RELOC_ALPHA_HINT
2041 The HINT relocation indicates a value that should be filled into the
2042 "hint" field of a jmp/jsr/ret instruction, for possible branch-
2043 prediction logic which may be provided on some processors.
2046 BFD_RELOC_ALPHA_LINKAGE
2048 The LINKAGE relocation outputs a linkage pair in the object file,
2049 which is filled by the linker.
2052 BFD_RELOC_ALPHA_CODEADDR
2054 The CODEADDR relocation outputs a STO_CA in the object file,
2055 which is filled by the linker.
2058 BFD_RELOC_ALPHA_GPREL_HI16
2060 BFD_RELOC_ALPHA_GPREL_LO16
2062 The GPREL_HI/LO relocations together form a 32-bit offset from the
2066 BFD_RELOC_ALPHA_BRSGP
2068 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2069 share a common GP, and the target address is adjusted for
2070 STO_ALPHA_STD_GPLOAD.
2073 BFD_RELOC_ALPHA_TLSGD
2075 BFD_RELOC_ALPHA_TLSLDM
2077 BFD_RELOC_ALPHA_DTPMOD64
2079 BFD_RELOC_ALPHA_GOTDTPREL16
2081 BFD_RELOC_ALPHA_DTPREL64
2083 BFD_RELOC_ALPHA_DTPREL_HI16
2085 BFD_RELOC_ALPHA_DTPREL_LO16
2087 BFD_RELOC_ALPHA_DTPREL16
2089 BFD_RELOC_ALPHA_GOTTPREL16
2091 BFD_RELOC_ALPHA_TPREL64
2093 BFD_RELOC_ALPHA_TPREL_HI16
2095 BFD_RELOC_ALPHA_TPREL_LO16
2097 BFD_RELOC_ALPHA_TPREL16
2099 Alpha thread-local storage relocations.
2104 Bits 27..2 of the relocation address shifted right 2 bits;
2105 simple reloc otherwise.
2108 BFD_RELOC_MIPS16_JMP
2110 The MIPS16 jump instruction.
2113 BFD_RELOC_MIPS16_GPREL
2115 MIPS16 GP relative reloc.
2120 High 16 bits of 32-bit value; simple reloc.
2124 High 16 bits of 32-bit value but the low 16 bits will be sign
2125 extended and added to form the final result. If the low 16
2126 bits form a negative number, we need to add one to the high value
2127 to compensate for the borrow when the low bits are added.
2134 BFD_RELOC_HI16_PCREL
2136 High 16 bits of 32-bit pc-relative value
2138 BFD_RELOC_HI16_S_PCREL
2140 High 16 bits of 32-bit pc-relative value, adjusted
2142 BFD_RELOC_LO16_PCREL
2144 Low 16 bits of pc-relative value
2147 BFD_RELOC_MIPS16_HI16
2149 MIPS16 high 16 bits of 32-bit value.
2151 BFD_RELOC_MIPS16_HI16_S
2153 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
2154 extended and added to form the final result. If the low 16
2155 bits form a negative number, we need to add one to the high value
2156 to compensate for the borrow when the low bits are added.
2158 BFD_RELOC_MIPS16_LO16
2163 BFD_RELOC_MIPS_LITERAL
2165 Relocation against a MIPS literal section.
2168 BFD_RELOC_MIPS_GOT16
2170 BFD_RELOC_MIPS_CALL16
2172 BFD_RELOC_MIPS_GOT_HI16
2174 BFD_RELOC_MIPS_GOT_LO16
2176 BFD_RELOC_MIPS_CALL_HI16
2178 BFD_RELOC_MIPS_CALL_LO16
2182 BFD_RELOC_MIPS_GOT_PAGE
2184 BFD_RELOC_MIPS_GOT_OFST
2186 BFD_RELOC_MIPS_GOT_DISP
2188 BFD_RELOC_MIPS_SHIFT5
2190 BFD_RELOC_MIPS_SHIFT6
2192 BFD_RELOC_MIPS_INSERT_A
2194 BFD_RELOC_MIPS_INSERT_B
2196 BFD_RELOC_MIPS_DELETE
2198 BFD_RELOC_MIPS_HIGHEST
2200 BFD_RELOC_MIPS_HIGHER
2202 BFD_RELOC_MIPS_SCN_DISP
2204 BFD_RELOC_MIPS_REL16
2206 BFD_RELOC_MIPS_RELGOT
2210 BFD_RELOC_MIPS_TLS_DTPMOD32
2212 BFD_RELOC_MIPS_TLS_DTPREL32
2214 BFD_RELOC_MIPS_TLS_DTPMOD64
2216 BFD_RELOC_MIPS_TLS_DTPREL64
2218 BFD_RELOC_MIPS_TLS_GD
2220 BFD_RELOC_MIPS_TLS_LDM
2222 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2224 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2226 BFD_RELOC_MIPS_TLS_GOTTPREL
2228 BFD_RELOC_MIPS_TLS_TPREL32
2230 BFD_RELOC_MIPS_TLS_TPREL64
2232 BFD_RELOC_MIPS_TLS_TPREL_HI16
2234 BFD_RELOC_MIPS_TLS_TPREL_LO16
2236 MIPS ELF relocations.
2242 BFD_RELOC_MIPS_JUMP_SLOT
2244 MIPS ELF relocations (VxWorks extensions).
2248 BFD_RELOC_FRV_LABEL16
2250 BFD_RELOC_FRV_LABEL24
2256 BFD_RELOC_FRV_GPREL12
2258 BFD_RELOC_FRV_GPRELU12
2260 BFD_RELOC_FRV_GPREL32
2262 BFD_RELOC_FRV_GPRELHI
2264 BFD_RELOC_FRV_GPRELLO
2272 BFD_RELOC_FRV_FUNCDESC
2274 BFD_RELOC_FRV_FUNCDESC_GOT12
2276 BFD_RELOC_FRV_FUNCDESC_GOTHI
2278 BFD_RELOC_FRV_FUNCDESC_GOTLO
2280 BFD_RELOC_FRV_FUNCDESC_VALUE
2282 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2284 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2286 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2288 BFD_RELOC_FRV_GOTOFF12
2290 BFD_RELOC_FRV_GOTOFFHI
2292 BFD_RELOC_FRV_GOTOFFLO
2294 BFD_RELOC_FRV_GETTLSOFF
2296 BFD_RELOC_FRV_TLSDESC_VALUE
2298 BFD_RELOC_FRV_GOTTLSDESC12
2300 BFD_RELOC_FRV_GOTTLSDESCHI
2302 BFD_RELOC_FRV_GOTTLSDESCLO
2304 BFD_RELOC_FRV_TLSMOFF12
2306 BFD_RELOC_FRV_TLSMOFFHI
2308 BFD_RELOC_FRV_TLSMOFFLO
2310 BFD_RELOC_FRV_GOTTLSOFF12
2312 BFD_RELOC_FRV_GOTTLSOFFHI
2314 BFD_RELOC_FRV_GOTTLSOFFLO
2316 BFD_RELOC_FRV_TLSOFF
2318 BFD_RELOC_FRV_TLSDESC_RELAX
2320 BFD_RELOC_FRV_GETTLSOFF_RELAX
2322 BFD_RELOC_FRV_TLSOFF_RELAX
2324 BFD_RELOC_FRV_TLSMOFF
2326 Fujitsu Frv Relocations.
2330 BFD_RELOC_MN10300_GOTOFF24
2332 This is a 24bit GOT-relative reloc for the mn10300.
2334 BFD_RELOC_MN10300_GOT32
2336 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2339 BFD_RELOC_MN10300_GOT24
2341 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2344 BFD_RELOC_MN10300_GOT16
2346 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2349 BFD_RELOC_MN10300_COPY
2351 Copy symbol at runtime.
2353 BFD_RELOC_MN10300_GLOB_DAT
2357 BFD_RELOC_MN10300_JMP_SLOT
2361 BFD_RELOC_MN10300_RELATIVE
2363 Adjust by program base.
2365 BFD_RELOC_MN10300_SYM_DIFF
2367 Together with another reloc targeted at the same location,
2368 allows for a value that is the difference of two symbols
2369 in the same section.
2371 BFD_RELOC_MN10300_ALIGN
2373 The addend of this reloc is an alignment power that must
2374 be honoured at the offset's location, regardless of linker
2385 BFD_RELOC_386_GLOB_DAT
2387 BFD_RELOC_386_JUMP_SLOT
2389 BFD_RELOC_386_RELATIVE
2391 BFD_RELOC_386_GOTOFF
2395 BFD_RELOC_386_TLS_TPOFF
2397 BFD_RELOC_386_TLS_IE
2399 BFD_RELOC_386_TLS_GOTIE
2401 BFD_RELOC_386_TLS_LE
2403 BFD_RELOC_386_TLS_GD
2405 BFD_RELOC_386_TLS_LDM
2407 BFD_RELOC_386_TLS_LDO_32
2409 BFD_RELOC_386_TLS_IE_32
2411 BFD_RELOC_386_TLS_LE_32
2413 BFD_RELOC_386_TLS_DTPMOD32
2415 BFD_RELOC_386_TLS_DTPOFF32
2417 BFD_RELOC_386_TLS_TPOFF32
2419 BFD_RELOC_386_TLS_GOTDESC
2421 BFD_RELOC_386_TLS_DESC_CALL
2423 BFD_RELOC_386_TLS_DESC
2425 i386/elf relocations
2428 BFD_RELOC_X86_64_GOT32
2430 BFD_RELOC_X86_64_PLT32
2432 BFD_RELOC_X86_64_COPY
2434 BFD_RELOC_X86_64_GLOB_DAT
2436 BFD_RELOC_X86_64_JUMP_SLOT
2438 BFD_RELOC_X86_64_RELATIVE
2440 BFD_RELOC_X86_64_GOTPCREL
2442 BFD_RELOC_X86_64_32S
2444 BFD_RELOC_X86_64_DTPMOD64
2446 BFD_RELOC_X86_64_DTPOFF64
2448 BFD_RELOC_X86_64_TPOFF64
2450 BFD_RELOC_X86_64_TLSGD
2452 BFD_RELOC_X86_64_TLSLD
2454 BFD_RELOC_X86_64_DTPOFF32
2456 BFD_RELOC_X86_64_GOTTPOFF
2458 BFD_RELOC_X86_64_TPOFF32
2460 BFD_RELOC_X86_64_GOTOFF64
2462 BFD_RELOC_X86_64_GOTPC32
2464 BFD_RELOC_X86_64_GOT64
2466 BFD_RELOC_X86_64_GOTPCREL64
2468 BFD_RELOC_X86_64_GOTPC64
2470 BFD_RELOC_X86_64_GOTPLT64
2472 BFD_RELOC_X86_64_PLTOFF64
2474 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2476 BFD_RELOC_X86_64_TLSDESC_CALL
2478 BFD_RELOC_X86_64_TLSDESC
2480 x86-64/elf relocations
2483 BFD_RELOC_NS32K_IMM_8
2485 BFD_RELOC_NS32K_IMM_16
2487 BFD_RELOC_NS32K_IMM_32
2489 BFD_RELOC_NS32K_IMM_8_PCREL
2491 BFD_RELOC_NS32K_IMM_16_PCREL
2493 BFD_RELOC_NS32K_IMM_32_PCREL
2495 BFD_RELOC_NS32K_DISP_8
2497 BFD_RELOC_NS32K_DISP_16
2499 BFD_RELOC_NS32K_DISP_32
2501 BFD_RELOC_NS32K_DISP_8_PCREL
2503 BFD_RELOC_NS32K_DISP_16_PCREL
2505 BFD_RELOC_NS32K_DISP_32_PCREL
2510 BFD_RELOC_PDP11_DISP_8_PCREL
2512 BFD_RELOC_PDP11_DISP_6_PCREL
2517 BFD_RELOC_PJ_CODE_HI16
2519 BFD_RELOC_PJ_CODE_LO16
2521 BFD_RELOC_PJ_CODE_DIR16
2523 BFD_RELOC_PJ_CODE_DIR32
2525 BFD_RELOC_PJ_CODE_REL16
2527 BFD_RELOC_PJ_CODE_REL32
2529 Picojava relocs. Not all of these appear in object files.
2540 BFD_RELOC_PPC_B16_BRTAKEN
2542 BFD_RELOC_PPC_B16_BRNTAKEN
2546 BFD_RELOC_PPC_BA16_BRTAKEN
2548 BFD_RELOC_PPC_BA16_BRNTAKEN
2552 BFD_RELOC_PPC_GLOB_DAT
2554 BFD_RELOC_PPC_JMP_SLOT
2556 BFD_RELOC_PPC_RELATIVE
2558 BFD_RELOC_PPC_LOCAL24PC
2560 BFD_RELOC_PPC_EMB_NADDR32
2562 BFD_RELOC_PPC_EMB_NADDR16
2564 BFD_RELOC_PPC_EMB_NADDR16_LO
2566 BFD_RELOC_PPC_EMB_NADDR16_HI
2568 BFD_RELOC_PPC_EMB_NADDR16_HA
2570 BFD_RELOC_PPC_EMB_SDAI16
2572 BFD_RELOC_PPC_EMB_SDA2I16
2574 BFD_RELOC_PPC_EMB_SDA2REL
2576 BFD_RELOC_PPC_EMB_SDA21
2578 BFD_RELOC_PPC_EMB_MRKREF
2580 BFD_RELOC_PPC_EMB_RELSEC16
2582 BFD_RELOC_PPC_EMB_RELST_LO
2584 BFD_RELOC_PPC_EMB_RELST_HI
2586 BFD_RELOC_PPC_EMB_RELST_HA
2588 BFD_RELOC_PPC_EMB_BIT_FLD
2590 BFD_RELOC_PPC_EMB_RELSDA
2592 BFD_RELOC_PPC64_HIGHER
2594 BFD_RELOC_PPC64_HIGHER_S
2596 BFD_RELOC_PPC64_HIGHEST
2598 BFD_RELOC_PPC64_HIGHEST_S
2600 BFD_RELOC_PPC64_TOC16_LO
2602 BFD_RELOC_PPC64_TOC16_HI
2604 BFD_RELOC_PPC64_TOC16_HA
2608 BFD_RELOC_PPC64_PLTGOT16
2610 BFD_RELOC_PPC64_PLTGOT16_LO
2612 BFD_RELOC_PPC64_PLTGOT16_HI
2614 BFD_RELOC_PPC64_PLTGOT16_HA
2616 BFD_RELOC_PPC64_ADDR16_DS
2618 BFD_RELOC_PPC64_ADDR16_LO_DS
2620 BFD_RELOC_PPC64_GOT16_DS
2622 BFD_RELOC_PPC64_GOT16_LO_DS
2624 BFD_RELOC_PPC64_PLT16_LO_DS
2626 BFD_RELOC_PPC64_SECTOFF_DS
2628 BFD_RELOC_PPC64_SECTOFF_LO_DS
2630 BFD_RELOC_PPC64_TOC16_DS
2632 BFD_RELOC_PPC64_TOC16_LO_DS
2634 BFD_RELOC_PPC64_PLTGOT16_DS
2636 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2638 Power(rs6000) and PowerPC relocations.
2643 BFD_RELOC_PPC_DTPMOD
2645 BFD_RELOC_PPC_TPREL16
2647 BFD_RELOC_PPC_TPREL16_LO
2649 BFD_RELOC_PPC_TPREL16_HI
2651 BFD_RELOC_PPC_TPREL16_HA
2655 BFD_RELOC_PPC_DTPREL16
2657 BFD_RELOC_PPC_DTPREL16_LO
2659 BFD_RELOC_PPC_DTPREL16_HI
2661 BFD_RELOC_PPC_DTPREL16_HA
2663 BFD_RELOC_PPC_DTPREL
2665 BFD_RELOC_PPC_GOT_TLSGD16
2667 BFD_RELOC_PPC_GOT_TLSGD16_LO
2669 BFD_RELOC_PPC_GOT_TLSGD16_HI
2671 BFD_RELOC_PPC_GOT_TLSGD16_HA
2673 BFD_RELOC_PPC_GOT_TLSLD16
2675 BFD_RELOC_PPC_GOT_TLSLD16_LO
2677 BFD_RELOC_PPC_GOT_TLSLD16_HI
2679 BFD_RELOC_PPC_GOT_TLSLD16_HA
2681 BFD_RELOC_PPC_GOT_TPREL16
2683 BFD_RELOC_PPC_GOT_TPREL16_LO
2685 BFD_RELOC_PPC_GOT_TPREL16_HI
2687 BFD_RELOC_PPC_GOT_TPREL16_HA
2689 BFD_RELOC_PPC_GOT_DTPREL16
2691 BFD_RELOC_PPC_GOT_DTPREL16_LO
2693 BFD_RELOC_PPC_GOT_DTPREL16_HI
2695 BFD_RELOC_PPC_GOT_DTPREL16_HA
2697 BFD_RELOC_PPC64_TPREL16_DS
2699 BFD_RELOC_PPC64_TPREL16_LO_DS
2701 BFD_RELOC_PPC64_TPREL16_HIGHER
2703 BFD_RELOC_PPC64_TPREL16_HIGHERA
2705 BFD_RELOC_PPC64_TPREL16_HIGHEST
2707 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2709 BFD_RELOC_PPC64_DTPREL16_DS
2711 BFD_RELOC_PPC64_DTPREL16_LO_DS
2713 BFD_RELOC_PPC64_DTPREL16_HIGHER
2715 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2717 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2719 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2721 PowerPC and PowerPC64 thread-local storage relocations.
2726 IBM 370/390 relocations
2731 The type of reloc used to build a constructor table - at the moment
2732 probably a 32 bit wide absolute relocation, but the target can choose.
2733 It generally does map to one of the other relocation types.
2736 BFD_RELOC_ARM_PCREL_BRANCH
2738 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2739 not stored in the instruction.
2741 BFD_RELOC_ARM_PCREL_BLX
2743 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2744 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2745 field in the instruction.
2747 BFD_RELOC_THUMB_PCREL_BLX
2749 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2750 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2751 field in the instruction.
2753 BFD_RELOC_ARM_PCREL_CALL
2755 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2757 BFD_RELOC_ARM_PCREL_JUMP
2759 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2762 BFD_RELOC_THUMB_PCREL_BRANCH7
2764 BFD_RELOC_THUMB_PCREL_BRANCH9
2766 BFD_RELOC_THUMB_PCREL_BRANCH12
2768 BFD_RELOC_THUMB_PCREL_BRANCH20
2770 BFD_RELOC_THUMB_PCREL_BRANCH23
2772 BFD_RELOC_THUMB_PCREL_BRANCH25
2774 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2775 The lowest bit must be zero and is not stored in the instruction.
2776 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2777 "nn" one smaller in all cases. Note further that BRANCH23
2778 corresponds to R_ARM_THM_CALL.
2781 BFD_RELOC_ARM_OFFSET_IMM
2783 12-bit immediate offset, used in ARM-format ldr and str instructions.
2786 BFD_RELOC_ARM_THUMB_OFFSET
2788 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2791 BFD_RELOC_ARM_TARGET1
2793 Pc-relative or absolute relocation depending on target. Used for
2794 entries in .init_array sections.
2796 BFD_RELOC_ARM_ROSEGREL32
2798 Read-only segment base relative address.
2800 BFD_RELOC_ARM_SBREL32
2802 Data segment base relative address.
2804 BFD_RELOC_ARM_TARGET2
2806 This reloc is used for references to RTTI data from exception handling
2807 tables. The actual definition depends on the target. It may be a
2808 pc-relative or some form of GOT-indirect relocation.
2810 BFD_RELOC_ARM_PREL31
2812 31-bit PC relative address.
2818 BFD_RELOC_ARM_MOVW_PCREL
2820 BFD_RELOC_ARM_MOVT_PCREL
2822 BFD_RELOC_ARM_THUMB_MOVW
2824 BFD_RELOC_ARM_THUMB_MOVT
2826 BFD_RELOC_ARM_THUMB_MOVW_PCREL
2828 BFD_RELOC_ARM_THUMB_MOVT_PCREL
2830 Low and High halfword relocations for MOVW and MOVT instructions.
2833 BFD_RELOC_ARM_JUMP_SLOT
2835 BFD_RELOC_ARM_GLOB_DAT
2841 BFD_RELOC_ARM_RELATIVE
2843 BFD_RELOC_ARM_GOTOFF
2847 Relocations for setting up GOTs and PLTs for shared libraries.
2850 BFD_RELOC_ARM_TLS_GD32
2852 BFD_RELOC_ARM_TLS_LDO32
2854 BFD_RELOC_ARM_TLS_LDM32
2856 BFD_RELOC_ARM_TLS_DTPOFF32
2858 BFD_RELOC_ARM_TLS_DTPMOD32
2860 BFD_RELOC_ARM_TLS_TPOFF32
2862 BFD_RELOC_ARM_TLS_IE32
2864 BFD_RELOC_ARM_TLS_LE32
2866 ARM thread-local storage relocations.
2869 BFD_RELOC_ARM_ALU_PC_G0_NC
2871 BFD_RELOC_ARM_ALU_PC_G0
2873 BFD_RELOC_ARM_ALU_PC_G1_NC
2875 BFD_RELOC_ARM_ALU_PC_G1
2877 BFD_RELOC_ARM_ALU_PC_G2
2879 BFD_RELOC_ARM_LDR_PC_G0
2881 BFD_RELOC_ARM_LDR_PC_G1
2883 BFD_RELOC_ARM_LDR_PC_G2
2885 BFD_RELOC_ARM_LDRS_PC_G0
2887 BFD_RELOC_ARM_LDRS_PC_G1
2889 BFD_RELOC_ARM_LDRS_PC_G2
2891 BFD_RELOC_ARM_LDC_PC_G0
2893 BFD_RELOC_ARM_LDC_PC_G1
2895 BFD_RELOC_ARM_LDC_PC_G2
2897 BFD_RELOC_ARM_ALU_SB_G0_NC
2899 BFD_RELOC_ARM_ALU_SB_G0
2901 BFD_RELOC_ARM_ALU_SB_G1_NC
2903 BFD_RELOC_ARM_ALU_SB_G1
2905 BFD_RELOC_ARM_ALU_SB_G2
2907 BFD_RELOC_ARM_LDR_SB_G0
2909 BFD_RELOC_ARM_LDR_SB_G1
2911 BFD_RELOC_ARM_LDR_SB_G2
2913 BFD_RELOC_ARM_LDRS_SB_G0
2915 BFD_RELOC_ARM_LDRS_SB_G1
2917 BFD_RELOC_ARM_LDRS_SB_G2
2919 BFD_RELOC_ARM_LDC_SB_G0
2921 BFD_RELOC_ARM_LDC_SB_G1
2923 BFD_RELOC_ARM_LDC_SB_G2
2925 ARM group relocations.
2930 Annotation of BX instructions.
2933 BFD_RELOC_ARM_IMMEDIATE
2935 BFD_RELOC_ARM_ADRL_IMMEDIATE
2937 BFD_RELOC_ARM_T32_IMMEDIATE
2939 BFD_RELOC_ARM_T32_ADD_IMM
2941 BFD_RELOC_ARM_T32_IMM12
2943 BFD_RELOC_ARM_T32_ADD_PC12
2945 BFD_RELOC_ARM_SHIFT_IMM
2953 BFD_RELOC_ARM_CP_OFF_IMM
2955 BFD_RELOC_ARM_CP_OFF_IMM_S2
2957 BFD_RELOC_ARM_T32_CP_OFF_IMM
2959 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
2961 BFD_RELOC_ARM_ADR_IMM
2963 BFD_RELOC_ARM_LDR_IMM
2965 BFD_RELOC_ARM_LITERAL
2967 BFD_RELOC_ARM_IN_POOL
2969 BFD_RELOC_ARM_OFFSET_IMM8
2971 BFD_RELOC_ARM_T32_OFFSET_U8
2973 BFD_RELOC_ARM_T32_OFFSET_IMM
2975 BFD_RELOC_ARM_HWLITERAL
2977 BFD_RELOC_ARM_THUMB_ADD
2979 BFD_RELOC_ARM_THUMB_IMM
2981 BFD_RELOC_ARM_THUMB_SHIFT
2983 These relocs are only used within the ARM assembler. They are not
2984 (at present) written to any object files.
2987 BFD_RELOC_SH_PCDISP8BY2
2989 BFD_RELOC_SH_PCDISP12BY2
2997 BFD_RELOC_SH_DISP12BY2
2999 BFD_RELOC_SH_DISP12BY4
3001 BFD_RELOC_SH_DISP12BY8
3005 BFD_RELOC_SH_DISP20BY8
3009 BFD_RELOC_SH_IMM4BY2
3011 BFD_RELOC_SH_IMM4BY4
3015 BFD_RELOC_SH_IMM8BY2
3017 BFD_RELOC_SH_IMM8BY4
3019 BFD_RELOC_SH_PCRELIMM8BY2
3021 BFD_RELOC_SH_PCRELIMM8BY4
3023 BFD_RELOC_SH_SWITCH16
3025 BFD_RELOC_SH_SWITCH32
3039 BFD_RELOC_SH_LOOP_START
3041 BFD_RELOC_SH_LOOP_END
3045 BFD_RELOC_SH_GLOB_DAT
3047 BFD_RELOC_SH_JMP_SLOT
3049 BFD_RELOC_SH_RELATIVE
3053 BFD_RELOC_SH_GOT_LOW16
3055 BFD_RELOC_SH_GOT_MEDLOW16
3057 BFD_RELOC_SH_GOT_MEDHI16
3059 BFD_RELOC_SH_GOT_HI16
3061 BFD_RELOC_SH_GOTPLT_LOW16
3063 BFD_RELOC_SH_GOTPLT_MEDLOW16
3065 BFD_RELOC_SH_GOTPLT_MEDHI16
3067 BFD_RELOC_SH_GOTPLT_HI16
3069 BFD_RELOC_SH_PLT_LOW16
3071 BFD_RELOC_SH_PLT_MEDLOW16
3073 BFD_RELOC_SH_PLT_MEDHI16
3075 BFD_RELOC_SH_PLT_HI16
3077 BFD_RELOC_SH_GOTOFF_LOW16
3079 BFD_RELOC_SH_GOTOFF_MEDLOW16
3081 BFD_RELOC_SH_GOTOFF_MEDHI16
3083 BFD_RELOC_SH_GOTOFF_HI16
3085 BFD_RELOC_SH_GOTPC_LOW16
3087 BFD_RELOC_SH_GOTPC_MEDLOW16
3089 BFD_RELOC_SH_GOTPC_MEDHI16
3091 BFD_RELOC_SH_GOTPC_HI16
3095 BFD_RELOC_SH_GLOB_DAT64
3097 BFD_RELOC_SH_JMP_SLOT64
3099 BFD_RELOC_SH_RELATIVE64
3101 BFD_RELOC_SH_GOT10BY4
3103 BFD_RELOC_SH_GOT10BY8
3105 BFD_RELOC_SH_GOTPLT10BY4
3107 BFD_RELOC_SH_GOTPLT10BY8
3109 BFD_RELOC_SH_GOTPLT32
3111 BFD_RELOC_SH_SHMEDIA_CODE
3117 BFD_RELOC_SH_IMMS6BY32
3123 BFD_RELOC_SH_IMMS10BY2
3125 BFD_RELOC_SH_IMMS10BY4
3127 BFD_RELOC_SH_IMMS10BY8
3133 BFD_RELOC_SH_IMM_LOW16
3135 BFD_RELOC_SH_IMM_LOW16_PCREL
3137 BFD_RELOC_SH_IMM_MEDLOW16
3139 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3141 BFD_RELOC_SH_IMM_MEDHI16
3143 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3145 BFD_RELOC_SH_IMM_HI16
3147 BFD_RELOC_SH_IMM_HI16_PCREL
3151 BFD_RELOC_SH_TLS_GD_32
3153 BFD_RELOC_SH_TLS_LD_32
3155 BFD_RELOC_SH_TLS_LDO_32
3157 BFD_RELOC_SH_TLS_IE_32
3159 BFD_RELOC_SH_TLS_LE_32
3161 BFD_RELOC_SH_TLS_DTPMOD32
3163 BFD_RELOC_SH_TLS_DTPOFF32
3165 BFD_RELOC_SH_TLS_TPOFF32
3167 Renesas / SuperH SH relocs. Not all of these appear in object files.
3170 BFD_RELOC_ARC_B22_PCREL
3173 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
3174 not stored in the instruction. The high 20 bits are installed in bits 26
3175 through 7 of the instruction.
3179 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
3180 stored in the instruction. The high 24 bits are installed in bits 23
3184 BFD_RELOC_BFIN_16_IMM
3186 ADI Blackfin 16 bit immediate absolute reloc.
3188 BFD_RELOC_BFIN_16_HIGH
3190 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3192 BFD_RELOC_BFIN_4_PCREL
3194 ADI Blackfin 'a' part of LSETUP.
3196 BFD_RELOC_BFIN_5_PCREL
3200 BFD_RELOC_BFIN_16_LOW
3202 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3204 BFD_RELOC_BFIN_10_PCREL
3208 BFD_RELOC_BFIN_11_PCREL
3210 ADI Blackfin 'b' part of LSETUP.
3212 BFD_RELOC_BFIN_12_PCREL_JUMP
3216 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3218 ADI Blackfin Short jump, pcrel.
3220 BFD_RELOC_BFIN_24_PCREL_CALL_X
3222 ADI Blackfin Call.x not implemented.
3224 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3226 ADI Blackfin Long Jump pcrel.
3228 BFD_RELOC_BFIN_GOT17M4
3230 BFD_RELOC_BFIN_GOTHI
3232 BFD_RELOC_BFIN_GOTLO
3234 BFD_RELOC_BFIN_FUNCDESC
3236 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3238 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3240 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3242 BFD_RELOC_BFIN_FUNCDESC_VALUE
3244 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3246 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3248 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3250 BFD_RELOC_BFIN_GOTOFF17M4
3252 BFD_RELOC_BFIN_GOTOFFHI
3254 BFD_RELOC_BFIN_GOTOFFLO
3256 ADI Blackfin FD-PIC relocations.
3260 ADI Blackfin GOT relocation.
3262 BFD_RELOC_BFIN_PLTPC
3264 ADI Blackfin PLTPC relocation.
3266 BFD_ARELOC_BFIN_PUSH
3268 ADI Blackfin arithmetic relocation.
3270 BFD_ARELOC_BFIN_CONST
3272 ADI Blackfin arithmetic relocation.
3276 ADI Blackfin arithmetic relocation.
3280 ADI Blackfin arithmetic relocation.
3282 BFD_ARELOC_BFIN_MULT
3284 ADI Blackfin arithmetic relocation.
3288 ADI Blackfin arithmetic relocation.
3292 ADI Blackfin arithmetic relocation.
3294 BFD_ARELOC_BFIN_LSHIFT
3296 ADI Blackfin arithmetic relocation.
3298 BFD_ARELOC_BFIN_RSHIFT
3300 ADI Blackfin arithmetic relocation.
3304 ADI Blackfin arithmetic relocation.
3308 ADI Blackfin arithmetic relocation.
3312 ADI Blackfin arithmetic relocation.
3314 BFD_ARELOC_BFIN_LAND
3316 ADI Blackfin arithmetic relocation.
3320 ADI Blackfin arithmetic relocation.
3324 ADI Blackfin arithmetic relocation.
3328 ADI Blackfin arithmetic relocation.
3330 BFD_ARELOC_BFIN_COMP
3332 ADI Blackfin arithmetic relocation.
3334 BFD_ARELOC_BFIN_PAGE
3336 ADI Blackfin arithmetic relocation.
3338 BFD_ARELOC_BFIN_HWPAGE
3340 ADI Blackfin arithmetic relocation.
3342 BFD_ARELOC_BFIN_ADDR
3344 ADI Blackfin arithmetic relocation.
3347 BFD_RELOC_D10V_10_PCREL_R
3349 Mitsubishi D10V relocs.
3350 This is a 10-bit reloc with the right 2 bits
3353 BFD_RELOC_D10V_10_PCREL_L
3355 Mitsubishi D10V relocs.
3356 This is a 10-bit reloc with the right 2 bits
3357 assumed to be 0. This is the same as the previous reloc
3358 except it is in the left container, i.e.,
3359 shifted left 15 bits.
3363 This is an 18-bit reloc with the right 2 bits
3366 BFD_RELOC_D10V_18_PCREL
3368 This is an 18-bit reloc with the right 2 bits
3374 Mitsubishi D30V relocs.
3375 This is a 6-bit absolute reloc.
3377 BFD_RELOC_D30V_9_PCREL
3379 This is a 6-bit pc-relative reloc with
3380 the right 3 bits assumed to be 0.
3382 BFD_RELOC_D30V_9_PCREL_R
3384 This is a 6-bit pc-relative reloc with
3385 the right 3 bits assumed to be 0. Same
3386 as the previous reloc but on the right side
3391 This is a 12-bit absolute reloc with the
3392 right 3 bitsassumed to be 0.
3394 BFD_RELOC_D30V_15_PCREL
3396 This is a 12-bit pc-relative reloc with
3397 the right 3 bits assumed to be 0.
3399 BFD_RELOC_D30V_15_PCREL_R
3401 This is a 12-bit pc-relative reloc with
3402 the right 3 bits assumed to be 0. Same
3403 as the previous reloc but on the right side
3408 This is an 18-bit absolute reloc with
3409 the right 3 bits assumed to be 0.
3411 BFD_RELOC_D30V_21_PCREL
3413 This is an 18-bit pc-relative reloc with
3414 the right 3 bits assumed to be 0.
3416 BFD_RELOC_D30V_21_PCREL_R
3418 This is an 18-bit pc-relative reloc with
3419 the right 3 bits assumed to be 0. Same
3420 as the previous reloc but on the right side
3425 This is a 32-bit absolute reloc.
3427 BFD_RELOC_D30V_32_PCREL
3429 This is a 32-bit pc-relative reloc.
3432 BFD_RELOC_DLX_HI16_S
3447 BFD_RELOC_M32C_RL_JUMP
3449 BFD_RELOC_M32C_RL_1ADDR
3451 BFD_RELOC_M32C_RL_2ADDR
3453 Renesas M16C/M32C Relocations.
3458 Renesas M32R (formerly Mitsubishi M32R) relocs.
3459 This is a 24 bit absolute address.
3461 BFD_RELOC_M32R_10_PCREL
3463 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3465 BFD_RELOC_M32R_18_PCREL
3467 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3469 BFD_RELOC_M32R_26_PCREL
3471 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3473 BFD_RELOC_M32R_HI16_ULO
3475 This is a 16-bit reloc containing the high 16 bits of an address
3476 used when the lower 16 bits are treated as unsigned.
3478 BFD_RELOC_M32R_HI16_SLO
3480 This is a 16-bit reloc containing the high 16 bits of an address
3481 used when the lower 16 bits are treated as signed.
3485 This is a 16-bit reloc containing the lower 16 bits of an address.
3487 BFD_RELOC_M32R_SDA16
3489 This is a 16-bit reloc containing the small data area offset for use in
3490 add3, load, and store instructions.
3492 BFD_RELOC_M32R_GOT24
3494 BFD_RELOC_M32R_26_PLTREL
3498 BFD_RELOC_M32R_GLOB_DAT
3500 BFD_RELOC_M32R_JMP_SLOT
3502 BFD_RELOC_M32R_RELATIVE
3504 BFD_RELOC_M32R_GOTOFF
3506 BFD_RELOC_M32R_GOTOFF_HI_ULO
3508 BFD_RELOC_M32R_GOTOFF_HI_SLO
3510 BFD_RELOC_M32R_GOTOFF_LO
3512 BFD_RELOC_M32R_GOTPC24
3514 BFD_RELOC_M32R_GOT16_HI_ULO
3516 BFD_RELOC_M32R_GOT16_HI_SLO
3518 BFD_RELOC_M32R_GOT16_LO
3520 BFD_RELOC_M32R_GOTPC_HI_ULO
3522 BFD_RELOC_M32R_GOTPC_HI_SLO
3524 BFD_RELOC_M32R_GOTPC_LO
3530 BFD_RELOC_V850_9_PCREL
3532 This is a 9-bit reloc
3534 BFD_RELOC_V850_22_PCREL
3536 This is a 22-bit reloc
3539 BFD_RELOC_V850_SDA_16_16_OFFSET
3541 This is a 16 bit offset from the short data area pointer.
3543 BFD_RELOC_V850_SDA_15_16_OFFSET
3545 This is a 16 bit offset (of which only 15 bits are used) from the
3546 short data area pointer.
3548 BFD_RELOC_V850_ZDA_16_16_OFFSET
3550 This is a 16 bit offset from the zero data area pointer.
3552 BFD_RELOC_V850_ZDA_15_16_OFFSET
3554 This is a 16 bit offset (of which only 15 bits are used) from the
3555 zero data area pointer.
3557 BFD_RELOC_V850_TDA_6_8_OFFSET
3559 This is an 8 bit offset (of which only 6 bits are used) from the
3560 tiny data area pointer.
3562 BFD_RELOC_V850_TDA_7_8_OFFSET
3564 This is an 8bit offset (of which only 7 bits are used) from the tiny
3567 BFD_RELOC_V850_TDA_7_7_OFFSET
3569 This is a 7 bit offset from the tiny data area pointer.
3571 BFD_RELOC_V850_TDA_16_16_OFFSET
3573 This is a 16 bit offset from the tiny data area pointer.
3576 BFD_RELOC_V850_TDA_4_5_OFFSET
3578 This is a 5 bit offset (of which only 4 bits are used) from the tiny
3581 BFD_RELOC_V850_TDA_4_4_OFFSET
3583 This is a 4 bit offset from the tiny data area pointer.
3585 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
3587 This is a 16 bit offset from the short data area pointer, with the
3588 bits placed non-contiguously in the instruction.
3590 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
3592 This is a 16 bit offset from the zero data area pointer, with the
3593 bits placed non-contiguously in the instruction.
3595 BFD_RELOC_V850_CALLT_6_7_OFFSET
3597 This is a 6 bit offset from the call table base pointer.
3599 BFD_RELOC_V850_CALLT_16_16_OFFSET
3601 This is a 16 bit offset from the call table base pointer.
3603 BFD_RELOC_V850_LONGCALL
3605 Used for relaxing indirect function calls.
3607 BFD_RELOC_V850_LONGJUMP
3609 Used for relaxing indirect jumps.
3611 BFD_RELOC_V850_ALIGN
3613 Used to maintain alignment whilst relaxing.
3615 BFD_RELOC_V850_LO16_SPLIT_OFFSET
3617 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
3620 BFD_RELOC_MN10300_32_PCREL
3622 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3625 BFD_RELOC_MN10300_16_PCREL
3627 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3633 This is a 8bit DP reloc for the tms320c30, where the most
3634 significant 8 bits of a 24 bit word are placed into the least
3635 significant 8 bits of the opcode.
3638 BFD_RELOC_TIC54X_PARTLS7
3640 This is a 7bit reloc for the tms320c54x, where the least
3641 significant 7 bits of a 16 bit word are placed into the least
3642 significant 7 bits of the opcode.
3645 BFD_RELOC_TIC54X_PARTMS9
3647 This is a 9bit DP reloc for the tms320c54x, where the most
3648 significant 9 bits of a 16 bit word are placed into the least
3649 significant 9 bits of the opcode.
3654 This is an extended address 23-bit reloc for the tms320c54x.
3657 BFD_RELOC_TIC54X_16_OF_23
3659 This is a 16-bit reloc for the tms320c54x, where the least
3660 significant 16 bits of a 23-bit extended address are placed into
3664 BFD_RELOC_TIC54X_MS7_OF_23
3666 This is a reloc for the tms320c54x, where the most
3667 significant 7 bits of a 23-bit extended address are placed into
3673 This is a 48 bit reloc for the FR30 that stores 32 bits.
3677 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3680 BFD_RELOC_FR30_6_IN_4
3682 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3685 BFD_RELOC_FR30_8_IN_8
3687 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3690 BFD_RELOC_FR30_9_IN_8
3692 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3695 BFD_RELOC_FR30_10_IN_8
3697 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3700 BFD_RELOC_FR30_9_PCREL
3702 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3703 short offset into 8 bits.
3705 BFD_RELOC_FR30_12_PCREL
3707 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3708 short offset into 11 bits.
3711 BFD_RELOC_MCORE_PCREL_IMM8BY4
3713 BFD_RELOC_MCORE_PCREL_IMM11BY2
3715 BFD_RELOC_MCORE_PCREL_IMM4BY2
3717 BFD_RELOC_MCORE_PCREL_32
3719 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3723 Motorola Mcore relocations.
3732 BFD_RELOC_MEP_PCREL8A2
3734 BFD_RELOC_MEP_PCREL12A2
3736 BFD_RELOC_MEP_PCREL17A2
3738 BFD_RELOC_MEP_PCREL24A2
3740 BFD_RELOC_MEP_PCABS24A2
3752 BFD_RELOC_MEP_TPREL7
3754 BFD_RELOC_MEP_TPREL7A2
3756 BFD_RELOC_MEP_TPREL7A4
3758 BFD_RELOC_MEP_UIMM24
3760 BFD_RELOC_MEP_ADDR24A4
3762 BFD_RELOC_MEP_GNU_VTINHERIT
3764 BFD_RELOC_MEP_GNU_VTENTRY
3766 Toshiba Media Processor Relocations.
3772 BFD_RELOC_MMIX_GETA_1
3774 BFD_RELOC_MMIX_GETA_2
3776 BFD_RELOC_MMIX_GETA_3
3778 These are relocations for the GETA instruction.
3780 BFD_RELOC_MMIX_CBRANCH
3782 BFD_RELOC_MMIX_CBRANCH_J
3784 BFD_RELOC_MMIX_CBRANCH_1
3786 BFD_RELOC_MMIX_CBRANCH_2
3788 BFD_RELOC_MMIX_CBRANCH_3
3790 These are relocations for a conditional branch instruction.
3792 BFD_RELOC_MMIX_PUSHJ
3794 BFD_RELOC_MMIX_PUSHJ_1
3796 BFD_RELOC_MMIX_PUSHJ_2
3798 BFD_RELOC_MMIX_PUSHJ_3
3800 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
3802 These are relocations for the PUSHJ instruction.
3806 BFD_RELOC_MMIX_JMP_1
3808 BFD_RELOC_MMIX_JMP_2
3810 BFD_RELOC_MMIX_JMP_3
3812 These are relocations for the JMP instruction.
3814 BFD_RELOC_MMIX_ADDR19
3816 This is a relocation for a relative address as in a GETA instruction or
3819 BFD_RELOC_MMIX_ADDR27
3821 This is a relocation for a relative address as in a JMP instruction.
3823 BFD_RELOC_MMIX_REG_OR_BYTE
3825 This is a relocation for an instruction field that may be a general
3826 register or a value 0..255.
3830 This is a relocation for an instruction field that may be a general
3833 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3835 This is a relocation for two instruction fields holding a register and
3836 an offset, the equivalent of the relocation.
3838 BFD_RELOC_MMIX_LOCAL
3840 This relocation is an assertion that the expression is not allocated as
3841 a global register. It does not modify contents.
3844 BFD_RELOC_AVR_7_PCREL
3846 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3847 short offset into 7 bits.
3849 BFD_RELOC_AVR_13_PCREL
3851 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3852 short offset into 12 bits.
3856 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3857 program memory address) into 16 bits.
3859 BFD_RELOC_AVR_LO8_LDI
3861 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3862 data memory address) into 8 bit immediate value of LDI insn.
3864 BFD_RELOC_AVR_HI8_LDI
3866 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3867 of data memory address) into 8 bit immediate value of LDI insn.
3869 BFD_RELOC_AVR_HH8_LDI
3871 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3872 of program memory address) into 8 bit immediate value of LDI insn.
3874 BFD_RELOC_AVR_MS8_LDI
3876 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3877 of 32 bit value) into 8 bit immediate value of LDI insn.
3879 BFD_RELOC_AVR_LO8_LDI_NEG
3881 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3882 (usually data memory address) into 8 bit immediate value of SUBI insn.
3884 BFD_RELOC_AVR_HI8_LDI_NEG
3886 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3887 (high 8 bit of data memory address) into 8 bit immediate value of
3890 BFD_RELOC_AVR_HH8_LDI_NEG
3892 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3893 (most high 8 bit of program memory address) into 8 bit immediate value
3894 of LDI or SUBI insn.
3896 BFD_RELOC_AVR_MS8_LDI_NEG
3898 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
3899 of 32 bit value) into 8 bit immediate value of LDI insn.
3901 BFD_RELOC_AVR_LO8_LDI_PM
3903 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3904 command address) into 8 bit immediate value of LDI insn.
3906 BFD_RELOC_AVR_LO8_LDI_GS
3908 This is a 16 bit reloc for the AVR that stores 8 bit value
3909 (command address) into 8 bit immediate value of LDI insn. If the address
3910 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
3913 BFD_RELOC_AVR_HI8_LDI_PM
3915 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3916 of command address) into 8 bit immediate value of LDI insn.
3918 BFD_RELOC_AVR_HI8_LDI_GS
3920 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3921 of command address) into 8 bit immediate value of LDI insn. If the address
3922 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
3925 BFD_RELOC_AVR_HH8_LDI_PM
3927 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3928 of command address) into 8 bit immediate value of LDI insn.
3930 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3932 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3933 (usually command address) into 8 bit immediate value of SUBI insn.
3935 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3937 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3938 (high 8 bit of 16 bit command address) into 8 bit immediate value
3941 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3943 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3944 (high 6 bit of 22 bit command address) into 8 bit immediate
3949 This is a 32 bit reloc for the AVR that stores 23 bit value
3954 This is a 16 bit reloc for the AVR that stores all needed bits
3955 for absolute addressing with ldi with overflow check to linktime
3959 This is a 6 bit reloc for the AVR that stores offset for ldd/std
3962 BFD_RELOC_AVR_6_ADIW
3964 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
3978 32 bit PC relative PLT address.
3982 Copy symbol at runtime.
3984 BFD_RELOC_390_GLOB_DAT
3988 BFD_RELOC_390_JMP_SLOT
3992 BFD_RELOC_390_RELATIVE
3994 Adjust by program base.
3998 32 bit PC relative offset to GOT.
4004 BFD_RELOC_390_PC16DBL
4006 PC relative 16 bit shifted by 1.
4008 BFD_RELOC_390_PLT16DBL
4010 16 bit PC rel. PLT shifted by 1.
4012 BFD_RELOC_390_PC32DBL
4014 PC relative 32 bit shifted by 1.
4016 BFD_RELOC_390_PLT32DBL
4018 32 bit PC rel. PLT shifted by 1.
4020 BFD_RELOC_390_GOTPCDBL
4022 32 bit PC rel. GOT shifted by 1.
4030 64 bit PC relative PLT address.
4032 BFD_RELOC_390_GOTENT
4034 32 bit rel. offset to GOT entry.
4036 BFD_RELOC_390_GOTOFF64
4038 64 bit offset to GOT.
4040 BFD_RELOC_390_GOTPLT12
4042 12-bit offset to symbol-entry within GOT, with PLT handling.
4044 BFD_RELOC_390_GOTPLT16
4046 16-bit offset to symbol-entry within GOT, with PLT handling.
4048 BFD_RELOC_390_GOTPLT32
4050 32-bit offset to symbol-entry within GOT, with PLT handling.
4052 BFD_RELOC_390_GOTPLT64
4054 64-bit offset to symbol-entry within GOT, with PLT handling.
4056 BFD_RELOC_390_GOTPLTENT
4058 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
4060 BFD_RELOC_390_PLTOFF16
4062 16-bit rel. offset from the GOT to a PLT entry.
4064 BFD_RELOC_390_PLTOFF32
4066 32-bit rel. offset from the GOT to a PLT entry.
4068 BFD_RELOC_390_PLTOFF64
4070 64-bit rel. offset from the GOT to a PLT entry.
4073 BFD_RELOC_390_TLS_LOAD
4075 BFD_RELOC_390_TLS_GDCALL
4077 BFD_RELOC_390_TLS_LDCALL
4079 BFD_RELOC_390_TLS_GD32
4081 BFD_RELOC_390_TLS_GD64
4083 BFD_RELOC_390_TLS_GOTIE12
4085 BFD_RELOC_390_TLS_GOTIE32
4087 BFD_RELOC_390_TLS_GOTIE64
4089 BFD_RELOC_390_TLS_LDM32
4091 BFD_RELOC_390_TLS_LDM64
4093 BFD_RELOC_390_TLS_IE32
4095 BFD_RELOC_390_TLS_IE64
4097 BFD_RELOC_390_TLS_IEENT
4099 BFD_RELOC_390_TLS_LE32
4101 BFD_RELOC_390_TLS_LE64
4103 BFD_RELOC_390_TLS_LDO32
4105 BFD_RELOC_390_TLS_LDO64
4107 BFD_RELOC_390_TLS_DTPMOD
4109 BFD_RELOC_390_TLS_DTPOFF
4111 BFD_RELOC_390_TLS_TPOFF
4113 s390 tls relocations.
4120 BFD_RELOC_390_GOTPLT20
4122 BFD_RELOC_390_TLS_GOTIE20
4124 Long displacement extension.
4127 BFD_RELOC_SCORE_DUMMY1
4131 BFD_RELOC_SCORE_GPREL15
4133 Low 16 bit for load/store
4135 BFD_RELOC_SCORE_DUMMY2
4139 This is a 24-bit reloc with the right 1 bit assumed to be 0
4141 BFD_RELOC_SCORE_BRANCH
4143 This is a 19-bit reloc with the right 1 bit assumed to be 0
4145 BFD_RELOC_SCORE16_JMP
4147 This is a 11-bit reloc with the right 1 bit assumed to be 0
4149 BFD_RELOC_SCORE16_BRANCH
4151 This is a 8-bit reloc with the right 1 bit assumed to be 0
4153 BFD_RELOC_SCORE_GOT15
4155 BFD_RELOC_SCORE_GOT_LO16
4157 BFD_RELOC_SCORE_CALL15
4159 BFD_RELOC_SCORE_DUMMY_HI16
4161 Undocumented Score relocs
4166 Scenix IP2K - 9-bit register number / data address
4170 Scenix IP2K - 4-bit register/data bank number
4172 BFD_RELOC_IP2K_ADDR16CJP
4174 Scenix IP2K - low 13 bits of instruction word address
4176 BFD_RELOC_IP2K_PAGE3
4178 Scenix IP2K - high 3 bits of instruction word address
4180 BFD_RELOC_IP2K_LO8DATA
4182 BFD_RELOC_IP2K_HI8DATA
4184 BFD_RELOC_IP2K_EX8DATA
4186 Scenix IP2K - ext/low/high 8 bits of data address
4188 BFD_RELOC_IP2K_LO8INSN
4190 BFD_RELOC_IP2K_HI8INSN
4192 Scenix IP2K - low/high 8 bits of instruction word address
4194 BFD_RELOC_IP2K_PC_SKIP
4196 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
4200 Scenix IP2K - 16 bit word address in text section.
4202 BFD_RELOC_IP2K_FR_OFFSET
4204 Scenix IP2K - 7-bit sp or dp offset
4206 BFD_RELOC_VPE4KMATH_DATA
4208 BFD_RELOC_VPE4KMATH_INSN
4210 Scenix VPE4K coprocessor - data/insn-space addressing
4213 BFD_RELOC_VTABLE_INHERIT
4215 BFD_RELOC_VTABLE_ENTRY
4217 These two relocations are used by the linker to determine which of
4218 the entries in a C++ virtual function table are actually used. When
4219 the --gc-sections option is given, the linker will zero out the entries
4220 that are not used, so that the code for those functions need not be
4221 included in the output.
4223 VTABLE_INHERIT is a zero-space relocation used to describe to the
4224 linker the inheritance tree of a C++ virtual function table. The
4225 relocation's symbol should be the parent class' vtable, and the
4226 relocation should be located at the child vtable.
4228 VTABLE_ENTRY is a zero-space relocation that describes the use of a
4229 virtual function table entry. The reloc's symbol should refer to the
4230 table of the class mentioned in the code. Off of that base, an offset
4231 describes the entry that is being used. For Rela hosts, this offset
4232 is stored in the reloc's addend. For Rel hosts, we are forced to put
4233 this offset in the reloc's section offset.
4236 BFD_RELOC_IA64_IMM14
4238 BFD_RELOC_IA64_IMM22
4240 BFD_RELOC_IA64_IMM64
4242 BFD_RELOC_IA64_DIR32MSB
4244 BFD_RELOC_IA64_DIR32LSB
4246 BFD_RELOC_IA64_DIR64MSB
4248 BFD_RELOC_IA64_DIR64LSB
4250 BFD_RELOC_IA64_GPREL22
4252 BFD_RELOC_IA64_GPREL64I
4254 BFD_RELOC_IA64_GPREL32MSB
4256 BFD_RELOC_IA64_GPREL32LSB
4258 BFD_RELOC_IA64_GPREL64MSB
4260 BFD_RELOC_IA64_GPREL64LSB
4262 BFD_RELOC_IA64_LTOFF22
4264 BFD_RELOC_IA64_LTOFF64I
4266 BFD_RELOC_IA64_PLTOFF22
4268 BFD_RELOC_IA64_PLTOFF64I
4270 BFD_RELOC_IA64_PLTOFF64MSB
4272 BFD_RELOC_IA64_PLTOFF64LSB
4274 BFD_RELOC_IA64_FPTR64I
4276 BFD_RELOC_IA64_FPTR32MSB
4278 BFD_RELOC_IA64_FPTR32LSB
4280 BFD_RELOC_IA64_FPTR64MSB
4282 BFD_RELOC_IA64_FPTR64LSB
4284 BFD_RELOC_IA64_PCREL21B
4286 BFD_RELOC_IA64_PCREL21BI
4288 BFD_RELOC_IA64_PCREL21M
4290 BFD_RELOC_IA64_PCREL21F
4292 BFD_RELOC_IA64_PCREL22
4294 BFD_RELOC_IA64_PCREL60B
4296 BFD_RELOC_IA64_PCREL64I
4298 BFD_RELOC_IA64_PCREL32MSB
4300 BFD_RELOC_IA64_PCREL32LSB
4302 BFD_RELOC_IA64_PCREL64MSB
4304 BFD_RELOC_IA64_PCREL64LSB
4306 BFD_RELOC_IA64_LTOFF_FPTR22
4308 BFD_RELOC_IA64_LTOFF_FPTR64I
4310 BFD_RELOC_IA64_LTOFF_FPTR32MSB
4312 BFD_RELOC_IA64_LTOFF_FPTR32LSB
4314 BFD_RELOC_IA64_LTOFF_FPTR64MSB
4316 BFD_RELOC_IA64_LTOFF_FPTR64LSB
4318 BFD_RELOC_IA64_SEGREL32MSB
4320 BFD_RELOC_IA64_SEGREL32LSB
4322 BFD_RELOC_IA64_SEGREL64MSB
4324 BFD_RELOC_IA64_SEGREL64LSB
4326 BFD_RELOC_IA64_SECREL32MSB
4328 BFD_RELOC_IA64_SECREL32LSB
4330 BFD_RELOC_IA64_SECREL64MSB
4332 BFD_RELOC_IA64_SECREL64LSB
4334 BFD_RELOC_IA64_REL32MSB
4336 BFD_RELOC_IA64_REL32LSB
4338 BFD_RELOC_IA64_REL64MSB
4340 BFD_RELOC_IA64_REL64LSB
4342 BFD_RELOC_IA64_LTV32MSB
4344 BFD_RELOC_IA64_LTV32LSB
4346 BFD_RELOC_IA64_LTV64MSB
4348 BFD_RELOC_IA64_LTV64LSB
4350 BFD_RELOC_IA64_IPLTMSB
4352 BFD_RELOC_IA64_IPLTLSB
4356 BFD_RELOC_IA64_LTOFF22X
4358 BFD_RELOC_IA64_LDXMOV
4360 BFD_RELOC_IA64_TPREL14
4362 BFD_RELOC_IA64_TPREL22
4364 BFD_RELOC_IA64_TPREL64I
4366 BFD_RELOC_IA64_TPREL64MSB
4368 BFD_RELOC_IA64_TPREL64LSB
4370 BFD_RELOC_IA64_LTOFF_TPREL22
4372 BFD_RELOC_IA64_DTPMOD64MSB
4374 BFD_RELOC_IA64_DTPMOD64LSB
4376 BFD_RELOC_IA64_LTOFF_DTPMOD22
4378 BFD_RELOC_IA64_DTPREL14
4380 BFD_RELOC_IA64_DTPREL22
4382 BFD_RELOC_IA64_DTPREL64I
4384 BFD_RELOC_IA64_DTPREL32MSB
4386 BFD_RELOC_IA64_DTPREL32LSB
4388 BFD_RELOC_IA64_DTPREL64MSB
4390 BFD_RELOC_IA64_DTPREL64LSB
4392 BFD_RELOC_IA64_LTOFF_DTPREL22
4394 Intel IA64 Relocations.
4397 BFD_RELOC_M68HC11_HI8
4399 Motorola 68HC11 reloc.
4400 This is the 8 bit high part of an absolute address.
4402 BFD_RELOC_M68HC11_LO8
4404 Motorola 68HC11 reloc.
4405 This is the 8 bit low part of an absolute address.
4407 BFD_RELOC_M68HC11_3B
4409 Motorola 68HC11 reloc.
4410 This is the 3 bit of a value.
4412 BFD_RELOC_M68HC11_RL_JUMP
4414 Motorola 68HC11 reloc.
4415 This reloc marks the beginning of a jump/call instruction.
4416 It is used for linker relaxation to correctly identify beginning
4417 of instruction and change some branches to use PC-relative
4420 BFD_RELOC_M68HC11_RL_GROUP
4422 Motorola 68HC11 reloc.
4423 This reloc marks a group of several instructions that gcc generates
4424 and for which the linker relaxation pass can modify and/or remove
4427 BFD_RELOC_M68HC11_LO16
4429 Motorola 68HC11 reloc.
4430 This is the 16-bit lower part of an address. It is used for 'call'
4431 instruction to specify the symbol address without any special
4432 transformation (due to memory bank window).
4434 BFD_RELOC_M68HC11_PAGE
4436 Motorola 68HC11 reloc.
4437 This is a 8-bit reloc that specifies the page number of an address.
4438 It is used by 'call' instruction to specify the page number of
4441 BFD_RELOC_M68HC11_24
4443 Motorola 68HC11 reloc.
4444 This is a 24-bit reloc that represents the address with a 16-bit
4445 value and a 8-bit page number. The symbol address is transformed
4446 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
4448 BFD_RELOC_M68HC12_5B
4450 Motorola 68HC12 reloc.
4451 This is the 5 bits of a value.
4456 BFD_RELOC_16C_NUM08_C
4460 BFD_RELOC_16C_NUM16_C
4464 BFD_RELOC_16C_NUM32_C
4466 BFD_RELOC_16C_DISP04
4468 BFD_RELOC_16C_DISP04_C
4470 BFD_RELOC_16C_DISP08
4472 BFD_RELOC_16C_DISP08_C
4474 BFD_RELOC_16C_DISP16
4476 BFD_RELOC_16C_DISP16_C
4478 BFD_RELOC_16C_DISP24
4480 BFD_RELOC_16C_DISP24_C
4482 BFD_RELOC_16C_DISP24a
4484 BFD_RELOC_16C_DISP24a_C
4488 BFD_RELOC_16C_REG04_C
4490 BFD_RELOC_16C_REG04a
4492 BFD_RELOC_16C_REG04a_C
4496 BFD_RELOC_16C_REG14_C
4500 BFD_RELOC_16C_REG16_C
4504 BFD_RELOC_16C_REG20_C
4508 BFD_RELOC_16C_ABS20_C
4512 BFD_RELOC_16C_ABS24_C
4516 BFD_RELOC_16C_IMM04_C
4520 BFD_RELOC_16C_IMM16_C
4524 BFD_RELOC_16C_IMM20_C
4528 BFD_RELOC_16C_IMM24_C
4532 BFD_RELOC_16C_IMM32_C
4534 NS CR16C Relocations.
4539 BFD_RELOC_CR16_NUM16
4541 BFD_RELOC_CR16_NUM32
4543 BFD_RELOC_CR16_NUM32a
4545 BFD_RELOC_CR16_REGREL0
4547 BFD_RELOC_CR16_REGREL4
4549 BFD_RELOC_CR16_REGREL4a
4551 BFD_RELOC_CR16_REGREL14
4553 BFD_RELOC_CR16_REGREL14a
4555 BFD_RELOC_CR16_REGREL16
4557 BFD_RELOC_CR16_REGREL20
4559 BFD_RELOC_CR16_REGREL20a
4561 BFD_RELOC_CR16_ABS20
4563 BFD_RELOC_CR16_ABS24
4569 BFD_RELOC_CR16_IMM16
4571 BFD_RELOC_CR16_IMM20
4573 BFD_RELOC_CR16_IMM24
4575 BFD_RELOC_CR16_IMM32
4577 BFD_RELOC_CR16_IMM32a
4579 BFD_RELOC_CR16_DISP4
4581 BFD_RELOC_CR16_DISP8
4583 BFD_RELOC_CR16_DISP16
4585 BFD_RELOC_CR16_DISP20
4587 BFD_RELOC_CR16_DISP24
4589 BFD_RELOC_CR16_DISP24a
4591 BFD_RELOC_CR16_SWITCH8
4593 BFD_RELOC_CR16_SWITCH16
4595 BFD_RELOC_CR16_SWITCH32
4597 NS CR16 Relocations.
4604 BFD_RELOC_CRX_REL8_CMP
4612 BFD_RELOC_CRX_REGREL12
4614 BFD_RELOC_CRX_REGREL22
4616 BFD_RELOC_CRX_REGREL28
4618 BFD_RELOC_CRX_REGREL32
4634 BFD_RELOC_CRX_SWITCH8
4636 BFD_RELOC_CRX_SWITCH16
4638 BFD_RELOC_CRX_SWITCH32
4643 BFD_RELOC_CRIS_BDISP8
4645 BFD_RELOC_CRIS_UNSIGNED_5
4647 BFD_RELOC_CRIS_SIGNED_6
4649 BFD_RELOC_CRIS_UNSIGNED_6
4651 BFD_RELOC_CRIS_SIGNED_8
4653 BFD_RELOC_CRIS_UNSIGNED_8
4655 BFD_RELOC_CRIS_SIGNED_16
4657 BFD_RELOC_CRIS_UNSIGNED_16
4659 BFD_RELOC_CRIS_LAPCQ_OFFSET
4661 BFD_RELOC_CRIS_UNSIGNED_4
4663 These relocs are only used within the CRIS assembler. They are not
4664 (at present) written to any object files.
4668 BFD_RELOC_CRIS_GLOB_DAT
4670 BFD_RELOC_CRIS_JUMP_SLOT
4672 BFD_RELOC_CRIS_RELATIVE
4674 Relocs used in ELF shared libraries for CRIS.
4676 BFD_RELOC_CRIS_32_GOT
4678 32-bit offset to symbol-entry within GOT.
4680 BFD_RELOC_CRIS_16_GOT
4682 16-bit offset to symbol-entry within GOT.
4684 BFD_RELOC_CRIS_32_GOTPLT
4686 32-bit offset to symbol-entry within GOT, with PLT handling.
4688 BFD_RELOC_CRIS_16_GOTPLT
4690 16-bit offset to symbol-entry within GOT, with PLT handling.
4692 BFD_RELOC_CRIS_32_GOTREL
4694 32-bit offset to symbol, relative to GOT.
4696 BFD_RELOC_CRIS_32_PLT_GOTREL
4698 32-bit offset to symbol with PLT entry, relative to GOT.
4700 BFD_RELOC_CRIS_32_PLT_PCREL
4702 32-bit offset to symbol with PLT entry, relative to this relocation.
4707 BFD_RELOC_860_GLOB_DAT
4709 BFD_RELOC_860_JUMP_SLOT
4711 BFD_RELOC_860_RELATIVE
4721 BFD_RELOC_860_SPLIT0
4725 BFD_RELOC_860_SPLIT1
4729 BFD_RELOC_860_SPLIT2
4733 BFD_RELOC_860_LOGOT0
4735 BFD_RELOC_860_SPGOT0
4737 BFD_RELOC_860_LOGOT1
4739 BFD_RELOC_860_SPGOT1
4741 BFD_RELOC_860_LOGOTOFF0
4743 BFD_RELOC_860_SPGOTOFF0
4745 BFD_RELOC_860_LOGOTOFF1
4747 BFD_RELOC_860_SPGOTOFF1
4749 BFD_RELOC_860_LOGOTOFF2
4751 BFD_RELOC_860_LOGOTOFF3
4755 BFD_RELOC_860_HIGHADJ
4759 BFD_RELOC_860_HAGOTOFF
4767 BFD_RELOC_860_HIGOTOFF
4769 Intel i860 Relocations.
4772 BFD_RELOC_OPENRISC_ABS_26
4774 BFD_RELOC_OPENRISC_REL_26
4776 OpenRISC Relocations.
4779 BFD_RELOC_H8_DIR16A8
4781 BFD_RELOC_H8_DIR16R8
4783 BFD_RELOC_H8_DIR24A8
4785 BFD_RELOC_H8_DIR24R8
4787 BFD_RELOC_H8_DIR32A16
4792 BFD_RELOC_XSTORMY16_REL_12
4794 BFD_RELOC_XSTORMY16_12
4796 BFD_RELOC_XSTORMY16_24
4798 BFD_RELOC_XSTORMY16_FPTR16
4800 Sony Xstormy16 Relocations.
4805 Self-describing complex relocations.
4817 Infineon Relocations.
4820 BFD_RELOC_VAX_GLOB_DAT
4822 BFD_RELOC_VAX_JMP_SLOT
4824 BFD_RELOC_VAX_RELATIVE
4826 Relocations used by VAX ELF.
4831 Morpho MT - 16 bit immediate relocation.
4835 Morpho MT - Hi 16 bits of an address.
4839 Morpho MT - Low 16 bits of an address.
4841 BFD_RELOC_MT_GNU_VTINHERIT
4843 Morpho MT - Used to tell the linker which vtable entries are used.
4845 BFD_RELOC_MT_GNU_VTENTRY
4847 Morpho MT - Used to tell the linker which vtable entries are used.
4849 BFD_RELOC_MT_PCINSN8
4851 Morpho MT - 8 bit immediate relocation.
4854 BFD_RELOC_MSP430_10_PCREL
4856 BFD_RELOC_MSP430_16_PCREL
4860 BFD_RELOC_MSP430_16_PCREL_BYTE
4862 BFD_RELOC_MSP430_16_BYTE
4864 BFD_RELOC_MSP430_2X_PCREL
4866 BFD_RELOC_MSP430_RL_PCREL
4868 msp430 specific relocation codes
4871 BFD_RELOC_IQ2000_OFFSET_16
4873 BFD_RELOC_IQ2000_OFFSET_21
4875 BFD_RELOC_IQ2000_UHI16
4880 BFD_RELOC_XTENSA_RTLD
4882 Special Xtensa relocation used only by PLT entries in ELF shared
4883 objects to indicate that the runtime linker should set the value
4884 to one of its own internal functions or data structures.
4886 BFD_RELOC_XTENSA_GLOB_DAT
4888 BFD_RELOC_XTENSA_JMP_SLOT
4890 BFD_RELOC_XTENSA_RELATIVE
4892 Xtensa relocations for ELF shared objects.
4894 BFD_RELOC_XTENSA_PLT
4896 Xtensa relocation used in ELF object files for symbols that may require
4897 PLT entries. Otherwise, this is just a generic 32-bit relocation.
4899 BFD_RELOC_XTENSA_DIFF8
4901 BFD_RELOC_XTENSA_DIFF16
4903 BFD_RELOC_XTENSA_DIFF32
4905 Xtensa relocations to mark the difference of two local symbols.
4906 These are only needed to support linker relaxation and can be ignored
4907 when not relaxing. The field is set to the value of the difference
4908 assuming no relaxation. The relocation encodes the position of the
4909 first symbol so the linker can determine whether to adjust the field
4912 BFD_RELOC_XTENSA_SLOT0_OP
4914 BFD_RELOC_XTENSA_SLOT1_OP
4916 BFD_RELOC_XTENSA_SLOT2_OP
4918 BFD_RELOC_XTENSA_SLOT3_OP
4920 BFD_RELOC_XTENSA_SLOT4_OP
4922 BFD_RELOC_XTENSA_SLOT5_OP
4924 BFD_RELOC_XTENSA_SLOT6_OP
4926 BFD_RELOC_XTENSA_SLOT7_OP
4928 BFD_RELOC_XTENSA_SLOT8_OP
4930 BFD_RELOC_XTENSA_SLOT9_OP
4932 BFD_RELOC_XTENSA_SLOT10_OP
4934 BFD_RELOC_XTENSA_SLOT11_OP
4936 BFD_RELOC_XTENSA_SLOT12_OP
4938 BFD_RELOC_XTENSA_SLOT13_OP
4940 BFD_RELOC_XTENSA_SLOT14_OP
4942 Generic Xtensa relocations for instruction operands. Only the slot
4943 number is encoded in the relocation. The relocation applies to the
4944 last PC-relative immediate operand, or if there are no PC-relative
4945 immediates, to the last immediate operand.
4947 BFD_RELOC_XTENSA_SLOT0_ALT
4949 BFD_RELOC_XTENSA_SLOT1_ALT
4951 BFD_RELOC_XTENSA_SLOT2_ALT
4953 BFD_RELOC_XTENSA_SLOT3_ALT
4955 BFD_RELOC_XTENSA_SLOT4_ALT
4957 BFD_RELOC_XTENSA_SLOT5_ALT
4959 BFD_RELOC_XTENSA_SLOT6_ALT
4961 BFD_RELOC_XTENSA_SLOT7_ALT
4963 BFD_RELOC_XTENSA_SLOT8_ALT
4965 BFD_RELOC_XTENSA_SLOT9_ALT
4967 BFD_RELOC_XTENSA_SLOT10_ALT
4969 BFD_RELOC_XTENSA_SLOT11_ALT
4971 BFD_RELOC_XTENSA_SLOT12_ALT
4973 BFD_RELOC_XTENSA_SLOT13_ALT
4975 BFD_RELOC_XTENSA_SLOT14_ALT
4977 Alternate Xtensa relocations. Only the slot is encoded in the
4978 relocation. The meaning of these relocations is opcode-specific.
4980 BFD_RELOC_XTENSA_OP0
4982 BFD_RELOC_XTENSA_OP1
4984 BFD_RELOC_XTENSA_OP2
4986 Xtensa relocations for backward compatibility. These have all been
4987 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
4989 BFD_RELOC_XTENSA_ASM_EXPAND
4991 Xtensa relocation to mark that the assembler expanded the
4992 instructions from an original target. The expansion size is
4993 encoded in the reloc size.
4995 BFD_RELOC_XTENSA_ASM_SIMPLIFY
4997 Xtensa relocation to mark that the linker should simplify
4998 assembler-expanded instructions. This is commonly used
4999 internally by the linker after analysis of a
5000 BFD_RELOC_XTENSA_ASM_EXPAND.
5005 8 bit signed offset in (ix+d) or (iy+d).
5024 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
5029 bfd_reloc_type_lookup
5030 bfd_reloc_name_lookup
5033 reloc_howto_type *bfd_reloc_type_lookup
5034 (bfd *abfd, bfd_reloc_code_real_type code);
5035 reloc_howto_type *bfd_reloc_name_lookup
5036 (bfd *abfd, const char *reloc_name);
5039 Return a pointer to a howto structure which, when
5040 invoked, will perform the relocation @var{code} on data from the
5046 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
5048 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
5052 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
5054 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
5057 static reloc_howto_type bfd_howto_32
=
5058 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_dont
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
5062 bfd_default_reloc_type_lookup
5065 reloc_howto_type *bfd_default_reloc_type_lookup
5066 (bfd *abfd, bfd_reloc_code_real_type code);
5069 Provides a default relocation lookup routine for any architecture.
5074 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
5078 case BFD_RELOC_CTOR
:
5079 /* The type of reloc used in a ctor, which will be as wide as the
5080 address - so either a 64, 32, or 16 bitter. */
5081 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
5086 return &bfd_howto_32
;
5100 bfd_get_reloc_code_name
5103 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
5106 Provides a printable name for the supplied relocation code.
5107 Useful mainly for printing error messages.
5111 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
5113 if (code
> BFD_RELOC_UNUSED
)
5115 return bfd_reloc_code_real_names
[code
];
5120 bfd_generic_relax_section
5123 bfd_boolean bfd_generic_relax_section
5126 struct bfd_link_info *,
5130 Provides default handling for relaxing for back ends which
5135 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
5136 asection
*section ATTRIBUTE_UNUSED
,
5137 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
5146 bfd_generic_gc_sections
5149 bfd_boolean bfd_generic_gc_sections
5150 (bfd *, struct bfd_link_info *);
5153 Provides default handling for relaxing for back ends which
5154 don't do section gc -- i.e., does nothing.
5158 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
5159 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
5166 bfd_generic_merge_sections
5169 bfd_boolean bfd_generic_merge_sections
5170 (bfd *, struct bfd_link_info *);
5173 Provides default handling for SEC_MERGE section merging for back ends
5174 which don't have SEC_MERGE support -- i.e., does nothing.
5178 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
5179 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
5186 bfd_generic_get_relocated_section_contents
5189 bfd_byte *bfd_generic_get_relocated_section_contents
5191 struct bfd_link_info *link_info,
5192 struct bfd_link_order *link_order,
5194 bfd_boolean relocatable,
5198 Provides default handling of relocation effort for back ends
5199 which can't be bothered to do it efficiently.
5204 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
5205 struct bfd_link_info
*link_info
,
5206 struct bfd_link_order
*link_order
,
5208 bfd_boolean relocatable
,
5211 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
5212 asection
*input_section
= link_order
->u
.indirect
.section
;
5214 arelent
**reloc_vector
;
5218 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
5222 /* Read in the section. */
5223 sz
= input_section
->rawsize
? input_section
->rawsize
: input_section
->size
;
5224 if (!bfd_get_section_contents (input_bfd
, input_section
, data
, 0, sz
))
5227 if (reloc_size
== 0)
5230 reloc_vector
= bfd_malloc (reloc_size
);
5231 if (reloc_vector
== NULL
)
5234 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
5238 if (reloc_count
< 0)
5241 if (reloc_count
> 0)
5244 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
5246 char *error_message
= NULL
;
5248 bfd_reloc_status_type r
;
5250 symbol
= *(*parent
)->sym_ptr_ptr
;
5251 if (symbol
->section
&& elf_discarded_section (symbol
->section
))
5254 static reloc_howto_type none_howto
5255 = HOWTO (0, 0, 0, 0, FALSE
, 0, complain_overflow_dont
, NULL
,
5256 "unused", FALSE
, 0, 0, FALSE
);
5258 p
= data
+ (*parent
)->address
* bfd_octets_per_byte (input_bfd
);
5259 _bfd_clear_contents ((*parent
)->howto
, input_bfd
, p
);
5260 (*parent
)->sym_ptr_ptr
= bfd_abs_section
.symbol_ptr_ptr
;
5261 (*parent
)->addend
= 0;
5262 (*parent
)->howto
= &none_howto
;
5266 r
= bfd_perform_relocation (input_bfd
,
5270 relocatable
? abfd
: NULL
,
5275 asection
*os
= input_section
->output_section
;
5277 /* A partial link, so keep the relocs. */
5278 os
->orelocation
[os
->reloc_count
] = *parent
;
5282 if (r
!= bfd_reloc_ok
)
5286 case bfd_reloc_undefined
:
5287 if (!((*link_info
->callbacks
->undefined_symbol
)
5288 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5289 input_bfd
, input_section
, (*parent
)->address
,
5293 case bfd_reloc_dangerous
:
5294 BFD_ASSERT (error_message
!= NULL
);
5295 if (!((*link_info
->callbacks
->reloc_dangerous
)
5296 (link_info
, error_message
, input_bfd
, input_section
,
5297 (*parent
)->address
)))
5300 case bfd_reloc_overflow
:
5301 if (!((*link_info
->callbacks
->reloc_overflow
)
5303 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
5304 (*parent
)->howto
->name
, (*parent
)->addend
,
5305 input_bfd
, input_section
, (*parent
)->address
)))
5308 case bfd_reloc_outofrange
:
5318 free (reloc_vector
);
5322 free (reloc_vector
);