1 /* DO NOT EDIT! -*- buffer-read-only: t -*-
2 This file is automatically generated by z8kgen. */
15 #define ARG_IMM16 0x03
16 #define ARG_IMM32 0x04
18 #define ARG_IMMNMINUS1 0x05
19 #define ARG_IMM_1 0x06
20 #define ARG_IMM_2 0x07
21 #define ARG_DISP16 0x08
24 #define ARG_IMM1OR2 0x0b
25 #define ARG_DISP12 0x0b
27 #define ARG_DISP8 0x0c
28 #define ARG_IMM4M1 0x0d
29 #define CLASS_MASK 0x1fff0
34 #define CLASS_DISP 0x50
35 #define CLASS_IMM 0x60
37 #define CLASS_CTRL 0x80
38 #define CLASS_IGNORE 0x90
39 #define CLASS_ADDRESS 0xd0
40 #define CLASS_0CCC 0xe0
41 #define CLASS_1CCC 0xf0
42 #define CLASS_0DISP7 0x100
43 #define CLASS_1DISP7 0x200
44 #define CLASS_01II 0x300
45 #define CLASS_00II 0x400
46 #define CLASS_BIT 0x500
47 #define CLASS_FLAGS 0x600
48 #define CLASS_IR 0x700
49 #define CLASS_DISP8 0x800
50 #define CLASS_BIT_1OR2 0x900
51 #define CLASS_REG 0x7000
52 #define CLASS_REG_BYTE 0x2000
53 #define CLASS_REG_WORD 0x3000
54 #define CLASS_REG_QUAD 0x4000
55 #define CLASS_REG_LONG 0x5000
56 #define CLASS_REGN0 0x8000
57 #define CLASS_PR 0x10000
149 #define OPC_outibr 91
156 #define OPC_resflg 98
178 #define OPC_setflg 120
181 #define OPC_sindb 123
182 #define OPC_sinib 124
183 #define OPC_sinibr 125
191 #define OPC_soutb 133
192 #define OPC_soutd 134
193 #define OPC_soutdb 135
194 #define OPC_soutib 136
195 #define OPC_soutibr 137
208 #define OPC_testb 150
209 #define OPC_testl 151
211 #define OPC_trdrb 153
213 #define OPC_trirb 155
214 #define OPC_trtdrb 156
215 #define OPC_trtib 157
216 #define OPC_trtirb 158
217 #define OPC_trtrb 159
219 #define OPC_tsetb 161
225 #define OPC_lddrb 167
230 #define OPC_ext0e 172
231 #define OPC_ext0f 172
232 #define OPC_ext8e 172
233 #define OPC_ext8f 172
234 #define OPC_rsvd36 172
235 #define OPC_rsvd38 172
236 #define OPC_rsvd78 172
237 #define OPC_rsvd7e 172
238 #define OPC_rsvd9d 172
239 #define OPC_rsvd9f 172
240 #define OPC_rsvdb9 172
241 #define OPC_rsvdbf 172
243 #define OPC_ldctlb 174
245 #define OPC_trtdb 176
249 const char *nicename
;
255 unsigned char opcode
;
256 void (*func
) PARAMS ((void));
257 unsigned int arg_info
[4];
258 unsigned int byte_info
[10];
265 const opcode_entry_type z8k_table
[] = {
267 /* 1011 0101 ssss dddd *** adc rd,rs */
270 "adc rd,rs",16,5,0x3c,
272 "adc",OPC_adc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
273 {CLASS_BIT
+0xb,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,0},
275 /* 1011 0100 ssss dddd *** adcb rbd,rbs */
278 "adcb rbd,rbs",8,5,0x3f,
280 "adcb",OPC_adcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
281 {CLASS_BIT
+0xb,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,1},
283 /* 0000 0001 ssN0 dddd *** add rd,@rs */
286 "add rd,@rs",16,7,0x3c,
288 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
289 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,2},
291 /* 0100 0001 0000 dddd address_src *** add rd,address_src */
294 "add rd,address_src",16,9,0x3c,
296 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
297 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,2},
299 /* 0100 0001 ssN0 dddd address_src *** add rd,address_src(rs) */
302 "add rd,address_src(rs)",16,10,0x3c,
304 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
305 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,2},
307 /* 0000 0001 0000 dddd imm16 *** add rd,imm16 */
310 "add rd,imm16",16,7,0x3c,
312 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
313 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,2},
315 /* 1000 0001 ssss dddd *** add rd,rs */
318 "add rd,rs",16,4,0x3c,
320 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
321 {CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,2},
323 /* 0000 0000 ssN0 dddd *** addb rbd,@rs */
326 "addb rbd,@rs",8,7,0x3f,
328 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
329 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,3},
331 /* 0100 0000 0000 dddd address_src *** addb rbd,address_src */
334 "addb rbd,address_src",8,9,0x3f,
336 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
337 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,3},
339 /* 0100 0000 ssN0 dddd address_src *** addb rbd,address_src(rs) */
342 "addb rbd,address_src(rs)",8,10,0x3f,
344 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
345 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,3},
347 /* 0000 0000 0000 dddd imm8 imm8 *** addb rbd,imm8 */
350 "addb rbd,imm8",8,7,0x3f,
352 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
353 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,3},
355 /* 1000 0000 ssss dddd *** addb rbd,rbs */
358 "addb rbd,rbs",8,4,0x3f,
360 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
361 {CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,3},
363 /* 0001 0110 ssN0 dddd *** addl rrd,@rs */
366 "addl rrd,@rs",32,14,0x3c,
368 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
369 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,4},
371 /* 0101 0110 0000 dddd address_src *** addl rrd,address_src */
374 "addl rrd,address_src",32,15,0x3c,
376 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
377 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,4},
379 /* 0101 0110 ssN0 dddd address_src *** addl rrd,address_src(rs) */
382 "addl rrd,address_src(rs)",32,16,0x3c,
384 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
385 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,4},
387 /* 0001 0110 0000 dddd imm32 *** addl rrd,imm32 */
390 "addl rrd,imm32",32,14,0x3c,
392 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
393 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,4},
395 /* 1001 0110 ssss dddd *** addl rrd,rrs */
398 "addl rrd,rrs",32,8,0x3c,
400 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
401 {CLASS_BIT
+9,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,4},
403 /* 0000 0111 ssN0 dddd *** and rd,@rs */
406 "and rd,@rs",16,7,0x18,
408 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
409 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,5},
411 /* 0100 0111 0000 dddd address_src *** and rd,address_src */
414 "and rd,address_src",16,9,0x18,
416 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
417 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,5},
419 /* 0100 0111 ssN0 dddd address_src *** and rd,address_src(rs) */
422 "and rd,address_src(rs)",16,10,0x18,
424 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
425 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,5},
427 /* 0000 0111 0000 dddd imm16 *** and rd,imm16 */
430 "and rd,imm16",16,7,0x18,
432 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
433 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,5},
435 /* 1000 0111 ssss dddd *** and rd,rs */
438 "and rd,rs",16,4,0x18,
440 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
441 {CLASS_BIT
+8,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,5},
443 /* 0000 0110 ssN0 dddd *** andb rbd,@rs */
446 "andb rbd,@rs",8,7,0x1c,
448 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
449 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,6},
451 /* 0100 0110 0000 dddd address_src *** andb rbd,address_src */
454 "andb rbd,address_src",8,9,0x1c,
456 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
457 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,6},
459 /* 0100 0110 ssN0 dddd address_src *** andb rbd,address_src(rs) */
462 "andb rbd,address_src(rs)",8,10,0x1c,
464 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
465 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,6},
467 /* 0000 0110 0000 dddd imm8 imm8 *** andb rbd,imm8 */
470 "andb rbd,imm8",8,7,0x1c,
472 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
473 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,6},
475 /* 1000 0110 ssss dddd *** andb rbd,rbs */
478 "andb rbd,rbs",8,4,0x1c,
480 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
481 {CLASS_BIT
+8,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,6},
483 /* 0010 0111 ddN0 imm4 *** bit @rd,imm4 */
486 "bit @rd,imm4",16,8,0x10,
488 "bit",OPC_bit
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
489 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,7},
491 /* 0110 0111 ddN0 imm4 address_dst *** bit address_dst(rd),imm4 */
494 "bit address_dst(rd),imm4",16,11,0x10,
496 "bit",OPC_bit
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
497 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,7},
499 /* 0110 0111 0000 imm4 address_dst *** bit address_dst,imm4 */
502 "bit address_dst,imm4",16,10,0x10,
504 "bit",OPC_bit
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
505 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,7},
507 /* 1010 0111 dddd imm4 *** bit rd,imm4 */
510 "bit rd,imm4",16,4,0x10,
512 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
513 {CLASS_BIT
+0xa,CLASS_BIT
+7,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,7},
515 /* 0010 0111 0000 ssss 0000 dddd 0000 0000 *** bit rd,rs */
518 "bit rd,rs",16,10,0x10,
520 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
521 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,7},
523 /* 0010 0110 ddN0 imm4 *** bitb @rd,imm4 */
526 "bitb @rd,imm4",8,8,0x10,
528 "bitb",OPC_bitb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
529 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,8},
531 /* 0110 0110 ddN0 imm4 address_dst *** bitb address_dst(rd),imm4 */
534 "bitb address_dst(rd),imm4",8,11,0x10,
536 "bitb",OPC_bitb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
537 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,8},
539 /* 0110 0110 0000 imm4 address_dst *** bitb address_dst,imm4 */
542 "bitb address_dst,imm4",8,10,0x10,
544 "bitb",OPC_bitb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
545 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,8},
547 /* 1010 0110 dddd imm4 *** bitb rbd,imm4 */
550 "bitb rbd,imm4",8,4,0x10,
552 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
553 {CLASS_BIT
+0xa,CLASS_BIT
+6,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,8},
555 /* 0010 0110 0000 ssss 0000 dddd 0000 0000 *** bitb rbd,rs */
558 "bitb rbd,rs",8,10,0x10,
560 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
561 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,8},
563 /* 0011 0110 0000 0000 *** bpt */
569 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,9},
571 /* 0001 1111 ddN0 0000 *** call @rd */
574 "call @rd",32,10,0x00,
576 "call",OPC_call
,0,{CLASS_IR
+(ARG_RD
),},
577 {CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,10},
579 /* 0101 1111 0000 0000 address_dst *** call address_dst */
582 "call address_dst",32,12,0x00,
584 "call",OPC_call
,0,{CLASS_DA
+(ARG_DST
),},
585 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,10},
587 /* 0101 1111 ddN0 0000 address_dst *** call address_dst(rd) */
590 "call address_dst(rd)",32,13,0x00,
592 "call",OPC_call
,0,{CLASS_X
+(ARG_RD
),},
593 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,10},
595 /* 1101 disp12 *** calr disp12 */
598 "calr disp12",16,10,0x00,
600 "calr",OPC_calr
,0,{CLASS_DISP
,},
601 {CLASS_BIT
+0xd,CLASS_DISP
+(ARG_DISP12
),0,0,0,0,0,0,0,},1,2,11},
603 /* 0000 1101 ddN0 1000 *** clr @rd */
608 "clr",OPC_clr
,0,{CLASS_IR
+(ARG_RD
),},
609 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,12},
611 /* 0100 1101 0000 1000 address_dst *** clr address_dst */
614 "clr address_dst",16,11,0x00,
616 "clr",OPC_clr
,0,{CLASS_DA
+(ARG_DST
),},
617 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,12},
619 /* 0100 1101 ddN0 1000 address_dst *** clr address_dst(rd) */
622 "clr address_dst(rd)",16,12,0x00,
624 "clr",OPC_clr
,0,{CLASS_X
+(ARG_RD
),},
625 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,12},
627 /* 1000 1101 dddd 1000 *** clr rd */
632 "clr",OPC_clr
,0,{CLASS_REG_WORD
+(ARG_RD
),},
633 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,12},
635 /* 0000 1100 ddN0 1000 *** clrb @rd */
640 "clrb",OPC_clrb
,0,{CLASS_IR
+(ARG_RD
),},
641 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,13},
643 /* 0100 1100 0000 1000 address_dst *** clrb address_dst */
646 "clrb address_dst",8,11,0x00,
648 "clrb",OPC_clrb
,0,{CLASS_DA
+(ARG_DST
),},
649 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,13},
651 /* 0100 1100 ddN0 1000 address_dst *** clrb address_dst(rd) */
654 "clrb address_dst(rd)",8,12,0x00,
656 "clrb",OPC_clrb
,0,{CLASS_X
+(ARG_RD
),},
657 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,13},
659 /* 1000 1100 dddd 1000 *** clrb rbd */
664 "clrb",OPC_clrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
665 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,13},
667 /* 0000 1101 ddN0 0000 *** com @rd */
670 "com @rd",16,12,0x18,
672 "com",OPC_com
,0,{CLASS_IR
+(ARG_RD
),},
673 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,14},
675 /* 0100 1101 0000 0000 address_dst *** com address_dst */
678 "com address_dst",16,15,0x18,
680 "com",OPC_com
,0,{CLASS_DA
+(ARG_DST
),},
681 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,14},
683 /* 0100 1101 ddN0 0000 address_dst *** com address_dst(rd) */
686 "com address_dst(rd)",16,16,0x18,
688 "com",OPC_com
,0,{CLASS_X
+(ARG_RD
),},
689 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,14},
691 /* 1000 1101 dddd 0000 *** com rd */
696 "com",OPC_com
,0,{CLASS_REG_WORD
+(ARG_RD
),},
697 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,14},
699 /* 0000 1100 ddN0 0000 *** comb @rd */
702 "comb @rd",8,12,0x1c,
704 "comb",OPC_comb
,0,{CLASS_IR
+(ARG_RD
),},
705 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,15},
707 /* 0100 1100 0000 0000 address_dst *** comb address_dst */
710 "comb address_dst",8,15,0x1c,
712 "comb",OPC_comb
,0,{CLASS_DA
+(ARG_DST
),},
713 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,15},
715 /* 0100 1100 ddN0 0000 address_dst *** comb address_dst(rd) */
718 "comb address_dst(rd)",8,16,0x1c,
720 "comb",OPC_comb
,0,{CLASS_X
+(ARG_RD
),},
721 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,15},
723 /* 1000 1100 dddd 0000 *** comb rbd */
728 "comb",OPC_comb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
729 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,15},
731 /* 1000 1101 flags 0101 *** comflg flags */
734 "comflg flags",16,7,0x3c,
736 "comflg",OPC_comflg
,0,{CLASS_FLAGS
,},
737 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+5,0,0,0,0,0,},1,2,16},
739 /* 0000 1101 ddN0 0001 imm16 *** cp @rd,imm16 */
742 "cp @rd,imm16",16,11,0x3c,
744 "cp",OPC_cp
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
745 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,17},
747 /* 0100 1101 ddN0 0001 address_dst imm16 *** cp address_dst(rd),imm16 */
750 "cp address_dst(rd),imm16",16,15,0x3c,
752 "cp",OPC_cp
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
753 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,17},
755 /* 0100 1101 0000 0001 address_dst imm16 *** cp address_dst,imm16 */
758 "cp address_dst,imm16",16,14,0x3c,
760 "cp",OPC_cp
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
761 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,17},
763 /* 0000 1011 ssN0 dddd *** cp rd,@rs */
766 "cp rd,@rs",16,7,0x3c,
768 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
769 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,17},
771 /* 0100 1011 0000 dddd address_src *** cp rd,address_src */
774 "cp rd,address_src",16,9,0x3c,
776 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
777 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,17},
779 /* 0100 1011 ssN0 dddd address_src *** cp rd,address_src(rs) */
782 "cp rd,address_src(rs)",16,10,0x3c,
784 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
785 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,17},
787 /* 0000 1011 0000 dddd imm16 *** cp rd,imm16 */
790 "cp rd,imm16",16,7,0x3c,
792 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
793 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,17},
795 /* 1000 1011 ssss dddd *** cp rd,rs */
798 "cp rd,rs",16,4,0x3c,
800 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
801 {CLASS_BIT
+8,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,17},
803 /* 0000 1100 ddN0 0001 imm8 imm8 *** cpb @rd,imm8 */
806 "cpb @rd,imm8",8,11,0x3c,
808 "cpb",OPC_cpb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
809 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,18},
811 /* 0100 1100 ddN0 0001 address_dst imm8 imm8 *** cpb address_dst(rd),imm8 */
814 "cpb address_dst(rd),imm8",8,15,0x3c,
816 "cpb",OPC_cpb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
817 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,18},
819 /* 0100 1100 0000 0001 address_dst imm8 imm8 *** cpb address_dst,imm8 */
822 "cpb address_dst,imm8",8,14,0x3c,
824 "cpb",OPC_cpb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
825 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,18},
827 /* 0000 1010 ssN0 dddd *** cpb rbd,@rs */
830 "cpb rbd,@rs",8,7,0x3c,
832 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
833 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,18},
835 /* 0100 1010 0000 dddd address_src *** cpb rbd,address_src */
838 "cpb rbd,address_src",8,9,0x3c,
840 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
841 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,18},
843 /* 0100 1010 ssN0 dddd address_src *** cpb rbd,address_src(rs) */
846 "cpb rbd,address_src(rs)",8,10,0x3c,
848 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
849 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,18},
851 /* 0000 1010 0000 dddd imm8 imm8 *** cpb rbd,imm8 */
854 "cpb rbd,imm8",8,7,0x3c,
856 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
857 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,18},
859 /* 1000 1010 ssss dddd *** cpb rbd,rbs */
862 "cpb rbd,rbs",8,4,0x3c,
864 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
865 {CLASS_BIT
+8,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,18},
867 /* 1011 1011 ssN0 1000 0000 rrrr dddd cccc *** cpd rd,@rs,rr,cc */
870 "cpd rd,@rs,rr,cc",16,11,0x3c,
872 "cpd",OPC_cpd
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
873 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,19},
875 /* 1011 1010 ssN0 1000 0000 rrrr dddd cccc *** cpdb rbd,@rs,rr,cc */
878 "cpdb rbd,@rs,rr,cc",8,11,0x3c,
880 "cpdb",OPC_cpdb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
881 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,20},
883 /* 1011 1011 ssN0 1100 0000 rrrr dddd cccc *** cpdr rd,@rs,rr,cc */
886 "cpdr rd,@rs,rr,cc",16,11,0x3c,
888 "cpdr",OPC_cpdr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
889 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,21},
891 /* 1011 1010 ssN0 1100 0000 rrrr dddd cccc *** cpdrb rbd,@rs,rr,cc */
894 "cpdrb rbd,@rs,rr,cc",8,11,0x3c,
896 "cpdrb",OPC_cpdrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
897 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,22},
899 /* 1011 1011 ssN0 0000 0000 rrrr dddd cccc *** cpi rd,@rs,rr,cc */
902 "cpi rd,@rs,rr,cc",16,11,0x3c,
904 "cpi",OPC_cpi
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
905 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,23},
907 /* 1011 1010 ssN0 0000 0000 rrrr dddd cccc *** cpib rbd,@rs,rr,cc */
910 "cpib rbd,@rs,rr,cc",8,11,0x3c,
912 "cpib",OPC_cpib
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
913 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,24},
915 /* 1011 1011 ssN0 0100 0000 rrrr dddd cccc *** cpir rd,@rs,rr,cc */
918 "cpir rd,@rs,rr,cc",16,11,0x3c,
920 "cpir",OPC_cpir
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
921 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,25},
923 /* 1011 1010 ssN0 0100 0000 rrrr dddd cccc *** cpirb rbd,@rs,rr,cc */
926 "cpirb rbd,@rs,rr,cc",8,11,0x3c,
928 "cpirb",OPC_cpirb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
929 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,26},
931 /* 0001 0000 ssN0 dddd *** cpl rrd,@rs */
934 "cpl rrd,@rs",32,14,0x3c,
936 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
937 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,27},
939 /* 0101 0000 0000 dddd address_src *** cpl rrd,address_src */
942 "cpl rrd,address_src",32,15,0x3c,
944 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
945 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,27},
947 /* 0101 0000 ssN0 dddd address_src *** cpl rrd,address_src(rs) */
950 "cpl rrd,address_src(rs)",32,16,0x3c,
952 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
953 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,27},
955 /* 0001 0000 0000 dddd imm32 *** cpl rrd,imm32 */
958 "cpl rrd,imm32",32,14,0x3c,
960 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
961 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,27},
963 /* 1001 0000 ssss dddd *** cpl rrd,rrs */
966 "cpl rrd,rrs",32,8,0x3c,
968 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
969 {CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,27},
971 /* 1011 1011 ssN0 1010 0000 rrrr ddN0 cccc *** cpsd @rd,@rs,rr,cc */
974 "cpsd @rd,@rs,rr,cc",16,11,0x3c,
976 "cpsd",OPC_cpsd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
977 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,28},
979 /* 1011 1010 ssN0 1010 0000 rrrr ddN0 cccc *** cpsdb @rd,@rs,rr,cc */
982 "cpsdb @rd,@rs,rr,cc",8,11,0x3c,
984 "cpsdb",OPC_cpsdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
985 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,29},
987 /* 1011 1011 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdr @rd,@rs,rr,cc */
990 "cpsdr @rd,@rs,rr,cc",16,11,0x3c,
992 "cpsdr",OPC_cpsdr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
993 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,30},
995 /* 1011 1010 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdrb @rd,@rs,rr,cc */
998 "cpsdrb @rd,@rs,rr,cc",8,11,0x3c,
1000 "cpsdrb",OPC_cpsdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1001 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,31},
1003 /* 1011 1011 ssN0 0010 0000 rrrr ddN0 cccc *** cpsi @rd,@rs,rr,cc */
1006 "cpsi @rd,@rs,rr,cc",16,11,0x3c,
1008 "cpsi",OPC_cpsi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1009 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,32},
1011 /* 1011 1010 ssN0 0010 0000 rrrr ddN0 cccc *** cpsib @rd,@rs,rr,cc */
1014 "cpsib @rd,@rs,rr,cc",8,11,0x3c,
1016 "cpsib",OPC_cpsib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1017 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,33},
1019 /* 1011 1011 ssN0 0110 0000 rrrr ddN0 cccc *** cpsir @rd,@rs,rr,cc */
1022 "cpsir @rd,@rs,rr,cc",16,11,0x3c,
1024 "cpsir",OPC_cpsir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1025 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,34},
1027 /* 1011 1010 ssN0 0110 0000 rrrr ddN0 cccc *** cpsirb @rd,@rs,rr,cc */
1030 "cpsirb @rd,@rs,rr,cc",8,11,0x3c,
1032 "cpsirb",OPC_cpsirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1033 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,35},
1035 /* 1011 0000 dddd 0000 *** dab rbd */
1040 "dab",OPC_dab
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
1041 {CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,36},
1043 /* 1111 dddd 0disp7 *** dbjnz rbd,disp7 */
1046 "dbjnz rbd,disp7",16,11,0x00,
1048 "dbjnz",OPC_dbjnz
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
1049 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_0DISP7
,0,0,0,0,0,0,},2,2,37},
1051 /* 0010 1011 ddN0 imm4m1 *** dec @rd,imm4m1 */
1054 "dec @rd,imm4m1",16,11,0x1c,
1056 "dec",OPC_dec
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1057 {CLASS_BIT
+2,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,38},
1059 /* 0110 1011 ddN0 imm4m1 address_dst *** dec address_dst(rd),imm4m1 */
1062 "dec address_dst(rd),imm4m1",16,14,0x1c,
1064 "dec",OPC_dec
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1065 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,38},
1067 /* 0110 1011 0000 imm4m1 address_dst *** dec address_dst,imm4m1 */
1070 "dec address_dst,imm4m1",16,13,0x1c,
1072 "dec",OPC_dec
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1073 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,38},
1075 /* 1010 1011 dddd imm4m1 *** dec rd,imm4m1 */
1078 "dec rd,imm4m1",16,4,0x1c,
1080 "dec",OPC_dec
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1081 {CLASS_BIT
+0xa,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,38},
1083 /* 0010 1010 ddN0 imm4m1 *** decb @rd,imm4m1 */
1086 "decb @rd,imm4m1",8,11,0x1c,
1088 "decb",OPC_decb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1089 {CLASS_BIT
+2,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,39},
1091 /* 0110 1010 ddN0 imm4m1 address_dst *** decb address_dst(rd),imm4m1 */
1094 "decb address_dst(rd),imm4m1",8,14,0x1c,
1096 "decb",OPC_decb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1097 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,39},
1099 /* 0110 1010 0000 imm4m1 address_dst *** decb address_dst,imm4m1 */
1102 "decb address_dst,imm4m1",8,13,0x1c,
1104 "decb",OPC_decb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1105 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,39},
1107 /* 1010 1010 dddd imm4m1 *** decb rbd,imm4m1 */
1110 "decb rbd,imm4m1",8,4,0x1c,
1112 "decb",OPC_decb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1113 {CLASS_BIT
+0xa,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,39},
1115 /* 0111 1100 0000 00ii *** di i2 */
1120 "di",OPC_di
,0,{CLASS_IMM
+(ARG_IMM2
),},
1121 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_00II
,0,0,0,0,0,},1,2,40},
1123 /* 0001 1011 ssN0 dddd *** div rrd,@rs */
1126 "div rrd,@rs",16,107,0x3c,
1128 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1129 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,41},
1131 /* 0101 1011 0000 dddd address_src *** div rrd,address_src */
1134 "div rrd,address_src",16,107,0x3c,
1136 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1137 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,41},
1139 /* 0101 1011 ssN0 dddd address_src *** div rrd,address_src(rs) */
1142 "div rrd,address_src(rs)",16,107,0x3c,
1144 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1145 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,41},
1147 /* 0001 1011 0000 dddd imm16 *** div rrd,imm16 */
1150 "div rrd,imm16",16,107,0x3c,
1152 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1153 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,41},
1155 /* 1001 1011 ssss dddd *** div rrd,rs */
1158 "div rrd,rs",16,107,0x3c,
1160 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1161 {CLASS_BIT
+9,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,41},
1163 /* 0001 1010 ssN0 dddd *** divl rqd,@rs */
1166 "divl rqd,@rs",32,744,0x3c,
1168 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1169 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,42},
1171 /* 0101 1010 0000 dddd address_src *** divl rqd,address_src */
1174 "divl rqd,address_src",32,745,0x3c,
1176 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1177 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,42},
1179 /* 0101 1010 ssN0 dddd address_src *** divl rqd,address_src(rs) */
1182 "divl rqd,address_src(rs)",32,746,0x3c,
1184 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1185 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,42},
1187 /* 0001 1010 0000 dddd imm32 *** divl rqd,imm32 */
1190 "divl rqd,imm32",32,744,0x3c,
1192 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1193 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,42},
1195 /* 1001 1010 ssss dddd *** divl rqd,rrs */
1198 "divl rqd,rrs",32,744,0x3c,
1200 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1201 {CLASS_BIT
+9,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,42},
1203 /* 1111 dddd 1disp7 *** djnz rd,disp7 */
1206 "djnz rd,disp7",16,11,0x00,
1208 "djnz",OPC_djnz
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
1209 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_1DISP7
,0,0,0,0,0,0,},2,2,43},
1211 /* 0111 1100 0000 01ii *** ei i2 */
1216 "ei",OPC_ei
,0,{CLASS_IMM
+(ARG_IMM2
),},
1217 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_01II
,0,0,0,0,0,},1,2,44},
1219 /* 0010 1101 ssN0 dddd *** ex rd,@rs */
1222 "ex rd,@rs",16,12,0x00,
1224 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1225 {CLASS_BIT
+2,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,45},
1227 /* 0110 1101 0000 dddd address_src *** ex rd,address_src */
1230 "ex rd,address_src",16,15,0x00,
1232 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1233 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,45},
1235 /* 0110 1101 ssN0 dddd address_src *** ex rd,address_src(rs) */
1238 "ex rd,address_src(rs)",16,16,0x00,
1240 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1241 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,45},
1243 /* 1010 1101 ssss dddd *** ex rd,rs */
1246 "ex rd,rs",16,6,0x00,
1248 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1249 {CLASS_BIT
+0xa,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,45},
1251 /* 0010 1100 ssN0 dddd *** exb rbd,@rs */
1254 "exb rbd,@rs",8,12,0x00,
1256 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1257 {CLASS_BIT
+2,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,46},
1259 /* 0110 1100 0000 dddd address_src *** exb rbd,address_src */
1262 "exb rbd,address_src",8,15,0x00,
1264 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1265 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,46},
1267 /* 0110 1100 ssN0 dddd address_src *** exb rbd,address_src(rs) */
1270 "exb rbd,address_src(rs)",8,16,0x00,
1272 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1273 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,46},
1275 /* 1010 1100 ssss dddd *** exb rbd,rbs */
1278 "exb rbd,rbs",8,6,0x00,
1280 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1281 {CLASS_BIT
+0xa,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,46},
1283 /* 0000 1110 imm8 *** ext0e imm8 */
1286 "ext0e imm8",8,10,0x00,
1288 "ext0e",OPC_ext0e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1289 {CLASS_BIT
+0,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,47},
1291 /* 0000 1111 imm8 *** ext0f imm8 */
1294 "ext0f imm8",8,10,0x00,
1296 "ext0f",OPC_ext0f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1297 {CLASS_BIT
+0,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,48},
1299 /* 1000 1110 imm8 *** ext8e imm8 */
1302 "ext8e imm8",8,10,0x00,
1304 "ext8e",OPC_ext8e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1305 {CLASS_BIT
+8,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,49},
1307 /* 1000 1111 imm8 *** ext8f imm8 */
1310 "ext8f imm8",8,10,0x00,
1312 "ext8f",OPC_ext8f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1313 {CLASS_BIT
+8,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,50},
1315 /* 1011 0001 dddd 1010 *** exts rrd */
1318 "exts rrd",16,11,0x00,
1320 "exts",OPC_exts
,0,{CLASS_REG_LONG
+(ARG_RD
),},
1321 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xa,0,0,0,0,0,},1,2,51},
1323 /* 1011 0001 dddd 0000 *** extsb rd */
1326 "extsb rd",8,11,0x00,
1328 "extsb",OPC_extsb
,0,{CLASS_REG_WORD
+(ARG_RD
),},
1329 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,52},
1331 /* 1011 0001 dddd 0111 *** extsl rqd */
1334 "extsl rqd",32,11,0x00,
1336 "extsl",OPC_extsl
,0,{CLASS_REG_QUAD
+(ARG_RD
),},
1337 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,0,0,0,0,0,},1,2,53},
1339 /* 0111 1010 0000 0000 *** halt */
1344 "halt",OPC_halt
,0,{0},
1345 {CLASS_BIT
+7,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,54},
1347 /* 0011 1101 ssN0 dddd *** in rd,@rs */
1350 "in rd,@rs",16,10,0x00,
1352 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1353 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,55},
1355 /* 0011 1011 dddd 0100 imm16 *** in rd,imm16 */
1358 "in rd,imm16",16,12,0x00,
1360 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1361 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,55},
1363 /* 0011 1100 ssN0 dddd *** inb rbd,@rs */
1366 "inb rbd,@rs",8,12,0x00,
1368 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1369 {CLASS_BIT
+3,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,56},
1371 /* 0011 1010 dddd 0100 imm16 *** inb rbd,imm16 */
1374 "inb rbd,imm16",8,10,0x00,
1376 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1377 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,56},
1379 /* 0010 1001 ddN0 imm4m1 *** inc @rd,imm4m1 */
1382 "inc @rd,imm4m1",16,11,0x1c,
1384 "inc",OPC_inc
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1385 {CLASS_BIT
+2,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,57},
1387 /* 0110 1001 ddN0 imm4m1 address_dst *** inc address_dst(rd),imm4m1 */
1390 "inc address_dst(rd),imm4m1",16,14,0x1c,
1392 "inc",OPC_inc
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1393 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,57},
1395 /* 0110 1001 0000 imm4m1 address_dst *** inc address_dst,imm4m1 */
1398 "inc address_dst,imm4m1",16,13,0x1c,
1400 "inc",OPC_inc
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1401 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,57},
1403 /* 1010 1001 dddd imm4m1 *** inc rd,imm4m1 */
1406 "inc rd,imm4m1",16,4,0x1c,
1408 "inc",OPC_inc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1409 {CLASS_BIT
+0xa,CLASS_BIT
+9,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,57},
1411 /* 0010 1000 ddN0 imm4m1 *** incb @rd,imm4m1 */
1414 "incb @rd,imm4m1",8,11,0x1c,
1416 "incb",OPC_incb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1417 {CLASS_BIT
+2,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,58},
1419 /* 0110 1000 ddN0 imm4m1 address_dst *** incb address_dst(rd),imm4m1 */
1422 "incb address_dst(rd),imm4m1",8,14,0x1c,
1424 "incb",OPC_incb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1425 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,58},
1427 /* 0110 1000 0000 imm4m1 address_dst *** incb address_dst,imm4m1 */
1430 "incb address_dst,imm4m1",8,13,0x1c,
1432 "incb",OPC_incb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1433 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,58},
1435 /* 1010 1000 dddd imm4m1 *** incb rbd,imm4m1 */
1438 "incb rbd,imm4m1",8,4,0x1c,
1440 "incb",OPC_incb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1441 {CLASS_BIT
+0xa,CLASS_BIT
+8,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,58},
1443 /* 0011 1011 ssN0 1000 0000 aaaa ddN0 1000 *** ind @rd,@rs,ra */
1446 "ind @rd,@rs,ra",16,21,0x04,
1448 "ind",OPC_ind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1449 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,59},
1451 /* 0011 1010 ssN0 1000 0000 aaaa ddN0 1000 *** indb @rd,@rs,rba */
1454 "indb @rd,@rs,rba",8,21,0x04,
1456 "indb",OPC_indb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
1457 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,60},
1459 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 1000 *** inib @rd,@rs,ra */
1462 "inib @rd,@rs,ra",8,21,0x04,
1464 "inib",OPC_inib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1465 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,61},
1467 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 0000 *** inibr @rd,@rs,ra */
1470 "inibr @rd,@rs,ra",16,21,0x04,
1472 "inibr",OPC_inibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1473 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,62},
1475 /* 0111 1011 0000 0000 *** iret */
1480 "iret",OPC_iret
,0,{0},
1481 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,63},
1483 /* 0001 1110 ddN0 cccc *** jp cc,@rd */
1486 "jp cc,@rd",16,10,0x00,
1488 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_IR
+(ARG_RD
),},
1489 {CLASS_BIT
+1,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,64},
1491 /* 0101 1110 0000 cccc address_dst *** jp cc,address_dst */
1494 "jp cc,address_dst",16,7,0x00,
1496 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_DA
+(ARG_DST
),},
1497 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,64},
1499 /* 0101 1110 ddN0 cccc address_dst *** jp cc,address_dst(rd) */
1502 "jp cc,address_dst(rd)",16,8,0x00,
1504 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_X
+(ARG_RD
),},
1505 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,64},
1507 /* 1110 cccc disp8 *** jr cc,disp8 */
1510 "jr cc,disp8",16,6,0x00,
1512 "jr",OPC_jr
,0,{CLASS_CC
,CLASS_DISP
,},
1513 {CLASS_BIT
+0xe,CLASS_CC
,CLASS_DISP8
,0,0,0,0,0,0,},2,2,65},
1515 /* 0000 1101 ddN0 0101 imm16 *** ld @rd,imm16 */
1518 "ld @rd,imm16",16,7,0x00,
1520 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1521 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,66},
1523 /* 0010 1111 ddN0 ssss *** ld @rd,rs */
1526 "ld @rd,rs",16,8,0x00,
1528 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1529 {CLASS_BIT
+2,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,66},
1531 /* 0100 1101 ddN0 0101 address_dst imm16 *** ld address_dst(rd),imm16 */
1534 "ld address_dst(rd),imm16",16,15,0x00,
1536 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1537 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,66},
1539 /* 0110 1111 ddN0 ssss address_dst *** ld address_dst(rd),rs */
1542 "ld address_dst(rd),rs",16,12,0x00,
1544 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1545 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,66},
1547 /* 0100 1101 0000 0101 address_dst imm16 *** ld address_dst,imm16 */
1550 "ld address_dst,imm16",16,14,0x00,
1552 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
1553 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,66},
1555 /* 0110 1111 0000 ssss address_dst *** ld address_dst,rs */
1558 "ld address_dst,rs",16,11,0x00,
1560 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),},
1561 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,66},
1563 /* 0011 0011 ddN0 ssss imm16 *** ld rd(imm16),rs */
1566 "ld rd(imm16),rs",16,14,0x00,
1568 "ld",OPC_ld
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1569 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,66},
1571 /* 0111 0011 ddN0 ssss 0000 xxxx 0000 0000 *** ld rd(rx),rs */
1574 "ld rd(rx),rs",16,14,0x00,
1576 "ld",OPC_ld
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1577 {CLASS_BIT
+7,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,66},
1579 /* 0010 0001 ssN0 dddd *** ld rd,@rs */
1582 "ld rd,@rs",16,7,0x00,
1584 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1585 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,66},
1587 /* 0110 0001 0000 dddd address_src *** ld rd,address_src */
1590 "ld rd,address_src",16,9,0x00,
1592 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1593 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,66},
1595 /* 0110 0001 ssN0 dddd address_src *** ld rd,address_src(rs) */
1598 "ld rd,address_src(rs)",16,10,0x00,
1600 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1601 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,66},
1603 /* 0010 0001 0000 dddd imm16 *** ld rd,imm16 */
1606 "ld rd,imm16",16,7,0x00,
1608 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1609 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,66},
1611 /* 1010 0001 ssss dddd *** ld rd,rs */
1614 "ld rd,rs",16,3,0x00,
1616 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1617 {CLASS_BIT
+0xa,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,66},
1619 /* 0011 0001 ssN0 dddd imm16 *** ld rd,rs(imm16) */
1622 "ld rd,rs(imm16)",16,14,0x00,
1624 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1625 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,66},
1627 /* 0111 0001 ssN0 dddd 0000 xxxx 0000 0000 *** ld rd,rs(rx) */
1630 "ld rd,rs(rx)",16,14,0x00,
1632 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1633 {CLASS_BIT
+7,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,66},
1635 /* 0111 0110 0000 dddd address_src *** lda prd,address_src */
1638 "lda prd,address_src",16,12,0x00,
1640 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1641 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,67},
1643 /* 0111 0110 ssN0 dddd address_src *** lda prd,address_src(rs) */
1646 "lda prd,address_src(rs)",16,13,0x00,
1648 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1649 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,67},
1651 /* 0011 0100 ssN0 dddd imm16 *** lda prd,rs(imm16) */
1654 "lda prd,rs(imm16)",16,15,0x00,
1656 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1657 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,67},
1659 /* 0111 0100 ssN0 dddd 0000 xxxx 0000 0000 *** lda prd,rs(rx) */
1662 "lda prd,rs(rx)",16,15,0x00,
1664 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1665 {CLASS_BIT
+7,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,67},
1667 /* 0011 0100 0000 dddd disp16 *** ldar prd,disp16 */
1670 "ldar prd,disp16",16,15,0x00,
1672 "ldar",OPC_ldar
,0,{CLASS_PR
+(ARG_RD
),CLASS_DISP
,},
1673 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,68},
1675 /* 0000 1100 ddN0 0101 imm8 imm8 *** ldb @rd,imm8 */
1678 "ldb @rd,imm8",8,7,0x00,
1680 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
1681 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,69},
1683 /* 0010 1110 ddN0 ssss *** ldb @rd,rbs */
1686 "ldb @rd,rbs",8,8,0x00,
1688 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1689 {CLASS_BIT
+2,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,69},
1691 /* 0100 1100 ddN0 0101 address_dst imm8 imm8 *** ldb address_dst(rd),imm8 */
1694 "ldb address_dst(rd),imm8",8,15,0x00,
1696 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
1697 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,69},
1699 /* 0110 1110 ddN0 ssss address_dst *** ldb address_dst(rd),rbs */
1702 "ldb address_dst(rd),rbs",8,12,0x00,
1704 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1705 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,69},
1707 /* 0100 1100 0000 0101 address_dst imm8 imm8 *** ldb address_dst,imm8 */
1710 "ldb address_dst,imm8",8,14,0x00,
1712 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
1713 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,69},
1715 /* 0110 1110 0000 ssss address_dst *** ldb address_dst,rbs */
1718 "ldb address_dst,rbs",8,11,0x00,
1720 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_BYTE
+(ARG_RS
),},
1721 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,69},
1723 /* 0010 0000 ssN0 dddd *** ldb rbd,@rs */
1726 "ldb rbd,@rs",8,7,0x00,
1728 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1729 {CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,69},
1731 /* 0110 0000 0000 dddd address_src *** ldb rbd,address_src */
1734 "ldb rbd,address_src",8,9,0x00,
1736 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1737 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,69},
1739 /* 0110 0000 ssN0 dddd address_src *** ldb rbd,address_src(rs) */
1742 "ldb rbd,address_src(rs)",8,10,0x00,
1744 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1745 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,69},
1747 /* 1100 dddd imm8 *** ldb rbd,imm8 */
1750 "ldb rbd,imm8",8,5,0x00,
1752 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
1753 {CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},2,2,69},
1755 /* 1010 0000 ssss dddd *** ldb rbd,rbs */
1758 "ldb rbd,rbs",8,3,0x00,
1760 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1761 {CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,69},
1763 /* 0011 0000 ssN0 dddd imm16 *** ldb rbd,rs(imm16) */
1766 "ldb rbd,rs(imm16)",8,14,0x00,
1768 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1769 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,69},
1771 /* 0111 0000 ssN0 dddd 0000 xxxx 0000 0000 *** ldb rbd,rs(rx) */
1774 "ldb rbd,rs(rx)",8,14,0x00,
1776 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1777 {CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,69},
1779 /* 0011 0010 ddN0 ssss imm16 *** ldb rd(imm16),rbs */
1782 "ldb rd(imm16),rbs",8,14,0x00,
1784 "ldb",OPC_ldb
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1785 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,69},
1787 /* 0111 0010 ddN0 ssss 0000 xxxx 0000 0000 *** ldb rd(rx),rbs */
1790 "ldb rd(rx),rbs",8,14,0x00,
1792 "ldb",OPC_ldb
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1793 {CLASS_BIT
+7,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,69},
1795 /* 0111 1101 ssss 1ccc *** ldctl ctrl,rs */
1798 "ldctl ctrl,rs",32,7,0x00,
1800 "ldctl",OPC_ldctl
,0,{CLASS_CTRL
,CLASS_REG_WORD
+(ARG_RS
),},
1801 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_1CCC
,0,0,0,0,0,},2,2,70},
1803 /* 0111 1101 dddd 0ccc *** ldctl rd,ctrl */
1806 "ldctl rd,ctrl",32,7,0x00,
1808 "ldctl",OPC_ldctl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_CTRL
,},
1809 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_0CCC
,0,0,0,0,0,},2,2,70},
1811 /* 1000 1100 ssss 1001 *** ldctlb ctrl,rbs */
1814 "ldctlb ctrl,rbs",32,7,0x3f,
1816 "ldctlb",OPC_ldctlb
,0,{CLASS_CTRL
,CLASS_REG_BYTE
+(ARG_RS
),},
1817 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_BIT
+9,0,0,0,0,0,},2,2,71},
1819 /* 1000 1100 dddd 0001 *** ldctlb rbd,ctrl */
1822 "ldctlb rbd,ctrl",32,7,0x00,
1824 "ldctlb",OPC_ldctlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_CTRL
,},
1825 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,0,0,0,0,0,},2,2,71},
1827 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 1000 *** ldd @rd,@rs,rr */
1830 "ldd @rd,@rs,rr",16,11,0x04,
1832 "ldd",OPC_ldd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1833 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,72},
1835 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 1000 *** lddb @rd,@rs,rr */
1838 "lddb @rd,@rs,rr",8,11,0x04,
1840 "lddb",OPC_lddb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1841 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,73},
1843 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 0000 *** lddr @rd,@rs,rr */
1846 "lddr @rd,@rs,rr",16,11,0x04,
1848 "lddr",OPC_lddr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1849 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,74},
1851 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 0000 *** lddrb @rd,@rs,rr */
1854 "lddrb @rd,@rs,rr",8,11,0x04,
1856 "lddrb",OPC_lddrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1857 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,75},
1859 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 1000 *** ldi @rd,@rs,rr */
1862 "ldi @rd,@rs,rr",16,11,0x04,
1864 "ldi",OPC_ldi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1865 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,76},
1867 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 1000 *** ldib @rd,@rs,rr */
1870 "ldib @rd,@rs,rr",8,11,0x04,
1872 "ldib",OPC_ldib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1873 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,77},
1875 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 0000 *** ldir @rd,@rs,rr */
1878 "ldir @rd,@rs,rr",16,11,0x04,
1880 "ldir",OPC_ldir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1881 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,78},
1883 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 0000 *** ldirb @rd,@rs,rr */
1886 "ldirb @rd,@rs,rr",8,11,0x04,
1888 "ldirb",OPC_ldirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
1889 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,79},
1891 /* 1011 1101 dddd imm4 *** ldk rd,imm4 */
1894 "ldk rd,imm4",16,5,0x00,
1896 "ldk",OPC_ldk
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
1897 {CLASS_BIT
+0xb,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,80},
1899 /* 0001 1101 ddN0 ssss *** ldl @rd,rrs */
1902 "ldl @rd,rrs",32,11,0x00,
1904 "ldl",OPC_ldl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1905 {CLASS_BIT
+1,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,81},
1907 /* 0101 1101 ddN0 ssss address_dst *** ldl address_dst(rd),rrs */
1910 "ldl address_dst(rd),rrs",32,14,0x00,
1912 "ldl",OPC_ldl
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1913 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,81},
1915 /* 0101 1101 0000 ssss address_dst *** ldl address_dst,rrs */
1918 "ldl address_dst,rrs",32,15,0x00,
1920 "ldl",OPC_ldl
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_LONG
+(ARG_RS
),},
1921 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,81},
1923 /* 0011 0111 ddN0 ssss imm16 *** ldl rd(imm16),rrs */
1926 "ldl rd(imm16),rrs",32,17,0x00,
1928 "ldl",OPC_ldl
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1929 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,81},
1931 /* 0111 0111 ddN0 ssss 0000 xxxx 0000 0000 *** ldl rd(rx),rrs */
1934 "ldl rd(rx),rrs",32,17,0x00,
1936 "ldl",OPC_ldl
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1937 {CLASS_BIT
+7,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,81},
1939 /* 0001 0100 ssN0 dddd *** ldl rrd,@rs */
1942 "ldl rrd,@rs",32,11,0x00,
1944 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1945 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,81},
1947 /* 0101 0100 0000 dddd address_src *** ldl rrd,address_src */
1950 "ldl rrd,address_src",32,12,0x00,
1952 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1953 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,81},
1955 /* 0101 0100 ssN0 dddd address_src *** ldl rrd,address_src(rs) */
1958 "ldl rrd,address_src(rs)",32,13,0x00,
1960 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1961 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,81},
1963 /* 0001 0100 0000 dddd imm32 *** ldl rrd,imm32 */
1966 "ldl rrd,imm32",32,11,0x00,
1968 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1969 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,81},
1971 /* 1001 0100 ssss dddd *** ldl rrd,rrs */
1974 "ldl rrd,rrs",32,5,0x00,
1976 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1977 {CLASS_BIT
+9,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,81},
1979 /* 0011 0101 ssN0 dddd imm16 *** ldl rrd,rs(imm16) */
1982 "ldl rrd,rs(imm16)",32,17,0x00,
1984 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1985 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,81},
1987 /* 0111 0101 ssN0 dddd 0000 xxxx 0000 0000 *** ldl rrd,rs(rx) */
1990 "ldl rrd,rs(rx)",32,17,0x00,
1992 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1993 {CLASS_BIT
+7,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,81},
1995 /* 0001 1100 ddN0 1001 0000 ssss 0000 imm4m1 *** ldm @rd,rs,n */
1998 "ldm @rd,rs,n",16,11,0x00,
2000 "ldm",OPC_ldm
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2001 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),0,},3,4,82},
2003 /* 0101 1100 ddN0 1001 0000 ssss 0000 imm4m1 address_dst *** ldm address_dst(rd),rs,n */
2006 "ldm address_dst(rd),rs,n",16,15,0x00,
2008 "ldm",OPC_ldm
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2009 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,82},
2011 /* 0101 1100 0000 1001 0000 ssss 0000 imm4m1 address_dst *** ldm address_dst,rs,n */
2014 "ldm address_dst,rs,n",16,14,0x00,
2016 "ldm",OPC_ldm
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2017 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,82},
2019 /* 0001 1100 ssN0 0001 0000 dddd 0000 imm4m1 *** ldm rd,@rs,n */
2022 "ldm rd,@rs,n",16,11,0x00,
2024 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2025 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),0,},3,4,82},
2027 /* 0101 1100 ssN0 0001 0000 dddd 0000 imm4m1 address_src *** ldm rd,address_src(rs),n */
2030 "ldm rd,address_src(rs),n",16,15,0x00,
2032 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),CLASS_IMM
+ (ARG_IMM4M1
),},
2033 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,82},
2035 /* 0101 1100 0000 0001 0000 dddd 0000 imm4m1 address_src *** ldm rd,address_src,n */
2038 "ldm rd,address_src,n",16,14,0x00,
2040 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),CLASS_IMM
+ (ARG_IMM4M1
),},
2041 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,82},
2043 /* 0011 1001 ssN0 0000 *** ldps @rs */
2046 "ldps @rs",16,12,0x3f,
2048 "ldps",OPC_ldps
,0,{CLASS_IR
+(ARG_RS
),},
2049 {CLASS_BIT
+3,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,0,0,0,0,},1,2,83},
2051 /* 0111 1001 0000 0000 address_src *** ldps address_src */
2054 "ldps address_src",16,16,0x3f,
2056 "ldps",OPC_ldps
,0,{CLASS_DA
+(ARG_SRC
),},
2057 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,83},
2059 /* 0111 1001 ssN0 0000 address_src *** ldps address_src(rs) */
2062 "ldps address_src(rs)",16,17,0x3f,
2064 "ldps",OPC_ldps
,0,{CLASS_X
+(ARG_RS
),},
2065 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,83},
2067 /* 0011 0011 0000 ssss disp16 *** ldr disp16,rs */
2070 "ldr disp16,rs",16,14,0x00,
2072 "ldr",OPC_ldr
,0,{CLASS_DISP
,CLASS_REG_WORD
+(ARG_RS
),},
2073 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,84},
2075 /* 0011 0001 0000 dddd disp16 *** ldr rd,disp16 */
2078 "ldr rd,disp16",16,14,0x00,
2080 "ldr",OPC_ldr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
2081 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,84},
2083 /* 0011 0010 0000 ssss disp16 *** ldrb disp16,rbs */
2086 "ldrb disp16,rbs",8,14,0x00,
2088 "ldrb",OPC_ldrb
,0,{CLASS_DISP
,CLASS_REG_BYTE
+(ARG_RS
),},
2089 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,85},
2091 /* 0011 0000 0000 dddd disp16 *** ldrb rbd,disp16 */
2094 "ldrb rbd,disp16",8,14,0x00,
2096 "ldrb",OPC_ldrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
2097 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,85},
2099 /* 0011 0111 0000 ssss disp16 *** ldrl disp16,rrs */
2102 "ldrl disp16,rrs",32,17,0x00,
2104 "ldrl",OPC_ldrl
,0,{CLASS_DISP
,CLASS_REG_LONG
+(ARG_RS
),},
2105 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,86},
2107 /* 0011 0101 0000 dddd disp16 *** ldrl rrd,disp16 */
2110 "ldrl rrd,disp16",32,17,0x00,
2112 "ldrl",OPC_ldrl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DISP
,},
2113 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,86},
2115 /* 0111 1011 0000 1010 *** mbit */
2120 "mbit",OPC_mbit
,0,{0},
2121 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0xa,0,0,0,0,0,},0,2,87},
2123 /* 0111 1011 dddd 1101 *** mreq rd */
2126 "mreq rd",16,12,0x18,
2128 "mreq",OPC_mreq
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2129 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,0,0,0,0,0,},1,2,88},
2131 /* 0111 1011 0000 1001 *** mres */
2136 "mres",OPC_mres
,0,{0},
2137 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+9,0,0,0,0,0,},0,2,89},
2139 /* 0111 1011 0000 1000 *** mset */
2144 "mset",OPC_mset
,0,{0},
2145 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+8,0,0,0,0,0,},0,2,90},
2147 /* 0001 1001 ssN0 dddd *** mult rrd,@rs */
2150 "mult rrd,@rs",16,70,0x3c,
2152 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2153 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,91},
2155 /* 0101 1001 0000 dddd address_src *** mult rrd,address_src */
2158 "mult rrd,address_src",16,70,0x3c,
2160 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2161 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,91},
2163 /* 0101 1001 ssN0 dddd address_src *** mult rrd,address_src(rs) */
2166 "mult rrd,address_src(rs)",16,70,0x3c,
2168 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2169 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,91},
2171 /* 0001 1001 0000 dddd imm16 *** mult rrd,imm16 */
2174 "mult rrd,imm16",16,70,0x3c,
2176 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2177 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,91},
2179 /* 1001 1001 ssss dddd *** mult rrd,rs */
2182 "mult rrd,rs",16,70,0x3c,
2184 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2185 {CLASS_BIT
+9,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,91},
2187 /* 0001 1000 ssN0 dddd *** multl rqd,@rs */
2190 "multl rqd,@rs",32,282,0x3c,
2192 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2193 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,92},
2195 /* 0101 1000 0000 dddd address_src *** multl rqd,address_src */
2198 "multl rqd,address_src",32,282,0x3c,
2200 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2201 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,92},
2203 /* 0101 1000 ssN0 dddd address_src *** multl rqd,address_src(rs) */
2206 "multl rqd,address_src(rs)",32,282,0x3c,
2208 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2209 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,92},
2211 /* 0001 1000 0000 dddd imm32 *** multl rqd,imm32 */
2214 "multl rqd,imm32",32,282,0x3c,
2216 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2217 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,92},
2219 /* 1001 1000 ssss dddd *** multl rqd,rrs */
2222 "multl rqd,rrs",32,282,0x3c,
2224 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2225 {CLASS_BIT
+9,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,92},
2227 /* 0000 1101 ddN0 0010 *** neg @rd */
2230 "neg @rd",16,12,0x3c,
2232 "neg",OPC_neg
,0,{CLASS_IR
+(ARG_RD
),},
2233 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,93},
2235 /* 0100 1101 0000 0010 address_dst *** neg address_dst */
2238 "neg address_dst",16,15,0x3c,
2240 "neg",OPC_neg
,0,{CLASS_DA
+(ARG_DST
),},
2241 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,93},
2243 /* 0100 1101 ddN0 0010 address_dst *** neg address_dst(rd) */
2246 "neg address_dst(rd)",16,16,0x3c,
2248 "neg",OPC_neg
,0,{CLASS_X
+(ARG_RD
),},
2249 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,93},
2251 /* 1000 1101 dddd 0010 *** neg rd */
2256 "neg",OPC_neg
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2257 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,93},
2259 /* 0000 1100 ddN0 0010 *** negb @rd */
2262 "negb @rd",8,12,0x3c,
2264 "negb",OPC_negb
,0,{CLASS_IR
+(ARG_RD
),},
2265 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,94},
2267 /* 0100 1100 0000 0010 address_dst *** negb address_dst */
2270 "negb address_dst",8,15,0x3c,
2272 "negb",OPC_negb
,0,{CLASS_DA
+(ARG_DST
),},
2273 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,94},
2275 /* 0100 1100 ddN0 0010 address_dst *** negb address_dst(rd) */
2278 "negb address_dst(rd)",8,16,0x3c,
2280 "negb",OPC_negb
,0,{CLASS_X
+(ARG_RD
),},
2281 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,94},
2283 /* 1000 1100 dddd 0010 *** negb rbd */
2286 "negb rbd",8,7,0x3c,
2288 "negb",OPC_negb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
2289 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,94},
2291 /* 1000 1101 0000 0111 *** nop */
2296 "nop",OPC_nop
,0,{0},
2297 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+7,0,0,0,0,0,},0,2,95},
2299 /* 0000 0101 ssN0 dddd *** or rd,@rs */
2302 "or rd,@rs",16,7,0x38,
2304 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2305 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,96},
2307 /* 0100 0101 0000 dddd address_src *** or rd,address_src */
2310 "or rd,address_src",16,9,0x38,
2312 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2313 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,96},
2315 /* 0100 0101 ssN0 dddd address_src *** or rd,address_src(rs) */
2318 "or rd,address_src(rs)",16,10,0x38,
2320 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2321 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,96},
2323 /* 0000 0101 0000 dddd imm16 *** or rd,imm16 */
2326 "or rd,imm16",16,7,0x38,
2328 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2329 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,96},
2331 /* 1000 0101 ssss dddd *** or rd,rs */
2334 "or rd,rs",16,4,0x38,
2336 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2337 {CLASS_BIT
+8,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,96},
2339 /* 0000 0100 ssN0 dddd *** orb rbd,@rs */
2342 "orb rbd,@rs",8,7,0x3c,
2344 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2345 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,97},
2347 /* 0100 0100 0000 dddd address_src *** orb rbd,address_src */
2350 "orb rbd,address_src",8,9,0x3c,
2352 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2353 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,97},
2355 /* 0100 0100 ssN0 dddd address_src *** orb rbd,address_src(rs) */
2358 "orb rbd,address_src(rs)",8,10,0x3c,
2360 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2361 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,97},
2363 /* 0000 0100 0000 dddd imm8 imm8 *** orb rbd,imm8 */
2366 "orb rbd,imm8",8,7,0x3c,
2368 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2369 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,97},
2371 /* 1000 0100 ssss dddd *** orb rbd,rbs */
2374 "orb rbd,rbs",8,4,0x3c,
2376 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2377 {CLASS_BIT
+8,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,97},
2379 /* 0011 1111 ddN0 ssss *** out @rd,rs */
2382 "out @rd,rs",16,0,0x04,
2384 "out",OPC_out
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2385 {CLASS_BIT
+3,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,98},
2387 /* 0011 1011 ssss 0110 imm16 *** out imm16,rs */
2390 "out imm16,rs",16,0,0x04,
2392 "out",OPC_out
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
2393 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,98},
2395 /* 0011 1110 ddN0 ssss *** outb @rd,rbs */
2398 "outb @rd,rbs",8,0,0x04,
2400 "outb",OPC_outb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2401 {CLASS_BIT
+3,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,99},
2403 /* 0011 1010 ssss 0110 imm16 *** outb imm16,rbs */
2406 "outb imm16,rbs",8,0,0x04,
2408 "outb",OPC_outb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
2409 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,99},
2411 /* 0011 1011 ssN0 1010 0000 aaaa ddN0 1000 *** outd @rd,@rs,ra */
2414 "outd @rd,@rs,ra",16,0,0x04,
2416 "outd",OPC_outd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2417 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,100},
2419 /* 0011 1010 ssN0 1010 0000 aaaa ddN0 1000 *** outdb @rd,@rs,rba */
2422 "outdb @rd,@rs,rba",16,0,0x04,
2424 "outdb",OPC_outdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
2425 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,101},
2427 /* 0011 1011 ssN0 0010 0000 aaaa ddN0 1000 *** outi @rd,@rs,ra */
2430 "outi @rd,@rs,ra",16,0,0x04,
2432 "outi",OPC_outi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2433 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,102},
2435 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 1000 *** outib @rd,@rs,ra */
2438 "outib @rd,@rs,ra",16,0,0x04,
2440 "outib",OPC_outib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2441 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,103},
2443 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 0000 *** outibr @rd,@rs,ra */
2446 "outibr @rd,@rs,ra",16,0,0x04,
2448 "outibr",OPC_outibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2449 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,104},
2451 /* 0001 0111 ssN0 ddN0 *** pop @rd,@rs */
2454 "pop @rd,@rs",16,12,0x00,
2456 "pop",OPC_pop
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2457 {CLASS_BIT
+1,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,105},
2459 /* 0101 0111 ssN0 ddN0 address_dst *** pop address_dst(rd),@rs */
2462 "pop address_dst(rd),@rs",16,16,0x00,
2464 "pop",OPC_pop
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2465 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,105},
2467 /* 0101 0111 ssN0 0000 address_dst *** pop address_dst,@rs */
2470 "pop address_dst,@rs",16,16,0x00,
2472 "pop",OPC_pop
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
2473 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,105},
2475 /* 1001 0111 ssN0 dddd *** pop rd,@rs */
2478 "pop rd,@rs",16,8,0x00,
2480 "pop",OPC_pop
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2481 {CLASS_BIT
+9,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,105},
2483 /* 0001 0101 ssN0 ddN0 *** popl @rd,@rs */
2486 "popl @rd,@rs",32,19,0x00,
2488 "popl",OPC_popl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2489 {CLASS_BIT
+1,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,106},
2491 /* 0101 0101 ssN0 ddN0 address_dst *** popl address_dst(rd),@rs */
2494 "popl address_dst(rd),@rs",32,23,0x00,
2496 "popl",OPC_popl
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2497 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,106},
2499 /* 0101 0101 ssN0 0000 address_dst *** popl address_dst,@rs */
2502 "popl address_dst,@rs",32,23,0x00,
2504 "popl",OPC_popl
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
2505 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,106},
2507 /* 1001 0101 ssN0 dddd *** popl rrd,@rs */
2510 "popl rrd,@rs",32,12,0x00,
2512 "popl",OPC_popl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2513 {CLASS_BIT
+9,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,106},
2515 /* 0001 0011 ddN0 ssN0 *** push @rd,@rs */
2518 "push @rd,@rs",16,13,0x00,
2520 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2521 {CLASS_BIT
+1,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,107},
2523 /* 0101 0011 ddN0 0000 address_src *** push @rd,address_src */
2526 "push @rd,address_src",16,14,0x00,
2528 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2529 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,107},
2531 /* 0101 0011 ddN0 ssN0 address_src *** push @rd,address_src(rs) */
2534 "push @rd,address_src(rs)",16,14,0x00,
2536 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2537 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,107},
2539 /* 0000 1101 ddN0 1001 imm16 *** push @rd,imm16 */
2542 "push @rd,imm16",16,12,0x00,
2544 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2545 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,107},
2547 /* 1001 0011 ddN0 ssss *** push @rd,rs */
2550 "push @rd,rs",16,9,0x00,
2552 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2553 {CLASS_BIT
+9,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,107},
2555 /* 0001 0001 ddN0 ssN0 *** pushl @rd,@rs */
2558 "pushl @rd,@rs",32,20,0x00,
2560 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2561 {CLASS_BIT
+1,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,108},
2563 /* 0101 0001 ddN0 0000 address_src *** pushl @rd,address_src */
2566 "pushl @rd,address_src",32,21,0x00,
2568 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2569 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,108},
2571 /* 0101 0001 ddN0 ssN0 address_src *** pushl @rd,address_src(rs) */
2574 "pushl @rd,address_src(rs)",32,21,0x00,
2576 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2577 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,108},
2579 /* 1001 0001 ddN0 ssss *** pushl @rd,rrs */
2582 "pushl @rd,rrs",32,12,0x00,
2584 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2585 {CLASS_BIT
+9,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,108},
2587 /* 0010 0011 ddN0 imm4 *** res @rd,imm4 */
2590 "res @rd,imm4",16,11,0x00,
2592 "res",OPC_res
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2593 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,109},
2595 /* 0110 0011 ddN0 imm4 address_dst *** res address_dst(rd),imm4 */
2598 "res address_dst(rd),imm4",16,14,0x00,
2600 "res",OPC_res
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2601 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,109},
2603 /* 0110 0011 0000 imm4 address_dst *** res address_dst,imm4 */
2606 "res address_dst,imm4",16,13,0x00,
2608 "res",OPC_res
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
2609 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,109},
2611 /* 1010 0011 dddd imm4 *** res rd,imm4 */
2614 "res rd,imm4",16,4,0x00,
2616 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2617 {CLASS_BIT
+0xa,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,109},
2619 /* 0010 0011 0000 ssss 0000 dddd 0000 0000 *** res rd,rs */
2622 "res rd,rs",16,10,0x00,
2624 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2625 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,109},
2627 /* 0010 0010 ddN0 imm4 *** resb @rd,imm4 */
2630 "resb @rd,imm4",8,11,0x00,
2632 "resb",OPC_resb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2633 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,110},
2635 /* 0110 0010 ddN0 imm4 address_dst *** resb address_dst(rd),imm4 */
2638 "resb address_dst(rd),imm4",8,14,0x00,
2640 "resb",OPC_resb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2641 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,110},
2643 /* 0110 0010 0000 imm4 address_dst *** resb address_dst,imm4 */
2646 "resb address_dst,imm4",8,13,0x00,
2648 "resb",OPC_resb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
2649 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,110},
2651 /* 1010 0010 dddd imm4 *** resb rbd,imm4 */
2654 "resb rbd,imm4",8,4,0x00,
2656 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2657 {CLASS_BIT
+0xa,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,110},
2659 /* 0010 0010 0000 ssss 0000 dddd 0000 0000 *** resb rbd,rs */
2662 "resb rbd,rs",8,10,0x00,
2664 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2665 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,110},
2667 /* 1000 1101 flags 0011 *** resflg flags */
2670 "resflg flags",16,7,0x3c,
2672 "resflg",OPC_resflg
,0,{CLASS_FLAGS
,},
2673 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+3,0,0,0,0,0,},1,2,111},
2675 /* 1001 1110 0000 cccc *** ret cc */
2678 "ret cc",16,10,0x00,
2680 "ret",OPC_ret
,0,{CLASS_CC
,},
2681 {CLASS_BIT
+9,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,0,0,0,0,0,},1,2,112},
2683 /* 1011 0011 dddd 00I0 *** rl rd,imm1or2 */
2686 "rl rd,imm1or2",16,6,0x3c,
2688 "rl",OPC_rl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2689 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,113},
2691 /* 1011 0010 dddd 00I0 *** rlb rbd,imm1or2 */
2694 "rlb rbd,imm1or2",8,6,0x3c,
2696 "rlb",OPC_rlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2697 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,114},
2699 /* 1011 0011 dddd 10I0 *** rlc rd,imm1or2 */
2702 "rlc rd,imm1or2",16,6,0x3c,
2704 "rlc",OPC_rlc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2705 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,115},
2707 /* 1011 0010 dddd 10I0 *** rlcb rbd,imm1or2 */
2710 "rlcb rbd,imm1or2",8,9,0x10,
2712 "rlcb",OPC_rlcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2713 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,116},
2715 /* 1011 1110 aaaa bbbb *** rldb rbb,rba */
2718 "rldb rbb,rba",8,9,0x10,
2720 "rldb",OPC_rldb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
2721 {CLASS_BIT
+0xb,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,117},
2723 /* 1011 0011 dddd 01I0 *** rr rd,imm1or2 */
2726 "rr rd,imm1or2",16,6,0x3c,
2728 "rr",OPC_rr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2729 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,118},
2731 /* 1011 0010 dddd 01I0 *** rrb rbd,imm1or2 */
2734 "rrb rbd,imm1or2",8,6,0x3c,
2736 "rrb",OPC_rrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2737 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,119},
2739 /* 1011 0011 dddd 11I0 *** rrc rd,imm1or2 */
2742 "rrc rd,imm1or2",16,6,0x3c,
2744 "rrc",OPC_rrc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2745 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,120},
2747 /* 1011 0010 dddd 11I0 *** rrcb rbd,imm1or2 */
2750 "rrcb rbd,imm1or2",8,9,0x10,
2752 "rrcb",OPC_rrcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
2753 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,121},
2755 /* 1011 1100 aaaa bbbb *** rrdb rbb,rba */
2758 "rrdb rbb,rba",8,9,0x10,
2760 "rrdb",OPC_rrdb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
2761 {CLASS_BIT
+0xb,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,122},
2763 /* 0011 0110 imm8 *** rsvd36 */
2768 "rsvd36",OPC_rsvd36
,0,{0},
2769 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,123},
2771 /* 0011 1000 imm8 *** rsvd38 */
2776 "rsvd38",OPC_rsvd38
,0,{0},
2777 {CLASS_BIT
+3,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,124},
2779 /* 0111 1000 imm8 *** rsvd78 */
2784 "rsvd78",OPC_rsvd78
,0,{0},
2785 {CLASS_BIT
+7,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,125},
2787 /* 0111 1110 imm8 *** rsvd7e */
2792 "rsvd7e",OPC_rsvd7e
,0,{0},
2793 {CLASS_BIT
+7,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,126},
2795 /* 1001 1101 imm8 *** rsvd9d */
2800 "rsvd9d",OPC_rsvd9d
,0,{0},
2801 {CLASS_BIT
+9,CLASS_BIT
+0xd,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,127},
2803 /* 1001 1111 imm8 *** rsvd9f */
2808 "rsvd9f",OPC_rsvd9f
,0,{0},
2809 {CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,128},
2811 /* 1011 1001 imm8 *** rsvdb9 */
2816 "rsvdb9",OPC_rsvdb9
,0,{0},
2817 {CLASS_BIT
+0xb,CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,129},
2819 /* 1011 1111 imm8 *** rsvdbf */
2824 "rsvdbf",OPC_rsvdbf
,0,{0},
2825 {CLASS_BIT
+0xb,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,130},
2827 /* 1011 0111 ssss dddd *** sbc rd,rs */
2830 "sbc rd,rs",16,5,0x3c,
2832 "sbc",OPC_sbc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2833 {CLASS_BIT
+0xb,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,131},
2835 /* 1011 0110 ssss dddd *** sbcb rbd,rbs */
2838 "sbcb rbd,rbs",8,5,0x3f,
2840 "sbcb",OPC_sbcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2841 {CLASS_BIT
+0xb,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,132},
2843 /* 0111 1111 imm8 *** sc imm8 */
2846 "sc imm8",8,33,0x3f,
2848 "sc",OPC_sc
,0,{CLASS_IMM
+(ARG_IMM8
),},
2849 {CLASS_BIT
+7,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,133},
2851 /* 1011 0011 dddd 1011 0000 ssss 0000 0000 *** sda rd,rs */
2854 "sda rd,rs",16,15,0x3c,
2856 "sda",OPC_sda
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2857 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,134},
2859 /* 1011 0010 dddd 1011 0000 ssss 0000 0000 *** sdab rbd,rs */
2862 "sdab rbd,rs",8,15,0x3c,
2864 "sdab",OPC_sdab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2865 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,135},
2867 /* 1011 0011 dddd 1111 0000 ssss 0000 0000 *** sdal rrd,rs */
2870 "sdal rrd,rs",32,15,0x3c,
2872 "sdal",OPC_sdal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2873 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,136},
2875 /* 1011 0011 dddd 0011 0000 ssss 0000 0000 *** sdl rd,rs */
2878 "sdl rd,rs",16,15,0x38,
2880 "sdl",OPC_sdl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2881 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,137},
2883 /* 1011 0010 dddd 0011 0000 ssss 0000 0000 *** sdlb rbd,rs */
2886 "sdlb rbd,rs",8,15,0x38,
2888 "sdlb",OPC_sdlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2889 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,138},
2891 /* 1011 0011 dddd 0111 0000 ssss 0000 0000 *** sdll rrd,rs */
2894 "sdll rrd,rs",32,15,0x38,
2896 "sdll",OPC_sdll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2897 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,139},
2899 /* 0010 0101 ddN0 imm4 *** set @rd,imm4 */
2902 "set @rd,imm4",16,11,0x00,
2904 "set",OPC_set
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2905 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,140},
2907 /* 0110 0101 ddN0 imm4 address_dst *** set address_dst(rd),imm4 */
2910 "set address_dst(rd),imm4",16,14,0x00,
2912 "set",OPC_set
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2913 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,140},
2915 /* 0110 0101 0000 imm4 address_dst *** set address_dst,imm4 */
2918 "set address_dst,imm4",16,13,0x00,
2920 "set",OPC_set
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
2921 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,140},
2923 /* 1010 0101 dddd imm4 *** set rd,imm4 */
2926 "set rd,imm4",16,4,0x00,
2928 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2929 {CLASS_BIT
+0xa,CLASS_BIT
+5,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,140},
2931 /* 0010 0101 0000 ssss 0000 dddd 0000 0000 *** set rd,rs */
2934 "set rd,rs",16,10,0x00,
2936 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2937 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,140},
2939 /* 0010 0100 ddN0 imm4 *** setb @rd,imm4 */
2942 "setb @rd,imm4",8,11,0x00,
2944 "setb",OPC_setb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2945 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,141},
2947 /* 0110 0100 ddN0 imm4 address_dst *** setb address_dst(rd),imm4 */
2950 "setb address_dst(rd),imm4",8,14,0x00,
2952 "setb",OPC_setb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2953 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,141},
2955 /* 0110 0100 0000 imm4 address_dst *** setb address_dst,imm4 */
2958 "setb address_dst,imm4",8,13,0x00,
2960 "setb",OPC_setb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
2961 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,141},
2963 /* 1010 0100 dddd imm4 *** setb rbd,imm4 */
2966 "setb rbd,imm4",8,4,0x00,
2968 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2969 {CLASS_BIT
+0xa,CLASS_BIT
+4,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,141},
2971 /* 0010 0100 0000 ssss 0000 dddd 0000 0000 *** setb rbd,rs */
2974 "setb rbd,rs",8,10,0x00,
2976 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2977 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,141},
2979 /* 1000 1101 flags 0001 *** setflg flags */
2982 "setflg flags",16,7,0x3c,
2984 "setflg",OPC_setflg
,0,{CLASS_FLAGS
,},
2985 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+1,0,0,0,0,0,},1,2,142},
2987 /* 0011 1011 dddd 0101 imm16 *** sin rd,imm16 */
2990 "sin rd,imm16",8,0,0x00,
2992 "sin",OPC_sin
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2993 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,143},
2995 /* 0011 1010 dddd 0101 imm16 *** sinb rbd,imm16 */
2998 "sinb rbd,imm16",8,0,0x00,
3000 "sinb",OPC_sinb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3001 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,144},
3003 /* 0011 1011 ssN0 1000 0001 aaaa ddN0 1000 *** sind @rd,@rs,ra */
3006 "sind @rd,@rs,ra",16,0,0x00,
3008 "sind",OPC_sind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3009 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,145},
3011 /* 0011 1010 ssN0 1000 0001 aaaa ddN0 1000 *** sindb @rd,@rs,rba */
3014 "sindb @rd,@rs,rba",8,0,0x00,
3016 "sindb",OPC_sindb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3017 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,146},
3019 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 1000 *** sinib @rd,@rs,ra */
3022 "sinib @rd,@rs,ra",8,0,0x00,
3024 "sinib",OPC_sinib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3025 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,147},
3027 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 0000 *** sinibr @rd,@rs,ra */
3030 "sinibr @rd,@rs,ra",16,0,0x00,
3032 "sinibr",OPC_sinibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3033 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,148},
3035 /* 1011 0011 dddd 1001 0000 0000 imm8 *** sla rd,imm8 */
3038 "sla rd,imm8",16,13,0x3c,
3040 "sla",OPC_sla
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3041 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,149},
3043 /* 1011 0010 dddd 1001 iiii iiii 0000 imm4 *** slab rbd,imm4 */
3046 "slab rbd,imm4",8,13,0x3c,
3048 "slab",OPC_slab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3049 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),0,},2,4,150},
3051 /* 1011 0011 dddd 1101 0000 0000 imm8 *** slal rrd,imm8 */
3054 "slal rrd,imm8",32,13,0x3c,
3056 "slal",OPC_slal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3057 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,151},
3059 /* 1011 0011 dddd 0001 0000 0000 imm8 *** sll rd,imm8 */
3062 "sll rd,imm8",16,13,0x38,
3064 "sll",OPC_sll
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3065 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,152},
3067 /* 1011 0010 dddd 0001 iiii iiii 0000 imm4 *** sllb rbd,imm4 */
3070 "sllb rbd,imm4",8,13,0x38,
3072 "sllb",OPC_sllb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3073 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),0,},2,4,153},
3075 /* 1011 0011 dddd 0101 0000 0000 imm8 *** slll rrd,imm8 */
3078 "slll rrd,imm8",32,13,0x38,
3080 "slll",OPC_slll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3081 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,154},
3083 /* 0011 1011 ssss 0111 imm16 *** sout imm16,rs */
3086 "sout imm16,rs",16,0,0x00,
3088 "sout",OPC_sout
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
3089 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,155},
3091 /* 0011 1010 ssss 0111 imm16 *** soutb imm16,rbs */
3094 "soutb imm16,rbs",8,0,0x00,
3096 "soutb",OPC_soutb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
3097 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,156},
3099 /* 0011 1011 ssN0 1011 0000 aaaa ddN0 1000 *** soutd @rd,@rs,ra */
3102 "soutd @rd,@rs,ra",16,0,0x00,
3104 "soutd",OPC_soutd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3105 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,157},
3107 /* 0011 1010 ssN0 1011 0000 aaaa ddN0 1000 *** soutdb @rd,@rs,rba */
3110 "soutdb @rd,@rs,rba",8,0,0x00,
3112 "soutdb",OPC_soutdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3113 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,158},
3115 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 1000 *** soutib @rd,@rs,ra */
3118 "soutib @rd,@rs,ra",8,0,0x00,
3120 "soutib",OPC_soutib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3121 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,159},
3123 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 0000 *** soutibr @rd,@rs,ra */
3126 "soutibr @rd,@rs,ra",16,0,0x00,
3128 "soutibr",OPC_soutibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3129 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,160},
3131 /* 1011 0011 dddd 1001 1111 1111 nim8 *** sra rd,imm8 */
3134 "sra rd,imm8",16,13,0x3c,
3136 "sra",OPC_sra
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3137 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,161},
3139 /* 1011 0010 dddd 1001 iiii iiii 1111 nim4 *** srab rbd,imm4 */
3142 "srab rbd,imm4",8,13,0x3c,
3144 "srab",OPC_srab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3145 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM4
),0,},2,4,162},
3147 /* 1011 0011 dddd 1101 1111 1111 nim8 *** sral rrd,imm8 */
3150 "sral rrd,imm8",32,13,0x3c,
3152 "sral",OPC_sral
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3153 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,163},
3155 /* 1011 0011 dddd 0001 1111 1111 nim8 *** srl rd,imm8 */
3158 "srl rd,imm8",16,13,0x3c,
3160 "srl",OPC_srl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3161 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,164},
3163 /* 1011 0010 dddd 0001 iiii iiii 1111 nim4 *** srlb rbd,imm4 */
3166 "srlb rbd,imm4",8,13,0x3c,
3168 "srlb",OPC_srlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3169 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_IGNORE
,CLASS_IGNORE
,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM4
),0,},2,4,165},
3171 /* 1011 0011 dddd 0101 1111 1111 nim8 *** srll rrd,imm8 */
3174 "srll rrd,imm8",32,13,0x3c,
3176 "srll",OPC_srll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3177 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,166},
3179 /* 0000 0011 ssN0 dddd *** sub rd,@rs */
3182 "sub rd,@rs",16,7,0x3c,
3184 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3185 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,167},
3187 /* 0100 0011 0000 dddd address_src *** sub rd,address_src */
3190 "sub rd,address_src",16,9,0x3c,
3192 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3193 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,167},
3195 /* 0100 0011 ssN0 dddd address_src *** sub rd,address_src(rs) */
3198 "sub rd,address_src(rs)",16,10,0x3c,
3200 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3201 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,167},
3203 /* 0000 0011 0000 dddd imm16 *** sub rd,imm16 */
3206 "sub rd,imm16",16,7,0x3c,
3208 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3209 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,167},
3211 /* 1000 0011 ssss dddd *** sub rd,rs */
3214 "sub rd,rs",16,4,0x3c,
3216 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3217 {CLASS_BIT
+8,CLASS_BIT
+3,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,167},
3219 /* 0000 0010 ssN0 dddd *** subb rbd,@rs */
3222 "subb rbd,@rs",8,7,0x3f,
3224 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3225 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,168},
3227 /* 0100 0010 0000 dddd address_src *** subb rbd,address_src */
3230 "subb rbd,address_src",8,9,0x3f,
3232 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3233 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,168},
3235 /* 0100 0010 ssN0 dddd address_src *** subb rbd,address_src(rs) */
3238 "subb rbd,address_src(rs)",8,10,0x3f,
3240 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3241 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,168},
3243 /* 0000 0010 0000 dddd imm8 imm8 *** subb rbd,imm8 */
3246 "subb rbd,imm8",8,7,0x3f,
3248 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3249 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,168},
3251 /* 1000 0010 ssss dddd *** subb rbd,rbs */
3254 "subb rbd,rbs",8,4,0x3f,
3256 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3257 {CLASS_BIT
+8,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,168},
3259 /* 0001 0010 ssN0 dddd *** subl rrd,@rs */
3262 "subl rrd,@rs",32,14,0x3c,
3264 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3265 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,169},
3267 /* 0101 0010 0000 dddd address_src *** subl rrd,address_src */
3270 "subl rrd,address_src",32,15,0x3c,
3272 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3273 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,169},
3275 /* 0101 0010 ssN0 dddd address_src *** subl rrd,address_src(rs) */
3278 "subl rrd,address_src(rs)",32,16,0x3c,
3280 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3281 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,169},
3283 /* 0001 0010 0000 dddd imm32 *** subl rrd,imm32 */
3286 "subl rrd,imm32",32,14,0x3c,
3288 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
3289 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,169},
3291 /* 1001 0010 ssss dddd *** subl rrd,rrs */
3294 "subl rrd,rrs",32,8,0x3c,
3296 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
3297 {CLASS_BIT
+9,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,169},
3299 /* 1010 1111 dddd cccc *** tcc cc,rd */
3302 "tcc cc,rd",16,5,0x00,
3304 "tcc",OPC_tcc
,0,{CLASS_CC
,CLASS_REG_WORD
+(ARG_RD
),},
3305 {CLASS_BIT
+0xa,CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,170},
3307 /* 1010 1110 dddd cccc *** tccb cc,rbd */
3310 "tccb cc,rbd",8,5,0x00,
3312 "tccb",OPC_tccb
,0,{CLASS_CC
,CLASS_REG_BYTE
+(ARG_RD
),},
3313 {CLASS_BIT
+0xa,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,171},
3315 /* 0000 1101 ddN0 0100 *** test @rd */
3318 "test @rd",16,8,0x18,
3320 "test",OPC_test
,0,{CLASS_IR
+(ARG_RD
),},
3321 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,172},
3323 /* 0100 1101 0000 0100 address_dst *** test address_dst */
3326 "test address_dst",16,11,0x00,
3328 "test",OPC_test
,0,{CLASS_DA
+(ARG_DST
),},
3329 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,172},
3331 /* 0100 1101 ddN0 0100 address_dst *** test address_dst(rd) */
3334 "test address_dst(rd)",16,12,0x00,
3336 "test",OPC_test
,0,{CLASS_X
+(ARG_RD
),},
3337 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,172},
3339 /* 1000 1101 dddd 0100 *** test rd */
3342 "test rd",16,7,0x00,
3344 "test",OPC_test
,0,{CLASS_REG_WORD
+(ARG_RD
),},
3345 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,172},
3347 /* 0000 1100 ddN0 0100 *** testb @rd */
3350 "testb @rd",8,8,0x1c,
3352 "testb",OPC_testb
,0,{CLASS_IR
+(ARG_RD
),},
3353 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,173},
3355 /* 0100 1100 0000 0100 address_dst *** testb address_dst */
3358 "testb address_dst",8,11,0x1c,
3360 "testb",OPC_testb
,0,{CLASS_DA
+(ARG_DST
),},
3361 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,173},
3363 /* 0100 1100 ddN0 0100 address_dst *** testb address_dst(rd) */
3366 "testb address_dst(rd)",8,12,0x1c,
3368 "testb",OPC_testb
,0,{CLASS_X
+(ARG_RD
),},
3369 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,173},
3371 /* 1000 1100 dddd 0100 *** testb rbd */
3374 "testb rbd",8,7,0x1c,
3376 "testb",OPC_testb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
3377 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,173},
3379 /* 0001 1100 ddN0 1000 *** testl @rd */
3382 "testl @rd",32,13,0x18,
3384 "testl",OPC_testl
,0,{CLASS_IR
+(ARG_RD
),},
3385 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,174},
3387 /* 0101 1100 0000 1000 address_dst *** testl address_dst */
3390 "testl address_dst",32,16,0x18,
3392 "testl",OPC_testl
,0,{CLASS_DA
+(ARG_DST
),},
3393 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,174},
3395 /* 0101 1100 ddN0 1000 address_dst *** testl address_dst(rd) */
3398 "testl address_dst(rd)",32,17,0x18,
3400 "testl",OPC_testl
,0,{CLASS_X
+(ARG_RD
),},
3401 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,174},
3403 /* 1001 1100 dddd 1000 *** testl rrd */
3406 "testl rrd",32,13,0x18,
3408 "testl",OPC_testl
,0,{CLASS_REG_LONG
+(ARG_RD
),},
3409 {CLASS_BIT
+9,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,174},
3411 /* 1011 1000 ddN0 1000 0000 aaaa ssN0 0000 *** trdb @rd,@rs,rba */
3414 "trdb @rd,@rs,rba",8,25,0x1c,
3416 "trdb",OPC_trdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3417 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,175},
3419 /* 1011 1000 ddN0 1100 0000 aaaa ssN0 0000 *** trdrb @rd,@rs,rba */
3422 "trdrb @rd,@rs,rba",8,25,0x1c,
3424 "trdrb",OPC_trdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3425 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,176},
3427 /* 1011 1000 ddN0 0000 0000 rrrr ssN0 0000 *** trib @rd,@rs,rbr */
3430 "trib @rd,@rs,rbr",8,25,0x1c,
3432 "trib",OPC_trib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
3433 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,177},
3435 /* 1011 1000 ddN0 0100 0000 rrrr ssN0 0000 *** trirb @rd,@rs,rbr */
3438 "trirb @rd,@rs,rbr",8,25,0x1c,
3440 "trirb",OPC_trirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
3441 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,178},
3443 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtdb @ra,@rb,rbr */
3446 "trtdb @ra,@rb,rbr",8,25,0x1c,
3448 "trtdb",OPC_trtdb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
3449 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,179},
3451 /* 1011 1000 aaN0 1110 0000 rrrr bbN0 1110 *** trtdrb @ra,@rb,rbr */
3454 "trtdrb @ra,@rb,rbr",8,25,0x1c,
3456 "trtdrb",OPC_trtdrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
3457 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,180},
3459 /* 1011 1000 aaN0 0010 0000 rrrr bbN0 0000 *** trtib @ra,@rb,rbr */
3462 "trtib @ra,@rb,rbr",8,25,0x1c,
3464 "trtib",OPC_trtib
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
3465 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,181},
3467 /* 1011 1000 aaN0 0110 0000 rrrr bbN0 1110 *** trtirb @ra,@rb,rbr */
3470 "trtirb @ra,@rb,rbr",8,25,0x1c,
3472 "trtirb",OPC_trtirb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
3473 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,182},
3475 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtrb @ra,@rb,rbr */
3478 "trtrb @ra,@rb,rbr",8,25,0x1c,
3480 "trtrb",OPC_trtrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
3481 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,183},
3483 /* 0000 1101 ddN0 0110 *** tset @rd */
3486 "tset @rd",16,11,0x08,
3488 "tset",OPC_tset
,0,{CLASS_IR
+(ARG_RD
),},
3489 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,184},
3491 /* 0100 1101 0000 0110 address_dst *** tset address_dst */
3494 "tset address_dst",16,14,0x08,
3496 "tset",OPC_tset
,0,{CLASS_DA
+(ARG_DST
),},
3497 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,184},
3499 /* 0100 1101 ddN0 0110 address_dst *** tset address_dst(rd) */
3502 "tset address_dst(rd)",16,15,0x08,
3504 "tset",OPC_tset
,0,{CLASS_X
+(ARG_RD
),},
3505 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,184},
3507 /* 1000 1101 dddd 0110 *** tset rd */
3510 "tset rd",16,7,0x08,
3512 "tset",OPC_tset
,0,{CLASS_REG_WORD
+(ARG_RD
),},
3513 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,184},
3515 /* 0000 1100 ddN0 0110 *** tsetb @rd */
3518 "tsetb @rd",8,11,0x08,
3520 "tsetb",OPC_tsetb
,0,{CLASS_IR
+(ARG_RD
),},
3521 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,185},
3523 /* 0100 1100 0000 0110 address_dst *** tsetb address_dst */
3526 "tsetb address_dst",8,14,0x08,
3528 "tsetb",OPC_tsetb
,0,{CLASS_DA
+(ARG_DST
),},
3529 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,185},
3531 /* 0100 1100 ddN0 0110 address_dst *** tsetb address_dst(rd) */
3534 "tsetb address_dst(rd)",8,15,0x08,
3536 "tsetb",OPC_tsetb
,0,{CLASS_X
+(ARG_RD
),},
3537 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,185},
3539 /* 1000 1100 dddd 0110 *** tsetb rbd */
3542 "tsetb rbd",8,7,0x08,
3544 "tsetb",OPC_tsetb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
3545 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,185},
3547 /* 0000 1001 ssN0 dddd *** xor rd,@rs */
3550 "xor rd,@rs",16,7,0x18,
3552 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3553 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,186},
3555 /* 0100 1001 0000 dddd address_src *** xor rd,address_src */
3558 "xor rd,address_src",16,9,0x18,
3560 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3561 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,186},
3563 /* 0100 1001 ssN0 dddd address_src *** xor rd,address_src(rs) */
3566 "xor rd,address_src(rs)",16,10,0x18,
3568 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3569 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,186},
3571 /* 0000 1001 0000 dddd imm16 *** xor rd,imm16 */
3574 "xor rd,imm16",16,7,0x18,
3576 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3577 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,186},
3579 /* 1000 1001 ssss dddd *** xor rd,rs */
3582 "xor rd,rs",16,4,0x18,
3584 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3585 {CLASS_BIT
+8,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,186},
3587 /* 0000 1000 ssN0 dddd *** xorb rbd,@rs */
3590 "xorb rbd,@rs",8,7,0x1c,
3592 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3593 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,187},
3595 /* 0100 1000 0000 dddd address_src *** xorb rbd,address_src */
3598 "xorb rbd,address_src",8,9,0x1c,
3600 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3601 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,187},
3603 /* 0100 1000 ssN0 dddd address_src *** xorb rbd,address_src(rs) */
3606 "xorb rbd,address_src(rs)",8,10,0x1c,
3608 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3609 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,187},
3611 /* 0000 1000 0000 dddd imm8 imm8 *** xorb rbd,imm8 */
3614 "xorb rbd,imm8",8,7,0x1c,
3616 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3617 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,187},
3619 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
3622 "xorb rbd,rbs",8,4,0x1c,
3624 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3625 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,187},
3627 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
3630 "xorb rbd,rbs",8,4,0x01,
3632 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3633 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,187},
3641 NULL
,0,0,{0,0,0,0},{0,0,0,0,0,0,0,0,0,0},0,0,0}