1 ; IQ2000-only CPU description. -*- Scheme -*-
3 ; Copyright 2000, 2001, 2002, 2004, 2007 Free Software Foundation, Inc.
5 ; Contributed by Red Hat Inc; developed under contract from Vitesse.
7 ; This file is part of the GNU Binutils.
9 ; This program is free software; you can redistribute it and/or modify
10 ; it under the terms of the GNU General Public License as published by
11 ; the Free Software Foundation; either version 3 of the License, or
12 ; (at your option) any later version.
14 ; This program is distributed in the hope that it will be useful,
15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ; GNU General Public License for more details.
19 ; You should have received a copy of the GNU General Public License
20 ; along with this program; if not, write to the Free Software
21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 (dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT)
25 "andoui $rt,$rs,$hi16"
26 (+ OP_ANDOUI rs rt hi16)
27 (set rt (and rs (or (sll hi16 16) #xFFFF)))
30 (dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
31 "andoui ${rt-rs},$hi16"
32 (+ OP_ANDOUI rt-rs hi16)
33 (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
36 (dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
38 (+ OP_ORUI rt-rs hi16)
39 (set rt-rs (or rt-rs (sll hi16 16)))
42 (dni orui "or upper immediate" (MACH2000 USES-RS USES-RT)
44 (+ OP_ORUI rs rt hi16)
45 (set rt (or rs (sll hi16 16)))
48 (dni bgtz "branch if greater than zero" (MACH2000 USES-RS)
50 (+ OP_BGTZ rs (f-rt 0) offset)
52 (delay 1 (set pc offset)))
56 (dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS)
58 (+ OP_BGTZL rs (f-rt 0) offset)
60 (delay 1 (set pc offset))
64 (dni blez "branch if less than or equal to zero" (MACH2000 USES-RS)
66 (+ OP_BLEZ rs (f-rt 0) offset)
68 (delay 1 (set pc offset)))
71 (dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS)
73 (+ OP_BLEZL rs (f-rt 0) offset)
75 (delay 1 (set pc offset))
80 (dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT)
81 "mrgb $rd,$rs,$rt,$mask"
82 (+ OP_SPECIAL rs rt rd (f-10 0) mask FUNC_MRGB)
84 (if (bitclear? mask 0)
85 (set temp (and rs #xFF))
86 (set temp (and rt #xFF)))
87 (if (bitclear? mask 1)
88 (set temp (or temp (and rs #xFF00)))
89 (set temp (or temp (and rt #xFF00))))
90 (if (bitclear? mask 2)
91 (set temp (or temp (and rs #xFF0000)))
92 (set temp (or temp (and rt #xFF0000))))
93 (if (bitclear? mask 3)
94 (set temp (or temp (and rs #xFF000000)))
95 (set temp (or temp (and rt #xFF000000))))
99 (dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT)
100 "mrgb ${rd-rs},$rt,$mask"
101 (+ OP_SPECIAL rt rd-rs (f-10 0) mask FUNC_MRGB)
102 (sequence ((SI temp))
103 (if (bitclear? mask 0)
104 (set temp (and rd-rs #xFF))
105 (set temp (and rt #xFF)))
106 (if (bitclear? mask 1)
107 (set temp (or temp (and rd-rs #xFF00)))
108 (set temp (or temp (and rt #xFF00))))
109 (if (bitclear? mask 2)
110 (set temp (or temp (and rd-rs #xFF0000)))
111 (set temp (or temp (and rt #xFF0000))))
112 (if (bitclear? mask 3)
113 (set temp (or temp (and rd-rs #xFF000000)))
114 (set temp (or temp (and rt #xFF000000))))
118 ; NOTE: None of these instructions' semantics are specified, so they
119 ; will not work in a simulator.
121 ; Architectural and coprocessor instructions.
122 ; BREAK and SYSCALL are implemented with escape hatches to the C
123 ; code. These are used by the test suite to indicate pass/failures.
125 (dni bctxt "branch and switch context" (MACH2000 DELAY-SLOT COND-CTI USES-RS)
127 (+ OP_REGIMM rs (f-rt 6) offset)
131 (dni bc0f "branch if copro 0 condition false" (MACH2000 DELAY-SLOT COND-CTI)
133 (+ OP_COP0 (f-rs 8) (f-rt 0) offset)
137 (dni bc0fl "branch if copro 0 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
139 (+ OP_COP0 (f-rs 8) (f-rt 2) offset)
143 (dni bc3f "branch if copro 3 condition false" (MACH2000 DELAY-SLOT COND-CTI)
145 (+ OP_COP3 (f-rs 8) (f-rt 0) offset)
149 (dni bc3fl "branch if copro 3 condition false likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
151 (+ OP_COP3 (f-rs 8) (f-rt 2) offset)
155 (dni bc0t "branch if copro 0 condition true" (MACH2000 DELAY-SLOT COND-CTI)
157 (+ OP_COP0 (f-rs 8) (f-rt 1) offset)
161 (dni bc0tl "branch if copro 0 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
163 (+ OP_COP0 (f-rs 8) (f-rt 3) offset)
167 (dni bc3t "branch if copro 3 condition true" (MACH2000 DELAY-SLOT COND-CTI)
169 (+ OP_COP3 (f-rs 8) (f-rt 1) offset)
173 (dni bc3tl "branch if copro 3 condition true likely" (MACH2000 DELAY-SLOT COND-CTI SKIP-CTI)
175 (+ OP_COP3 (f-rs 8) (f-rt 3) offset)
179 ; Note that we don't set the USES-RD or USES-RT attributes for many of the following
180 ; instructions, as it's the COP register that's being specified.
182 (dni cfc0 "control from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
184 (+ OP_COP0 (f-rs 2) rt rd (f-10-11 0))
188 (dni cfc1 "control from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
190 (+ OP_COP1 (f-rs 2) rt rd (f-10-11 0))
194 (dni cfc2 "control from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
196 (+ OP_COP2 (f-rs 2) rt rd (f-10-11 0))
200 (dni cfc3 "control from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
202 (+ OP_COP3 (f-rs 2) rt rd (f-10-11 0))
206 ; COPz instructions are an instruction form, not real instructions
207 ; with associated assembly mnemonics. Therefore, they are omitted
208 ; from the ISA description.
210 (dni chkhdr "check header" (MACH2000 LOAD-DELAY USES-RD YIELD-INSN)
212 (+ OP_COP3 (f-rs 9) rt rd (f-shamt 0) (f-func 0))
216 (dni ctc0 "control to coprocessor 0" (MACH2000 USES-RT)
218 (+ OP_COP0 (f-rs 6) rt rd (f-10-11 0))
222 (dni ctc1 "control to coprocessor 1" (MACH2000 USES-RT)
224 (+ OP_COP1 (f-rs 6) rt rd (f-10-11 0))
228 (dni ctc2 "control to coprocessor 2" (MACH2000 USES-RT)
230 (+ OP_COP2 (f-rs 6) rt rd (f-10-11 0))
234 (dni ctc3 "control to coprocessor 3" (MACH2000 USES-RT)
236 (+ OP_COP3 (f-rs 6) rt rd (f-10-11 0))
240 (dni jcr "jump context register" (MACH2000 DELAY-SLOT UNCOND-CTI USES-RS)
242 (+ OP_SPECIAL rs (f-rt 0) (f-rd 0) (f-shamt 0) FUNC_JCR)
246 (dni luc32 "lookup chain 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
248 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
252 (dni luc32l "lookup chain 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
254 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
258 (dni luc64 "lookup chain 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
260 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 11))
264 (dni luc64l "lookup chain 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
266 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 15))
270 (dni luk "lookup key" (MACH2000 USES-RD USES-RT)
272 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 8))
276 (dni lulck "lookup lock" (MACH2000 USES-RT YIELD-INSN)
278 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 4))
282 (dni lum32 "lookup match 32 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
284 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
288 (dni lum32l "lookup match 32 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
290 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
294 (dni lum64 "lookup match 64 bits" (MACH2000 USES-RD USES-RT YIELD-INSN)
296 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 10))
300 (dni lum64l "lookup match 64 bits and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
302 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 14))
306 (dni lur "lookup read" (MACH2000 USES-RD USES-RT YIELD-INSN)
308 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
312 (dni lurl "lookup read and lock" (MACH2000 USES-RD USES-RT YIELD-INSN)
314 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 5))
318 (dni luulck "lookup unlock" (MACH2000 USES-RT YIELD-INSN)
320 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 0))
324 (dni mfc0 "move from coprocessor 0" (MACH2000 LOAD-DELAY USES-RT)
326 (+ OP_COP0 (f-rs 0) rt rd (f-10-11 0))
330 (dni mfc1 "move from coprocessor 1" (MACH2000 LOAD-DELAY USES-RT)
332 (+ OP_COP1 (f-rs 0) rt rd (f-10-11 0))
336 (dni mfc2 "move from coprocessor 2" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
338 (+ OP_COP2 (f-rs 0) rt rd (f-10-11 0))
342 (dni mfc3 "move from coprocessor 3" (MACH2000 LOAD-DELAY USES-RT YIELD-INSN)
344 (+ OP_COP3 (f-rs 0) rt rd (f-10-11 0))
348 (dni mtc0 "move to coprocessor 0" (MACH2000 USES-RT)
350 (+ OP_COP0 (f-rs 4) rt rd (f-10-11 0))
354 (dni mtc1 "move to coprocessor 1" (MACH2000 USES-RT)
356 (+ OP_COP1 (f-rs 4) rt rd (f-10-11 0))
360 (dni mtc2 "move to coprocessor 2" (MACH2000 USES-RT)
362 (+ OP_COP2 (f-rs 4) rt rd (f-10-11 0))
366 (dni mtc3 "move to coprocessor 3" (MACH2000 USES-RT)
368 (+ OP_COP3 (f-rs 4) rt rd (f-10-11 0))
372 (dni pkrl "pkrl" (MACH2000 USES-RD USES-RT YIELD-INSN)
374 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 7))
378 (dni pkrlr1 "pkrlr1" (MACH2000 USES-RT YIELD-INSN)
379 "pkrlr1 $rt,$_index,$count"
380 (+ OP_COP3 (f-rs 29) rt count _index)
384 (dni pkrlr30 "pkrlr30" (MACH2000 USES-RT YIELD-INSN)
385 "pkrlr30 $rt,$_index,$count"
386 (+ OP_COP3 (f-rs 31) rt count _index)
390 (dni rb "dma read bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
392 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 4))
396 (dni rbr1 "dma read bytes using r1" (MACH2000 USES-RT YIELD-INSN)
397 "rbr1 $rt,$_index,$count"
398 (+ OP_COP3 (f-rs 24) rt count _index)
402 (dni rbr30 "dma read bytes using r30" (MACH2000 USES-RT YIELD-INSN)
403 "rbr30 $rt,$_index,$count"
404 (+ OP_COP3 (f-rs 26) rt count _index)
408 (dni rfe "restore from exception" (MACH2000)
410 (+ OP_COP0 (f-25 1) (f-24-19 0) (f-func 16))
414 (dni rx "dma read word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
416 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 6))
420 (dni rxr1 "dma read word64s using r1" (MACH2000 USES-RT YIELD-INSN)
421 "rxr1 $rt,$_index,$count"
422 (+ OP_COP3 (f-rs 28) rt count _index)
426 (dni rxr30 "dma read word 64s using r30" (MACH2000 USES-RT YIELD-INSN)
427 "rxr30 $rt,$_index,$count"
428 (+ OP_COP3 (f-rs 30) rt count _index)
432 (dni sleep "sleep" (MACH2000 YIELD-INSN)
434 (+ OP_SPECIAL execode FUNC_SLEEP)
438 (dni srrd "sram read" (MACH2000 USES-RT YIELD-INSN)
440 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 16))
444 (dni srrdl "sram read and lock" (MACH2000 USES-RT YIELD-INSN)
446 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 20))
450 (dni srulck "sram unlock" (MACH2000 USES-RT YIELD-INSN)
452 (+ OP_COP2 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 22))
456 (dni srwr "sram write" (MACH2000 USES-RD USES-RT YIELD-INSN)
458 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 17))
462 (dni srwru "sram write and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
464 (+ OP_COP2 (f-rs 1) rt rd (f-shamt 0) (f-func 21))
468 (dni trapqfl "yield if dma queue full" (MACH2000 YIELD-INSN)
470 (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 8))
474 (dni trapqne "yield if dma queue not empty" (MACH2000 YIELD-INSN)
476 (+ OP_COP3 (f-rs 1) (f-rt 0) (f-rd 0) (f-shamt 0) (f-func 9))
480 (dni traprel "traprel" (MACH2000 USES-RT YIELD-INSN)
482 (+ OP_COP3 (f-rs 1) rt (f-rd 0) (f-shamt 0) (f-func 10))
486 (dni wb "dma write bytes" (MACH2000 USES-RD USES-RT YIELD-INSN)
488 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 0))
492 (dni wbu "dma write bytes and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
494 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 1))
498 (dni wbr1 "dma write bytes using r1" (MACH2000 USES-RT YIELD-INSN)
499 "wbr1 $rt,$_index,$count"
500 (+ OP_COP3 (f-rs 16) rt count _index)
504 (dni wbr1u "dma write bytes using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
505 "wbr1u $rt,$_index,$count"
506 (+ OP_COP3 (f-rs 17) rt count _index)
510 (dni wbr30 "dma write bytes using r30" (MACH2000 USES-RT YIELD-INSN)
511 "wbr30 $rt,$_index,$count"
512 (+ OP_COP3 (f-rs 18) rt count _index)
516 (dni wbr30u "dma write bytes using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
517 "wbr30u $rt,$_index,$count"
518 (+ OP_COP3 (f-rs 19) rt count _index)
522 (dni wx "dma write word64s" (MACH2000 USES-RD USES-RT YIELD-INSN)
524 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 2))
528 (dni wxu "dma write word64s and unlock" (MACH2000 USES-RD USES-RT YIELD-INSN)
530 (+ OP_COP3 (f-rs 1) rt rd (f-shamt 0) (f-func 3))
534 (dni wxr1 "dma write word64s using r1" (MACH2000 USES-RT YIELD-INSN)
535 "wxr1 $rt,$_index,$count"
536 (+ OP_COP3 (f-rs 20) rt count _index)
540 (dni wxr1u "dma write word64s using r1 and unlock" (MACH2000 USES-RT YIELD-INSN)
541 "wxr1u $rt,$_index,$count"
542 (+ OP_COP3 (f-rs 21) rt count _index)
546 (dni wxr30 "dma write word64s using r30" (MACH2000 USES-RT YIELD-INSN)
547 "wxr30 $rt,$_index,$count"
548 (+ OP_COP3 (f-rs 22) rt count _index)
552 (dni wxr30u "dma write word64s using r30 and unlock" (MACH2000 USES-RT YIELD-INSN)
553 "wxr30u $rt,$_index,$count"
554 (+ OP_COP3 (f-rs 23) rt count _index)
559 ; Load/Store instructions.
561 (dni ldw "load double word" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT)
562 "ldw $rt,$lo16($base)"
563 (+ OP_LDW base rt lo16)
564 (sequence ((SI addr))
565 (set addr (and (add base lo16) (inv 3)))
566 (set (reg h-gr (add (ifield f-rt) 1)) (mem SI addr))
567 (set rt (mem SI (add addr 4))))
570 (dni sdw "store double word" (MACH2000 EVEN-REG-NUM USES-RT)
571 "sdw $rt,$lo16($base)"
572 (+ OP_SDW base rt lo16)
573 (sequence ((SI addr))
574 (set addr (and (add base lo16) (inv 3)))
575 (set (mem SI (add addr 4)) rt)
576 (set (mem SI addr) (reg h-gr (add (ifield f-rt) 1))))
582 (dni j "jump" (MACH2000)
584 (+ OP_J (f-rsrvd 0) jmptarg)
585 (delay 1 (set pc jmptarg))
588 (dni jal "jump and link" (MACH2000 USES-R31)
590 (+ OP_JAL (f-rsrvd 0) jmptarg)
593 (set (reg h-gr 31) (add pc 8))
597 (dni bmb "branch if matching byte-lane" (MACH2000 USES-RS USES-RT)
598 "bmb $rs,$rt,$offset"
599 (+ OP_BMB rs rt offset)
600 (sequence ((BI branch?))
602 (if (eq (and rs #xFF) (and rt #xFF))
604 (if (eq (and rs #xFF00) (and rt #xFF00))
606 (if (eq (and rs #xFF0000) (and rt #xFF0000))
608 (if (eq (and rs #xFF000000) (and rt #xFF000000))
611 (delay 1 (set pc offset))))
617 (dnmi ldw-base-0 "load double word - implied base 0" (MACH2000 EVEN-REG-NUM LOAD-DELAY USES-RT USES-RS NO-DIS)
619 (emit ldw rt lo16 (base 0))
622 (dnmi sdw-base-0 "store double word - implied base 0" (MACH2000 EVEN-REG-NUM USES-RT NO-DIS)
624 (emit sdw rt lo16 (base 0))