| blob | 1ed8d70133b720dbccfd2bd1c5e0c08f8b2f0e43 |
1 2006-05-03 Alan Modra <amodra@bigpond.net.au>
3 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
4 * config/obj-elf.h (obj_sec_set_private_data): Delete.
5 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
6 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
8 2006-05-02 Joseph Myers <joseph@codesourcery.com>
10 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
11 here.
12 (md_apply_fix3): Multiply offset by 4 here for
13 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
15 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
16 Jan Beulich <jbeulich@novell.com>
18 * config/tc-i386.c (output_invalid_buf): Change size for
19 unsigned char.
20 * config/tc-tic30.c (output_invalid_buf): Likewise.
22 * config/tc-i386.c (output_invalid): Cast none-ascii char to
23 unsigned char.
24 * config/tc-tic30.c (output_invalid): Likewise.
26 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
28 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
29 (TEXI2POD): Use AM_MAKEINFOFLAGS.
30 (asconfig.texi): Don't set top_srcdir.
31 * doc/as.texinfo: Don't use top_srcdir.
32 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
34 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
36 * config/tc-i386.c (output_invalid_buf): Change size to 16.
37 * config/tc-tic30.c (output_invalid_buf): Likewise.
39 * config/tc-i386.c (output_invalid): Use snprintf instead of
40 sprintf.
41 * config/tc-ia64.c (declare_register_set): Likewise.
42 (emit_one_bundle): Likewise.
43 (check_dependencies): Likewise.
44 * config/tc-tic30.c (output_invalid): Likewise.
46 2006-05-02 Paul Brook <paul@codesourcery.com>
48 * config/tc-arm.c (arm_optimize_expr): New function.
49 * config/tc-arm.h (md_optimize_expr): Define
50 (arm_optimize_expr): Add prototype.
51 (TC_FORCE_RELOCATION_SUB_SAME): Define.
53 2006-05-02 Ben Elliston <bje@au.ibm.com>
55 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
56 field unsigned.
58 * sb.h (sb_list_vector): Move to sb.c.
59 * sb.c (free_list): Use type of sb_list_vector directly.
60 (sb_build): Fix off-by-one error in assertion about `size'.
62 2006-05-01 Ben Elliston <bje@au.ibm.com>
64 * listing.c (listing_listing): Remove useless loop.
65 * macro.c (macro_expand): Remove is_positional local variable.
66 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
67 and simplify surrounding expressions, where possible.
68 (assign_symbol): Likewise.
69 (s_weakref): Likewise.
70 * symbols.c (colon): Likewise.
72 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
74 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
76 2006-04-30 Thiemo Seufer <ths@mips.com>
77 David Ung <davidu@mips.com>
79 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
80 (mips_immed): New table that records various handling of udi
81 instruction patterns.
82 (mips_ip): Adds udi handling.
84 2006-04-28 Alan Modra <amodra@bigpond.net.au>
86 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
87 of list rather than beginning.
89 2006-04-26 Julian Brown <julian@codesourcery.com>
91 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
92 (is_quarter_float): Rename from above. Simplify slightly.
93 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
94 number.
95 (parse_neon_mov): Parse floating-point constants.
96 (neon_qfloat_bits): Fix encoding.
97 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
98 preference to integer encoding when using the F32 type.
100 2006-04-26 Julian Brown <julian@codesourcery.com>
102 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
103 zero-initialising structures containing it will lead to invalid types).
104 (arm_it): Add vectype to each operand.
105 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
106 defined field.
107 (neon_typed_alias): New structure. Extra information for typed
108 register aliases.
109 (reg_entry): Add neon type info field.
110 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
111 Break out alternative syntax for coprocessor registers, etc. into...
112 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
113 out from arm_reg_parse.
114 (parse_neon_type): Move. Return SUCCESS/FAIL.
115 (first_error): New function. Call to ensure first error which occurs is
116 reported.
117 (parse_neon_operand_type): Parse exactly one type.
118 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
119 (parse_typed_reg_or_scalar): New function. Handle core of both
120 arm_typed_reg_parse and parse_scalar.
121 (arm_typed_reg_parse): Parse a register with an optional type.
122 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
123 result.
124 (parse_scalar): Parse a Neon scalar with optional type.
125 (parse_reg_list): Use first_error.
126 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
127 (neon_alias_types_same): New function. Return true if two (alias) types
128 are the same.
129 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
130 of elements.
131 (insert_reg_alias): Return new reg_entry not void.
132 (insert_neon_reg_alias): New function. Insert type/index information as
133 well as register for alias.
134 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
135 make typed register aliases accordingly.
136 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
137 of line.
138 (s_unreq): Delete type information if present.
139 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
140 (s_arm_unwind_save_mmxwcg): Likewise.
141 (s_arm_unwind_movsp): Likewise.
142 (s_arm_unwind_setfp): Likewise.
143 (parse_shift): Likewise.
144 (parse_shifter_operand): Likewise.
145 (parse_address): Likewise.
146 (parse_tb): Likewise.
147 (tc_arm_regname_to_dw2regnum): Likewise.
148 (md_pseudo_table): Add dn, qn.
149 (parse_neon_mov): Handle typed operands.
150 (parse_operands): Likewise.
151 (neon_type_mask): Add N_SIZ.
152 (N_ALLMODS): New macro.
153 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
154 (el_type_of_type_chk): Add some safeguards.
155 (modify_types_allowed): Fix logic bug.
156 (neon_check_type): Handle operands with types.
157 (neon_three_same): Remove redundant optional arg handling.
158 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
159 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
160 (do_neon_step): Adjust accordingly.
161 (neon_cmode_for_logic_imm): Use first_error.
162 (do_neon_bitfield): Call neon_check_type.
163 (neon_dyadic): Rename to...
164 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
165 to allow modification of type of the destination.
166 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
167 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
168 (do_neon_compare): Make destination be an untyped bitfield.
169 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
170 (neon_mul_mac): Return early in case of errors.
171 (neon_move_immediate): Use first_error.
172 (neon_mac_reg_scalar_long): Fix type to include scalar.
173 (do_neon_dup): Likewise.
174 (do_neon_mov): Likewise (in several places).
175 (do_neon_tbl_tbx): Fix type.
176 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
177 (do_neon_ld_dup): Exit early in case of errors and/or use
178 first_error.
179 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
180 Handle .dn/.qn directives.
181 (REGDEF): Add zero for reg_entry neon field.
183 2006-04-26 Julian Brown <julian@codesourcery.com>
185 * config/tc-arm.c (limits.h): Include.
186 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
187 (fpu_vfp_v3_or_neon_ext): Declare constants.
188 (neon_el_type): New enumeration of types for Neon vector elements.
189 (neon_type_el): New struct. Define type and size of a vector element.
190 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
191 instruction.
192 (neon_type): Define struct. The type of an instruction.
193 (arm_it): Add 'vectype' for the current instruction.
194 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
195 (vfp_sp_reg_pos): Rename to...
196 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
197 tags.
198 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
199 (Neon D or Q register).
200 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
201 register.
202 (GE_OPT_PREFIX_BIG): Define constant, for use in...
203 (my_get_expression): Allow above constant as argument to accept
204 64-bit constants with optional prefix.
205 (arm_reg_parse): Add extra argument to return the specific type of
206 register in when either a D or Q register (REG_TYPE_NDQ) is
207 requested. Can be NULL.
208 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
209 (parse_reg_list): Update for new arm_reg_parse args.
210 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
211 (parse_neon_el_struct_list): New function. Parse element/structure
212 register lists for VLD<n>/VST<n> instructions.
213 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
214 (s_arm_unwind_save_mmxwr): Likewise.
215 (s_arm_unwind_save_mmxwcg): Likewise.
216 (s_arm_unwind_movsp): Likewise.
217 (s_arm_unwind_setfp): Likewise.
218 (parse_big_immediate): New function. Parse an immediate, which may be
219 64 bits wide. Put results in inst.operands[i].
220 (parse_shift): Update for new arm_reg_parse args.
221 (parse_address): Likewise. Add parsing of alignment specifiers.
222 (parse_neon_mov): Parse the operands of a VMOV instruction.
223 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
224 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
225 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
226 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
227 (parse_operands): Handle new codes above.
228 (encode_arm_vfp_sp_reg): Rename to...
229 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
230 selected VFP version only supports D0-D15.
231 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
232 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
233 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
234 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
235 encode_arm_vfp_reg name, and allow 32 D regs.
236 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
237 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
238 regs.
239 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
240 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
241 constant-load and conversion insns introduced with VFPv3.
242 (neon_tab_entry): New struct.
243 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
244 those which are the targets of pseudo-instructions.
245 (neon_opc): Enumerate opcodes, use as indices into...
246 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
247 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
248 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
249 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
250 neon_enc_tab.
251 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
252 Neon instructions.
253 (neon_type_mask): New. Compact type representation for type checking.
254 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
255 permitted type combinations.
256 (N_IGNORE_TYPE): New macro.
257 (neon_check_shape): New function. Check an instruction shape for
258 multiple alternatives. Return the specific shape for the current
259 instruction.
260 (neon_modify_type_size): New function. Modify a vector type and size,
261 depending on the bit mask in argument 1.
262 (neon_type_promote): New function. Convert a given "key" type (of an
263 operand) into the correct type for a different operand, based on a bit
264 mask.
265 (type_chk_of_el_type): New function. Convert a type and size into the
266 compact representation used for type checking.
267 (el_type_of_type_ckh): New function. Reverse of above (only when a
268 single bit is set in the bit mask).
269 (modify_types_allowed): New function. Alter a mask of allowed types
270 based on a bit mask of modifications.
271 (neon_check_type): New function. Check the type of the current
272 instruction against the variable argument list. The "key" type of the
273 instruction is returned.
274 (neon_dp_fixup): New function. Fill in and modify instruction bits for
275 a Neon data-processing instruction depending on whether we're in ARM
276 mode or Thumb-2 mode.
277 (neon_logbits): New function.
278 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
279 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
280 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
281 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
282 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
283 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
284 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
285 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
286 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
287 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
288 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
289 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
290 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
291 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
292 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
293 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
294 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
295 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
296 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
297 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
298 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
299 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
300 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
301 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
302 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
303 helpers.
304 (parse_neon_type): New function. Parse Neon type specifier.
305 (opcode_lookup): Allow parsing of Neon type specifiers.
306 (REGNUM2, REGSETH, REGSET2): New macros.
307 (reg_names): Add new VFPv3 and Neon registers.
308 (NUF, nUF, NCE, nCE): New macros for opcode table.
309 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
310 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
311 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
312 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
313 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
314 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
315 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
316 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
317 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
318 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
319 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
320 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
321 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
322 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
323 fto[us][lh][sd].
324 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
325 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
326 (arm_option_cpu_value): Add vfp3 and neon.
327 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
328 VFPv1 attribute.
330 2006-04-25 Bob Wilson <bob.wilson@acm.org>
332 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
333 syntax instead of hardcoded opcodes with ".w18" suffixes.
334 (wide_branch_opcode): New.
335 (build_transition): Use it to check for wide branch opcodes with
336 either ".w18" or ".w15" suffixes.
338 2006-04-25 Bob Wilson <bob.wilson@acm.org>
340 * config/tc-xtensa.c (xtensa_create_literal_symbol,
341 xg_assemble_literal, xg_assemble_literal_space): Do not set the
342 frag's is_literal flag.
344 2006-04-25 Bob Wilson <bob.wilson@acm.org>
346 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
348 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
350 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
351 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
352 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
353 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
354 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
356 2005-04-20 Paul Brook <paul@codesourcery.com>
358 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
359 all targets.
360 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
362 2006-04-19 Alan Modra <amodra@bigpond.net.au>
364 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
365 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
366 Make some cpus unsupported on ELF. Run "make dep-am".
367 * Makefile.in: Regenerate.
369 2006-04-19 Alan Modra <amodra@bigpond.net.au>
371 * configure.in (--enable-targets): Indent help message.
372 * configure: Regenerate.
374 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
376 PR gas/2533
377 * config/tc-i386.c (i386_immediate): Check illegal immediate
378 register operand.
380 2006-04-18 Alan Modra <amodra@bigpond.net.au>
382 * config/tc-i386.c: Formatting.
383 (output_disp, output_imm): ISO C90 params.
385 * frags.c (frag_offset_fixed_p): Constify args.
386 * frags.h (frag_offset_fixed_p): Ditto.
388 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
389 (COFF_MAGIC): Delete.
391 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
393 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
395 * po/POTFILES.in: Regenerated.
397 2006-04-16 Mark Mitchell <mark@codesourcery.com>
399 * doc/as.texinfo: Mention that some .type syntaxes are not
400 supported on all architectures.
402 2006-04-14 Sterling Augustine <sterling@tensilica.com>
404 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
405 instructions when such transformations have been disabled.
407 2006-04-10 Sterling Augustine <sterling@tensilica.com>
409 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
410 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
411 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
412 decoding the loop instructions. Remove current_offset variable.
413 (xtensa_fix_short_loop_frags): Likewise.
414 (min_bytes_to_other_loop_end): Remove current_offset argument.
416 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
418 * config/tc-z80.c (z80_optimize_expr): Removed.
419 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
421 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
423 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
424 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
425 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
426 atmega644, atmega329, atmega3290, atmega649, atmega6490,
427 atmega406, atmega640, atmega1280, atmega1281, at90can32,
428 at90can64, at90usb646, at90usb647, at90usb1286 and
429 at90usb1287.
430 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
432 2006-04-07 Paul Brook <paul@codesourcery.com>
434 * config/tc-arm.c (parse_operands): Set default error message.
436 2006-04-07 Paul Brook <paul@codesourcery.com>
438 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
440 2006-04-07 Paul Brook <paul@codesourcery.com>
442 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
444 2006-04-07 Paul Brook <paul@codesourcery.com>
446 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
447 (move_or_literal_pool): Handle Thumb-2 instructions.
448 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
450 2006-04-07 Alan Modra <amodra@bigpond.net.au>
452 PR 2512.
453 * config/tc-i386.c (match_template): Move 64-bit operand tests
454 inside loop.
456 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
458 * po/Make-in: Add install-html target.
459 * Makefile.am: Add install-html and install-html-recursive targets.
460 * Makefile.in: Regenerate.
461 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
462 * configure: Regenerate.
463 * doc/Makefile.am: Add install-html and install-html-am targets.
464 * doc/Makefile.in: Regenerate.
466 2006-04-06 Alan Modra <amodra@bigpond.net.au>
468 * frags.c (frag_offset_fixed_p): Reinitialise offset before
469 second scan.
471 2006-04-05 Richard Sandiford <richard@codesourcery.com>
472 Daniel Jacobowitz <dan@codesourcery.com>
474 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
475 (GOTT_BASE, GOTT_INDEX): New.
476 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
477 GOTT_INDEX when generating VxWorks PIC.
478 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
479 use the generic *-*-vxworks* stanza instead.
481 2006-04-04 Alan Modra <amodra@bigpond.net.au>
483 PR 997
484 * frags.c (frag_offset_fixed_p): New function.
485 * frags.h (frag_offset_fixed_p): Declare.
486 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
487 (resolve_expression): Likewise.
489 2006-04-03 Sterling Augustine <sterling@tensilica.com>
491 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
492 of the same length but different numbers of slots.
494 2006-03-30 Andreas Schwab <schwab@suse.de>
496 * configure.in: Fix help string for --enable-targets option.
497 * configure: Regenerate.
499 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
501 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
502 (m68k_ip): ... here. Use for all chips. Protect against buffer
503 overrun and avoid excessive copying.
505 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
506 m68020_control_regs, m68040_control_regs, m68060_control_regs,
507 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
508 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
509 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
510 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
511 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
512 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
513 mcf5282_ctrl, mcfv4e_ctrl): ... these.
514 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
515 (struct m68k_cpu): Change chip field to control_regs.
516 (current_chip): Remove.
517 (control_regs): New.
518 (m68k_archs, m68k_extensions): Adjust.
519 (m68k_cpus): Reorder to be in cpu number order. Adjust.
520 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
521 (find_cf_chip): Reimplement for new organization of cpu table.
522 (select_control_regs): Remove.
523 (mri_chip): Adjust.
524 (struct save_opts): Save control regs, not chip.
525 (s_save, s_restore): Adjust.
526 (m68k_lookup_cpu): Give deprecated warning when necessary.
527 (m68k_init_arch): Adjust.
528 (md_show_usage): Adjust for new cpu table organization.
530 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
532 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
533 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
534 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
535 "elf/bfin.h".
536 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
537 (any_gotrel): New rule.
538 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
539 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
540 "elf/bfin.h".
541 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
542 (bfin_pic_ptr): New function.
543 (md_pseudo_table): Add it for ".picptr".
544 (OPTION_FDPIC): New macro.
545 (md_longopts): Add -mfdpic.
546 (md_parse_option): Handle it.
547 (md_begin): Set BFD flags.
548 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
549 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
550 us for GOT relocs.
551 * Makefile.am (bfin-parse.o): Update dependencies.
552 (DEPTC_bfin_elf): Likewise.
553 * Makefile.in: Regenerate.
555 2006-03-25 Richard Sandiford <richard@codesourcery.com>
557 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
558 mcfemac instead of mcfmac.
560 2006-03-23 Michael Matz <matz@suse.de>
562 * config/tc-i386.c (type_names): Correct placement of 'static'.
563 (reloc): Map some more relocs to their 64 bit counterpart when
564 size is 8.
565 (output_insn): Work around breakage if DEBUG386 is defined.
566 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
567 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
568 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
569 different from i386.
570 (output_imm): Ditto.
571 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
572 Imm64.
573 (md_convert_frag): Jumps can now be larger than 2GB away, error
574 out in that case.
575 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
576 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
578 2006-03-22 Richard Sandiford <richard@codesourcery.com>
579 Daniel Jacobowitz <dan@codesourcery.com>
580 Phil Edwards <phil@codesourcery.com>
581 Zack Weinberg <zack@codesourcery.com>
582 Mark Mitchell <mark@codesourcery.com>
583 Nathan Sidwell <nathan@codesourcery.com>
585 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
586 (md_begin): Complain about -G being used for PIC. Don't change
587 the text, data and bss alignments on VxWorks.
588 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
589 generating VxWorks PIC.
590 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
591 (macro): Likewise, but do not treat la $25 specially for
592 VxWorks PIC, and do not handle jal.
593 (OPTION_MVXWORKS_PIC): New macro.
594 (md_longopts): Add -mvxworks-pic.
595 (md_parse_option): Don't complain about using PIC and -G together here.
596 Handle OPTION_MVXWORKS_PIC.
597 (md_estimate_size_before_relax): Always use the first relaxation
598 sequence on VxWorks.
599 * config/tc-mips.h (VXWORKS_PIC): New.
601 2006-03-21 Paul Brook <paul@codesourcery.com>
603 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
605 2006-03-21 Sterling Augustine <sterling@tensilica.com>
607 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
608 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
609 (get_loop_align_size): New.
610 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
611 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
612 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
613 (get_noop_aligned_address): Use get_loop_align_size.
614 (get_aligned_diff): Likewise.
616 2006-03-21 Paul Brook <paul@codesourcery.com>
618 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
620 2006-03-20 Paul Brook <paul@codesourcery.com>
622 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
623 (do_t_branch): Encode branches inside IT blocks as unconditional.
624 (do_t_cps): New function.
625 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
626 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
627 (opcode_lookup): Allow conditional suffixes on all instructions in
628 Thumb mode.
629 (md_assemble): Advance condexec state before checking for errors.
630 (insns): Use do_t_cps.
632 2006-03-20 Paul Brook <paul@codesourcery.com>
634 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
635 outputting the insn.
637 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
639 * config/tc-vax.c: Update copyright year.
640 * config/tc-vax.h: Likewise.
642 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
644 * config/tc-vax.c (md_chars_to_number): Used only locally, so
645 make it static.
646 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
648 2006-03-17 Paul Brook <paul@codesourcery.com>
650 * config/tc-arm.c (insns): Add ldm and stm.
652 2006-03-17 Ben Elliston <bje@au.ibm.com>
654 PR gas/2446
655 * doc/as.texinfo (Ident): Document this directive more thoroughly.
657 2006-03-16 Paul Brook <paul@codesourcery.com>
659 * config/tc-arm.c (insns): Add "svc".
661 2006-03-13 Bob Wilson <bob.wilson@acm.org>
663 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
664 flag and avoid double underscore prefixes.
666 2006-03-10 Paul Brook <paul@codesourcery.com>
668 * config/tc-arm.c (md_begin): Handle EABIv5.
669 (arm_eabis): Add EF_ARM_EABI_VER5.
670 * doc/c-arm.texi: Document -meabi=5.
672 2006-03-10 Ben Elliston <bje@au.ibm.com>
674 * app.c (do_scrub_chars): Simplify string handling.
676 2006-03-07 Richard Sandiford <richard@codesourcery.com>
677 Daniel Jacobowitz <dan@codesourcery.com>
678 Zack Weinberg <zack@codesourcery.com>
679 Nathan Sidwell <nathan@codesourcery.com>
680 Paul Brook <paul@codesourcery.com>
681 Ricardo Anguiano <anguiano@codesourcery.com>
682 Phil Edwards <phil@codesourcery.com>
684 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
685 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
686 R_ARM_ABS12 reloc.
687 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
688 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
689 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
691 2006-03-06 Bob Wilson <bob.wilson@acm.org>
693 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
694 even when using the text-section-literals option.
696 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
698 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
699 and cf.
700 (m68k_ip): <case 'J'> Check we have some control regs.
701 (md_parse_option): Allow raw arch switch.
702 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
703 whether 68881 or cfloat was meant by -mfloat.
704 (md_show_usage): Adjust extension display.
705 (m68k_elf_final_processing): Adjust.
707 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
709 * config/tc-avr.c (avr_mod_hash_value): New function.
710 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
711 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
712 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
713 instead of int avr_ldi_expression: use avr_mod_hash_value instead
714 of (int).
715 (tc_gen_reloc): Handle substractions of symbols, if possible do
716 fixups, abort otherwise.
717 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
718 tc_fix_adjustable): Define.
720 2006-03-02 James E Wilson <wilson@specifix.com>
722 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
723 change the template, then clear md.slot[curr].end_of_insn_group.
725 2006-02-28 Jan Beulich <jbeulich@novell.com>
727 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
729 2006-02-28 Jan Beulich <jbeulich@novell.com>
731 PR/1070
732 * macro.c (getstring): Don't treat parentheses special anymore.
733 (get_any_string): Don't consider '(' and ')' as quoting anymore.
734 Special-case '(', ')', '[', and ']' when dealing with non-quoting
735 characters.
737 2006-02-28 Mat <mat@csail.mit.edu>
739 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
741 2006-02-27 Jakub Jelinek <jakub@redhat.com>
743 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
744 field.
745 (CFI_signal_frame): Define.
746 (cfi_pseudo_table): Add .cfi_signal_frame.
747 (dot_cfi): Handle CFI_signal_frame.
748 (output_cie): Handle cie->signal_frame.
749 (select_cie_for_fde): Don't share CIE if signal_frame flag is
750 different. Copy signal_frame from FDE to newly created CIE.
751 * doc/as.texinfo: Document .cfi_signal_frame.
753 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
755 * doc/Makefile.am: Add html target.
756 * doc/Makefile.in: Regenerate.
757 * po/Make-in: Add html target.
759 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
761 * config/tc-i386.c (output_insn): Support Intel Merom New
762 Instructions.
764 * config/tc-i386.h (CpuMNI): New.
765 (CpuUnknownFlags): Add CpuMNI.
767 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
769 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
770 (hpriv_reg_table): New table for hyperprivileged registers.
771 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
772 register encoding.
774 2006-02-24 DJ Delorie <dj@redhat.com>
776 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
777 (tc_gen_reloc): Don't define.
778 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
779 (OPTION_LINKRELAX): New.
780 (md_longopts): Add it.
781 (m32c_relax): New.
782 (md_parse_options): Set it.
783 (md_assemble): Emit relaxation relocs as needed.
784 (md_convert_frag): Emit relaxation relocs as needed.
785 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
786 (m32c_apply_fix): New.
787 (tc_gen_reloc): New.
788 (m32c_force_relocation): Force out jump relocs when relaxing.
789 (m32c_fix_adjustable): Return false if relaxing.
791 2006-02-24 Paul Brook <paul@codesourcery.com>
793 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
794 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
795 (struct asm_barrier_opt): Define.
796 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
797 (parse_psr): Accept V7M psr names.
798 (parse_barrier): New function.
799 (enum operand_parse_code): Add OP_oBARRIER.
800 (parse_operands): Implement OP_oBARRIER.
801 (do_barrier): New function.
802 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
803 (do_t_cpsi): Add V7M restrictions.
804 (do_t_mrs, do_t_msr): Validate V7M variants.
805 (md_assemble): Check for NULL variants.
806 (v7m_psrs, barrier_opt_names): New tables.
807 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
808 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
809 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
810 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
811 (struct cpu_arch_ver_table): Define.
812 (cpu_arch_ver): New.
813 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
814 Tag_CPU_arch_profile.
815 * doc/c-arm.texi: Document new cpu and arch options.
817 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
819 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
821 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
823 * config/tc-ia64.c: Update copyright years.
825 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
827 * config/tc-ia64.c (specify_resource): Add the rule 17 from
828 SDM 2.2.
830 2005-02-22 Paul Brook <paul@codesourcery.com>
832 * config/tc-arm.c (do_pld): Remove incorrect write to
833 inst.instruction.
834 (encode_thumb32_addr_mode): Use correct operand.
836 2006-02-21 Paul Brook <paul@codesourcery.com>
838 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
840 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
841 Anil Paranjape <anilp1@kpitcummins.com>
842 Shilin Shakti <shilins@kpitcummins.com>
844 * Makefile.am: Add xc16x related entry.
845 * Makefile.in: Regenerate.
846 * configure.in: Added xc16x related entry.
847 * configure: Regenerate.
848 * config/tc-xc16x.h: New file
849 * config/tc-xc16x.c: New file
850 * doc/c-xc16x.texi: New file for xc16x
851 * doc/all.texi: Entry for xc16x
852 * doc/Makefile.texi: Added c-xc16x.texi
853 * NEWS: Announce the support for the new target.
855 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
857 * configure.tgt: set emulation for mips-*-netbsd*
859 2006-02-14 Jakub Jelinek <jakub@redhat.com>
861 * config.in: Rebuilt.
863 2006-02-13 Bob Wilson <bob.wilson@acm.org>
865 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
866 from 1, not 0, in error messages.
867 (md_assemble): Simplify special-case check for ENTRY instructions.
868 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
869 operand in error message.
871 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
873 * configure.tgt (arm-*-linux-gnueabi*): Change to
874 arm-*-linux-*eabi*.
876 2006-02-10 Nick Clifton <nickc@redhat.com>
878 * config/tc-crx.c (check_range): Ensure that the sign bit of a
879 32-bit value is propagated into the upper bits of a 64-bit long.
881 * config/tc-arc.c (init_opcode_tables): Fix cast.
882 (arc_extoper, md_operand): Likewise.
884 2006-02-09 David Heine <dlheine@tensilica.com>
886 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
887 each relaxation step.
889 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
891 * configure.in (CHECK_DECLS): Add vsnprintf.
892 * configure: Regenerate.
893 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
894 include/declare here, but...
895 * as.h: Move code detecting VARARGS idiom to the top.
896 (errno.h, stdarg.h, varargs.h, va_list): ...here.
897 (vsnprintf): Declare if not already declared.
899 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
901 * as.c (close_output_file): New.
902 (main): Register close_output_file with xatexit before
903 dump_statistics. Don't call output_file_close.
905 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
907 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
908 mcf5329_control_regs): New.
909 (not_current_architecture, selected_arch, selected_cpu): New.
910 (m68k_archs, m68k_extensions): New.
911 (archs): Renamed to ...
912 (m68k_cpus): ... here. Adjust.
913 (n_arches): Remove.
914 (md_pseudo_table): Add arch and cpu directives.
915 (find_cf_chip, m68k_ip): Adjust table scanning.
916 (no_68851, no_68881): Remove.
917 (md_assemble): Lazily initialize.
918 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
919 (md_init_after_args): Move functionality to m68k_init_arch.
920 (mri_chip): Adjust table scanning.
921 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
922 options with saner parsing.
923 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
924 m68k_init_arch): New.
925 (s_m68k_cpu, s_m68k_arch): New.
926 (md_show_usage): Adjust.
927 (m68k_elf_final_processing): Set CF EF flags.
928 * config/tc-m68k.h (m68k_init_after_args): Remove.
929 (tc_init_after_args): Remove.
930 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
931 (M68k-Directives): Document .arch and .cpu directives.
933 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
935 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
936 synonyms for equ and defl.
937 (z80_cons_fix_new): New function.
938 (emit_byte): Disallow relative jumps to absolute locations.
939 (emit_data): Only handle defb, prototype changed, because defb is
940 now handled as pseudo-op rather than an instruction.
941 (instab): Entries for defb,defw,db,dw moved from here...
942 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
943 Add entries for def24,def32,d24,d32.
944 (md_assemble): Improved error handling.
945 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
946 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
947 (z80_cons_fix_new): Declare.
948 * doc/c-z80.texi (defb, db): Mention warning on overflow.
949 (def24,d24,def32,d32): New pseudo-ops.
951 2006-02-02 Paul Brook <paul@codesourcery.com>
953 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
955 2005-02-02 Paul Brook <paul@codesourcery.com>
957 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
958 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
959 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
960 T2_OPCODE_RSB): Define.
961 (thumb32_negate_data_op): New function.
962 (md_apply_fix): Use it.
964 2006-01-31 Bob Wilson <bob.wilson@acm.org>
966 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
967 fields.
968 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
969 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
970 subtracted symbols.
971 (relaxation_requirements): Add pfinish_frag argument and use it to
972 replace setting tinsn->record_fix fields.
973 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
974 and vinsn_to_insnbuf. Remove references to record_fix and
975 slot_sub_symbols fields.
976 (xtensa_mark_narrow_branches): Delete unused code.
977 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
978 a symbol.
979 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
980 record_fix fields.
981 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
982 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
983 of the record_fix field. Simplify error messages for unexpected
984 symbolic operands.
985 (set_expr_symbol_offset_diff): Delete.
987 2006-01-31 Paul Brook <paul@codesourcery.com>
989 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
991 2006-01-31 Paul Brook <paul@codesourcery.com>
992 Richard Earnshaw <rearnsha@arm.com>
994 * config/tc-arm.c: Use arm_feature_set.
995 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
996 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
997 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
998 New variables.
999 (insns): Use them.
1000 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1001 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1002 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1003 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1004 feature flags.
1005 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1006 (arm_opts): Move old cpu/arch options from here...
1007 (arm_legacy_opts): ... to here.
1008 (md_parse_option): Search arm_legacy_opts.
1009 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1010 (arm_float_abis, arm_eabis): Make const.
1012 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1014 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1016 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1018 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1019 in load immediate intruction.
1021 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1023 * config/bfin-parse.y (value_match): Use correct conversion
1024 specifications in template string for __FILE__ and __LINE__.
1025 (binary): Ditto.
1026 (unary): Ditto.
1028 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1030 Introduce TLS descriptors for i386 and x86_64.
1031 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1032 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1033 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1034 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1035 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1036 displacement bits.
1037 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1038 (lex_got): Handle @tlsdesc and @tlscall.
1039 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1041 2006-01-11 Nick Clifton <nickc@redhat.com>
1043 Fixes for building on 64-bit hosts:
1044 * config/tc-avr.c (mod_index): New union to allow conversion
1045 between pointers and integers.
1046 (md_begin, avr_ldi_expression): Use it.
1047 * config/tc-i370.c (md_assemble): Add cast for argument to print
1048 statement.
1049 * config/tc-tic54x.c (subsym_substitute): Likewise.
1050 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1051 opindex field of fr_cgen structure into a pointer so that it can
1052 be stored in a frag.
1053 * config/tc-mn10300.c (md_assemble): Likewise.
1054 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1055 types.
1056 * config/tc-v850.c: Replace uses of (int) casts with correct
1057 types.
1059 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1061 PR gas/2117
1062 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1064 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1066 PR gas/2101
1067 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1068 a local-label reference.
1070 For older changes see ChangeLog-2005
1071 \f
1072 Local Variables:
1073 mode: change-log
1074 left-margin: 8
1075 fill-column: 74
1076 version-control: never
1077 End: