opcodes/fr30-asm.c

   1 /* Assembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-asm.in isn't
   6
   7 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
   8
   9 This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2, or (at your option)
  14 any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software Foundation, Inc.,
  23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <ctype.h>
  30 #include <stdio.h>
  31 #include "ansidecl.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "fr30-desc.h"
  35 #include "fr30-opc.h"
  36 #include "opintl.h"
  37
  38 #undef min
  39 #define min(a,b) ((a) < (b) ? (a) : (b))
  40 #undef max
  41 #define max(a,b) ((a) > (b) ? (a) : (b))
  42
  43 static const char * parse_insn_normal
  44      PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
  45 \f
  46 /* -- assembler routines inserted here */
  47
  48 /* -- asm.c */
  49 /* Handle register lists for LDMx and STMx  */
  50
  51 static int
  52 parse_register_number (strp)
  53      const char **strp;
  54 {
  55   int regno;
  56   if (**strp < '0' || **strp > '9')
  57     return -1; /* error */
  58   regno = **strp - '0';
  59   ++*strp;
  60
  61   if (**strp >= '0' && **strp <= '9')
  62     {
  63       regno = regno * 10 + (**strp - '0');
  64       ++*strp;
  65     }
  66
  67   return regno;
  68 }
  69
  70 static const char *
  71 parse_register_list (cd, strp, opindex, valuep, high_low, load_store)
  72      CGEN_CPU_DESC cd;
  73      const char **strp;
  74      int opindex;
  75      unsigned long *valuep;
  76      int high_low;   /* 0 == high, 1 == low */
  77      int load_store; /* 0 == load, 1 == store */
  78 {
  79   int regno;
  80   *valuep = 0;
  81   while (**strp && **strp != ')')
  82     {
  83       if (**strp != 'R' && **strp != 'r')
  84         break;
  85       ++*strp;
  86
  87       regno = parse_register_number (strp);
  88       if (regno == -1)
  89         return "Register number is not valid";
  90       if (regno > 7 && !high_low)
  91         return "Register must be between r0 and r7";
  92       if (regno < 8 && high_low)
  93         return "Register must be between r8 and r15";
  94
  95       if (high_low)
  96         regno -= 8;
  97
  98       if (load_store) /* mask is reversed for store */
  99         *valuep |= 0x80 >> regno;
 100       else
 101         *valuep |= 1 << regno;
 102
 103       if (**strp == ',')
 104         {
 105           if (*(*strp + 1) == ')')
 106             break;
 107           ++*strp;
 108         }
 109     }
 110
 111   if (!*strp || **strp != ')')
 112     return "Register list is not valid";
 113
 114   return NULL;
 115 }
 116
 117 static const char *
 118 parse_low_register_list_ld (cd, strp, opindex, valuep)
 119      CGEN_CPU_DESC cd;
 120      const char **strp;
 121      int opindex;
 122      unsigned long *valuep;
 123 {
 124   return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 0/*load*/);
 125 }
 126
 127 static const char *
 128 parse_hi_register_list_ld (cd, strp, opindex, valuep)
 129      CGEN_CPU_DESC cd;
 130      const char **strp;
 131      int opindex;
 132      unsigned long *valuep;
 133 {
 134   return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 0/*load*/);
 135 }
 136
 137 static const char *
 138 parse_low_register_list_st (cd, strp, opindex, valuep)
 139      CGEN_CPU_DESC cd;
 140      const char **strp;
 141      int opindex;
 142      unsigned long *valuep;
 143 {
 144   return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 1/*store*/);
 145 }
 146
 147 static const char *
 148 parse_hi_register_list_st (cd, strp, opindex, valuep)
 149      CGEN_CPU_DESC cd;
 150      const char **strp;
 151      int opindex;
 152      unsigned long *valuep;
 153 {
 154   return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 1/*store*/);
 155 }
 156
 157 /* -- */
 158
 159 /* Main entry point for operand parsing.
 160
 161    This function is basically just a big switch statement.  Earlier versions
 162    used tables to look up the function to use, but
 163    - if the table contains both assembler and disassembler functions then
 164      the disassembler contains much of the assembler and vice-versa,
 165    - there's a lot of inlining possibilities as things grow,
 166    - using a switch statement avoids the function call overhead.
 167
 168    This function could be moved into `parse_insn_normal', but keeping it
 169    separate makes clear the interface between `parse_insn_normal' and each of
 170    the handlers.
 171 */
 172
 173 const char *
 174 fr30_cgen_parse_operand (cd, opindex, strp, fields)
 175      CGEN_CPU_DESC cd;
 176      int opindex;
 177      const char ** strp;
 178      CGEN_FIELDS * fields;
 179 {
 180   const char * errmsg;
 181
 182   switch (opindex)
 183     {
 184     case FR30_OPERAND_CRI :
 185       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRi);
 186       break;
 187     case FR30_OPERAND_CRJ :
 188       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRj);
 189       break;
 190     case FR30_OPERAND_R13 :
 191       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r13, & fields->f_nil);
 192       break;
 193     case FR30_OPERAND_R14 :
 194       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r14, & fields->f_nil);
 195       break;
 196     case FR30_OPERAND_R15 :
 197       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r15, & fields->f_nil);
 198       break;
 199     case FR30_OPERAND_RI :
 200       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ri);
 201       break;
 202     case FR30_OPERAND_RIC :
 203       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ric);
 204       break;
 205     case FR30_OPERAND_RJ :
 206       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rj);
 207       break;
 208     case FR30_OPERAND_RJC :
 209       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rjc);
 210       break;
 211     case FR30_OPERAND_RS1 :
 212       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs1);
 213       break;
 214     case FR30_OPERAND_RS2 :
 215       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2);
 216       break;
 217     case FR30_OPERAND_CC :
 218       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc);
 219       break;
 220     case FR30_OPERAND_CCC :
 221       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc);
 222       break;
 223     case FR30_OPERAND_DIR10 :
 224       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10);
 225       break;
 226     case FR30_OPERAND_DIR8 :
 227       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8);
 228       break;
 229     case FR30_OPERAND_DIR9 :
 230       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9);
 231       break;
 232     case FR30_OPERAND_DISP10 :
 233       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10);
 234       break;
 235     case FR30_OPERAND_DISP8 :
 236       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8);
 237       break;
 238     case FR30_OPERAND_DISP9 :
 239       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9);
 240       break;
 241     case FR30_OPERAND_I20 :
 242       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20);
 243       break;
 244     case FR30_OPERAND_I32 :
 245       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32);
 246       break;
 247     case FR30_OPERAND_I8 :
 248       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8);
 249       break;
 250     case FR30_OPERAND_LABEL12 :
 251       {
 252         bfd_vma value;
 253         errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL,  & value);
 254         fields->f_rel12 = value;
 255       }
 256       break;
 257     case FR30_OPERAND_LABEL9 :
 258       {
 259         bfd_vma value;
 260         errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL,  & value);
 261         fields->f_rel9 = value;
 262       }
 263       break;
 264     case FR30_OPERAND_M4 :
 265       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4);
 266       break;
 267     case FR30_OPERAND_PS :
 268       errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & fields->f_nil);
 269       break;
 270     case FR30_OPERAND_REGLIST_HI_LD :
 271       errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld);
 272       break;
 273     case FR30_OPERAND_REGLIST_HI_ST :
 274       errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st);
 275       break;
 276     case FR30_OPERAND_REGLIST_LOW_LD :
 277       errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld);
 278       break;
 279     case FR30_OPERAND_REGLIST_LOW_ST :
 280       errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st);
 281       break;
 282     case FR30_OPERAND_S10 :
 283       errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10);
 284       break;
 285     case FR30_OPERAND_U10 :
 286       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10);
 287       break;
 288     case FR30_OPERAND_U4 :
 289       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4);
 290       break;
 291     case FR30_OPERAND_U4C :
 292       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c);
 293       break;
 294     case FR30_OPERAND_U8 :
 295       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8);
 296       break;
 297     case FR30_OPERAND_UDISP6 :
 298       errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6);
 299       break;
 300
 301     default :
 302       /* xgettext:c-format */
 303       fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
 304       abort ();
 305   }
 306
 307   return errmsg;
 308 }
 309
 310 cgen_parse_fn * const fr30_cgen_parse_handlers[] =
 311 {
 312   parse_insn_normal,
 313 };
 314
 315 void
 316 fr30_cgen_init_asm (cd)
 317      CGEN_CPU_DESC cd;
 318 {
 319   fr30_cgen_init_opcode_table (cd);
 320   fr30_cgen_init_ibld_table (cd);
 321   cd->parse_handlers = & fr30_cgen_parse_handlers[0];
 322   cd->parse_operand = fr30_cgen_parse_operand;
 323 }
 324
 325 \f
 326 /* Default insn parser.
 327
 328    The syntax string is scanned and operands are parsed and stored in FIELDS.
 329    Relocs are queued as we go via other callbacks.
 330
 331    ??? Note that this is currently an all-or-nothing parser.  If we fail to
 332    parse the instruction, we return 0 and the caller will start over from
 333    the beginning.  Backtracking will be necessary in parsing subexpressions,
 334    but that can be handled there.  Not handling backtracking here may get
 335    expensive in the case of the m68k.  Deal with later.
 336
 337    Returns NULL for success, an error message for failure.
 338 */
 339
 340 static const char *
 341 parse_insn_normal (cd, insn, strp, fields)
 342      CGEN_CPU_DESC cd;
 343      const CGEN_INSN *insn;
 344      const char **strp;
 345      CGEN_FIELDS *fields;
 346 {
 347   /* ??? Runtime added insns not handled yet.  */
 348   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 349   const char *str = *strp;
 350   const char *errmsg;
 351   const char *p;
 352   const unsigned char * syn;
 353 #ifdef CGEN_MNEMONIC_OPERANDS
 354   /* FIXME: wip */
 355   int past_opcode_p;
 356 #endif
 357
 358   /* For now we assume the mnemonic is first (there are no leading operands).
 359      We can parse it without needing to set up operand parsing.
 360      GAS's input scrubber will ensure mnemonics are lowercase, but we may
 361      not be called from GAS.  */
 362   p = CGEN_INSN_MNEMONIC (insn);
 363   while (*p && tolower (*p) == tolower (*str))
 364     ++p, ++str;
 365
 366   if (* p || (* str && !isspace (* str)))
 367     return _("unrecognized instruction");
 368
 369   CGEN_INIT_PARSE (cd);
 370   cgen_init_parse_operand (cd);
 371 #ifdef CGEN_MNEMONIC_OPERANDS
 372   past_opcode_p = 0;
 373 #endif
 374
 375   /* We don't check for (*str != '\0') here because we want to parse
 376      any trailing fake arguments in the syntax string.  */
 377   syn = CGEN_SYNTAX_STRING (syntax);
 378
 379   /* Mnemonics come first for now, ensure valid string.  */
 380   if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
 381     abort ();
 382
 383   ++syn;
 384
 385   while (* syn != 0)
 386     {
 387       /* Non operand chars must match exactly.  */
 388       if (CGEN_SYNTAX_CHAR_P (* syn))
 389         {
 390           if (*str == CGEN_SYNTAX_CHAR (* syn))
 391             {
 392 #ifdef CGEN_MNEMONIC_OPERANDS
 393               if (* syn == ' ')
 394                 past_opcode_p = 1;
 395 #endif
 396               ++ syn;
 397               ++ str;
 398             }
 399           else
 400             {
 401               /* Syntax char didn't match.  Can't be this insn.  */
 402               /* FIXME: would like to return something like
 403                  "expected char `c'" */
 404               return _("syntax error");
 405             }
 406           continue;
 407         }
 408
 409       /* We have an operand of some sort.  */
 410       errmsg = fr30_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
 411                                           &str, fields);
 412       if (errmsg)
 413         return errmsg;
 414
 415       /* Done with this operand, continue with next one.  */
 416       ++ syn;
 417     }
 418
 419   /* If we're at the end of the syntax string, we're done.  */
 420   if (* syn == '\0')
 421     {
 422       /* FIXME: For the moment we assume a valid `str' can only contain
 423          blanks now.  IE: We needn't try again with a longer version of
 424          the insn and it is assumed that longer versions of insns appear
 425          before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
 426       while (isspace (* str))
 427         ++ str;
 428
 429       if (* str != '\0')
 430         return _("junk at end of line"); /* FIXME: would like to include `str' */
 431
 432       return NULL;
 433     }
 434
 435   /* We couldn't parse it.  */
 436   return _("unrecognized instruction");
 437 }
 438 \f
 439 /* Main entry point.
 440    This routine is called for each instruction to be assembled.
 441    STR points to the insn to be assembled.
 442    We assume all necessary tables have been initialized.
 443    The assembled instruction, less any fixups, is stored in BUF.
 444    Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
 445    still needs to be converted to target byte order, otherwise BUF is an array
 446    of bytes in target byte order.
 447    The result is a pointer to the insn's entry in the opcode table,
 448    or NULL if an error occured (an error message will have already been
 449    printed).
 450
 451    Note that when processing (non-alias) macro-insns,
 452    this function recurses.
 453
 454    ??? It's possible to make this cpu-independent.
 455    One would have to deal with a few minor things.
 456    At this point in time doing so would be more of a curiosity than useful
 457    [for example this file isn't _that_ big], but keeping the possibility in
 458    mind helps keep the design clean.  */
 459
 460 const CGEN_INSN *
 461 fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg)
 462      CGEN_CPU_DESC cd;
 463      const char *str;
 464      CGEN_FIELDS *fields;
 465      CGEN_INSN_BYTES_PTR buf;
 466      char **errmsg;
 467 {
 468   const char *start;
 469   CGEN_INSN_LIST *ilist;
 470
 471   /* Skip leading white space.  */
 472   while (isspace (* str))
 473     ++ str;
 474
 475   /* The instructions are stored in hashed lists.
 476      Get the first in the list.  */
 477   ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
 478
 479   /* Keep looking until we find a match.  */
 480
 481   start = str;
 482   for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
 483     {
 484       const CGEN_INSN *insn = ilist->insn;
 485
 486 #if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
 487       /* Is this insn supported by the selected cpu?  */
 488       if (! fr30_cgen_insn_supported (cd, insn))
 489         continue;
 490 #endif
 491
 492       /* If the RELAX attribute is set, this is an insn that shouldn't be
 493          chosen immediately.  Instead, it is used during assembler/linker
 494          relaxation if possible.  */
 495       if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
 496         continue;
 497
 498       str = start;
 499
 500       /* Allow parse/insert handlers to obtain length of insn.  */
 501       CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
 502
 503       if (! CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields))
 504         {
 505           /* ??? 0 is passed for `pc' */
 506           if (CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, (bfd_vma) 0)
 507               != NULL)
 508             continue;
 509           /* It is up to the caller to actually output the insn and any
 510              queued relocs.  */
 511           return insn;
 512         }
 513
 514       /* Try the next entry.  */
 515     }
 516
 517   /* FIXME: We can return a better error message than this.
 518      Need to track why it failed and pick the right one.  */
 519   {
 520     static char errbuf[100];
 521     if (strlen (start) > 50)
 522       /* xgettext:c-format */
 523       sprintf (errbuf, _("bad instruction `%.50s...'"), start);
 524     else
 525       /* xgettext:c-format */
 526       sprintf (errbuf, _("bad instruction `%.50s'"), start);
 527
 528     *errmsg = errbuf;
 529     return NULL;
 530   }
 531 }
 532 \f
 533 #if 0 /* This calls back to GAS which we can't do without care.  */
 534
 535 /* Record each member of OPVALS in the assembler's symbol table.
 536    This lets GAS parse registers for us.
 537    ??? Interesting idea but not currently used.  */
 538
 539 /* Record each member of OPVALS in the assembler's symbol table.
 540    FIXME: Not currently used.  */
 541
 542 void
 543 fr30_cgen_asm_hash_keywords (cd, opvals)
 544      CGEN_CPU_DESC cd;
 545      CGEN_KEYWORD *opvals;
 546 {
 547   CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
 548   const CGEN_KEYWORD_ENTRY * ke;
 549
 550   while ((ke = cgen_keyword_search_next (& search)) != NULL)
 551     {
 552 #if 0 /* Unnecessary, should be done in the search routine.  */
 553       if (! fr30_cgen_opval_supported (ke))
 554         continue;
 555 #endif
 556       cgen_asm_record_register (cd, ke->name, ke->value);
 557     }
 558 }
 559
 560 #endif /* 0 */