?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Add support for storing local symbols in a small structure to save
[binutils.git] / gas / config / tc-alpha.c
bloba1663094caa2d75aeb0b59be26267f1ab49721b8
1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright (C) 1989, 93-98, 1999 Free Software Foundation, Inc.
3 Contributed by Carnegie Mellon University, 1993.
4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
5 Modified by Ken Raeburn for gas-2.x and ECOFF support.
6 Modified by Richard Henderson for ELF support.
7 Modified by Klaus K"ampf for EVAX (openVMS/Alpha) support.
8
9 This file is part of GAS, the GNU Assembler.
10
11 GAS is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 GAS is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with GAS; see the file COPYING. If not, write to the Free
23 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
24 02111-1307, USA. */
25
26 /*
27 * Mach Operating System
28 * Copyright (c) 1993 Carnegie Mellon University
29 * All Rights Reserved.
30 *
31 * Permission to use, copy, modify and distribute this software and its
32 * documentation is hereby granted, provided that both the copyright
33 * notice and this permission notice appear in all copies of the
34 * software, derivative works or modified versions, and any portions
35 * thereof, and that both notices appear in supporting documentation.
36 *
37 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
38 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
39 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
40 *
41 * Carnegie Mellon requests users of this software to return to
42 *
43 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
44 * School of Computer Science
45 * Carnegie Mellon University
46 * Pittsburgh PA 15213-3890
47 *
48 * any improvements or extensions that they make and grant Carnegie the
49 * rights to redistribute these changes.
50 */
51
52 #include "as.h"
53 #include "subsegs.h"
54 #include "ecoff.h"
55
56 #include "opcode/alpha.h"
57
58 #ifdef OBJ_ELF
59 #include "elf/alpha.h"
60 #endif
61
62 #include <ctype.h>
63
64 \f
65 /* Local types */
66
67 #define MAX_INSN_FIXUPS 2
68 #define MAX_INSN_ARGS 5
69
70 struct alpha_fixup
71 {
72 expressionS exp;
73 bfd_reloc_code_real_type reloc;
74 };
75
76 struct alpha_insn
77 {
78 unsigned insn;
79 int nfixups;
80 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
81 };
82
83 enum alpha_macro_arg
84 {
85 MACRO_EOA = 1, MACRO_IR, MACRO_PIR, MACRO_CPIR, MACRO_FPR, MACRO_EXP
86 };
87
88 struct alpha_macro
89 {
90 const char *name;
91 void (*emit) PARAMS ((const expressionS *, int, const PTR));
92 const PTR arg;
93 enum alpha_macro_arg argsets[16];
94 };
95
96 /* Two extra symbols we want to see in our input. This is a blatent
97 misuse of the expressionS.X_op field. */
98
99 #define O_pregister (O_max+1) /* O_register, but in parentheses */
100 #define O_cpregister (O_pregister+1) /* + a leading comma */
101
102 /* Macros for extracting the type and number of encoded register tokens */
103
104 #define is_ir_num(x) (((x) & 32) == 0)
105 #define is_fpr_num(x) (((x) & 32) != 0)
106 #define regno(x) ((x) & 31)
107
108 /* Something odd inherited from the old assembler */
109
110 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
111 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
112
113 /* Predicates for 16- and 32-bit ranges */
114 /* XXX: The non-shift version appears to trigger a compiler bug when
115 cross-assembling from x86 w/ gcc 2.7.2. */
116
117 #if 1
118 #define range_signed_16(x) \
119 (((offsetT)(x) >> 15) == 0 || ((offsetT)(x) >> 15) == -1)
120 #define range_signed_32(x) \
121 (((offsetT)(x) >> 31) == 0 || ((offsetT)(x) >> 31) == -1)
122 #else
123 #define range_signed_16(x) ((offsetT)(x) >= -(offsetT)0x8000 && \
124 (offsetT)(x) <= (offsetT)0x7FFF)
125 #define range_signed_32(x) ((offsetT)(x) >= -(offsetT)0x80000000 && \
126 (offsetT)(x) <= (offsetT)0x7FFFFFFF)
127 #endif
128
129 /* Macros for sign extending from 16- and 32-bits. */
130 /* XXX: The cast macros will work on all the systems that I care about,
131 but really a predicate should be found to use the non-cast forms. */
132
133 #if 1
134 #define sign_extend_16(x) ((short)(x))
135 #define sign_extend_32(x) ((int)(x))
136 #else
137 #define sign_extend_16(x) ((offsetT)(((x) & 0xFFFF) ^ 0x8000) - 0x8000)
138 #define sign_extend_32(x) ((offsetT)(((x) & 0xFFFFFFFF) \
139 ^ 0x80000000) - 0x80000000)
140 #endif
141
142 /* Macros to build tokens */
143
144 #define set_tok_reg(t, r) (memset(&(t), 0, sizeof(t)), \
145 (t).X_op = O_register, \
146 (t).X_add_number = (r))
147 #define set_tok_preg(t, r) (memset(&(t), 0, sizeof(t)), \
148 (t).X_op = O_pregister, \
149 (t).X_add_number = (r))
150 #define set_tok_cpreg(t, r) (memset(&(t), 0, sizeof(t)), \
151 (t).X_op = O_cpregister, \
152 (t).X_add_number = (r))
153 #define set_tok_freg(t, r) (memset(&(t), 0, sizeof(t)), \
154 (t).X_op = O_register, \
155 (t).X_add_number = (r)+32)
156 #define set_tok_sym(t, s, a) (memset(&(t), 0, sizeof(t)), \
157 (t).X_op = O_symbol, \
158 (t).X_add_symbol = (s), \
159 (t).X_add_number = (a))
160 #define set_tok_const(t, n) (memset(&(t), 0, sizeof(t)), \
161 (t).X_op = O_constant, \
162 (t).X_add_number = (n))
163
164 \f
165 /* Prototypes for all local functions */
166
167 static int tokenize_arguments PARAMS ((char *, expressionS *, int));
168 static const struct alpha_opcode *find_opcode_match
169 PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
170 static const struct alpha_macro *find_macro_match
171 PARAMS ((const struct alpha_macro *, const expressionS *, int *));
172 static unsigned insert_operand
173 PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
174 static void assemble_insn
175 PARAMS ((const struct alpha_opcode *, const expressionS *, int,
176 struct alpha_insn *));
177 static void emit_insn PARAMS ((struct alpha_insn *));
178 static void assemble_tokens_to_insn
179 PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
180 static void assemble_tokens
181 PARAMS ((const char *, const expressionS *, int, int));
182
183 static int load_expression
184 PARAMS ((int, const expressionS *, int *, expressionS *));
185
186 static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
187 static void emit_division PARAMS ((const expressionS *, int, const PTR));
188 static void emit_lda PARAMS ((const expressionS *, int, const PTR));
189 static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
190 static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
191 static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
192 static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
193 static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
194 static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
195 static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
196 static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
197 static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
198 static void emit_stX PARAMS ((const expressionS *, int, const PTR));
199 static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
200 static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
201 static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
202
203 static void s_alpha_text PARAMS ((int));
204 static void s_alpha_data PARAMS ((int));
205 #ifndef OBJ_ELF
206 static void s_alpha_comm PARAMS ((int));
207 static void s_alpha_rdata PARAMS ((int));
208 #endif
209 #ifdef OBJ_ECOFF
210 static void s_alpha_sdata PARAMS ((int));
211 #endif
212 #ifdef OBJ_ELF
213 static void s_alpha_section PARAMS ((int));
214 static void s_alpha_ent PARAMS ((int));
215 static void s_alpha_end PARAMS ((int));
216 static void s_alpha_mask PARAMS ((int));
217 static void s_alpha_frame PARAMS ((int));
218 static void s_alpha_prologue PARAMS ((int));
219 static void s_alpha_coff_wrapper PARAMS ((int));
220 #endif
221 #ifdef OBJ_EVAX
222 static void s_alpha_section PARAMS ((int));
223 #endif
224 static void s_alpha_gprel32 PARAMS ((int));
225 static void s_alpha_float_cons PARAMS ((int));
226 static void s_alpha_proc PARAMS ((int));
227 static void s_alpha_set PARAMS ((int));
228 static void s_alpha_base PARAMS ((int));
229 static void s_alpha_align PARAMS ((int));
230 static void s_alpha_stringer PARAMS ((int));
231 static void s_alpha_space PARAMS ((int));
232
233 static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
234 #ifndef OBJ_ELF
235 static void select_gp_value PARAMS ((void));
236 #endif
237 static void alpha_align PARAMS ((int, char *, symbolS *, int));
238
239 \f
240 /* Generic assembler global variables which must be defined by all
241 targets. */
242
243 /* Characters which always start a comment. */
244 const char comment_chars[] = "#";
245
246 /* Characters which start a comment at the beginning of a line. */
247 const char line_comment_chars[] = "#";
248
249 /* Characters which may be used to separate multiple commands on a
250 single line. */
251 const char line_separator_chars[] = ";";
252
253 /* Characters which are used to indicate an exponent in a floating
254 point number. */
255 const char EXP_CHARS[] = "eE";
256
257 /* Characters which mean that a number is a floating point constant,
258 as in 0d1.0. */
259 #if 0
260 const char FLT_CHARS[] = "dD";
261 #else
262 /* XXX: Do all of these really get used on the alpha?? */
263 char FLT_CHARS[] = "rRsSfFdDxXpP";
264 #endif
265
266 #ifdef OBJ_EVAX
267 const char *md_shortopts = "Fm:g+1h:HG:";
268 #else
269 const char *md_shortopts = "Fm:gG:";
270 #endif
271
272 struct option md_longopts[] = {
273 #define OPTION_32ADDR (OPTION_MD_BASE)
274 { "32addr", no_argument, NULL, OPTION_32ADDR },
275 #define OPTION_RELAX (OPTION_32ADDR+1)
276 { "relax", no_argument, NULL, OPTION_RELAX },
277 #ifdef OBJ_ELF
278 #define OPTION_MDEBUG (OPTION_RELAX+1)
279 #define OPTION_NO_MDEBUG (OPTION_MDEBUG+1)
280 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
281 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
282 #endif
283 { NULL, no_argument, NULL, 0 }
284 };
285
286 size_t md_longopts_size = sizeof(md_longopts);
287
288 \f
289 #ifdef OBJ_EVAX
290 #define AXP_REG_R0 0
291 #define AXP_REG_R16 16
292 #define AXP_REG_R17 17
293 #undef AXP_REG_T9
294 #define AXP_REG_T9 22
295 #undef AXP_REG_T10
296 #define AXP_REG_T10 23
297 #undef AXP_REG_T11
298 #define AXP_REG_T11 24
299 #undef AXP_REG_T12
300 #define AXP_REG_T12 25
301 #define AXP_REG_AI 25
302 #undef AXP_REG_FP
303 #define AXP_REG_FP 29
304
305 #undef AXP_REG_GP
306 #define AXP_REG_GP AXP_REG_PV
307 #endif /* OBJ_EVAX */
308
309 /* The cpu for which we are generating code */
310 static unsigned alpha_target = AXP_OPCODE_BASE;
311 static const char *alpha_target_name = "<all>";
312
313 /* The hash table of instruction opcodes */
314 static struct hash_control *alpha_opcode_hash;
315
316 /* The hash table of macro opcodes */
317 static struct hash_control *alpha_macro_hash;
318
319 #ifdef OBJ_ECOFF
320 /* The $gp relocation symbol */
321 static symbolS *alpha_gp_symbol;
322
323 /* XXX: what is this, and why is it exported? */
324 valueT alpha_gp_value;
325 #endif
326
327 /* The current $gp register */
328 static int alpha_gp_register = AXP_REG_GP;
329
330 /* A table of the register symbols */
331 static symbolS *alpha_register_table[64];
332
333 /* Constant sections, or sections of constants */
334 #ifdef OBJ_ECOFF
335 static segT alpha_lita_section;
336 static segT alpha_lit4_section;
337 #endif
338 #ifdef OBJ_EVAX
339 static segT alpha_link_section;
340 static segT alpha_ctors_section;
341 static segT alpha_dtors_section;
342 #endif
343 static segT alpha_lit8_section;
344
345 /* Symbols referring to said sections. */
346 #ifdef OBJ_ECOFF
347 static symbolS *alpha_lita_symbol;
348 static symbolS *alpha_lit4_symbol;
349 #endif
350 #ifdef OBJ_EVAX
351 static symbolS *alpha_link_symbol;
352 static symbolS *alpha_ctors_symbol;
353 static symbolS *alpha_dtors_symbol;
354 #endif
355 static symbolS *alpha_lit8_symbol;
356
357 /* Literal for .litX+0x8000 within .lita */
358 #ifdef OBJ_ECOFF
359 static offsetT alpha_lit4_literal;
360 static offsetT alpha_lit8_literal;
361 #endif
362
363 /* The active .ent symbol. */
364 #ifdef OBJ_ELF
365 static symbolS *alpha_cur_ent_sym;
366 #endif
367
368 /* Is the assembler not allowed to use $at? */
369 static int alpha_noat_on = 0;
370
371 /* Are macros enabled? */
372 static int alpha_macros_on = 1;
373
374 /* Are floats disabled? */
375 static int alpha_nofloats_on = 0;
376
377 /* Are addresses 32 bit? */
378 static int alpha_addr32_on = 0;
379
380 /* Symbol labelling the current insn. When the Alpha gas sees
381 foo:
382 .quad 0
383 and the section happens to not be on an eight byte boundary, it
384 will align both the symbol and the .quad to an eight byte boundary. */
385 static symbolS *alpha_insn_label;
386
387 /* Whether we should automatically align data generation pseudo-ops.
388 .align 0 will turn this off. */
389 static int alpha_auto_align_on = 1;
390
391 /* The known current alignment of the current section. */
392 static int alpha_current_align;
393
394 /* These are exported to ECOFF code. */
395 unsigned long alpha_gprmask, alpha_fprmask;
396
397 /* Whether the debugging option was seen. */
398 static int alpha_debug;
399
400 #ifdef OBJ_ELF
401 /* Whether we are emitting an mdebug section. */
402 int alpha_flag_mdebug = 1;
403 #endif
404
405 /* Don't fully resolve relocations, allowing code movement in the linker. */
406 static int alpha_flag_relax;
407
408 /* What value to give to bfd_set_gp_size. */
409 static int g_switch_value = 8;
410
411 #ifdef OBJ_EVAX
412 /* Collect information about current procedure here. */
413 static struct {
414 symbolS *symbol; /* proc pdesc symbol */
415 int pdsckind;
416 int framereg; /* register for frame pointer */
417 int framesize; /* size of frame */
418 int rsa_offset;
419 int ra_save;
420 int fp_save;
421 long imask;
422 long fmask;
423 int type;
424 int prologue;
425 } alpha_evax_proc;
426
427 static int alpha_flag_hash_long_names = 0; /* -+ */
428 static int alpha_flag_show_after_trunc = 0; /* -H */
429
430 /* If the -+ switch is given, then a hash is appended to any name that is
431 * longer than 64 characters, else longer symbol names are truncated.
432 */
433
434 #endif
435 \f
436 /* A table of CPU names and opcode sets. */
437
438 static const struct cpu_type
439 {
440 const char *name;
441 unsigned flags;
442 } cpu_types[] =
443 {
444 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
445 This supports usage under DU 4.0b that does ".arch ev4", and
446 usage in MILO that does -m21064. Probably something more
447 specific like -m21064-pal should be used, but oh well. */
448
449 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
450 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
451 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
452 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
453 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
454 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
455 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
456 |AXP_OPCODE_MAX) },
457 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
458 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
459
460 { "ev4", AXP_OPCODE_BASE },
461 { "ev45", AXP_OPCODE_BASE },
462 { "lca45", AXP_OPCODE_BASE },
463 { "ev5", AXP_OPCODE_BASE },
464 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
465 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
466 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
467
468 { "all", AXP_OPCODE_BASE },
469 { 0 }
470 };
471
472 /* The macro table */
473
474 static const struct alpha_macro alpha_macros[] = {
475 /* Load/Store macros */
476 { "lda", emit_lda, NULL,
477 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
478 MACRO_IR, MACRO_EXP, MACRO_EOA } },
479 { "ldah", emit_ldah, NULL,
480 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
481
482 { "ldl", emit_ir_load, "ldl",
483 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
484 MACRO_IR, MACRO_EXP, MACRO_EOA } },
485 { "ldl_l", emit_ir_load, "ldl_l",
486 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
487 MACRO_IR, MACRO_EXP, MACRO_EOA } },
488 { "ldq", emit_ir_load, "ldq",
489 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
490 MACRO_IR, MACRO_EXP, MACRO_EOA } },
491 { "ldq_l", emit_ir_load, "ldq_l",
492 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
493 MACRO_IR, MACRO_EXP, MACRO_EOA } },
494 { "ldq_u", emit_ir_load, "ldq_u",
495 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
496 MACRO_IR, MACRO_EXP, MACRO_EOA } },
497 { "ldf", emit_loadstore, "ldf",
498 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
499 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
500 { "ldg", emit_loadstore, "ldg",
501 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
502 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
503 { "lds", emit_loadstore, "lds",
504 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
505 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
506 { "ldt", emit_loadstore, "ldt",
507 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
508 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
509
510 { "ldb", emit_ldX, (PTR)0,
511 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
512 MACRO_IR, MACRO_EXP, MACRO_EOA } },
513 { "ldbu", emit_ldXu, (PTR)0,
514 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
515 MACRO_IR, MACRO_EXP, MACRO_EOA } },
516 { "ldw", emit_ldX, (PTR)1,
517 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
518 MACRO_IR, MACRO_EXP, MACRO_EOA } },
519 { "ldwu", emit_ldXu, (PTR)1,
520 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
521 MACRO_IR, MACRO_EXP, MACRO_EOA } },
522
523 { "uldw", emit_uldX, (PTR)1,
524 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
525 MACRO_IR, MACRO_EXP, MACRO_EOA } },
526 { "uldwu", emit_uldXu, (PTR)1,
527 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
528 MACRO_IR, MACRO_EXP, MACRO_EOA } },
529 { "uldl", emit_uldX, (PTR)2,
530 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
531 MACRO_IR, MACRO_EXP, MACRO_EOA } },
532 { "uldlu", emit_uldXu, (PTR)2,
533 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
534 MACRO_IR, MACRO_EXP, MACRO_EOA } },
535 { "uldq", emit_uldXu, (PTR)3,
536 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
537 MACRO_IR, MACRO_EXP, MACRO_EOA } },
538
539 { "ldgp", emit_ldgp, NULL,
540 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
541
542 { "ldi", emit_lda, NULL,
543 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
544 { "ldil", emit_ldil, NULL,
545 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
546 { "ldiq", emit_lda, NULL,
547 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
548 #if 0
549 { "ldif" emit_ldiq, NULL,
550 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
551 { "ldid" emit_ldiq, NULL,
552 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
553 { "ldig" emit_ldiq, NULL,
554 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
555 { "ldis" emit_ldiq, NULL,
556 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
557 { "ldit" emit_ldiq, NULL,
558 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
559 #endif
560
561 { "stl", emit_loadstore, "stl",
562 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
563 MACRO_IR, MACRO_EXP, MACRO_EOA } },
564 { "stl_c", emit_loadstore, "stl_c",
565 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
566 MACRO_IR, MACRO_EXP, MACRO_EOA } },
567 { "stq", emit_loadstore, "stq",
568 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
569 MACRO_IR, MACRO_EXP, MACRO_EOA } },
570 { "stq_c", emit_loadstore, "stq_c",
571 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
572 MACRO_IR, MACRO_EXP, MACRO_EOA } },
573 { "stq_u", emit_loadstore, "stq_u",
574 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
575 MACRO_IR, MACRO_EXP, MACRO_EOA } },
576 { "stf", emit_loadstore, "stf",
577 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
578 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
579 { "stg", emit_loadstore, "stg",
580 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
581 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
582 { "sts", emit_loadstore, "sts",
583 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
584 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
585 { "stt", emit_loadstore, "stt",
586 { MACRO_FPR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
587 MACRO_FPR, MACRO_EXP, MACRO_EOA } },
588
589 { "stb", emit_stX, (PTR)0,
590 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
591 MACRO_IR, MACRO_EXP, MACRO_EOA } },
592 { "stw", emit_stX, (PTR)1,
593 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
594 MACRO_IR, MACRO_EXP, MACRO_EOA } },
595 { "ustw", emit_ustX, (PTR)1,
596 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
597 MACRO_IR, MACRO_EXP, MACRO_EOA } },
598 { "ustl", emit_ustX, (PTR)2,
599 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
600 MACRO_IR, MACRO_EXP, MACRO_EOA } },
601 { "ustq", emit_ustX, (PTR)3,
602 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA,
603 MACRO_IR, MACRO_EXP, MACRO_EOA } },
604
605 /* Arithmetic macros */
606 #if 0
607 { "absl" emit_absl, 1, { IR } },
608 { "absl" emit_absl, 2, { IR, IR } },
609 { "absl" emit_absl, 2, { EXP, IR } },
610 { "absq" emit_absq, 1, { IR } },
611 { "absq" emit_absq, 2, { IR, IR } },
612 { "absq" emit_absq, 2, { EXP, IR } },
613 #endif
614
615 { "sextb", emit_sextX, (PTR)0,
616 { MACRO_IR, MACRO_IR, MACRO_EOA,
617 MACRO_IR, MACRO_EOA,
618 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
619 { "sextw", emit_sextX, (PTR)1,
620 { MACRO_IR, MACRO_IR, MACRO_EOA,
621 MACRO_IR, MACRO_EOA,
622 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
623
624 { "divl", emit_division, "__divl",
625 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
626 MACRO_IR, MACRO_IR, MACRO_EOA,
627 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
628 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
629 { "divlu", emit_division, "__divlu",
630 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
631 MACRO_IR, MACRO_IR, MACRO_EOA,
632 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
633 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
634 { "divq", emit_division, "__divq",
635 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
636 MACRO_IR, MACRO_IR, MACRO_EOA,
637 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
638 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
639 { "divqu", emit_division, "__divqu",
640 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
641 MACRO_IR, MACRO_IR, MACRO_EOA,
642 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
643 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
644 { "reml", emit_division, "__reml",
645 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
646 MACRO_IR, MACRO_IR, MACRO_EOA,
647 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
648 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
649 { "remlu", emit_division, "__remlu",
650 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
651 MACRO_IR, MACRO_IR, MACRO_EOA,
652 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
653 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
654 { "remq", emit_division, "__remq",
655 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
656 MACRO_IR, MACRO_IR, MACRO_EOA,
657 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
658 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
659 { "remqu", emit_division, "__remqu",
660 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
661 MACRO_IR, MACRO_IR, MACRO_EOA,
662 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
663 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
664
665 { "jsr", emit_jsrjmp, "jsr",
666 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
667 MACRO_PIR, MACRO_EOA,
668 MACRO_IR, MACRO_EXP, MACRO_EOA,
669 MACRO_EXP, MACRO_EOA } },
670 { "jmp", emit_jsrjmp, "jmp",
671 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
672 MACRO_PIR, MACRO_EOA,
673 MACRO_IR, MACRO_EXP, MACRO_EOA,
674 MACRO_EXP, MACRO_EOA } },
675 { "ret", emit_retjcr, "ret",
676 { MACRO_IR, MACRO_EXP, MACRO_EOA,
677 MACRO_IR, MACRO_EOA,
678 MACRO_PIR, MACRO_EXP, MACRO_EOA,
679 MACRO_PIR, MACRO_EOA,
680 MACRO_EXP, MACRO_EOA,
681 MACRO_EOA } },
682 { "jcr", emit_retjcr, "jcr",
683 { MACRO_IR, MACRO_EXP, MACRO_EOA,
684 MACRO_IR, MACRO_EOA,
685 MACRO_PIR, MACRO_EXP, MACRO_EOA,
686 MACRO_PIR, MACRO_EOA,
687 MACRO_EXP, MACRO_EOA,
688 MACRO_EOA } },
689 { "jsr_coroutine", emit_retjcr, "jcr",
690 { MACRO_IR, MACRO_EXP, MACRO_EOA,
691 MACRO_IR, MACRO_EOA,
692 MACRO_PIR, MACRO_EXP, MACRO_EOA,
693 MACRO_PIR, MACRO_EOA,
694 MACRO_EXP, MACRO_EOA,
695 MACRO_EOA } },
696 };
697
698 static const int alpha_num_macros
699 = sizeof(alpha_macros) / sizeof(*alpha_macros);
700 \f
701 /* Public interface functions */
702
703 /* This function is called once, at assembler startup time. It sets
704 up all the tables, etc. that the MD part of the assembler will
705 need, that can be determined before arguments are parsed. */
706
707 void
708 md_begin ()
709 {
710 unsigned int i;
711
712 /* Create the opcode hash table */
713
714 alpha_opcode_hash = hash_new ();
715 for (i = 0; i < alpha_num_opcodes; )
716 {
717 const char *name, *retval, *slash;
718
719 name = alpha_opcodes[i].name;
720 retval = hash_insert (alpha_opcode_hash, name, (PTR)&alpha_opcodes[i]);
721 if (retval)
722 as_fatal (_("internal error: can't hash opcode `%s': %s"), name, retval);
723
724 /* Some opcodes include modifiers of various sorts with a "/mod"
725 syntax, like the architecture manual suggests. However, for
726 use with gcc at least, we also need access to those same opcodes
727 without the "/". */
728
729 if ((slash = strchr (name, '/')) != NULL)
730 {
731 char *p = xmalloc (strlen (name));
732 memcpy (p, name, slash - name);
733 strcpy (p + (slash - name), slash + 1);
734
735 (void)hash_insert(alpha_opcode_hash, p, (PTR)&alpha_opcodes[i]);
736 /* Ignore failures -- the opcode table does duplicate some
737 variants in different forms, like "hw_stq" and "hw_st/q". */
738 }
739
740 while (++i < alpha_num_opcodes
741 && (alpha_opcodes[i].name == name
742 || !strcmp (alpha_opcodes[i].name, name)))
743 continue;
744 }
745
746 /* Create the macro hash table */
747
748 alpha_macro_hash = hash_new ();
749 for (i = 0; i < alpha_num_macros; )
750 {
751 const char *name, *retval;
752
753 name = alpha_macros[i].name;
754 retval = hash_insert (alpha_macro_hash, name, (PTR)&alpha_macros[i]);
755 if (retval)
756 as_fatal (_("internal error: can't hash macro `%s': %s"), name, retval);
757
758 while (++i < alpha_num_macros
759 && (alpha_macros[i].name == name
760 || !strcmp (alpha_macros[i].name, name)))
761 continue;
762 }
763
764 /* Construct symbols for each of the registers */
765
766 for (i = 0; i < 32; ++i)
767 {
768 char name[4];
769 sprintf(name, "$%d", i);
770 alpha_register_table[i] = symbol_create(name, reg_section, i,
771 &zero_address_frag);
772 }
773 for (; i < 64; ++i)
774 {
775 char name[5];
776 sprintf(name, "$f%d", i-32);
777 alpha_register_table[i] = symbol_create(name, reg_section, i,
778 &zero_address_frag);
779 }
780
781 /* Create the special symbols and sections we'll be using */
782
783 /* So .sbss will get used for tiny objects. */
784 bfd_set_gp_size (stdoutput, g_switch_value);
785
786 #ifdef OBJ_ECOFF
787 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
788
789 /* For handling the GP, create a symbol that won't be output in the
790 symbol table. We'll edit it out of relocs later. */
791 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
792 &zero_address_frag);
793 #endif
794
795 #ifdef OBJ_EVAX
796 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
797 #endif
798
799 #ifdef OBJ_ELF
800 if (ECOFF_DEBUGGING)
801 {
802 segT sec = subseg_new(".mdebug", (subsegT)0);
803 bfd_set_section_flags(stdoutput, sec, SEC_HAS_CONTENTS|SEC_READONLY);
804 bfd_set_section_alignment(stdoutput, sec, 3);
805 }
806 #endif /* OBJ_ELF */
807
808 subseg_set(text_section, 0);
809 }
810
811 /* The public interface to the instruction assembler. */
812
813 void
814 md_assemble (str)
815 char *str;
816 {
817 char opname[32]; /* current maximum is 13 */
818 expressionS tok[MAX_INSN_ARGS];
819 int ntok, opnamelen, trunclen;
820
821 /* split off the opcode */
822 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/468");
823 trunclen = (opnamelen < sizeof (opname) - 1
824 ? opnamelen
825 : sizeof (opname) - 1);
826 memcpy (opname, str, trunclen);
827 opname[trunclen] = '\0';
828
829 /* tokenize the rest of the line */
830 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
831 {
832 as_bad (_("syntax error"));
833 return;
834 }
835
836 /* finish it off */
837 assemble_tokens (opname, tok, ntok, alpha_macros_on);
838 }
839
840 /* Round up a section's size to the appropriate boundary. */
841
842 valueT
843 md_section_align (seg, size)
844 segT seg;
845 valueT size;
846 {
847 int align = bfd_get_section_alignment(stdoutput, seg);
848 valueT mask = ((valueT)1 << align) - 1;
849
850 return (size + mask) & ~mask;
851 }
852
853 /* Turn a string in input_line_pointer into a floating point constant
854 of type type, and store the appropriate bytes in *litP. The number
855 of LITTLENUMS emitted is stored in *sizeP. An error message is
856 returned, or NULL on OK. */
857
858 /* Equal to MAX_PRECISION in atof-ieee.c */
859 #define MAX_LITTLENUMS 6
860
861 extern char *vax_md_atof PARAMS ((int, char *, int *));
862
863 char *
864 md_atof (type, litP, sizeP)
865 char type;
866 char *litP;
867 int *sizeP;
868 {
869 int prec;
870 LITTLENUM_TYPE words[MAX_LITTLENUMS];
871 LITTLENUM_TYPE *wordP;
872 char *t;
873
874 switch (type)
875 {
876 /* VAX floats */
877 case 'G':
878 /* VAX md_atof doesn't like "G" for some reason. */
879 type = 'g';
880 case 'F':
881 case 'D':
882 return vax_md_atof (type, litP, sizeP);
883
884 /* IEEE floats */
885 case 'f':
886 prec = 2;
887 break;
888
889 case 'd':
890 prec = 4;
891 break;
892
893 case 'x':
894 case 'X':
895 prec = 6;
896 break;
897
898 case 'p':
899 case 'P':
900 prec = 6;
901 break;
902
903 default:
904 *sizeP = 0;
905 return _("Bad call to MD_ATOF()");
906 }
907 t = atof_ieee (input_line_pointer, type, words);
908 if (t)
909 input_line_pointer = t;
910 *sizeP = prec * sizeof (LITTLENUM_TYPE);
911
912 for (wordP = words + prec - 1; prec--;)
913 {
914 md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
915 litP += sizeof (LITTLENUM_TYPE);
916 }
917
918 return 0;
919 }
920
921 /* Take care of the target-specific command-line options. */
922
923 int
924 md_parse_option (c, arg)
925 int c;
926 char *arg;
927 {
928 switch (c)
929 {
930 case 'F':
931 alpha_nofloats_on = 1;
932 break;
933
934 case OPTION_32ADDR:
935 alpha_addr32_on = 1;
936 break;
937
938 case 'g':
939 alpha_debug = 1;
940 break;
941
942 case 'G':
943 g_switch_value = atoi(arg);
944 break;
945
946 case 'm':
947 {
948 const struct cpu_type *p;
949 for (p = cpu_types; p->name; ++p)
950 if (strcmp(arg, p->name) == 0)
951 {
952 alpha_target_name = p->name, alpha_target = p->flags;
953 goto found;
954 }
955 as_warn(_("Unknown CPU identifier `%s'"), arg);
956 found:;
957 }
958 break;
959
960 #ifdef OBJ_EVAX
961 case '+': /* For g++. Hash any name > 63 chars long. */
962 alpha_flag_hash_long_names = 1;
963 break;
964
965 case 'H': /* Show new symbol after hash truncation */
966 alpha_flag_show_after_trunc = 1;
967 break;
968
969 case 'h': /* for gnu-c/vax compatibility. */
970 break;
971 #endif
972
973 case OPTION_RELAX:
974 alpha_flag_relax = 1;
975 break;
976
977 #ifdef OBJ_ELF
978 case OPTION_MDEBUG:
979 alpha_flag_mdebug = 1;
980 break;
981 case OPTION_NO_MDEBUG:
982 alpha_flag_mdebug = 0;
983 break;
984 #endif
985
986 default:
987 return 0;
988 }
989
990 return 1;
991 }
992
993 /* Print a description of the command-line options that we accept. */
994
995 void
996 md_show_usage (stream)
997 FILE *stream;
998 {
999 fputs(_("\
1000 Alpha options:\n\
1001 -32addr treat addresses as 32-bit values\n\
1002 -F lack floating point instructions support\n\
1003 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
1004 specify variant of Alpha architecture\n\
1005 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
1006 these variants include PALcode opcodes\n"),
1007 stream);
1008 #ifdef OBJ_EVAX
1009 fputs (_("\
1010 VMS options:\n\
1011 -+ hash encode (don't truncate) names longer than 64 characters\n\
1012 -H show new symbol after hash truncation\n"),
1013 stream);
1014 #endif
1015 }
1016
1017 /* Decide from what point a pc-relative relocation is relative to,
1018 relative to the pc-relative fixup. Er, relatively speaking. */
1019
1020 long
1021 md_pcrel_from (fixP)
1022 fixS *fixP;
1023 {
1024 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
1025 switch (fixP->fx_r_type)
1026 {
1027 case BFD_RELOC_ALPHA_GPDISP:
1028 case BFD_RELOC_ALPHA_GPDISP_HI16:
1029 case BFD_RELOC_ALPHA_GPDISP_LO16:
1030 return addr;
1031 default:
1032 return fixP->fx_size + addr;
1033 }
1034 }
1035
1036 /* Attempt to simplify or even eliminate a fixup. The return value is
1037 ignored; perhaps it was once meaningful, but now it is historical.
1038 To indicate that a fixup has been eliminated, set fixP->fx_done.
1039
1040 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1041 internally into the GPDISP reloc used externally. We had to do
1042 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1043 the distance to the "lda" instruction for setting the addend to
1044 GPDISP. */
1045
1046 int
1047 md_apply_fix (fixP, valueP)
1048 fixS *fixP;
1049 valueT *valueP;
1050 {
1051 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
1052 valueT value = *valueP;
1053 unsigned image, size;
1054
1055 switch (fixP->fx_r_type)
1056 {
1057 /* The GPDISP relocations are processed internally with a symbol
1058 referring to the current function; we need to drop in a value
1059 which, when added to the address of the start of the function,
1060 gives the desired GP. */
1061 case BFD_RELOC_ALPHA_GPDISP_HI16:
1062 {
1063 fixS *next = fixP->fx_next;
1064 assert (next->fx_r_type == BFD_RELOC_ALPHA_GPDISP_LO16);
1065
1066 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
1067 - fixP->fx_frag->fr_address - fixP->fx_where);
1068
1069 value = (value - sign_extend_16 (value)) >> 16;
1070 }
1071 #ifdef OBJ_ELF
1072 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
1073 #endif
1074 goto do_reloc_gp;
1075
1076 case BFD_RELOC_ALPHA_GPDISP_LO16:
1077 value = sign_extend_16 (value);
1078 fixP->fx_offset = 0;
1079 #ifdef OBJ_ELF
1080 fixP->fx_done = 1;
1081 #endif
1082
1083 do_reloc_gp:
1084 fixP->fx_addsy = section_symbol (absolute_section);
1085 md_number_to_chars (fixpos, value, 2);
1086 break;
1087
1088 case BFD_RELOC_16:
1089 if (fixP->fx_pcrel)
1090 fixP->fx_r_type = BFD_RELOC_16_PCREL;
1091 size = 2;
1092 goto do_reloc_xx;
1093 case BFD_RELOC_32:
1094 if (fixP->fx_pcrel)
1095 fixP->fx_r_type = BFD_RELOC_32_PCREL;
1096 size = 4;
1097 goto do_reloc_xx;
1098 case BFD_RELOC_64:
1099 if (fixP->fx_pcrel)
1100 fixP->fx_r_type = BFD_RELOC_64_PCREL;
1101 size = 8;
1102 do_reloc_xx:
1103 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1104 {
1105 md_number_to_chars (fixpos, value, size);
1106 goto done;
1107 }
1108 return 1;
1109
1110 #ifdef OBJ_ECOFF
1111 case BFD_RELOC_GPREL32:
1112 assert (fixP->fx_subsy == alpha_gp_symbol);
1113 fixP->fx_subsy = 0;
1114 /* FIXME: inherited this obliviousness of `value' -- why? */
1115 md_number_to_chars (fixpos, -alpha_gp_value, 4);
1116 break;
1117 #endif
1118 #ifdef OBJ_ELF
1119 case BFD_RELOC_GPREL32:
1120 return 1;
1121 #endif
1122
1123 case BFD_RELOC_23_PCREL_S2:
1124 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1125 {
1126 image = bfd_getl32(fixpos);
1127 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
1128 goto write_done;
1129 }
1130 return 1;
1131
1132 case BFD_RELOC_ALPHA_HINT:
1133 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1134 {
1135 image = bfd_getl32(fixpos);
1136 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
1137 goto write_done;
1138 }
1139 return 1;
1140
1141 #ifdef OBJ_ECOFF
1142 case BFD_RELOC_ALPHA_LITERAL:
1143 md_number_to_chars (fixpos, value, 2);
1144 return 1;
1145
1146 case BFD_RELOC_ALPHA_LITUSE:
1147 return 1;
1148 #endif
1149 #ifdef OBJ_ELF
1150 case BFD_RELOC_ALPHA_ELF_LITERAL:
1151 case BFD_RELOC_ALPHA_LITUSE:
1152 return 1;
1153 #endif
1154 #ifdef OBJ_EVAX
1155 case BFD_RELOC_ALPHA_LINKAGE:
1156 case BFD_RELOC_ALPHA_CODEADDR:
1157 return 1;
1158 #endif
1159
1160 default:
1161 {
1162 const struct alpha_operand *operand;
1163
1164 if ((int)fixP->fx_r_type >= 0)
1165 as_fatal (_("unhandled relocation type %s"),
1166 bfd_get_reloc_code_name (fixP->fx_r_type));
1167
1168 assert (-(int)fixP->fx_r_type < alpha_num_operands);
1169 operand = &alpha_operands[-(int)fixP->fx_r_type];
1170
1171 /* The rest of these fixups only exist internally during symbol
1172 resolution and have no representation in the object file.
1173 Therefore they must be completely resolved as constants. */
1174
1175 if (fixP->fx_addsy != 0
1176 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
1177 as_bad_where (fixP->fx_file, fixP->fx_line,
1178 _("non-absolute expression in constant field"));
1179
1180 image = bfd_getl32(fixpos);
1181 image = insert_operand(image, operand, (offsetT)value,
1182 fixP->fx_file, fixP->fx_line);
1183 }
1184 goto write_done;
1185 }
1186
1187 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
1188 return 1;
1189 else
1190 {
1191 as_warn_where(fixP->fx_file, fixP->fx_line,
1192 _("type %d reloc done?\n"), (int)fixP->fx_r_type);
1193 goto done;
1194 }
1195
1196 write_done:
1197 md_number_to_chars(fixpos, image, 4);
1198
1199 done:
1200 fixP->fx_done = 1;
1201 return 0;
1202 }
1203
1204 /*
1205 * Look for a register name in the given symbol.
1206 */
1207
1208 symbolS *
1209 md_undefined_symbol(name)
1210 char *name;
1211 {
1212 if (*name == '$')
1213 {
1214 int is_float = 0, num;
1215
1216 switch (*++name)
1217 {
1218 case 'f':
1219 if (name[1] == 'p' && name[2] == '\0')
1220 return alpha_register_table[AXP_REG_FP];
1221 is_float = 32;
1222 /* FALLTHRU */
1223
1224 case 'r':
1225 if (!isdigit(*++name))
1226 break;
1227 /* FALLTHRU */
1228
1229 case '0': case '1': case '2': case '3': case '4':
1230 case '5': case '6': case '7': case '8': case '9':
1231 if (name[1] == '\0')
1232 num = name[0] - '0';
1233 else if (name[0] != '0' && isdigit(name[1]) && name[2] == '\0')
1234 {
1235 num = (name[0] - '0') * 10 + name[1] - '0';
1236 if (num >= 32)
1237 break;
1238 }
1239 else
1240 break;
1241
1242 if (!alpha_noat_on && num == AXP_REG_AT)
1243 as_warn(_("Used $at without \".set noat\""));
1244 return alpha_register_table[num + is_float];
1245
1246 case 'a':
1247 if (name[1] == 't' && name[2] == '\0')
1248 {
1249 if (!alpha_noat_on)
1250 as_warn(_("Used $at without \".set noat\""));
1251 return alpha_register_table[AXP_REG_AT];
1252 }
1253 break;
1254
1255 case 'g':
1256 if (name[1] == 'p' && name[2] == '\0')
1257 return alpha_register_table[alpha_gp_register];
1258 break;
1259
1260 case 's':
1261 if (name[1] == 'p' && name[2] == '\0')
1262 return alpha_register_table[AXP_REG_SP];
1263 break;
1264 }
1265 }
1266 return NULL;
1267 }
1268
1269 #ifdef OBJ_ECOFF
1270 /* @@@ Magic ECOFF bits. */
1271
1272 void
1273 alpha_frob_ecoff_data ()
1274 {
1275 select_gp_value ();
1276 /* $zero and $f31 are read-only */
1277 alpha_gprmask &= ~1;
1278 alpha_fprmask &= ~1;
1279 }
1280 #endif
1281
1282 /* Hook to remember a recently defined label so that the auto-align
1283 code can adjust the symbol after we know what alignment will be
1284 required. */
1285
1286 void
1287 alpha_define_label (sym)
1288 symbolS *sym;
1289 {
1290 alpha_insn_label = sym;
1291 }
1292
1293 /* Return true if we must always emit a reloc for a type and false if
1294 there is some hope of resolving it a assembly time. */
1295
1296 int
1297 alpha_force_relocation (f)
1298 fixS *f;
1299 {
1300 if (alpha_flag_relax)
1301 return 1;
1302
1303 switch (f->fx_r_type)
1304 {
1305 case BFD_RELOC_ALPHA_GPDISP_HI16:
1306 case BFD_RELOC_ALPHA_GPDISP_LO16:
1307 case BFD_RELOC_ALPHA_GPDISP:
1308 #ifdef OBJ_ECOFF
1309 case BFD_RELOC_ALPHA_LITERAL:
1310 #endif
1311 #ifdef OBJ_ELF
1312 case BFD_RELOC_ALPHA_ELF_LITERAL:
1313 #endif
1314 case BFD_RELOC_ALPHA_LITUSE:
1315 case BFD_RELOC_GPREL32:
1316 #ifdef OBJ_EVAX
1317 case BFD_RELOC_ALPHA_LINKAGE:
1318 case BFD_RELOC_ALPHA_CODEADDR:
1319 #endif
1320 return 1;
1321
1322 case BFD_RELOC_23_PCREL_S2:
1323 case BFD_RELOC_32:
1324 case BFD_RELOC_64:
1325 case BFD_RELOC_ALPHA_HINT:
1326 return 0;
1327
1328 default:
1329 assert((int)f->fx_r_type < 0 && -(int)f->fx_r_type < alpha_num_operands);
1330 return 0;
1331 }
1332 }
1333
1334 /* Return true if we can partially resolve a relocation now. */
1335
1336 int
1337 alpha_fix_adjustable (f)
1338 fixS *f;
1339 {
1340 #ifdef OBJ_ELF
1341 /* Prevent all adjustments to global symbols */
1342 if (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy))
1343 return 0;
1344 #endif
1345
1346 /* Are there any relocation types for which we must generate a reloc
1347 but we can adjust the values contained within it? */
1348 switch (f->fx_r_type)
1349 {
1350 case BFD_RELOC_ALPHA_GPDISP_HI16:
1351 case BFD_RELOC_ALPHA_GPDISP_LO16:
1352 case BFD_RELOC_ALPHA_GPDISP:
1353 return 0;
1354
1355 #ifdef OBJ_ECOFF
1356 case BFD_RELOC_ALPHA_LITERAL:
1357 #endif
1358 #ifdef OBJ_ELF
1359 case BFD_RELOC_ALPHA_ELF_LITERAL:
1360 #endif
1361 #ifdef OBJ_EVAX
1362 case BFD_RELOC_ALPHA_LINKAGE:
1363 case BFD_RELOC_ALPHA_CODEADDR:
1364 #endif
1365 return 1;
1366
1367 case BFD_RELOC_ALPHA_LITUSE:
1368 return 0;
1369
1370 case BFD_RELOC_GPREL32:
1371 case BFD_RELOC_23_PCREL_S2:
1372 case BFD_RELOC_32:
1373 case BFD_RELOC_64:
1374 case BFD_RELOC_ALPHA_HINT:
1375 return 1;
1376
1377 default:
1378 assert ((int)f->fx_r_type < 0
1379 && - (int)f->fx_r_type < alpha_num_operands);
1380 return 1;
1381 }
1382 /*NOTREACHED*/
1383 }
1384
1385 /* Generate the BFD reloc to be stuck in the object file from the
1386 fixup used internally in the assembler. */
1387
1388 arelent *
1389 tc_gen_reloc (sec, fixp)
1390 asection *sec;
1391 fixS *fixp;
1392 {
1393 arelent *reloc;
1394
1395 reloc = (arelent *) xmalloc (sizeof (arelent));
1396 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1397 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1398 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1399
1400 /* Make sure none of our internal relocations make it this far.
1401 They'd better have been fully resolved by this point. */
1402 assert ((int)fixp->fx_r_type > 0);
1403
1404 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1405 if (reloc->howto == NULL)
1406 {
1407 as_bad_where (fixp->fx_file, fixp->fx_line,
1408 _("cannot represent `%s' relocation in object file"),
1409 bfd_get_reloc_code_name (fixp->fx_r_type));
1410 return NULL;
1411 }
1412
1413 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1414 {
1415 as_fatal (_("internal error? cannot generate `%s' relocation"),
1416 bfd_get_reloc_code_name (fixp->fx_r_type));
1417 }
1418 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1419
1420 #ifdef OBJ_ECOFF
1421 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
1422 {
1423 /* fake out bfd_perform_relocation. sigh */
1424 reloc->addend = -alpha_gp_value;
1425 }
1426 else
1427 #endif
1428 {
1429 reloc->addend = fixp->fx_offset;
1430 #ifdef OBJ_ELF
1431 /*
1432 * Ohhh, this is ugly. The problem is that if this is a local global
1433 * symbol, the relocation will entirely be performed at link time, not
1434 * at assembly time. bfd_perform_reloc doesn't know about this sort
1435 * of thing, and as a result we need to fake it out here.
1436 */
1437 if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))
1438 && !S_IS_COMMON(fixp->fx_addsy))
1439 reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
1440 #endif
1441 }
1442
1443 return reloc;
1444 }
1445
1446 /* Parse a register name off of the input_line and return a register
1447 number. Gets md_undefined_symbol above to do the register name
1448 matching for us.
1449
1450 Only called as a part of processing the ECOFF .frame directive. */
1451
1452 int
1453 tc_get_register (frame)
1454 int frame;
1455 {
1456 int framereg = AXP_REG_SP;
1457
1458 SKIP_WHITESPACE ();
1459 if (*input_line_pointer == '$')
1460 {
1461 char *s = input_line_pointer;
1462 char c = get_symbol_end ();
1463 symbolS *sym = md_undefined_symbol (s);
1464
1465 *strchr(s, '\0') = c;
1466 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
1467 goto found;
1468 }
1469 as_warn (_("frame reg expected, using $%d."), framereg);
1470
1471 found:
1472 note_gpreg (framereg);
1473 return framereg;
1474 }
1475
1476 /* This is called before the symbol table is processed. In order to
1477 work with gcc when using mips-tfile, we must keep all local labels.
1478 However, in other cases, we want to discard them. If we were
1479 called with -g, but we didn't see any debugging information, it may
1480 mean that gcc is smuggling debugging information through to
1481 mips-tfile, in which case we must generate all local labels. */
1482
1483 #ifdef OBJ_ECOFF
1484
1485 void
1486 alpha_frob_file_before_adjust ()
1487 {
1488 if (alpha_debug != 0
1489 && ! ecoff_debugging_seen)
1490 flag_keep_locals = 1;
1491 }
1492
1493 #endif /* OBJ_ECOFF */
1494 \f
1495 /* Parse the arguments to an opcode. */
1496
1497 static int
1498 tokenize_arguments (str, tok, ntok)
1499 char *str;
1500 expressionS tok[];
1501 int ntok;
1502 {
1503 expressionS *end_tok = tok + ntok;
1504 char *old_input_line_pointer;
1505 int saw_comma = 0, saw_arg = 0;
1506
1507 memset (tok, 0, sizeof (*tok) * ntok);
1508
1509 /* Save and restore input_line_pointer around this function */
1510 old_input_line_pointer = input_line_pointer;
1511 input_line_pointer = str;
1512
1513 while (tok < end_tok && *input_line_pointer)
1514 {
1515 SKIP_WHITESPACE ();
1516 switch (*input_line_pointer)
1517 {
1518 case '\0':
1519 goto fini;
1520
1521 case ',':
1522 ++input_line_pointer;
1523 if (saw_comma || !saw_arg)
1524 goto err;
1525 saw_comma = 1;
1526 break;
1527
1528 case '(':
1529 {
1530 char *hold = input_line_pointer++;
1531
1532 /* First try for parenthesized register ... */
1533 expression (tok);
1534 if (*input_line_pointer == ')' && tok->X_op == O_register)
1535 {
1536 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
1537 saw_comma = 0;
1538 saw_arg = 1;
1539 ++input_line_pointer;
1540 ++tok;
1541 break;
1542 }
1543
1544 /* ... then fall through to plain expression */
1545 input_line_pointer = hold;
1546 }
1547
1548 default:
1549 if (saw_arg && !saw_comma)
1550 goto err;
1551 expression (tok);
1552 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1553 goto err;
1554
1555 saw_comma = 0;
1556 saw_arg = 1;
1557 ++tok;
1558 break;
1559 }
1560 }
1561
1562 fini:
1563 if (saw_comma)
1564 goto err;
1565 input_line_pointer = old_input_line_pointer;
1566 return ntok - (end_tok - tok);
1567
1568 err:
1569 input_line_pointer = old_input_line_pointer;
1570 return -1;
1571 }
1572
1573 /* Search forward through all variants of an opcode looking for a
1574 syntax match. */
1575
1576 static const struct alpha_opcode *
1577 find_opcode_match(first_opcode, tok, pntok, pcpumatch)
1578 const struct alpha_opcode *first_opcode;
1579 const expressionS *tok;
1580 int *pntok;
1581 int *pcpumatch;
1582 {
1583 const struct alpha_opcode *opcode = first_opcode;
1584 int ntok = *pntok;
1585 int got_cpu_match = 0;
1586
1587 do
1588 {
1589 const unsigned char *opidx;
1590 int tokidx = 0;
1591
1592 /* Don't match opcodes that don't exist on this architecture */
1593 if (!(opcode->flags & alpha_target))
1594 goto match_failed;
1595
1596 got_cpu_match = 1;
1597
1598 for (opidx = opcode->operands; *opidx; ++opidx)
1599 {
1600 const struct alpha_operand *operand = &alpha_operands[*opidx];
1601
1602 /* only take input from real operands */
1603 if (operand->flags & AXP_OPERAND_FAKE)
1604 continue;
1605
1606 /* when we expect input, make sure we have it */
1607 if (tokidx >= ntok)
1608 {
1609 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
1610 goto match_failed;
1611 continue;
1612 }
1613
1614 /* match operand type with expression type */
1615 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
1616 {
1617 case AXP_OPERAND_IR:
1618 if (tok[tokidx].X_op != O_register
1619 || !is_ir_num(tok[tokidx].X_add_number))
1620 goto match_failed;
1621 break;
1622 case AXP_OPERAND_FPR:
1623 if (tok[tokidx].X_op != O_register
1624 || !is_fpr_num(tok[tokidx].X_add_number))
1625 goto match_failed;
1626 break;
1627 case AXP_OPERAND_IR|AXP_OPERAND_PARENS:
1628 if (tok[tokidx].X_op != O_pregister
1629 || !is_ir_num(tok[tokidx].X_add_number))
1630 goto match_failed;
1631 break;
1632 case AXP_OPERAND_IR|AXP_OPERAND_PARENS|AXP_OPERAND_COMMA:
1633 if (tok[tokidx].X_op != O_cpregister
1634 || !is_ir_num(tok[tokidx].X_add_number))
1635 goto match_failed;
1636 break;
1637
1638 case AXP_OPERAND_RELATIVE:
1639 case AXP_OPERAND_SIGNED:
1640 case AXP_OPERAND_UNSIGNED:
1641 switch (tok[tokidx].X_op)
1642 {
1643 case O_illegal:
1644 case O_absent:
1645 case O_register:
1646 case O_pregister:
1647 case O_cpregister:
1648 goto match_failed;
1649
1650 default:
1651 break;
1652 }
1653 break;
1654
1655 default:
1656 /* everything else should have been fake */
1657 abort();
1658 }
1659 ++tokidx;
1660 }
1661
1662 /* possible match -- did we use all of our input? */
1663 if (tokidx == ntok)
1664 {
1665 *pntok = ntok;
1666 return opcode;
1667 }
1668
1669 match_failed:;
1670 }
1671 while (++opcode-alpha_opcodes < alpha_num_opcodes
1672 && !strcmp(opcode->name, first_opcode->name));
1673
1674 if (*pcpumatch)
1675 *pcpumatch = got_cpu_match;
1676
1677 return NULL;
1678 }
1679
1680 /* Search forward through all variants of a macro looking for a syntax
1681 match. */
1682
1683 static const struct alpha_macro *
1684 find_macro_match(first_macro, tok, pntok)
1685 const struct alpha_macro *first_macro;
1686 const expressionS *tok;
1687 int *pntok;
1688 {
1689 const struct alpha_macro *macro = first_macro;
1690 int ntok = *pntok;
1691
1692 do
1693 {
1694 const enum alpha_macro_arg *arg = macro->argsets;
1695 int tokidx = 0;
1696
1697 while (*arg)
1698 {
1699 switch (*arg)
1700 {
1701 case MACRO_EOA:
1702 if (tokidx == ntok)
1703 return macro;
1704 else
1705 tokidx = 0;
1706 break;
1707
1708 case MACRO_IR:
1709 if (tokidx >= ntok || tok[tokidx].X_op != O_register
1710 || !is_ir_num(tok[tokidx].X_add_number))
1711 goto match_failed;
1712 ++tokidx;
1713 break;
1714 case MACRO_PIR:
1715 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
1716 || !is_ir_num(tok[tokidx].X_add_number))
1717 goto match_failed;
1718 ++tokidx;
1719 break;
1720 case MACRO_CPIR:
1721 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
1722 || !is_ir_num(tok[tokidx].X_add_number))
1723 goto match_failed;
1724 ++tokidx;
1725 break;
1726 case MACRO_FPR:
1727 if (tokidx >= ntok || tok[tokidx].X_op != O_register
1728 || !is_fpr_num(tok[tokidx].X_add_number))
1729 goto match_failed;
1730 ++tokidx;
1731 break;
1732
1733 case MACRO_EXP:
1734 if (tokidx >= ntok)
1735 goto match_failed;
1736 switch (tok[tokidx].X_op)
1737 {
1738 case O_illegal:
1739 case O_absent:
1740 case O_register:
1741 case O_pregister:
1742 case O_cpregister:
1743 goto match_failed;
1744
1745 default:
1746 break;
1747 }
1748 ++tokidx;
1749 break;
1750
1751 match_failed:
1752 while (*arg != MACRO_EOA)
1753 ++arg;
1754 tokidx = 0;
1755 break;
1756 }
1757 ++arg;
1758 }
1759 }
1760 while (++macro-alpha_macros < alpha_num_macros
1761 && !strcmp(macro->name, first_macro->name));
1762
1763 return NULL;
1764 }
1765
1766 /* Insert an operand value into an instruction. */
1767
1768 static unsigned
1769 insert_operand(insn, operand, val, file, line)
1770 unsigned insn;
1771 const struct alpha_operand *operand;
1772 offsetT val;
1773 char *file;
1774 unsigned line;
1775 {
1776 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
1777 {
1778 offsetT min, max;
1779
1780 if (operand->flags & AXP_OPERAND_SIGNED)
1781 {
1782 max = (1 << (operand->bits - 1)) - 1;
1783 min = -(1 << (operand->bits - 1));
1784 }
1785 else
1786 {
1787 max = (1 << operand->bits) - 1;
1788 min = 0;
1789 }
1790
1791 if (val < min || val > max)
1792 {
1793 const char *err =
1794 _("operand out of range (%s not between %d and %d)");
1795 char buf[sizeof (val) * 3 + 2];
1796
1797 sprint_value(buf, val);
1798 if (file)
1799 as_warn_where(file, line, err, buf, min, max);
1800 else
1801 as_warn(err, buf, min, max);
1802 }
1803 }
1804
1805 if (operand->insert)
1806 {
1807 const char *errmsg = NULL;
1808
1809 insn = (*operand->insert) (insn, val, &errmsg);
1810 if (errmsg)
1811 as_warn (errmsg);
1812 }
1813 else
1814 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
1815
1816 return insn;
1817 }
1818
1819 /*
1820 * Turn an opcode description and a set of arguments into
1821 * an instruction and a fixup.
1822 */
1823
1824 static void
1825 assemble_insn(opcode, tok, ntok, insn)
1826 const struct alpha_opcode *opcode;
1827 const expressionS *tok;
1828 int ntok;
1829 struct alpha_insn *insn;
1830 {
1831 const unsigned char *argidx;
1832 unsigned image;
1833 int tokidx = 0;
1834
1835 memset (insn, 0, sizeof (*insn));
1836 image = opcode->opcode;
1837
1838 for (argidx = opcode->operands; *argidx; ++argidx)
1839 {
1840 const struct alpha_operand *operand = &alpha_operands[*argidx];
1841 const expressionS *t;
1842
1843 if (operand->flags & AXP_OPERAND_FAKE)
1844 {
1845 /* fake operands take no value and generate no fixup */
1846 image = insert_operand(image, operand, 0, NULL, 0);
1847 continue;
1848 }
1849
1850 if (tokidx >= ntok)
1851 {
1852 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
1853 {
1854 case AXP_OPERAND_DEFAULT_FIRST:
1855 t = &tok[0];
1856 break;
1857 case AXP_OPERAND_DEFAULT_SECOND:
1858 t = &tok[1];
1859 break;
1860 case AXP_OPERAND_DEFAULT_ZERO:
1861 {
1862 static const expressionS zero_exp = { 0, 0, 0, O_constant, 1 };
1863 t = &zero_exp;
1864 }
1865 break;
1866 default:
1867 abort();
1868 }
1869 }
1870 else
1871 t = &tok[tokidx++];
1872
1873 switch (t->X_op)
1874 {
1875 case O_register:
1876 case O_pregister:
1877 case O_cpregister:
1878 image = insert_operand(image, operand, regno(t->X_add_number),
1879 NULL, 0);
1880 break;
1881
1882 case O_constant:
1883 image = insert_operand(image, operand, t->X_add_number, NULL, 0);
1884 break;
1885
1886 default:
1887 {
1888 struct alpha_fixup *fixup;
1889
1890 if (insn->nfixups >= MAX_INSN_FIXUPS)
1891 as_fatal(_("too many fixups"));
1892
1893 fixup = &insn->fixups[insn->nfixups++];
1894
1895 fixup->exp = *t;
1896 fixup->reloc = operand->default_reloc;
1897 }
1898 break;
1899 }
1900 }
1901
1902 insn->insn = image;
1903 }
1904
1905 /*
1906 * Actually output an instruction with its fixup.
1907 */
1908
1909 static void
1910 emit_insn (insn)
1911 struct alpha_insn *insn;
1912 {
1913 char *f;
1914 int i;
1915
1916 /* Take care of alignment duties */
1917 if (alpha_auto_align_on && alpha_current_align < 2)
1918 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
1919 if (alpha_current_align > 2)
1920 alpha_current_align = 2;
1921 alpha_insn_label = NULL;
1922
1923 /* Write out the instruction. */
1924 f = frag_more (4);
1925 md_number_to_chars (f, insn->insn, 4);
1926
1927 /* Apply the fixups in order */
1928 for (i = 0; i < insn->nfixups; ++i)
1929 {
1930 const struct alpha_operand *operand;
1931 struct alpha_fixup *fixup = &insn->fixups[i];
1932 int size, pcrel;
1933 fixS *fixP;
1934
1935 /* Some fixups are only used internally and so have no howto */
1936 if ((int)fixup->reloc < 0)
1937 {
1938 operand = &alpha_operands[-(int)fixup->reloc];
1939 size = 4;
1940 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
1941 }
1942 #ifdef OBJ_ELF
1943 /* These relocation types are only used internally. */
1944 else if (fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
1945 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
1946 {
1947 size = 2, pcrel = 0;
1948 }
1949 #endif
1950 else
1951 {
1952 reloc_howto_type *reloc_howto
1953 = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
1954 assert (reloc_howto);
1955
1956 size = bfd_get_reloc_size (reloc_howto);
1957 pcrel = reloc_howto->pc_relative;
1958 }
1959 assert (size >= 1 && size <= 4);
1960
1961 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
1962 &fixup->exp, pcrel, fixup->reloc);
1963
1964 /* Turn off complaints that the addend is too large for some fixups */
1965 switch (fixup->reloc)
1966 {
1967 case BFD_RELOC_ALPHA_GPDISP_LO16:
1968 #ifdef OBJ_ECOFF
1969 case BFD_RELOC_ALPHA_LITERAL:
1970 #endif
1971 #ifdef OBJ_ELF
1972 case BFD_RELOC_ALPHA_ELF_LITERAL:
1973 #endif
1974 case BFD_RELOC_GPREL32:
1975 fixP->fx_no_overflow = 1;
1976 break;
1977
1978 default:
1979 if ((int)fixup->reloc < 0)
1980 {
1981 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
1982 fixP->fx_no_overflow = 1;
1983 }
1984 break;
1985 }
1986 }
1987 }
1988
1989 /* Given an opcode name and a pre-tokenized set of arguments, assemble
1990 the insn, but do not emit it.
1991
1992 Note that this implies no macros allowed, since we can't store more
1993 than one insn in an insn structure. */
1994
1995 static void
1996 assemble_tokens_to_insn(opname, tok, ntok, insn)
1997 const char *opname;
1998 const expressionS *tok;
1999 int ntok;
2000 struct alpha_insn *insn;
2001 {
2002 const struct alpha_opcode *opcode;
2003
2004 /* search opcodes */
2005 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2006 if (opcode)
2007 {
2008 int cpumatch;
2009 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2010 if (opcode)
2011 {
2012 assemble_insn (opcode, tok, ntok, insn);
2013 return;
2014 }
2015 else if (cpumatch)
2016 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2017 else
2018 as_bad (_("opcode `%s' not supported for target %s"), opname,
2019 alpha_target_name);
2020 }
2021 else
2022 as_bad (_("unknown opcode `%s'"), opname);
2023 }
2024
2025 /* Given an opcode name and a pre-tokenized set of arguments, take the
2026 opcode all the way through emission. */
2027
2028 static void
2029 assemble_tokens (opname, tok, ntok, local_macros_on)
2030 const char *opname;
2031 const expressionS *tok;
2032 int ntok;
2033 int local_macros_on;
2034 {
2035 int found_something = 0;
2036 const struct alpha_opcode *opcode;
2037 const struct alpha_macro *macro;
2038 int cpumatch = 1;
2039
2040 /* search macros */
2041 if (local_macros_on)
2042 {
2043 macro = ((const struct alpha_macro *)
2044 hash_find (alpha_macro_hash, opname));
2045 if (macro)
2046 {
2047 found_something = 1;
2048 macro = find_macro_match (macro, tok, &ntok);
2049 if (macro)
2050 {
2051 (*macro->emit) (tok, ntok, macro->arg);
2052 return;
2053 }
2054 }
2055 }
2056
2057 /* search opcodes */
2058 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2059 if (opcode)
2060 {
2061 found_something = 1;
2062 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2063 if (opcode)
2064 {
2065 struct alpha_insn insn;
2066 assemble_insn (opcode, tok, ntok, &insn);
2067 emit_insn (&insn);
2068 return;
2069 }
2070 }
2071
2072 if (found_something)
2073 if (cpumatch)
2074 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2075 else
2076 as_bad (_("opcode `%s' not supported for target %s"), opname,
2077 alpha_target_name);
2078 else
2079 as_bad (_("unknown opcode `%s'"), opname);
2080 }
2081
2082 \f
2083 /* Some instruction sets indexed by lg(size) */
2084 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
2085 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
2086 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
2087 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
2088 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
2089 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
2090 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
2091 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
2092 static const char * const ldX_op[] = { "ldb", "ldw", "ldll", "ldq" };
2093 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
2094
2095 /* Implement the ldgp macro. */
2096
2097 static void
2098 emit_ldgp (tok, ntok, unused)
2099 const expressionS *tok;
2100 int ntok;
2101 const PTR unused;
2102 {
2103 #ifdef OBJ_AOUT
2104 FIXME
2105 #endif
2106 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2107 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2108 with appropriate constants and relocations. */
2109 struct alpha_insn insn;
2110 expressionS newtok[3];
2111 expressionS addend;
2112
2113 /* We're going to need this symbol in md_apply_fix(). */
2114 (void) section_symbol (absolute_section);
2115
2116 #ifdef OBJ_ECOFF
2117 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2118 ecoff_set_gp_prolog_size (0);
2119 #endif
2120
2121 newtok[0] = tok[0];
2122 set_tok_const (newtok[1], 0);
2123 newtok[2] = tok[2];
2124
2125 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2126
2127 addend = tok[1];
2128
2129 #ifdef OBJ_ECOFF
2130 if (addend.X_op != O_constant)
2131 as_bad (_("can not resolve expression"));
2132 addend.X_op = O_symbol;
2133 addend.X_add_symbol = alpha_gp_symbol;
2134 #endif
2135
2136 insn.nfixups = 1;
2137 insn.fixups[0].exp = addend;
2138 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2139
2140 emit_insn (&insn);
2141
2142 set_tok_preg (newtok[2], tok[0].X_add_number);
2143
2144 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2145
2146 #ifdef OBJ_ECOFF
2147 addend.X_add_number += 4;
2148 #endif
2149
2150 insn.nfixups = 1;
2151 insn.fixups[0].exp = addend;
2152 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2153
2154 emit_insn (&insn);
2155 #endif /* OBJ_ECOFF || OBJ_ELF */
2156 }
2157
2158 #ifdef OBJ_EVAX
2159
2160 /* Add symbol+addend to link pool.
2161 Return offset from basesym to entry in link pool.
2162
2163 Add new fixup only if offset isn't 16bit. */
2164
2165 valueT
2166 add_to_link_pool (basesym, sym, addend)
2167 symbolS *basesym;
2168 symbolS *sym;
2169 offsetT addend;
2170 {
2171 segT current_section = now_seg;
2172 int current_subsec = now_subseg;
2173 valueT offset;
2174 bfd_reloc_code_real_type reloc_type;
2175 char *p;
2176 segment_info_type *seginfo = seg_info (alpha_link_section);
2177 fixS *fixp;
2178
2179 offset = -basesym->sy_obj;
2180
2181 /* @@ This assumes all entries in a given section will be of the same
2182 size... Probably correct, but unwise to rely on. */
2183 /* This must always be called with the same subsegment. */
2184
2185 if (seginfo->frchainP)
2186 for (fixp = seginfo->frchainP->fix_root;
2187 fixp != (fixS *) NULL;
2188 fixp = fixp->fx_next, offset += 8)
2189 {
2190 if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
2191 {
2192 if (range_signed_16 (offset))
2193 {
2194 return offset;
2195 }
2196 }
2197 }
2198
2199 /* Not found in 16bit signed range. */
2200
2201 subseg_set (alpha_link_section, 0);
2202 p = frag_more (8);
2203 memset (p, 0, 8);
2204
2205 fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
2206 BFD_RELOC_64);
2207
2208 subseg_set (current_section, current_subsec);
2209 seginfo->literal_pool_size += 8;
2210 return offset;
2211 }
2212
2213 #endif /* OBJ_EVAX */
2214
2215 /* Load a (partial) expression into a target register.
2216
2217 If poffset is not null, after the call it will either contain
2218 O_constant 0, or a 16-bit offset appropriate for any MEM format
2219 instruction. In addition, pbasereg will be modified to point to
2220 the base register to use in that MEM format instruction.
2221
2222 In any case, *pbasereg should contain a base register to add to the
2223 expression. This will normally be either AXP_REG_ZERO or
2224 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2225 so "foo($0)" is interpreted as adding the address of foo to $0;
2226 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2227 but this is what OSF/1 does.
2228
2229 Finally, the return value is true if the calling macro may emit a
2230 LITUSE reloc if otherwise appropriate. */
2231
2232 static int
2233 load_expression (targreg, exp, pbasereg, poffset)
2234 int targreg;
2235 const expressionS *exp;
2236 int *pbasereg;
2237 expressionS *poffset;
2238 {
2239 int emit_lituse = 0;
2240 offsetT addend = exp->X_add_number;
2241 int basereg = *pbasereg;
2242 struct alpha_insn insn;
2243 expressionS newtok[3];
2244
2245 switch (exp->X_op)
2246 {
2247 case O_symbol:
2248 {
2249 #ifdef OBJ_ECOFF
2250 offsetT lit;
2251
2252 /* attempt to reduce .lit load by splitting the offset from
2253 its symbol when possible, but don't create a situation in
2254 which we'd fail. */
2255 if (!range_signed_32 (addend) &&
2256 (alpha_noat_on || targreg == AXP_REG_AT))
2257 {
2258 lit = add_to_literal_pool (exp->X_add_symbol, addend,
2259 alpha_lita_section, 8);
2260 addend = 0;
2261 }
2262 else
2263 {
2264 lit = add_to_literal_pool (exp->X_add_symbol, 0,
2265 alpha_lita_section, 8);
2266 }
2267
2268 if (lit >= 0x8000)
2269 as_fatal (_("overflow in literal (.lita) table"));
2270
2271 /* emit "ldq r, lit(gp)" */
2272
2273 if (basereg != alpha_gp_register && targreg == basereg)
2274 {
2275 if (alpha_noat_on)
2276 as_bad (_("macro requires $at register while noat in effect"));
2277 if (targreg == AXP_REG_AT)
2278 as_bad (_("macro requires $at while $at in use"));
2279
2280 set_tok_reg (newtok[0], AXP_REG_AT);
2281 }
2282 else
2283 set_tok_reg (newtok[0], targreg);
2284 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
2285 set_tok_preg (newtok[2], alpha_gp_register);
2286
2287 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2288
2289 assert (insn.nfixups == 1);
2290 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
2291 #endif /* OBJ_ECOFF */
2292 #ifdef OBJ_ELF
2293 /* emit "ldq r, gotoff(gp)" */
2294
2295 if (basereg != alpha_gp_register && targreg == basereg)
2296 {
2297 if (alpha_noat_on)
2298 as_bad (_("macro requires $at register while noat in effect"));
2299 if (targreg == AXP_REG_AT)
2300 as_bad (_("macro requires $at while $at in use"));
2301
2302 set_tok_reg (newtok[0], AXP_REG_AT);
2303 }
2304 else
2305 set_tok_reg (newtok[0], targreg);
2306
2307 /* XXX: Disable this .got minimizing optimization so that we can get
2308 better instruction offset knowledge in the compiler. This happens
2309 very infrequently anyway. */
2310 if (1 || (!range_signed_32 (addend)
2311 && (alpha_noat_on || targreg == AXP_REG_AT)))
2312 {
2313 newtok[1] = *exp;
2314 addend = 0;
2315 }
2316 else
2317 {
2318 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
2319 }
2320
2321 set_tok_preg (newtok[2], alpha_gp_register);
2322
2323 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2324
2325 assert (insn.nfixups == 1);
2326 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
2327 #endif /* OBJ_ELF */
2328 #ifdef OBJ_EVAX
2329 offsetT link;
2330
2331 /* Find symbol or symbol pointer in link section. */
2332
2333 if (exp->X_add_symbol == alpha_evax_proc.symbol)
2334 {
2335 if (range_signed_16 (addend))
2336 {
2337 set_tok_reg (newtok[0], targreg);
2338 set_tok_const (newtok[1], addend);
2339 set_tok_preg (newtok[2], basereg);
2340 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2341 addend = 0;
2342 }
2343 else
2344 {
2345 set_tok_reg (newtok[0], targreg);
2346 set_tok_const (newtok[1], 0);
2347 set_tok_preg (newtok[2], basereg);
2348 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2349 }
2350 }
2351 else
2352 {
2353 if (!range_signed_32 (addend))
2354 {
2355 link = add_to_link_pool (alpha_evax_proc.symbol,
2356 exp->X_add_symbol, addend);
2357 addend = 0;
2358 }
2359 else
2360 {
2361 link = add_to_link_pool (alpha_evax_proc.symbol,
2362 exp->X_add_symbol, 0);
2363 }
2364 set_tok_reg (newtok[0], targreg);
2365 set_tok_const (newtok[1], link);
2366 set_tok_preg (newtok[2], basereg);
2367 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2368 }
2369 #endif /* OBJ_EVAX */
2370
2371 emit_insn(&insn);
2372
2373 #ifndef OBJ_EVAX
2374 emit_lituse = 1;
2375
2376 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
2377 {
2378 /* emit "addq r, base, r" */
2379
2380 set_tok_reg (newtok[1], basereg);
2381 set_tok_reg (newtok[2], targreg);
2382 assemble_tokens ("addq", newtok, 3, 0);
2383 }
2384 #endif
2385
2386 basereg = targreg;
2387 }
2388 break;
2389
2390 case O_constant:
2391 break;
2392
2393 case O_subtract:
2394 /* Assume that this difference expression will be resolved to an
2395 absolute value and that that value will fit in 16 bits. */
2396
2397 set_tok_reg (newtok[0], targreg);
2398 newtok[1] = *exp;
2399 set_tok_preg (newtok[2], basereg);
2400 assemble_tokens ("lda", newtok, 3, 0);
2401
2402 if (poffset)
2403 set_tok_const (*poffset, 0);
2404 return 0;
2405
2406 case O_big:
2407 if (exp->X_add_number > 0)
2408 as_bad (_("bignum invalid; zero assumed"));
2409 else
2410 as_bad (_("floating point number invalid; zero assumed"));
2411 addend = 0;
2412 break;
2413
2414 default:
2415 as_bad (_("can't handle expression"));
2416 addend = 0;
2417 break;
2418 }
2419
2420 if (!range_signed_32 (addend))
2421 {
2422 offsetT lit;
2423
2424 /* for 64-bit addends, just put it in the literal pool */
2425
2426 #ifdef OBJ_EVAX
2427 /* emit "ldq targreg, lit(basereg)" */
2428 lit = add_to_link_pool (alpha_evax_proc.symbol,
2429 section_symbol (absolute_section), addend);
2430 set_tok_reg (newtok[0], targreg);
2431 set_tok_const (newtok[1], lit);
2432 set_tok_preg (newtok[2], alpha_gp_register);
2433 assemble_tokens ("ldq", newtok, 3, 0);
2434 #else
2435
2436 if (alpha_lit8_section == NULL)
2437 {
2438 create_literal_section (".lit8",
2439 &alpha_lit8_section,
2440 &alpha_lit8_symbol);
2441
2442 #ifdef OBJ_ECOFF
2443 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
2444 alpha_lita_section, 8);
2445 if (alpha_lit8_literal >= 0x8000)
2446 as_fatal (_("overflow in literal (.lita) table"));
2447 #endif
2448 }
2449
2450 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
2451 if (lit >= 0x8000)
2452 as_fatal (_("overflow in literal (.lit8) table"));
2453
2454 /* emit "lda litreg, .lit8+0x8000" */
2455
2456 if (targreg == basereg)
2457 {
2458 if (alpha_noat_on)
2459 as_bad (_("macro requires $at register while noat in effect"));
2460 if (targreg == AXP_REG_AT)
2461 as_bad (_("macro requires $at while $at in use"));
2462
2463 set_tok_reg (newtok[0], AXP_REG_AT);
2464 }
2465 else
2466 set_tok_reg (newtok[0], targreg);
2467 #ifdef OBJ_ECOFF
2468 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
2469 #endif
2470 #ifdef OBJ_ELF
2471 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
2472 #endif
2473 set_tok_preg (newtok[2], alpha_gp_register);
2474
2475 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2476
2477 assert (insn.nfixups == 1);
2478 #ifdef OBJ_ECOFF
2479 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
2480 #endif
2481 #ifdef OBJ_ELF
2482 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
2483 #endif
2484
2485 emit_insn (&insn);
2486
2487 /* emit "ldq litreg, lit(litreg)" */
2488
2489 set_tok_const (newtok[1], lit);
2490 set_tok_preg (newtok[2], newtok[0].X_add_number);
2491
2492 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2493
2494 assert (insn.nfixups < MAX_INSN_FIXUPS);
2495 if (insn.nfixups > 0)
2496 {
2497 memmove (&insn.fixups[1], &insn.fixups[0],
2498 sizeof(struct alpha_fixup) * insn.nfixups);
2499 }
2500 insn.nfixups++;
2501 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
2502 insn.fixups[0].exp.X_op = O_constant;
2503 insn.fixups[0].exp.X_add_number = 1;
2504 emit_lituse = 0;
2505
2506 emit_insn (&insn);
2507
2508 /* emit "addq litreg, base, target" */
2509
2510 if (basereg != AXP_REG_ZERO)
2511 {
2512 set_tok_reg (newtok[1], basereg);
2513 set_tok_reg (newtok[2], targreg);
2514 assemble_tokens ("addq", newtok, 3, 0);
2515 }
2516 #endif /* !OBJ_EVAX */
2517
2518 if (poffset)
2519 set_tok_const (*poffset, 0);
2520 *pbasereg = targreg;
2521 }
2522 else
2523 {
2524 offsetT low, high, extra, tmp;
2525
2526 /* for 32-bit operands, break up the addend */
2527
2528 low = sign_extend_16 (addend);
2529 tmp = addend - low;
2530 high = sign_extend_16 (tmp >> 16);
2531
2532 if (tmp - (high << 16))
2533 {
2534 extra = 0x4000;
2535 tmp -= 0x40000000;
2536 high = sign_extend_16 (tmp >> 16);
2537 }
2538 else
2539 extra = 0;
2540
2541 set_tok_reg (newtok[0], targreg);
2542 set_tok_preg (newtok[2], basereg);
2543
2544 if (extra)
2545 {
2546 /* emit "ldah r, extra(r) */
2547 set_tok_const (newtok[1], extra);
2548 assemble_tokens ("ldah", newtok, 3, 0);
2549 set_tok_preg (newtok[2], basereg = targreg);
2550 }
2551
2552 if (high)
2553 {
2554 /* emit "ldah r, high(r) */
2555 set_tok_const (newtok[1], high);
2556 assemble_tokens ("ldah", newtok, 3, 0);
2557 basereg = targreg;
2558 set_tok_preg (newtok[2], basereg);
2559 }
2560
2561 if ((low && !poffset) || (!poffset && basereg != targreg))
2562 {
2563 /* emit "lda r, low(base)" */
2564 set_tok_const (newtok[1], low);
2565 assemble_tokens ("lda", newtok, 3, 0);
2566 basereg = targreg;
2567 low = 0;
2568 }
2569
2570 if (poffset)
2571 set_tok_const (*poffset, low);
2572 *pbasereg = basereg;
2573 }
2574
2575 return emit_lituse;
2576 }
2577
2578 /* The lda macro differs from the lda instruction in that it handles
2579 most simple expressions, particualrly symbol address loads and
2580 large constants. */
2581
2582 static void
2583 emit_lda (tok, ntok, unused)
2584 const expressionS *tok;
2585 int ntok;
2586 const PTR unused;
2587 {
2588 int basereg;
2589
2590 if (ntok == 2)
2591 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2592 else
2593 basereg = tok[2].X_add_number;
2594
2595 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
2596 }
2597
2598 /* The ldah macro differs from the ldah instruction in that it has $31
2599 as an implied base register. */
2600
2601 static void
2602 emit_ldah (tok, ntok, unused)
2603 const expressionS *tok;
2604 int ntok;
2605 const PTR unused;
2606 {
2607 expressionS newtok[3];
2608
2609 newtok[0] = tok[0];
2610 newtok[1] = tok[1];
2611 set_tok_preg (newtok[2], AXP_REG_ZERO);
2612
2613 assemble_tokens ("ldah", newtok, 3, 0);
2614 }
2615
2616 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
2617 etc. They differ from the real instructions in that they do simple
2618 expressions like the lda macro. */
2619
2620 static void
2621 emit_ir_load (tok, ntok, opname)
2622 const expressionS *tok;
2623 int ntok;
2624 const PTR opname;
2625 {
2626 int basereg, lituse;
2627 expressionS newtok[3];
2628 struct alpha_insn insn;
2629
2630 if (ntok == 2)
2631 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2632 else
2633 basereg = tok[2].X_add_number;
2634
2635 lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
2636 &newtok[1]);
2637
2638 newtok[0] = tok[0];
2639 set_tok_preg (newtok[2], basereg);
2640
2641 assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
2642
2643 if (lituse)
2644 {
2645 assert (insn.nfixups < MAX_INSN_FIXUPS);
2646 if (insn.nfixups > 0)
2647 {
2648 memmove (&insn.fixups[1], &insn.fixups[0],
2649 sizeof(struct alpha_fixup) * insn.nfixups);
2650 }
2651 insn.nfixups++;
2652 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
2653 insn.fixups[0].exp.X_op = O_constant;
2654 insn.fixups[0].exp.X_add_number = 1;
2655 }
2656
2657 emit_insn (&insn);
2658 }
2659
2660 /* Handle fp register loads, and both integer and fp register stores.
2661 Again, we handle simple expressions. */
2662
2663 static void
2664 emit_loadstore (tok, ntok, opname)
2665 const expressionS *tok;
2666 int ntok;
2667 const PTR opname;
2668 {
2669 int basereg, lituse;
2670 expressionS newtok[3];
2671 struct alpha_insn insn;
2672
2673 if (ntok == 2)
2674 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
2675 else
2676 basereg = tok[2].X_add_number;
2677
2678 if (tok[1].X_op != O_constant || !range_signed_16(tok[1].X_add_number))
2679 {
2680 if (alpha_noat_on)
2681 as_bad (_("macro requires $at register while noat in effect"));
2682
2683 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
2684 }
2685 else
2686 {
2687 newtok[1] = tok[1];
2688 lituse = 0;
2689 }
2690
2691 newtok[0] = tok[0];
2692 set_tok_preg (newtok[2], basereg);
2693
2694 assemble_tokens_to_insn ((const char *)opname, newtok, 3, &insn);
2695
2696 if (lituse)
2697 {
2698 assert (insn.nfixups < MAX_INSN_FIXUPS);
2699 if (insn.nfixups > 0)
2700 {
2701 memmove (&insn.fixups[1], &insn.fixups[0],
2702 sizeof(struct alpha_fixup) * insn.nfixups);
2703 }
2704 insn.nfixups++;
2705 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
2706 insn.fixups[0].exp.X_op = O_constant;
2707 insn.fixups[0].exp.X_add_number = 1;
2708 }
2709
2710 emit_insn (&insn);
2711 }
2712
2713 /* Load a half-word or byte as an unsigned value. */
2714
2715 static void
2716 emit_ldXu (tok, ntok, vlgsize)
2717 const expressionS *tok;
2718 int ntok;
2719 const PTR vlgsize;
2720 {
2721 if (alpha_target & AXP_OPCODE_BWX)
2722 emit_ir_load (tok, ntok, ldXu_op[(long)vlgsize]);
2723 else
2724 {
2725 expressionS newtok[3];
2726
2727 if (alpha_noat_on)
2728 as_bad (_("macro requires $at register while noat in effect"));
2729
2730 /* emit "lda $at, exp" */
2731
2732 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2733 newtok[0].X_add_number = AXP_REG_AT;
2734 assemble_tokens ("lda", newtok, ntok, 1);
2735
2736 /* emit "ldq_u targ, 0($at)" */
2737
2738 newtok[0] = tok[0];
2739 set_tok_const (newtok[1], 0);
2740 set_tok_preg (newtok[2], AXP_REG_AT);
2741 assemble_tokens ("ldq_u", newtok, 3, 1);
2742
2743 /* emit "extXl targ, $at, targ" */
2744
2745 set_tok_reg (newtok[1], AXP_REG_AT);
2746 newtok[2] = newtok[0];
2747 assemble_tokens (extXl_op[(long)vlgsize], newtok, 3, 1);
2748 }
2749 }
2750
2751 /* Load a half-word or byte as a signed value. */
2752
2753 static void
2754 emit_ldX (tok, ntok, vlgsize)
2755 const expressionS *tok;
2756 int ntok;
2757 const PTR vlgsize;
2758 {
2759 emit_ldXu (tok, ntok, vlgsize);
2760 assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
2761 }
2762
2763 /* Load an integral value from an unaligned address as an unsigned
2764 value. */
2765
2766 static void
2767 emit_uldXu (tok, ntok, vlgsize)
2768 const expressionS *tok;
2769 int ntok;
2770 const PTR vlgsize;
2771 {
2772 long lgsize = (long)vlgsize;
2773 expressionS newtok[3];
2774
2775 if (alpha_noat_on)
2776 as_bad (_("macro requires $at register while noat in effect"));
2777
2778 /* emit "lda $at, exp" */
2779
2780 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2781 newtok[0].X_add_number = AXP_REG_AT;
2782 assemble_tokens ("lda", newtok, ntok, 1);
2783
2784 /* emit "ldq_u $t9, 0($at)" */
2785
2786 set_tok_reg (newtok[0], AXP_REG_T9);
2787 set_tok_const (newtok[1], 0);
2788 set_tok_preg (newtok[2], AXP_REG_AT);
2789 assemble_tokens ("ldq_u", newtok, 3, 1);
2790
2791 /* emit "ldq_u $t10, size-1($at)" */
2792
2793 set_tok_reg (newtok[0], AXP_REG_T10);
2794 set_tok_const (newtok[1], (1<<lgsize)-1);
2795 assemble_tokens ("ldq_u", newtok, 3, 1);
2796
2797 /* emit "extXl $t9, $at, $t9" */
2798
2799 set_tok_reg (newtok[0], AXP_REG_T9);
2800 set_tok_reg (newtok[1], AXP_REG_AT);
2801 set_tok_reg (newtok[2], AXP_REG_T9);
2802 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
2803
2804 /* emit "extXh $t10, $at, $t10" */
2805
2806 set_tok_reg (newtok[0], AXP_REG_T10);
2807 set_tok_reg (newtok[2], AXP_REG_T10);
2808 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
2809
2810 /* emit "or $t9, $t10, targ" */
2811
2812 set_tok_reg (newtok[0], AXP_REG_T9);
2813 set_tok_reg (newtok[1], AXP_REG_T10);
2814 newtok[2] = tok[0];
2815 assemble_tokens ("or", newtok, 3, 1);
2816 }
2817
2818 /* Load an integral value from an unaligned address as a signed value.
2819 Note that quads should get funneled to the unsigned load since we
2820 don't have to do the sign extension. */
2821
2822 static void
2823 emit_uldX (tok, ntok, vlgsize)
2824 const expressionS *tok;
2825 int ntok;
2826 const PTR vlgsize;
2827 {
2828 emit_uldXu (tok, ntok, vlgsize);
2829 assemble_tokens (sextX_op[(long)vlgsize], tok, 1, 1);
2830 }
2831
2832 /* Implement the ldil macro. */
2833
2834 static void
2835 emit_ldil (tok, ntok, unused)
2836 const expressionS *tok;
2837 int ntok;
2838 const PTR unused;
2839 {
2840 expressionS newtok[2];
2841
2842 memcpy (newtok, tok, sizeof(newtok));
2843 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
2844
2845 assemble_tokens ("lda", newtok, ntok, 1);
2846 }
2847
2848 /* Store a half-word or byte. */
2849
2850 static void
2851 emit_stX (tok, ntok, vlgsize)
2852 const expressionS *tok;
2853 int ntok;
2854 const PTR vlgsize;
2855 {
2856 int lgsize = (int)(long)vlgsize;
2857
2858 if (alpha_target & AXP_OPCODE_BWX)
2859 emit_loadstore (tok, ntok, stX_op[lgsize]);
2860 else
2861 {
2862 expressionS newtok[3];
2863
2864 if (alpha_noat_on)
2865 as_bad(_("macro requires $at register while noat in effect"));
2866
2867 /* emit "lda $at, exp" */
2868
2869 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2870 newtok[0].X_add_number = AXP_REG_AT;
2871 assemble_tokens ("lda", newtok, ntok, 1);
2872
2873 /* emit "ldq_u $t9, 0($at)" */
2874
2875 set_tok_reg (newtok[0], AXP_REG_T9);
2876 set_tok_const (newtok[1], 0);
2877 set_tok_preg (newtok[2], AXP_REG_AT);
2878 assemble_tokens ("ldq_u", newtok, 3, 1);
2879
2880 /* emit "insXl src, $at, $t10" */
2881
2882 newtok[0] = tok[0];
2883 set_tok_reg (newtok[1], AXP_REG_AT);
2884 set_tok_reg (newtok[2], AXP_REG_T10);
2885 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
2886
2887 /* emit "mskXl $t9, $at, $t9" */
2888
2889 set_tok_reg (newtok[0], AXP_REG_T9);
2890 newtok[2] = newtok[0];
2891 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
2892
2893 /* emit "or $t9, $t10, $t9" */
2894
2895 set_tok_reg (newtok[1], AXP_REG_T10);
2896 assemble_tokens ("or", newtok, 3, 1);
2897
2898 /* emit "stq_u $t9, 0($at) */
2899
2900 set_tok_const (newtok[1], 0);
2901 set_tok_preg (newtok[2], AXP_REG_AT);
2902 assemble_tokens ("stq_u", newtok, 3, 1);
2903 }
2904 }
2905
2906 /* Store an integer to an unaligned address. */
2907
2908 static void
2909 emit_ustX (tok, ntok, vlgsize)
2910 const expressionS *tok;
2911 int ntok;
2912 const PTR vlgsize;
2913 {
2914 int lgsize = (int)(long)vlgsize;
2915 expressionS newtok[3];
2916
2917 /* emit "lda $at, exp" */
2918
2919 memcpy (newtok, tok, sizeof (expressionS) * ntok);
2920 newtok[0].X_add_number = AXP_REG_AT;
2921 assemble_tokens ("lda", newtok, ntok, 1);
2922
2923 /* emit "ldq_u $9, 0($at)" */
2924
2925 set_tok_reg (newtok[0], AXP_REG_T9);
2926 set_tok_const (newtok[1], 0);
2927 set_tok_preg (newtok[2], AXP_REG_AT);
2928 assemble_tokens ("ldq_u", newtok, 3, 1);
2929
2930 /* emit "ldq_u $10, size-1($at)" */
2931
2932 set_tok_reg (newtok[0], AXP_REG_T10);
2933 set_tok_const (newtok[1], (1 << lgsize)-1);
2934 assemble_tokens ("ldq_u", newtok, 3, 1);
2935
2936 /* emit "insXl src, $at, $t11" */
2937
2938 newtok[0] = tok[0];
2939 set_tok_reg (newtok[1], AXP_REG_AT);
2940 set_tok_reg (newtok[2], AXP_REG_T11);
2941 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
2942
2943 /* emit "insXh src, $at, $t12" */
2944
2945 set_tok_reg (newtok[2], AXP_REG_T12);
2946 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
2947
2948 /* emit "mskXl $t9, $at, $t9" */
2949
2950 set_tok_reg (newtok[0], AXP_REG_T9);
2951 newtok[2] = newtok[0];
2952 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
2953
2954 /* emit "mskXh $t10, $at, $t10" */
2955
2956 set_tok_reg (newtok[0], AXP_REG_T10);
2957 newtok[2] = newtok[0];
2958 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
2959
2960 /* emit "or $t9, $t11, $t9" */
2961
2962 set_tok_reg (newtok[0], AXP_REG_T9);
2963 set_tok_reg (newtok[1], AXP_REG_T11);
2964 newtok[2] = newtok[0];
2965 assemble_tokens ("or", newtok, 3, 1);
2966
2967 /* emit "or $t10, $t12, $t10" */
2968
2969 set_tok_reg (newtok[0], AXP_REG_T10);
2970 set_tok_reg (newtok[1], AXP_REG_T12);
2971 newtok[2] = newtok[0];
2972 assemble_tokens ("or", newtok, 3, 1);
2973
2974 /* emit "stq_u $t9, 0($at)" */
2975
2976 set_tok_reg (newtok[0], AXP_REG_T9);
2977 set_tok_const (newtok[1], 0);
2978 set_tok_preg (newtok[2], AXP_REG_AT);
2979 assemble_tokens ("stq_u", newtok, 3, 1);
2980
2981 /* emit "stq_u $t10, size-1($at)" */
2982
2983 set_tok_reg (newtok[0], AXP_REG_T10);
2984 set_tok_const (newtok[1], (1 << lgsize)-1);
2985 assemble_tokens ("stq_u", newtok, 3, 1);
2986 }
2987
2988 /* Sign extend a half-word or byte. The 32-bit sign extend is
2989 implemented as "addl $31, $r, $t" in the opcode table. */
2990
2991 static void
2992 emit_sextX (tok, ntok, vlgsize)
2993 const expressionS *tok;
2994 int ntok;
2995 const PTR vlgsize;
2996 {
2997 long lgsize = (long)vlgsize;
2998
2999 if (alpha_target & AXP_OPCODE_BWX)
3000 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
3001 else
3002 {
3003 int bitshift = 64 - 8 * (1 << lgsize);
3004 expressionS newtok[3];
3005
3006 /* emit "sll src,bits,dst" */
3007
3008 newtok[0] = tok[0];
3009 set_tok_const (newtok[1], bitshift);
3010 newtok[2] = tok[ntok - 1];
3011 assemble_tokens ("sll", newtok, 3, 1);
3012
3013 /* emit "sra dst,bits,dst" */
3014
3015 newtok[0] = newtok[2];
3016 assemble_tokens ("sra", newtok, 3, 1);
3017 }
3018 }
3019
3020 /* Implement the division and modulus macros. */
3021
3022 #ifdef OBJ_EVAX
3023
3024 /* Make register usage like in normal procedure call.
3025 Don't clobber PV and RA. */
3026
3027 static void
3028 emit_division (tok, ntok, symname)
3029 const expressionS *tok;
3030 int ntok;
3031 const PTR symname;
3032 {
3033 /* DIVISION and MODULUS. Yech.
3034 *
3035 * Convert
3036 * OP x,y,result
3037 * to
3038 * mov x,R16 # if x != R16
3039 * mov y,R17 # if y != R17
3040 * lda AT,__OP
3041 * jsr AT,(AT),0
3042 * mov R0,result
3043 *
3044 * with appropriate optimizations if R0,R16,R17 are the registers
3045 * specified by the compiler.
3046 */
3047
3048 int xr, yr, rr;
3049 symbolS *sym;
3050 expressionS newtok[3];
3051
3052 xr = regno (tok[0].X_add_number);
3053 yr = regno (tok[1].X_add_number);
3054
3055 if (ntok < 3)
3056 rr = xr;
3057 else
3058 rr = regno (tok[2].X_add_number);
3059
3060 /* Move the operands into the right place */
3061 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
3062 {
3063 /* They are in exactly the wrong order -- swap through AT */
3064
3065 if (alpha_noat_on)
3066 as_bad (_("macro requires $at register while noat in effect"));
3067
3068 set_tok_reg (newtok[0], AXP_REG_R16);
3069 set_tok_reg (newtok[1], AXP_REG_AT);
3070 assemble_tokens ("mov", newtok, 2, 1);
3071
3072 set_tok_reg (newtok[0], AXP_REG_R17);
3073 set_tok_reg (newtok[1], AXP_REG_R16);
3074 assemble_tokens ("mov", newtok, 2, 1);
3075
3076 set_tok_reg (newtok[0], AXP_REG_AT);
3077 set_tok_reg (newtok[1], AXP_REG_R17);
3078 assemble_tokens ("mov", newtok, 2, 1);
3079 }
3080 else
3081 {
3082 if (yr == AXP_REG_R16)
3083 {
3084 set_tok_reg (newtok[0], AXP_REG_R16);
3085 set_tok_reg (newtok[1], AXP_REG_R17);
3086 assemble_tokens ("mov", newtok, 2, 1);
3087 }
3088
3089 if (xr != AXP_REG_R16)
3090 {
3091 set_tok_reg (newtok[0], xr);
3092 set_tok_reg (newtok[1], AXP_REG_R16);
3093 assemble_tokens ("mov", newtok, 2, 1);
3094 }
3095
3096 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
3097 {
3098 set_tok_reg (newtok[0], yr);
3099 set_tok_reg (newtok[1], AXP_REG_R17);
3100 assemble_tokens ("mov", newtok, 2, 1);
3101 }
3102 }
3103
3104 sym = symbol_find_or_make ((const char *)symname);
3105
3106 set_tok_reg (newtok[0], AXP_REG_AT);
3107 set_tok_sym (newtok[1], sym, 0);
3108 assemble_tokens ("lda", newtok, 2, 1);
3109
3110 /* Call the division routine */
3111 set_tok_reg (newtok[0], AXP_REG_AT);
3112 set_tok_cpreg (newtok[1], AXP_REG_AT);
3113 set_tok_const (newtok[2], 0);
3114 assemble_tokens ("jsr", newtok, 3, 1);
3115
3116 /* Move the result to the right place */
3117 if (rr != AXP_REG_R0)
3118 {
3119 set_tok_reg (newtok[0], AXP_REG_R0);
3120 set_tok_reg (newtok[1], rr);
3121 assemble_tokens ("mov", newtok, 2, 1);
3122 }
3123 }
3124
3125 #else /* !OBJ_EVAX */
3126
3127 static void
3128 emit_division (tok, ntok, symname)
3129 const expressionS *tok;
3130 int ntok;
3131 const PTR symname;
3132 {
3133 /* DIVISION and MODULUS. Yech.
3134 * Convert
3135 * OP x,y,result
3136 * to
3137 * lda pv,__OP
3138 * mov x,t10
3139 * mov y,t11
3140 * jsr t9,(pv),__OP
3141 * mov t12,result
3142 *
3143 * with appropriate optimizations if t10,t11,t12 are the registers
3144 * specified by the compiler.
3145 */
3146
3147 int xr, yr, rr;
3148 symbolS *sym;
3149 expressionS newtok[3];
3150
3151 xr = regno (tok[0].X_add_number);
3152 yr = regno (tok[1].X_add_number);
3153
3154 if (ntok < 3)
3155 rr = xr;
3156 else
3157 rr = regno (tok[2].X_add_number);
3158
3159 sym = symbol_find_or_make ((const char *)symname);
3160
3161 /* Move the operands into the right place */
3162 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
3163 {
3164 /* They are in exactly the wrong order -- swap through AT */
3165
3166 if (alpha_noat_on)
3167 as_bad (_("macro requires $at register while noat in effect"));
3168
3169 set_tok_reg (newtok[0], AXP_REG_T10);
3170 set_tok_reg (newtok[1], AXP_REG_AT);
3171 assemble_tokens ("mov", newtok, 2, 1);
3172
3173 set_tok_reg (newtok[0], AXP_REG_T11);
3174 set_tok_reg (newtok[1], AXP_REG_T10);
3175 assemble_tokens ("mov", newtok, 2, 1);
3176
3177 set_tok_reg (newtok[0], AXP_REG_AT);
3178 set_tok_reg (newtok[1], AXP_REG_T11);
3179 assemble_tokens ("mov", newtok, 2, 1);
3180 }
3181 else
3182 {
3183 if (yr == AXP_REG_T10)
3184 {
3185 set_tok_reg (newtok[0], AXP_REG_T10);
3186 set_tok_reg (newtok[1], AXP_REG_T11);
3187 assemble_tokens ("mov", newtok, 2, 1);
3188 }
3189
3190 if (xr != AXP_REG_T10)
3191 {
3192 set_tok_reg (newtok[0], xr);
3193 set_tok_reg (newtok[1], AXP_REG_T10);
3194 assemble_tokens ("mov", newtok, 2, 1);
3195 }
3196
3197 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
3198 {
3199 set_tok_reg (newtok[0], yr);
3200 set_tok_reg (newtok[1], AXP_REG_T11);
3201 assemble_tokens ("mov", newtok, 2, 1);
3202 }
3203 }
3204
3205 /* Call the division routine */
3206 set_tok_reg (newtok[0], AXP_REG_T9);
3207 set_tok_sym (newtok[1], sym, 0);
3208 assemble_tokens ("jsr", newtok, 2, 1);
3209
3210 /* Reload the GP register */
3211 #ifdef OBJ_AOUT
3212 FIXME
3213 #endif
3214 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3215 set_tok_reg (newtok[0], alpha_gp_register);
3216 set_tok_const (newtok[1], 0);
3217 set_tok_preg (newtok[2], AXP_REG_T9);
3218 assemble_tokens ("ldgp", newtok, 3, 1);
3219 #endif
3220
3221 /* Move the result to the right place */
3222 if (rr != AXP_REG_T12)
3223 {
3224 set_tok_reg (newtok[0], AXP_REG_T12);
3225 set_tok_reg (newtok[1], rr);
3226 assemble_tokens ("mov", newtok, 2, 1);
3227 }
3228 }
3229
3230 #endif /* !OBJ_EVAX */
3231
3232 /* The jsr and jmp macros differ from their instruction counterparts
3233 in that they can load the target address and default most
3234 everything. */
3235
3236 static void
3237 emit_jsrjmp (tok, ntok, vopname)
3238 const expressionS *tok;
3239 int ntok;
3240 const PTR vopname;
3241 {
3242 const char *opname = (const char *) vopname;
3243 struct alpha_insn insn;
3244 expressionS newtok[3];
3245 int r, tokidx = 0, lituse = 0;
3246
3247 if (tokidx < ntok && tok[tokidx].X_op == O_register)
3248 r = regno (tok[tokidx++].X_add_number);
3249 else
3250 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
3251
3252 set_tok_reg (newtok[0], r);
3253
3254 if (tokidx < ntok &&
3255 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
3256 r = regno (tok[tokidx++].X_add_number);
3257 #ifdef OBJ_EVAX
3258 /* keep register if jsr $n.<sym> */
3259 #else
3260 else
3261 {
3262 int basereg = alpha_gp_register;
3263 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
3264 }
3265 #endif
3266
3267 set_tok_cpreg (newtok[1], r);
3268
3269 #ifdef OBJ_EVAX
3270 /* FIXME: Add hint relocs to BFD for evax. */
3271 #else
3272 if (tokidx < ntok)
3273 newtok[2] = tok[tokidx];
3274 else
3275 #endif
3276 set_tok_const (newtok[2], 0);
3277
3278 assemble_tokens_to_insn (opname, newtok, 3, &insn);
3279
3280 /* add the LITUSE fixup */
3281 if (lituse)
3282 {
3283 assert (insn.nfixups < MAX_INSN_FIXUPS);
3284 if (insn.nfixups > 0)
3285 {
3286 memmove (&insn.fixups[1], &insn.fixups[0],
3287 sizeof(struct alpha_fixup) * insn.nfixups);
3288 }
3289 insn.nfixups++;
3290 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITUSE;
3291 insn.fixups[0].exp.X_op = O_constant;
3292 insn.fixups[0].exp.X_add_number = 3;
3293 }
3294
3295 emit_insn (&insn);
3296 }
3297
3298 /* The ret and jcr instructions differ from their instruction
3299 counterparts in that everything can be defaulted. */
3300
3301 static void
3302 emit_retjcr (tok, ntok, vopname)
3303 const expressionS *tok;
3304 int ntok;
3305 const PTR vopname;
3306 {
3307 const char *opname = (const char *)vopname;
3308 expressionS newtok[3];
3309 int r, tokidx = 0;
3310
3311 if (tokidx < ntok && tok[tokidx].X_op == O_register)
3312 r = regno (tok[tokidx++].X_add_number);
3313 else
3314 r = AXP_REG_ZERO;
3315
3316 set_tok_reg (newtok[0], r);
3317
3318 if (tokidx < ntok &&
3319 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
3320 r = regno (tok[tokidx++].X_add_number);
3321 else
3322 r = AXP_REG_RA;
3323
3324 set_tok_cpreg (newtok[1], r);
3325
3326 if (tokidx < ntok)
3327 newtok[2] = tok[tokidx];
3328 else
3329 set_tok_const (newtok[2], strcmp(opname, "ret") == 0);
3330
3331 assemble_tokens (opname, newtok, 3, 0);
3332 }
3333 \f
3334 /* Assembler directives */
3335
3336 /* Handle the .text pseudo-op. This is like the usual one, but it
3337 clears alpha_insn_label and restores auto alignment. */
3338
3339 static void
3340 s_alpha_text (i)
3341 int i;
3342
3343 {
3344 s_text (i);
3345 alpha_insn_label = NULL;
3346 alpha_auto_align_on = 1;
3347 alpha_current_align = 0;
3348 }
3349
3350 /* Handle the .data pseudo-op. This is like the usual one, but it
3351 clears alpha_insn_label and restores auto alignment. */
3352
3353 static void
3354 s_alpha_data (i)
3355 int i;
3356 {
3357 s_data (i);
3358 alpha_insn_label = NULL;
3359 alpha_auto_align_on = 1;
3360 alpha_current_align = 0;
3361 }
3362
3363 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
3364
3365 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
3366 openVMS constructs a section for every common symbol. */
3367
3368 static void
3369 s_alpha_comm (ignore)
3370 int ignore;
3371 {
3372 register char *name;
3373 register char c;
3374 register char *p;
3375 offsetT temp;
3376 register symbolS *symbolP;
3377
3378 #ifdef OBJ_EVAX
3379 segT current_section = now_seg;
3380 int current_subsec = now_subseg;
3381 segT new_seg;
3382 #endif
3383
3384 name = input_line_pointer;
3385 c = get_symbol_end ();
3386
3387 /* just after name is now '\0' */
3388 p = input_line_pointer;
3389 *p = c;
3390
3391 SKIP_WHITESPACE ();
3392
3393 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
3394 if (*input_line_pointer == ',')
3395 {
3396 input_line_pointer++;
3397 SKIP_WHITESPACE ();
3398 }
3399 if ((temp = get_absolute_expression ()) < 0)
3400 {
3401 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
3402 ignore_rest_of_line ();
3403 return;
3404 }
3405
3406 *p = 0;
3407 symbolP = symbol_find_or_make (name);
3408
3409 #ifdef OBJ_EVAX
3410 /* Make a section for the common symbol. */
3411 new_seg = subseg_new (xstrdup (name), 0);
3412 #endif
3413
3414 *p = c;
3415
3416 #ifdef OBJ_EVAX
3417 /* alignment might follow */
3418 if (*input_line_pointer == ',')
3419 {
3420 offsetT align;
3421
3422 input_line_pointer++;
3423 align = get_absolute_expression ();
3424 bfd_set_section_alignment (stdoutput, new_seg, align);
3425 }
3426 #endif
3427
3428 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
3429 {
3430 as_bad (_("Ignoring attempt to re-define symbol"));
3431 ignore_rest_of_line ();
3432 return;
3433 }
3434
3435 #ifdef OBJ_EVAX
3436 if (bfd_section_size (stdoutput, new_seg) > 0)
3437 {
3438 if (bfd_section_size (stdoutput, new_seg) != temp)
3439 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3440 S_GET_NAME (symbolP),
3441 (long) bfd_section_size (stdoutput, new_seg),
3442 (long) temp);
3443 }
3444 #else
3445 if (S_GET_VALUE (symbolP))
3446 {
3447 if (S_GET_VALUE (symbolP) != (valueT) temp)
3448 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
3449 S_GET_NAME (symbolP),
3450 (long) S_GET_VALUE (symbolP),
3451 (long) temp);
3452 }
3453 #endif
3454 else
3455 {
3456 #ifdef OBJ_EVAX
3457 subseg_set (new_seg, 0);
3458 p = frag_more (temp);
3459 new_seg->flags |= SEC_IS_COMMON;
3460 if (! S_IS_DEFINED (symbolP))
3461 symbolP->bsym->section = new_seg;
3462 #else
3463 S_SET_VALUE (symbolP, (valueT) temp);
3464 #endif
3465 S_SET_EXTERNAL (symbolP);
3466 }
3467
3468 #ifdef OBJ_EVAX
3469 subseg_set (current_section, current_subsec);
3470 #endif
3471
3472 know (symbolP->sy_frag == &zero_address_frag);
3473
3474 demand_empty_rest_of_line ();
3475 }
3476
3477 #endif /* ! OBJ_ELF */
3478
3479 #ifdef OBJ_ECOFF
3480
3481 /* Handle the .rdata pseudo-op. This is like the usual one, but it
3482 clears alpha_insn_label and restores auto alignment. */
3483
3484 static void
3485 s_alpha_rdata (ignore)
3486 int ignore;
3487 {
3488 int temp;
3489
3490 temp = get_absolute_expression ();
3491 subseg_new (".rdata", 0);
3492 demand_empty_rest_of_line ();
3493 alpha_insn_label = NULL;
3494 alpha_auto_align_on = 1;
3495 alpha_current_align = 0;
3496 }
3497
3498 #endif
3499
3500 #ifdef OBJ_ECOFF
3501
3502 /* Handle the .sdata pseudo-op. This is like the usual one, but it
3503 clears alpha_insn_label and restores auto alignment. */
3504
3505 static void
3506 s_alpha_sdata (ignore)
3507 int ignore;
3508 {
3509 int temp;
3510
3511 temp = get_absolute_expression ();
3512 subseg_new (".sdata", 0);
3513 demand_empty_rest_of_line ();
3514 alpha_insn_label = NULL;
3515 alpha_auto_align_on = 1;
3516 alpha_current_align = 0;
3517 }
3518 #endif
3519
3520 #ifdef OBJ_ELF
3521
3522 /* Handle the .section pseudo-op. This is like the usual one, but it
3523 clears alpha_insn_label and restores auto alignment. */
3524
3525 static void
3526 s_alpha_section (ignore)
3527 int ignore;
3528 {
3529 obj_elf_section (ignore);
3530
3531 alpha_insn_label = NULL;
3532 alpha_auto_align_on = 1;
3533 alpha_current_align = 0;
3534 }
3535
3536 static void
3537 s_alpha_ent (dummy)
3538 int dummy;
3539 {
3540 if (ECOFF_DEBUGGING)
3541 ecoff_directive_ent (0);
3542 else
3543 {
3544 char *name, name_end;
3545 name = input_line_pointer;
3546 name_end = get_symbol_end ();
3547
3548 if (! is_name_beginner (*name))
3549 {
3550 as_warn (_(".ent directive has no name"));
3551 *input_line_pointer = name_end;
3552 }
3553 else
3554 {
3555 symbolS *sym;
3556
3557 if (alpha_cur_ent_sym)
3558 as_warn (_("nested .ent directives"));
3559
3560 sym = symbol_find_or_make (name);
3561 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
3562 alpha_cur_ent_sym = sym;
3563
3564 /* The .ent directive is sometimes followed by a number. Not sure
3565 what it really means, but ignore it. */
3566 *input_line_pointer = name_end;
3567 SKIP_WHITESPACE ();
3568 if (*input_line_pointer == ',')
3569 {
3570 input_line_pointer++;
3571 SKIP_WHITESPACE ();
3572 }
3573 if (isdigit (*input_line_pointer) || *input_line_pointer == '-')
3574 (void) get_absolute_expression ();
3575 }
3576 demand_empty_rest_of_line ();
3577 }
3578 }
3579
3580 static void
3581 s_alpha_end (dummy)
3582 int dummy;
3583 {
3584 if (ECOFF_DEBUGGING)
3585 ecoff_directive_end (0);
3586 else
3587 {
3588 char *name, name_end;
3589 name = input_line_pointer;
3590 name_end = get_symbol_end ();
3591
3592 if (! is_name_beginner (*name))
3593 {
3594 as_warn (_(".end directive has no name"));
3595 *input_line_pointer = name_end;
3596 }
3597 else
3598 {
3599 symbolS *sym;
3600
3601 sym = symbol_find (name);
3602 if (sym != alpha_cur_ent_sym)
3603 as_warn (_(".end directive names different symbol than .ent"));
3604
3605 /* Create an expression to calculate the size of the function. */
3606 if (sym)
3607 {
3608 symbol_get_obj (sym)->size =
3609 (expressionS *) xmalloc (sizeof (expressionS));
3610 symbol_get_obj (sym)->size->X_op = O_subtract;
3611 symbol_get_obj (sym)->size->X_add_symbol
3612 = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
3613 symbol_get_obj (sym)->size->X_op_symbol = sym;
3614 symbol_get_obj (sym)->size->X_add_number = 0;
3615 }
3616
3617 alpha_cur_ent_sym = NULL;
3618
3619 *input_line_pointer = name_end;
3620 }
3621 demand_empty_rest_of_line ();
3622 }
3623 }
3624
3625 static void
3626 s_alpha_mask (fp)
3627 int fp;
3628 {
3629 if (ECOFF_DEBUGGING)
3630 {
3631 if (fp)
3632 ecoff_directive_fmask (0);
3633 else
3634 ecoff_directive_mask (0);
3635 }
3636 else
3637 discard_rest_of_line ();
3638 }
3639
3640 static void
3641 s_alpha_frame (dummy)
3642 int dummy;
3643 {
3644 if (ECOFF_DEBUGGING)
3645 ecoff_directive_frame (0);
3646 else
3647 discard_rest_of_line ();
3648 }
3649
3650 static void
3651 s_alpha_prologue (ignore)
3652 int ignore;
3653 {
3654 symbolS *sym;
3655 int arg;
3656
3657 arg = get_absolute_expression ();
3658 demand_empty_rest_of_line ();
3659
3660 if (ECOFF_DEBUGGING)
3661 sym = ecoff_get_cur_proc_sym ();
3662 else
3663 sym = alpha_cur_ent_sym;
3664 know (sym != NULL);
3665
3666 switch (arg)
3667 {
3668 case 0: /* No PV required. */
3669 S_SET_OTHER (sym, STO_ALPHA_NOPV);
3670 break;
3671 case 1: /* Std GP load. */
3672 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD);
3673 break;
3674 case 2: /* Non-std use of PV. */
3675 break;
3676
3677 default:
3678 as_bad (_("Invalid argument %d to .prologue."), arg);
3679 break;
3680 }
3681 }
3682
3683 static void
3684 s_alpha_coff_wrapper (which)
3685 int which;
3686 {
3687 static void (* const fns[]) PARAMS ((int)) = {
3688 ecoff_directive_begin,
3689 ecoff_directive_bend,
3690 ecoff_directive_def,
3691 ecoff_directive_dim,
3692 ecoff_directive_endef,
3693 ecoff_directive_file,
3694 ecoff_directive_scl,
3695 ecoff_directive_tag,
3696 ecoff_directive_val,
3697 ecoff_directive_loc,
3698 };
3699
3700 assert (which >= 0 && which < sizeof(fns)/sizeof(*fns));
3701
3702 if (ECOFF_DEBUGGING)
3703 (*fns[which])(0);
3704 else
3705 {
3706 as_bad (_("ECOFF debugging is disabled."));
3707 ignore_rest_of_line ();
3708 }
3709 }
3710 #endif /* OBJ_ELF */
3711
3712 #ifdef OBJ_EVAX
3713
3714 /* Handle the section specific pseudo-op. */
3715
3716 static void
3717 s_alpha_section (secid)
3718 int secid;
3719 {
3720 int temp;
3721 #define EVAX_SECTION_COUNT 5
3722 static char *section_name[EVAX_SECTION_COUNT+1] =
3723 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
3724
3725 if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
3726 {
3727 as_fatal (_("Unknown section directive"));
3728 demand_empty_rest_of_line ();
3729 return;
3730 }
3731 temp = get_absolute_expression ();
3732 subseg_new (section_name[secid], 0);
3733 demand_empty_rest_of_line ();
3734 alpha_insn_label = NULL;
3735 alpha_auto_align_on = 1;
3736 alpha_current_align = 0;
3737 }
3738
3739
3740 /* Parse .ent directives. */
3741
3742 static void
3743 s_alpha_ent (ignore)
3744 int ignore;
3745 {
3746 symbolS *symbol;
3747 expressionS symexpr;
3748
3749 alpha_evax_proc.pdsckind = 0;
3750 alpha_evax_proc.framereg = -1;
3751 alpha_evax_proc.framesize = 0;
3752 alpha_evax_proc.rsa_offset = 0;
3753 alpha_evax_proc.ra_save = AXP_REG_RA;
3754 alpha_evax_proc.fp_save = -1;
3755 alpha_evax_proc.imask = 0;
3756 alpha_evax_proc.fmask = 0;
3757 alpha_evax_proc.prologue = 0;
3758 alpha_evax_proc.type = 0;
3759
3760 expression (&symexpr);
3761
3762 if (symexpr.X_op != O_symbol)
3763 {
3764 as_fatal (_(".ent directive has no symbol"));
3765 demand_empty_rest_of_line ();
3766 return;
3767 }
3768
3769 symbol = make_expr_symbol (&symexpr);
3770 symbol->bsym->flags |= BSF_FUNCTION;
3771 alpha_evax_proc.symbol = symbol;
3772
3773 demand_empty_rest_of_line ();
3774 return;
3775 }
3776
3777
3778 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
3779
3780 static void
3781 s_alpha_frame (ignore)
3782 int ignore;
3783 {
3784 long val;
3785
3786 alpha_evax_proc.framereg = tc_get_register (1);
3787
3788 SKIP_WHITESPACE ();
3789 if (*input_line_pointer++ != ','
3790 || get_absolute_expression_and_terminator (&val) != ',')
3791 {
3792 as_warn (_("Bad .frame directive 1./2. param"));
3793 --input_line_pointer;
3794 demand_empty_rest_of_line ();
3795 return;
3796 }
3797
3798 alpha_evax_proc.framesize = val;
3799
3800 (void) tc_get_register (1);
3801 SKIP_WHITESPACE ();
3802 if (*input_line_pointer++ != ',')
3803 {
3804 as_warn (_("Bad .frame directive 3./4. param"));
3805 --input_line_pointer;
3806 demand_empty_rest_of_line ();
3807 return;
3808 }
3809 alpha_evax_proc.rsa_offset = get_absolute_expression ();
3810
3811 return;
3812 }
3813
3814 static void
3815 s_alpha_pdesc (ignore)
3816 int ignore;
3817 {
3818 char *name;
3819 char name_end;
3820 long val;
3821 register char *p;
3822 expressionS exp;
3823 symbolS *entry_sym;
3824 fixS *fixp;
3825 segment_info_type *seginfo = seg_info (alpha_link_section);
3826
3827 if (now_seg != alpha_link_section)
3828 {
3829 as_bad (_(".pdesc directive not in link (.link) section"));
3830 demand_empty_rest_of_line ();
3831 return;
3832 }
3833
3834 if ((alpha_evax_proc.symbol == 0)
3835 || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
3836 {
3837 as_fatal (_(".pdesc has no matching .ent"));
3838 demand_empty_rest_of_line ();
3839 return;
3840 }
3841
3842 alpha_evax_proc.symbol->sy_obj = (valueT)seginfo->literal_pool_size;
3843
3844 expression (&exp);
3845 if (exp.X_op != O_symbol)
3846 {
3847 as_warn (_(".pdesc directive has no entry symbol"));
3848 demand_empty_rest_of_line ();
3849 return;
3850 }
3851
3852 entry_sym = make_expr_symbol (&exp);
3853 /* Save bfd symbol of proc desc in function symbol. */
3854 alpha_evax_proc.symbol->bsym->udata.p = (PTR)entry_sym->bsym;
3855
3856 SKIP_WHITESPACE ();
3857 if (*input_line_pointer++ != ',')
3858 {
3859 as_warn (_("No comma after .pdesc <entryname>"));
3860 demand_empty_rest_of_line ();
3861 return;
3862 }
3863
3864 SKIP_WHITESPACE ();
3865 name = input_line_pointer;
3866 name_end = get_symbol_end ();
3867
3868 if (strncmp(name, "stack", 5) == 0)
3869 {
3870 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
3871 }
3872 else if (strncmp(name, "reg", 3) == 0)
3873 {
3874 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
3875 }
3876 else if (strncmp(name, "null", 4) == 0)
3877 {
3878 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
3879 }
3880 else
3881 {
3882 as_fatal (_("unknown procedure kind"));
3883 demand_empty_rest_of_line ();
3884 return;
3885 }
3886
3887 *input_line_pointer = name_end;
3888 demand_empty_rest_of_line ();
3889
3890 #ifdef md_flush_pending_output
3891 md_flush_pending_output ();
3892 #endif
3893
3894 frag_align (3, 0, 0);
3895 p = frag_more (16);
3896 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
3897 fixp->fx_done = 1;
3898 seginfo->literal_pool_size += 16;
3899
3900 *p = alpha_evax_proc.pdsckind
3901 | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
3902 *(p+1) = PDSC_S_M_NATIVE
3903 | PDSC_S_M_NO_JACKET;
3904
3905 switch (alpha_evax_proc.pdsckind)
3906 {
3907 case PDSC_S_K_KIND_NULL:
3908 *(p+2) = 0;
3909 *(p+3) = 0;
3910 break;
3911 case PDSC_S_K_KIND_FP_REGISTER:
3912 *(p+2) = alpha_evax_proc.fp_save;
3913 *(p+3) = alpha_evax_proc.ra_save;
3914 break;
3915 case PDSC_S_K_KIND_FP_STACK:
3916 md_number_to_chars (p+2, (valueT)alpha_evax_proc.rsa_offset, 2);
3917 break;
3918 default: /* impossible */
3919 break;
3920 }
3921
3922 *(p+4) = 0;
3923 *(p+5) = alpha_evax_proc.type & 0x0f;
3924
3925 /* Signature offset. */
3926 md_number_to_chars (p+6, (valueT)0, 2);
3927
3928 fix_new_exp (frag_now, p-frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
3929
3930 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
3931 return;
3932
3933 /* Add dummy fix to make add_to_link_pool work. */
3934 p = frag_more (8);
3935 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
3936 fixp->fx_done = 1;
3937 seginfo->literal_pool_size += 8;
3938
3939 /* pdesc+16: Size. */
3940 md_number_to_chars (p, (valueT)alpha_evax_proc.framesize, 4);
3941
3942 md_number_to_chars (p+4, (valueT)0, 2);
3943
3944 /* Entry length. */
3945 md_number_to_chars (p+6, alpha_evax_proc.prologue, 2);
3946
3947 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
3948 return;
3949
3950 /* Add dummy fix to make add_to_link_pool work. */
3951 p = frag_more (8);
3952 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
3953 fixp->fx_done = 1;
3954 seginfo->literal_pool_size += 8;
3955
3956 /* pdesc+24: register masks. */
3957
3958 md_number_to_chars (p, alpha_evax_proc.imask, 4);
3959 md_number_to_chars (p+4, alpha_evax_proc.fmask, 4);
3960
3961 return;
3962 }
3963
3964
3965 /* Support for crash debug on vms. */
3966
3967 static void
3968 s_alpha_name (ignore)
3969 int ignore;
3970 {
3971 register char *p;
3972 expressionS exp;
3973 segment_info_type *seginfo = seg_info (alpha_link_section);
3974
3975 if (now_seg != alpha_link_section)
3976 {
3977 as_bad (_(".name directive not in link (.link) section"));
3978 demand_empty_rest_of_line ();
3979 return;
3980 }
3981
3982 expression (&exp);
3983 if (exp.X_op != O_symbol)
3984 {
3985 as_warn (_(".name directive has no symbol"));
3986 demand_empty_rest_of_line ();
3987 return;
3988 }
3989
3990 demand_empty_rest_of_line ();
3991
3992 #ifdef md_flush_pending_output
3993 md_flush_pending_output ();
3994 #endif
3995
3996 frag_align (3, 0, 0);
3997 p = frag_more (8);
3998 seginfo->literal_pool_size += 8;
3999
4000 fix_new_exp (frag_now, p-frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
4001
4002 return;
4003 }
4004
4005
4006 static void
4007 s_alpha_linkage (ignore)
4008 int ignore;
4009 {
4010 expressionS exp;
4011 char *p;
4012
4013 #ifdef md_flush_pending_output
4014 md_flush_pending_output ();
4015 #endif
4016
4017 expression (&exp);
4018 if (exp.X_op != O_symbol)
4019 {
4020 as_fatal (_("No symbol after .linkage"));
4021 }
4022 else
4023 {
4024 p = frag_more (LKP_S_K_SIZE);
4025 memset (p, 0, LKP_S_K_SIZE);
4026 fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
4027 BFD_RELOC_ALPHA_LINKAGE);
4028 }
4029 demand_empty_rest_of_line ();
4030
4031 return;
4032 }
4033
4034
4035 static void
4036 s_alpha_code_address (ignore)
4037 int ignore;
4038 {
4039 expressionS exp;
4040 char *p;
4041
4042 #ifdef md_flush_pending_output
4043 md_flush_pending_output ();
4044 #endif
4045
4046 expression (&exp);
4047 if (exp.X_op != O_symbol)
4048 {
4049 as_fatal (_("No symbol after .code_address"));
4050 }
4051 else
4052 {
4053 p = frag_more (8);
4054 memset (p, 0, 8);
4055 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
4056 BFD_RELOC_ALPHA_CODEADDR);
4057 }
4058 demand_empty_rest_of_line ();
4059
4060 return;
4061 }
4062
4063
4064 static void
4065 s_alpha_fp_save (ignore)
4066 int ignore;
4067 {
4068
4069 alpha_evax_proc.fp_save = tc_get_register (1);
4070
4071 demand_empty_rest_of_line ();
4072 return;
4073 }
4074
4075
4076 static void
4077 s_alpha_mask (ignore)
4078 int ignore;
4079 {
4080 long val;
4081
4082 if (get_absolute_expression_and_terminator (&val) != ',')
4083 {
4084 as_warn (_("Bad .mask directive"));
4085 --input_line_pointer;
4086 }
4087 else
4088 {
4089 alpha_evax_proc.imask = val;
4090 (void)get_absolute_expression ();
4091 }
4092 demand_empty_rest_of_line ();
4093
4094 return;
4095 }
4096
4097
4098 static void
4099 s_alpha_fmask (ignore)
4100 int ignore;
4101 {
4102 long val;
4103
4104 if (get_absolute_expression_and_terminator (&val) != ',')
4105 {
4106 as_warn (_("Bad .fmask directive"));
4107 --input_line_pointer;
4108 }
4109 else
4110 {
4111 alpha_evax_proc.fmask = val;
4112 (void) get_absolute_expression ();
4113 }
4114 demand_empty_rest_of_line ();
4115
4116 return;
4117 }
4118
4119 static void
4120 s_alpha_end (ignore)
4121 int ignore;
4122 {
4123 char c;
4124
4125 c = get_symbol_end ();
4126 *input_line_pointer = c;
4127 demand_empty_rest_of_line ();
4128 alpha_evax_proc.symbol = 0;
4129
4130 return;
4131 }
4132
4133
4134 static void
4135 s_alpha_file (ignore)
4136 int ignore;
4137 {
4138 symbolS *s;
4139 int length;
4140 static char case_hack[32];
4141
4142 extern char *demand_copy_string PARAMS ((int *lenP));
4143
4144 sprintf (case_hack, "<CASE:%01d%01d>",
4145 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
4146
4147 s = symbol_find_or_make (case_hack);
4148 s->bsym->flags |= BSF_FILE;
4149
4150 get_absolute_expression ();
4151 s = symbol_find_or_make (demand_copy_string (&length));
4152 s->bsym->flags |= BSF_FILE;
4153 demand_empty_rest_of_line ();
4154
4155 return;
4156 }
4157 #endif /* OBJ_EVAX */
4158
4159 /* Handle the .gprel32 pseudo op. */
4160
4161 static void
4162 s_alpha_gprel32 (ignore)
4163 int ignore;
4164 {
4165 expressionS e;
4166 char *p;
4167
4168 SKIP_WHITESPACE ();
4169 expression (&e);
4170
4171 #ifdef OBJ_ELF
4172 switch (e.X_op)
4173 {
4174 case O_constant:
4175 e.X_add_symbol = section_symbol(absolute_section);
4176 e.X_op = O_symbol;
4177 /* FALLTHRU */
4178 case O_symbol:
4179 break;
4180 default:
4181 abort();
4182 }
4183 #else
4184 #ifdef OBJ_ECOFF
4185 switch (e.X_op)
4186 {
4187 case O_constant:
4188 e.X_add_symbol = section_symbol (absolute_section);
4189 /* fall through */
4190 case O_symbol:
4191 e.X_op = O_subtract;
4192 e.X_op_symbol = alpha_gp_symbol;
4193 break;
4194 default:
4195 abort ();
4196 }
4197 #endif
4198 #endif
4199
4200 if (alpha_auto_align_on && alpha_current_align < 2)
4201 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
4202 if (alpha_current_align > 2)
4203 alpha_current_align = 2;
4204 alpha_insn_label = NULL;
4205
4206 p = frag_more (4);
4207 memset (p, 0, 4);
4208 fix_new_exp (frag_now, p-frag_now->fr_literal, 4,
4209 &e, 0, BFD_RELOC_GPREL32);
4210 }
4211
4212 /* Handle floating point allocation pseudo-ops. This is like the
4213 generic vresion, but it makes sure the current label, if any, is
4214 correctly aligned. */
4215
4216 static void
4217 s_alpha_float_cons (type)
4218 int type;
4219 {
4220 int log_size;
4221
4222 switch (type)
4223 {
4224 default:
4225 case 'f':
4226 case 'F':
4227 log_size = 2;
4228 break;
4229
4230 case 'd':
4231 case 'D':
4232 case 'G':
4233 log_size = 3;
4234 break;
4235
4236 case 'x':
4237 case 'X':
4238 case 'p':
4239 case 'P':
4240 log_size = 4;
4241 break;
4242 }
4243
4244 if (alpha_auto_align_on && alpha_current_align < log_size)
4245 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4246 if (alpha_current_align > log_size)
4247 alpha_current_align = log_size;
4248 alpha_insn_label = NULL;
4249
4250 float_cons (type);
4251 }
4252
4253 /* Handle the .proc pseudo op. We don't really do much with it except
4254 parse it. */
4255
4256 static void
4257 s_alpha_proc (is_static)
4258 int is_static;
4259 {
4260 char *name;
4261 char c;
4262 char *p;
4263 symbolS *symbolP;
4264 int temp;
4265
4266 /* Takes ".proc name,nargs" */
4267 SKIP_WHITESPACE ();
4268 name = input_line_pointer;
4269 c = get_symbol_end ();
4270 p = input_line_pointer;
4271 symbolP = symbol_find_or_make (name);
4272 *p = c;
4273 SKIP_WHITESPACE ();
4274 if (*input_line_pointer != ',')
4275 {
4276 *p = 0;
4277 as_warn (_("Expected comma after name \"%s\""), name);
4278 *p = c;
4279 temp = 0;
4280 ignore_rest_of_line ();
4281 }
4282 else
4283 {
4284 input_line_pointer++;
4285 temp = get_absolute_expression ();
4286 }
4287 /* symbolP->sy_other = (signed char) temp; */
4288 as_warn (_("unhandled: .proc %s,%d"), name, temp);
4289 demand_empty_rest_of_line ();
4290 }
4291
4292 /* Handle the .set pseudo op. This is used to turn on and off most of
4293 the assembler features. */
4294
4295 static void
4296 s_alpha_set (x)
4297 int x;
4298 {
4299 char *name, ch, *s;
4300 int yesno = 1;
4301
4302 SKIP_WHITESPACE ();
4303 name = input_line_pointer;
4304 ch = get_symbol_end ();
4305
4306 s = name;
4307 if (s[0] == 'n' && s[1] == 'o')
4308 {
4309 yesno = 0;
4310 s += 2;
4311 }
4312 if (!strcmp ("reorder", s))
4313 /* ignore */ ;
4314 else if (!strcmp ("at", s))
4315 alpha_noat_on = !yesno;
4316 else if (!strcmp ("macro", s))
4317 alpha_macros_on = yesno;
4318 else if (!strcmp ("move", s))
4319 /* ignore */ ;
4320 else if (!strcmp ("volatile", s))
4321 /* ignore */ ;
4322 else
4323 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
4324
4325 *input_line_pointer = ch;
4326 demand_empty_rest_of_line ();
4327 }
4328
4329 /* Handle the .base pseudo op. This changes the assembler's notion of
4330 the $gp register. */
4331
4332 static void
4333 s_alpha_base (ignore)
4334 int ignore;
4335 {
4336 #if 0
4337 if (first_32bit_quadrant)
4338 {
4339 /* not fatal, but it might not work in the end */
4340 as_warn (_("File overrides no-base-register option."));
4341 first_32bit_quadrant = 0;
4342 }
4343 #endif
4344
4345 SKIP_WHITESPACE ();
4346 if (*input_line_pointer == '$')
4347 { /* $rNN form */
4348 input_line_pointer++;
4349 if (*input_line_pointer == 'r')
4350 input_line_pointer++;
4351 }
4352
4353 alpha_gp_register = get_absolute_expression ();
4354 if (alpha_gp_register < 0 || alpha_gp_register > 31)
4355 {
4356 alpha_gp_register = AXP_REG_GP;
4357 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
4358 }
4359
4360 demand_empty_rest_of_line ();
4361 }
4362
4363 /* Handle the .align pseudo-op. This aligns to a power of two. It
4364 also adjusts any current instruction label. We treat this the same
4365 way the MIPS port does: .align 0 turns off auto alignment. */
4366
4367 static void
4368 s_alpha_align (ignore)
4369 int ignore;
4370 {
4371 int align;
4372 char fill, *pfill;
4373 long max_alignment = 15;
4374
4375 align = get_absolute_expression ();
4376 if (align > max_alignment)
4377 {
4378 align = max_alignment;
4379 as_bad (_("Alignment too large: %d. assumed"), align);
4380 }
4381 else if (align < 0)
4382 {
4383 as_warn (_("Alignment negative: 0 assumed"));
4384 align = 0;
4385 }
4386
4387 if (*input_line_pointer == ',')
4388 {
4389 input_line_pointer++;
4390 fill = get_absolute_expression ();
4391 pfill = &fill;
4392 }
4393 else
4394 pfill = NULL;
4395
4396 if (align != 0)
4397 {
4398 alpha_auto_align_on = 1;
4399 alpha_align (align, pfill, alpha_insn_label, 1);
4400 }
4401 else
4402 {
4403 alpha_auto_align_on = 0;
4404 }
4405
4406 demand_empty_rest_of_line ();
4407 }
4408
4409 /* Hook the normal string processor to reset known alignment. */
4410
4411 static void
4412 s_alpha_stringer (terminate)
4413 int terminate;
4414 {
4415 alpha_current_align = 0;
4416 alpha_insn_label = NULL;
4417 stringer (terminate);
4418 }
4419
4420 /* Hook the normal space processing to reset known alignment. */
4421
4422 static void
4423 s_alpha_space (ignore)
4424 int ignore;
4425 {
4426 alpha_current_align = 0;
4427 alpha_insn_label = NULL;
4428 s_space (ignore);
4429 }
4430
4431 /* Hook into cons for auto-alignment. */
4432
4433 void
4434 alpha_cons_align (size)
4435 int size;
4436 {
4437 int log_size;
4438
4439 log_size = 0;
4440 while ((size >>= 1) != 0)
4441 ++log_size;
4442
4443 if (alpha_auto_align_on && alpha_current_align < log_size)
4444 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4445 if (alpha_current_align > log_size)
4446 alpha_current_align = log_size;
4447 alpha_insn_label = NULL;
4448 }
4449
4450 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
4451 pseudos. We just turn off auto-alignment and call down to cons. */
4452
4453 static void
4454 s_alpha_ucons (bytes)
4455 int bytes;
4456 {
4457 int hold = alpha_auto_align_on;
4458 alpha_auto_align_on = 0;
4459 cons (bytes);
4460 alpha_auto_align_on = hold;
4461 }
4462
4463 /* Switch the working cpu type. */
4464
4465 static void
4466 s_alpha_arch (ignored)
4467 int ignored;
4468 {
4469 char *name, ch;
4470 const struct cpu_type *p;
4471
4472 SKIP_WHITESPACE ();
4473 name = input_line_pointer;
4474 ch = get_symbol_end ();
4475
4476 for (p = cpu_types; p->name; ++p)
4477 if (strcmp(name, p->name) == 0)
4478 {
4479 alpha_target_name = p->name, alpha_target = p->flags;
4480 goto found;
4481 }
4482 as_warn("Unknown CPU identifier `%s'", name);
4483
4484 found:
4485 *input_line_pointer = ch;
4486 demand_empty_rest_of_line ();
4487 }
4488
4489 \f
4490
4491 #ifdef DEBUG1
4492 /* print token expression with alpha specific extension. */
4493
4494 static void
4495 alpha_print_token(f, exp)
4496 FILE *f;
4497 const expressionS *exp;
4498 {
4499 switch (exp->X_op)
4500 {
4501 case O_cpregister:
4502 putc (',', f);
4503 /* FALLTHRU */
4504 case O_pregister:
4505 putc ('(', f);
4506 {
4507 expressionS nexp = *exp;
4508 nexp.X_op = O_register;
4509 print_expr (f, &nexp);
4510 }
4511 putc (')', f);
4512 break;
4513 default:
4514 print_expr (f, exp);
4515 break;
4516 }
4517 return;
4518 }
4519 #endif
4520 \f
4521 /* The target specific pseudo-ops which we support. */
4522
4523 const pseudo_typeS md_pseudo_table[] =
4524 {
4525 #ifdef OBJ_ECOFF
4526 {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
4527 {"rdata", s_alpha_rdata, 0},
4528 #endif
4529 {"text", s_alpha_text, 0},
4530 {"data", s_alpha_data, 0},
4531 #ifdef OBJ_ECOFF
4532 {"sdata", s_alpha_sdata, 0},
4533 #endif
4534 #ifdef OBJ_ELF
4535 {"section", s_alpha_section, 0},
4536 {"section.s", s_alpha_section, 0},
4537 {"sect", s_alpha_section, 0},
4538 {"sect.s", s_alpha_section, 0},
4539 #endif
4540 #ifdef OBJ_EVAX
4541 { "pdesc", s_alpha_pdesc, 0},
4542 { "name", s_alpha_name, 0},
4543 { "linkage", s_alpha_linkage, 0},
4544 { "code_address", s_alpha_code_address, 0},
4545 { "ent", s_alpha_ent, 0},
4546 { "frame", s_alpha_frame, 0},
4547 { "fp_save", s_alpha_fp_save, 0},
4548 { "mask", s_alpha_mask, 0},
4549 { "fmask", s_alpha_fmask, 0},
4550 { "end", s_alpha_end, 0},
4551 { "file", s_alpha_file, 0},
4552 { "rdata", s_alpha_section, 1},
4553 { "comm", s_alpha_comm, 0},
4554 { "link", s_alpha_section, 3},
4555 { "ctors", s_alpha_section, 4},
4556 { "dtors", s_alpha_section, 5},
4557 #endif
4558 #ifdef OBJ_ELF
4559 /* Frame related pseudos. */
4560 {"ent", s_alpha_ent, 0},
4561 {"end", s_alpha_end, 0},
4562 {"mask", s_alpha_mask, 0},
4563 {"fmask", s_alpha_mask, 1},
4564 {"frame", s_alpha_frame, 0},
4565 {"prologue", s_alpha_prologue, 0},
4566 /* COFF debugging related pseudos. */
4567 {"begin", s_alpha_coff_wrapper, 0},
4568 {"bend", s_alpha_coff_wrapper, 1},
4569 {"def", s_alpha_coff_wrapper, 2},
4570 {"dim", s_alpha_coff_wrapper, 3},
4571 {"endef", s_alpha_coff_wrapper, 4},
4572 {"file", s_alpha_coff_wrapper, 5},
4573 {"scl", s_alpha_coff_wrapper, 6},
4574 {"tag", s_alpha_coff_wrapper, 7},
4575 {"val", s_alpha_coff_wrapper, 8},
4576 {"loc", s_alpha_coff_wrapper, 9},
4577 #else
4578 {"prologue", s_ignore, 0},
4579 #endif
4580 {"gprel32", s_alpha_gprel32, 0},
4581 {"t_floating", s_alpha_float_cons, 'd'},
4582 {"s_floating", s_alpha_float_cons, 'f'},
4583 {"f_floating", s_alpha_float_cons, 'F'},
4584 {"g_floating", s_alpha_float_cons, 'G'},
4585 {"d_floating", s_alpha_float_cons, 'D'},
4586
4587 {"proc", s_alpha_proc, 0},
4588 {"aproc", s_alpha_proc, 1},
4589 {"set", s_alpha_set, 0},
4590 {"reguse", s_ignore, 0},
4591 {"livereg", s_ignore, 0},
4592 {"base", s_alpha_base, 0}, /*??*/
4593 {"option", s_ignore, 0},
4594 {"aent", s_ignore, 0},
4595 {"ugen", s_ignore, 0},
4596 {"eflag", s_ignore, 0},
4597
4598 {"align", s_alpha_align, 0},
4599 {"double", s_alpha_float_cons, 'd'},
4600 {"float", s_alpha_float_cons, 'f'},
4601 {"single", s_alpha_float_cons, 'f'},
4602 {"ascii", s_alpha_stringer, 0},
4603 {"asciz", s_alpha_stringer, 1},
4604 {"string", s_alpha_stringer, 1},
4605 {"space", s_alpha_space, 0},
4606 {"skip", s_alpha_space, 0},
4607 {"zero", s_alpha_space, 0},
4608
4609 /* Unaligned data pseudos. */
4610 {"uword", s_alpha_ucons, 2},
4611 {"ulong", s_alpha_ucons, 4},
4612 {"uquad", s_alpha_ucons, 8},
4613
4614 #ifdef OBJ_ELF
4615 /* Dwarf wants these versions of unaligned. */
4616 {"2byte", s_alpha_ucons, 2},
4617 {"4byte", s_alpha_ucons, 4},
4618 {"8byte", s_alpha_ucons, 8},
4619 #endif
4620
4621 /* We don't do any optimizing, so we can safely ignore these. */
4622 {"noalias", s_ignore, 0},
4623 {"alias", s_ignore, 0},
4624
4625 {"arch", s_alpha_arch, 0},
4626
4627 {NULL, 0, 0},
4628 };
4629
4630 \f
4631 /* Build a BFD section with its flags set appropriately for the .lita,
4632 .lit8, or .lit4 sections. */
4633
4634 static void
4635 create_literal_section (name, secp, symp)
4636 const char *name;
4637 segT *secp;
4638 symbolS **symp;
4639 {
4640 segT current_section = now_seg;
4641 int current_subsec = now_subseg;
4642 segT new_sec;
4643
4644 *secp = new_sec = subseg_new (name, 0);
4645 subseg_set (current_section, current_subsec);
4646 bfd_set_section_alignment (stdoutput, new_sec, 4);
4647 bfd_set_section_flags (stdoutput, new_sec,
4648 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
4649 | SEC_DATA);
4650
4651 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
4652 }
4653
4654 #ifdef OBJ_ECOFF
4655
4656 /* @@@ GP selection voodoo. All of this seems overly complicated and
4657 unnecessary; which is the primary reason it's for ECOFF only. */
4658
4659 static inline void
4660 maybe_set_gp (sec)
4661 asection *sec;
4662 {
4663 bfd_vma vma;
4664 if (!sec)
4665 return;
4666 vma = bfd_get_section_vma (foo, sec);
4667 if (vma && vma < alpha_gp_value)
4668 alpha_gp_value = vma;
4669 }
4670
4671 static void
4672 select_gp_value ()
4673 {
4674 assert (alpha_gp_value == 0);
4675
4676 /* Get minus-one in whatever width... */
4677 alpha_gp_value = 0; alpha_gp_value--;
4678
4679 /* Select the smallest VMA of these existing sections. */
4680 maybe_set_gp (alpha_lita_section);
4681 #if 0
4682 /* These were disabled before -- should we use them? */
4683 maybe_set_gp (sdata);
4684 maybe_set_gp (lit8_sec);
4685 maybe_set_gp (lit4_sec);
4686 #endif
4687
4688 /* @@ Will a simple 0x8000 work here? If not, why not? */
4689 #define GP_ADJUSTMENT (0x8000 - 0x10)
4690
4691 alpha_gp_value += GP_ADJUSTMENT;
4692
4693 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
4694
4695 #ifdef DEBUG1
4696 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
4697 #endif
4698 }
4699 #endif /* OBJ_ECOFF */
4700
4701 /* Called internally to handle all alignment needs. This takes care
4702 of eliding calls to frag_align if'n the cached current alignment
4703 says we've already got it, as well as taking care of the auto-align
4704 feature wrt labels. */
4705
4706 static void
4707 alpha_align (n, pfill, label, force)
4708 int n;
4709 char *pfill;
4710 symbolS *label;
4711 int force;
4712 {
4713 if (alpha_current_align >= n)
4714 return;
4715
4716 if (pfill == NULL)
4717 {
4718 if (n > 2
4719 && (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
4720 {
4721 static char const unop[4] = { 0x00, 0x00, 0xe0, 0x2f };
4722 static char const nopunop[8] = {
4723 0x1f, 0x04, 0xff, 0x47,
4724 0x00, 0x00, 0xe0, 0x2f
4725 };
4726
4727 /* First, make sure we're on a four-byte boundary, in case
4728 someone has been putting .byte values into the text
4729 section. The DEC assembler silently fills with unaligned
4730 no-op instructions. This will zero-fill, then nop-fill
4731 with proper alignment. */
4732 if (alpha_current_align < 2)
4733 frag_align (2, 0, 0);
4734 if (alpha_current_align < 3)
4735 frag_align_pattern (3, unop, sizeof unop, 0);
4736 if (n > 3)
4737 frag_align_pattern (n, nopunop, sizeof nopunop, 0);
4738 }
4739 else
4740 frag_align (n, 0, 0);
4741 }
4742 else
4743 frag_align (n, *pfill, 0);
4744
4745 alpha_current_align = n;
4746
4747 if (label != NULL)
4748 {
4749 assert (S_GET_SEGMENT (label) == now_seg);
4750 symbol_set_frag (label, frag_now);
4751 S_SET_VALUE (label, (valueT) frag_now_fix ());
4752 }
4753
4754 record_alignment(now_seg, n);
4755
4756 /* ??? if alpha_flag_relax && force && elf, record the requested alignment
4757 in a reloc for the linker to see. */
4758 }
4759
4760 /* The Alpha has support for some VAX floating point types, as well as for
4761 IEEE floating point. We consider IEEE to be the primary floating point
4762 format, and sneak in the VAX floating point support here. */
4763 #define md_atof vax_md_atof
4764 #include "config/atof-vax.c"
git-cvsimport of binutils cvsroot