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[binutils.git] / bfd / coff-h8300.c
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1 /* BFD back-end for Hitachi H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
23 #include "bfd.h"
24 #include "sysdep.h"
25 #include "libbfd.h"
26 #include "bfdlink.h"
27 #include "genlink.h"
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
30 #include "libcoff.h"
32 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34 /* We derive a hash table from the basic BFD hash table to
35 hold entries in the function vector. Aside from the
36 info stored by the basic hash table, we need the offset
37 of a particular entry within the hash table as well as
38 the offset where we'll add the next entry. */
40 struct funcvec_hash_entry
42 /* The basic hash table entry. */
43 struct bfd_hash_entry root;
45 /* The offset within the vectors section where
46 this entry lives. */
47 bfd_vma offset;
50 struct funcvec_hash_table
52 /* The basic hash table. */
53 struct bfd_hash_table root;
55 bfd *abfd;
57 /* Offset at which we'll add the next entry. */
58 unsigned int offset;
61 static struct bfd_hash_entry *
62 funcvec_hash_newfunc
63 PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *));
65 static boolean
66 funcvec_hash_table_init
67 PARAMS ((struct funcvec_hash_table *, bfd *,
68 struct bfd_hash_entry *(*) PARAMS ((struct bfd_hash_entry *,
69 struct bfd_hash_table *,
70 const char *))));
72 static bfd_reloc_status_type special PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
73 static int select_reloc PARAMS ((reloc_howto_type *));
74 static void rtype2howto PARAMS ((arelent *, struct internal_reloc *));
75 static void reloc_processing PARAMS ((arelent *, struct internal_reloc *, asymbol **, bfd *, asection *));
76 static boolean h8300_symbol_address_p PARAMS ((bfd *, asection *, bfd_vma));
77 static int h8300_reloc16_estimate PARAMS ((bfd *, asection *, arelent *, unsigned int, struct bfd_link_info *));
78 static void h8300_reloc16_extra_cases PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *, bfd_byte *, unsigned int *, unsigned int *));
79 static boolean h8300_bfd_link_add_symbols PARAMS ((bfd *, struct bfd_link_info *));
81 /* To lookup a value in the function vector hash table. */
82 #define funcvec_hash_lookup(table, string, create, copy) \
83 ((struct funcvec_hash_entry *) \
84 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
86 /* The derived h8300 COFF linker table. Note it's derived from
87 the generic linker hash table, not the COFF backend linker hash
88 table! We use this to attach additional data structures we
89 need while linking on the h8300. */
90 struct h8300_coff_link_hash_table {
91 /* The main hash table. */
92 struct generic_link_hash_table root;
94 /* Section for the vectors table. This gets attached to a
95 random input bfd, we keep it here for easy access. */
96 asection *vectors_sec;
98 /* Hash table of the functions we need to enter into the function
99 vector. */
100 struct funcvec_hash_table *funcvec_hash_table;
103 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create
104 PARAMS ((bfd *));
106 /* Get the H8/300 COFF linker hash table from a link_info structure. */
108 #define h8300_coff_hash_table(p) \
109 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
111 /* Initialize fields within a funcvec hash table entry. Called whenever
112 a new entry is added to the funcvec hash table. */
114 static struct bfd_hash_entry *
115 funcvec_hash_newfunc (entry, gen_table, string)
116 struct bfd_hash_entry *entry;
117 struct bfd_hash_table *gen_table;
118 const char *string;
120 struct funcvec_hash_entry *ret;
121 struct funcvec_hash_table *table;
123 ret = (struct funcvec_hash_entry *) entry;
124 table = (struct funcvec_hash_table *) gen_table;
126 /* Allocate the structure if it has not already been allocated by a
127 subclass. */
128 if (ret == NULL)
129 ret = ((struct funcvec_hash_entry *)
130 bfd_hash_allocate (gen_table,
131 sizeof (struct funcvec_hash_entry)));
132 if (ret == NULL)
133 return NULL;
135 /* Call the allocation method of the superclass. */
136 ret = ((struct funcvec_hash_entry *)
137 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
139 if (ret == NULL)
140 return NULL;
142 /* Note where this entry will reside in the function vector table. */
143 ret->offset = table->offset;
145 /* Bump the offset at which we store entries in the function
146 vector. We'd like to bump up the size of the vectors section,
147 but it's not easily available here. */
148 if (bfd_get_mach (table->abfd) == bfd_mach_h8300)
149 table->offset += 2;
150 else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h
151 || bfd_get_mach (table->abfd) == bfd_mach_h8300s)
152 table->offset += 4;
153 else
154 return NULL;
156 /* Everything went OK. */
157 return (struct bfd_hash_entry *) ret;
160 /* Initialize the function vector hash table. */
162 static boolean
163 funcvec_hash_table_init (table, abfd, newfunc)
164 struct funcvec_hash_table *table;
165 bfd *abfd;
166 struct bfd_hash_entry *(*newfunc) PARAMS ((struct bfd_hash_entry *,
167 struct bfd_hash_table *,
168 const char *));
170 /* Initialize our local fields, then call the generic initialization
171 routine. */
172 table->offset = 0;
173 table->abfd = abfd;
174 return (bfd_hash_table_init (&table->root, newfunc));
177 /* Create the derived linker hash table. We use a derived hash table
178 basically to hold "static" information during an h8/300 coff link
179 without using static variables. */
181 static struct bfd_link_hash_table *
182 h8300_coff_link_hash_table_create (abfd)
183 bfd *abfd;
185 struct h8300_coff_link_hash_table *ret;
186 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
188 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
189 if (ret == NULL)
190 return NULL;
191 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
192 _bfd_generic_link_hash_newfunc))
194 free (ret);
195 return NULL;
198 /* Initialize our data. */
199 ret->vectors_sec = NULL;
200 ret->funcvec_hash_table = NULL;
202 /* OK. Everything's intialized, return the base pointer. */
203 return &ret->root.root;
206 /* Special handling for H8/300 relocs.
207 We only come here for pcrel stuff and return normally if not an -r link.
208 When doing -r, we can't do any arithmetic for the pcrel stuff, because
209 the code in reloc.c assumes that we can manipulate the targets of
210 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
211 which means that the gap after the instruction may not be enough to
212 contain the offset required for the branch, so we have to use only
213 the addend until the final link. */
215 static bfd_reloc_status_type
216 special (abfd, reloc_entry, symbol, data, input_section, output_bfd,
217 error_message)
218 bfd *abfd ATTRIBUTE_UNUSED;
219 arelent *reloc_entry ATTRIBUTE_UNUSED;
220 asymbol *symbol ATTRIBUTE_UNUSED;
221 PTR data ATTRIBUTE_UNUSED;
222 asection *input_section ATTRIBUTE_UNUSED;
223 bfd *output_bfd;
224 char **error_message ATTRIBUTE_UNUSED;
226 if (output_bfd == (bfd *) NULL)
227 return bfd_reloc_continue;
229 /* Adjust the reloc address to that in the output section. */
230 reloc_entry->address += input_section->output_offset;
231 return bfd_reloc_ok;
234 static reloc_howto_type howto_table[] = {
235 HOWTO (R_RELBYTE, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8", false, 0x000000ff, 0x000000ff, false),
236 HOWTO (R_RELWORD, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16", false, 0x0000ffff, 0x0000ffff, false),
237 HOWTO (R_RELLONG, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "32", false, 0xffffffff, 0xffffffff, false),
238 HOWTO (R_PCRBYTE, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8", false, 0x000000ff, 0x000000ff, true),
239 HOWTO (R_PCRWORD, 0, 1, 16, true, 0, complain_overflow_signed, special, "DISP16", false, 0x0000ffff, 0x0000ffff, true),
240 HOWTO (R_PCRLONG, 0, 2, 32, true, 0, complain_overflow_signed, special, "DISP32", false, 0xffffffff, 0xffffffff, true),
241 HOWTO (R_MOV16B1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", false, 0x0000ffff, 0x0000ffff, false),
242 HOWTO (R_MOV16B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", false, 0x000000ff, 0x000000ff, false),
243 HOWTO (R_JMP1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16/pcrel", false, 0x0000ffff, 0x0000ffff, false),
244 HOWTO (R_JMP2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pcrecl/16", false, 0x000000ff, 0x000000ff, false),
245 HOWTO (R_JMPL1, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "24/pcrell", false, 0x00ffffff, 0x00ffffff, false),
246 HOWTO (R_JMPL2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pc8/24", false, 0x000000ff, 0x000000ff, false),
247 HOWTO (R_MOV24B1, 0, 1, 32, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", false, 0xffffffff, 0xffffffff, false),
248 HOWTO (R_MOV24B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", false, 0x0000ffff, 0x0000ffff, false),
250 /* An indirect reference to a function. This causes the function's address
251 to be added to the function vector in lo-mem and puts the address of
252 the function vector's entry in the jsr instruction. */
253 HOWTO (R_MEM_INDIRECT, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8/indirect", false, 0x000000ff, 0x000000ff, false),
255 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
256 branch is turned into an 8bit pc-relative branch. */
257 HOWTO (R_PCRWORD_B, 0, 0, 8, true, 0, complain_overflow_bitfield, special, "relaxed bCC:16", false, 0x000000ff, 0x000000ff, false),
259 HOWTO (R_MOVL1, 0, 2, 32, false, 0, complain_overflow_bitfield,special, "32/24 relaxable move", false, 0xffffffff, 0xffffffff, false),
261 HOWTO (R_MOVL2, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "32/24 relaxed move", false, 0x0000ffff, 0x0000ffff, false),
263 HOWTO (R_BCC_INV, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8 inverted", false, 0x000000ff, 0x000000ff, true),
265 HOWTO (R_JMP_DEL, 0, 0, 8, true, 0, complain_overflow_signed, special, "Deleted jump", false, 0x000000ff, 0x000000ff, true),
268 /* Turn a howto into a reloc number. */
270 #define SELECT_RELOC(x,howto) \
271 { x.r_type = select_reloc (howto); }
273 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x))
274 #define H8300 1 /* Customize coffcode.h */
275 #define __A_MAGIC_SET__
277 /* Code to swap in the reloc. */
278 #define SWAP_IN_RELOC_OFFSET H_GET_32
279 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
280 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
281 dst->r_stuff[0] = 'S'; \
282 dst->r_stuff[1] = 'C';
284 static int
285 select_reloc (howto)
286 reloc_howto_type *howto;
288 return howto->type;
291 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
293 static void
294 rtype2howto (internal, dst)
295 arelent *internal;
296 struct internal_reloc *dst;
298 switch (dst->r_type)
300 case R_RELBYTE:
301 internal->howto = howto_table + 0;
302 break;
303 case R_RELWORD:
304 internal->howto = howto_table + 1;
305 break;
306 case R_RELLONG:
307 internal->howto = howto_table + 2;
308 break;
309 case R_PCRBYTE:
310 internal->howto = howto_table + 3;
311 break;
312 case R_PCRWORD:
313 internal->howto = howto_table + 4;
314 break;
315 case R_PCRLONG:
316 internal->howto = howto_table + 5;
317 break;
318 case R_MOV16B1:
319 internal->howto = howto_table + 6;
320 break;
321 case R_MOV16B2:
322 internal->howto = howto_table + 7;
323 break;
324 case R_JMP1:
325 internal->howto = howto_table + 8;
326 break;
327 case R_JMP2:
328 internal->howto = howto_table + 9;
329 break;
330 case R_JMPL1:
331 internal->howto = howto_table + 10;
332 break;
333 case R_JMPL2:
334 internal->howto = howto_table + 11;
335 break;
336 case R_MOV24B1:
337 internal->howto = howto_table + 12;
338 break;
339 case R_MOV24B2:
340 internal->howto = howto_table + 13;
341 break;
342 case R_MEM_INDIRECT:
343 internal->howto = howto_table + 14;
344 break;
345 case R_PCRWORD_B:
346 internal->howto = howto_table + 15;
347 break;
348 case R_MOVL1:
349 internal->howto = howto_table + 16;
350 break;
351 case R_MOVL2:
352 internal->howto = howto_table + 17;
353 break;
354 case R_BCC_INV:
355 internal->howto = howto_table + 18;
356 break;
357 case R_JMP_DEL:
358 internal->howto = howto_table + 19;
359 break;
360 default:
361 abort ();
362 break;
366 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
368 /* Perform any necessary magic to the addend in a reloc entry. */
370 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
371 cache_ptr->addend = ext_reloc.r_offset;
373 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
374 reloc_processing (relent, reloc, symbols, abfd, section)
376 static void
377 reloc_processing (relent, reloc, symbols, abfd, section)
378 arelent *relent;
379 struct internal_reloc *reloc;
380 asymbol **symbols;
381 bfd *abfd;
382 asection *section;
384 relent->address = reloc->r_vaddr;
385 rtype2howto (relent, reloc);
387 if (((int) reloc->r_symndx) > 0)
389 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
391 else
393 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
396 relent->addend = reloc->r_offset;
398 relent->address -= section->vma;
399 #if 0
400 relent->section = 0;
401 #endif
404 static boolean
405 h8300_symbol_address_p (abfd, input_section, address)
406 bfd *abfd;
407 asection *input_section;
408 bfd_vma address;
410 asymbol **s;
412 s = _bfd_generic_link_get_symbols (abfd);
413 BFD_ASSERT (s != (asymbol **) NULL);
415 /* Search all the symbols for one in INPUT_SECTION with
416 address ADDRESS. */
417 while (*s)
419 asymbol *p = *s;
420 if (p->section == input_section
421 && (input_section->output_section->vma
422 + input_section->output_offset
423 + p->value) == address)
424 return true;
425 s++;
427 return false;
430 /* If RELOC represents a relaxable instruction/reloc, change it into
431 the relaxed reloc, notify the linker that symbol addresses
432 have changed (bfd_perform_slip) and return how much the current
433 section has shrunk by.
435 FIXME: Much of this code has knowledge of the ordering of entries
436 in the howto table. This needs to be fixed. */
438 static int
439 h8300_reloc16_estimate (abfd, input_section, reloc, shrink, link_info)
440 bfd *abfd;
441 asection *input_section;
442 arelent *reloc;
443 unsigned int shrink;
444 struct bfd_link_info *link_info;
446 bfd_vma value;
447 bfd_vma dot;
448 bfd_vma gap;
449 static asection *last_input_section = NULL;
450 static arelent *last_reloc = NULL;
452 /* The address of the thing to be relocated will have moved back by
453 the size of the shrink - but we don't change reloc->address here,
454 since we need it to know where the relocation lives in the source
455 uncooked section. */
456 bfd_vma address = reloc->address - shrink;
458 if (input_section != last_input_section)
459 last_reloc = NULL;
461 /* Only examine the relocs which might be relaxable. */
462 switch (reloc->howto->type)
464 /* This is the 16/24 bit absolute branch which could become an 8 bit
465 pc-relative branch. */
466 case R_JMP1:
467 case R_JMPL1:
468 /* Get the address of the target of this branch. */
469 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
471 /* Get the address of the next instruction (not the reloc). */
472 dot = (input_section->output_section->vma
473 + input_section->output_offset + address);
475 /* Adjust for R_JMP1 vs R_JMPL1. */
476 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
478 /* Compute the distance from this insn to the branch target. */
479 gap = value - dot;
481 /* If the distance is within -128..+128 inclusive, then we can relax
482 this jump. +128 is valid since the target will move two bytes
483 closer if we do relax this branch. */
484 if ((int) gap >= -128 && (int) gap <= 128)
486 bfd_byte code;
488 if (!bfd_get_section_contents (abfd, input_section, & code,
489 reloc->address, 1))
490 break;
491 code = bfd_get_8 (abfd, & code);
493 /* It's possible we may be able to eliminate this branch entirely;
494 if the previous instruction is a branch around this instruction,
495 and there's no label at this instruction, then we can reverse
496 the condition on the previous branch and eliminate this jump.
498 original: new:
499 bCC lab1 bCC' lab2
500 jmp lab2
501 lab1: lab1:
503 This saves 4 bytes instead of two, and should be relatively
504 common.
506 Only perform this optimisation for jumps (code 0x5a) not
507 subroutine calls, as otherwise it could transform:
509 mov.w r0,r0
510 beq .L1
511 jsr @_bar
512 .L1: rts
513 _bar: rts
514 into:
515 mov.w r0,r0
516 bne _bar
518 _bar: rts
520 which changes the call (jsr) into a branch (bne). */
521 if (code == 0x5a
522 && gap <= 126
523 && last_reloc
524 && last_reloc->howto->type == R_PCRBYTE)
526 bfd_vma last_value;
527 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
528 input_section) + 1;
530 if (last_value == dot + 2
531 && last_reloc->address + 1 == reloc->address
532 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
534 reloc->howto = howto_table + 19;
535 last_reloc->howto = howto_table + 18;
536 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
537 last_reloc->addend = reloc->addend;
538 shrink += 4;
539 bfd_perform_slip (abfd, 4, input_section, address);
540 break;
544 /* Change the reloc type. */
545 reloc->howto = reloc->howto + 1;
547 /* This shrinks this section by two bytes. */
548 shrink += 2;
549 bfd_perform_slip (abfd, 2, input_section, address);
551 break;
553 /* This is the 16 bit pc-relative branch which could become an 8 bit
554 pc-relative branch. */
555 case R_PCRWORD:
556 /* Get the address of the target of this branch, add one to the value
557 because the addend field in PCrel jumps is off by -1. */
558 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
560 /* Get the address of the next instruction if we were to relax. */
561 dot = input_section->output_section->vma +
562 input_section->output_offset + address;
564 /* Compute the distance from this insn to the branch target. */
565 gap = value - dot;
567 /* If the distance is within -128..+128 inclusive, then we can relax
568 this jump. +128 is valid since the target will move two bytes
569 closer if we do relax this branch. */
570 if ((int) gap >= -128 && (int) gap <= 128)
572 /* Change the reloc type. */
573 reloc->howto = howto_table + 15;
575 /* This shrinks this section by two bytes. */
576 shrink += 2;
577 bfd_perform_slip (abfd, 2, input_section, address);
579 break;
581 /* This is a 16 bit absolute address in a mov.b insn, which can
582 become an 8 bit absolute address if it's in the right range. */
583 case R_MOV16B1:
584 /* Get the address of the data referenced by this mov.b insn. */
585 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
587 /* The address is in 0xff00..0xffff inclusive on the h8300 or
588 0xffff00..0xffffff inclusive on the h8300h, then we can
589 relax this mov.b */
590 if ((bfd_get_mach (abfd) == bfd_mach_h8300
591 && value >= 0xff00
592 && value <= 0xffff)
593 || ((bfd_get_mach (abfd) == bfd_mach_h8300h
594 || bfd_get_mach (abfd) == bfd_mach_h8300s)
595 && value >= 0xffff00
596 && value <= 0xffffff))
598 /* Change the reloc type. */
599 reloc->howto = reloc->howto + 1;
601 /* This shrinks this section by two bytes. */
602 shrink += 2;
603 bfd_perform_slip (abfd, 2, input_section, address);
605 break;
607 /* Similarly for a 24 bit absolute address in a mov.b. Note that
608 if we can't relax this into an 8 bit absolute, we'll fall through
609 and try to relax it into a 16bit absolute. */
610 case R_MOV24B1:
611 /* Get the address of the data referenced by this mov.b insn. */
612 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
614 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
615 then we can relax this mov.b */
616 if ((bfd_get_mach (abfd) == bfd_mach_h8300h
617 || bfd_get_mach (abfd) == bfd_mach_h8300s)
618 && value >= 0xffff00
619 && value <= 0xffffff)
621 /* Change the reloc type. */
622 reloc->howto = reloc->howto + 1;
624 /* This shrinks this section by four bytes. */
625 shrink += 4;
626 bfd_perform_slip (abfd, 4, input_section, address);
628 /* Done with this reloc. */
629 break;
632 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
633 reloc. */
635 /* This is a 24/32 bit absolute address in a mov insn, which can
636 become an 16 bit absolute address if it's in the right range. */
637 case R_MOVL1:
638 /* Get the address of the data referenced by this mov insn. */
639 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
641 /* If this address is in 0x0000..0x7fff inclusive or
642 0xff8000..0xffffff inclusive, then it can be relaxed. */
643 if (value <= 0x7fff || value >= 0xff8000)
645 /* Change the reloc type. */
646 reloc->howto = howto_table + 17;
648 /* This shrinks this section by two bytes. */
649 shrink += 2;
650 bfd_perform_slip (abfd, 2, input_section, address);
652 break;
654 /* No other reloc types represent relaxing opportunities. */
655 default:
656 break;
659 last_reloc = reloc;
660 last_input_section = input_section;
661 return shrink;
664 /* Handle relocations for the H8/300, including relocs for relaxed
665 instructions.
667 FIXME: Not all relocations check for overflow! */
669 static void
670 h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr,
671 dst_ptr)
672 bfd *abfd;
673 struct bfd_link_info *link_info;
674 struct bfd_link_order *link_order;
675 arelent *reloc;
676 bfd_byte *data;
677 unsigned int *src_ptr;
678 unsigned int *dst_ptr;
680 unsigned int src_address = *src_ptr;
681 unsigned int dst_address = *dst_ptr;
682 asection *input_section = link_order->u.indirect.section;
683 bfd_vma value;
684 bfd_vma dot;
685 int gap, tmp;
687 switch (reloc->howto->type)
689 /* Generic 8bit pc-relative relocation. */
690 case R_PCRBYTE:
691 /* Get the address of the target of this branch. */
692 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
694 dot = (link_order->offset
695 + dst_address
696 + link_order->u.indirect.section->output_section->vma);
698 gap = value - dot;
700 /* Sanity check. */
701 if (gap < -128 || gap > 126)
703 if (! ((*link_info->callbacks->reloc_overflow)
704 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
705 reloc->howto->name, reloc->addend, input_section->owner,
706 input_section, reloc->address)))
707 abort ();
710 /* Everything looks OK. Apply the relocation and update the
711 src/dst address appropriately. */
713 bfd_put_8 (abfd, gap, data + dst_address);
714 dst_address++;
715 src_address++;
717 /* All done. */
718 break;
720 /* Generic 16bit pc-relative relocation. */
721 case R_PCRWORD:
722 /* Get the address of the target of this branch. */
723 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
725 /* Get the address of the instruction (not the reloc). */
726 dot = (link_order->offset
727 + dst_address
728 + link_order->u.indirect.section->output_section->vma + 1);
730 gap = value - dot;
732 /* Sanity check. */
733 if (gap > 32766 || gap < -32768)
735 if (! ((*link_info->callbacks->reloc_overflow)
736 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
737 reloc->howto->name, reloc->addend, input_section->owner,
738 input_section, reloc->address)))
739 abort ();
742 /* Everything looks OK. Apply the relocation and update the
743 src/dst address appropriately. */
745 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
746 dst_address += 2;
747 src_address += 2;
749 /* All done. */
750 break;
752 /* Generic 8bit absolute relocation. */
753 case R_RELBYTE:
754 /* Get the address of the object referenced by this insn. */
755 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
757 /* Sanity check. */
758 if (value <= 0xff
759 || (value >= 0x0000ff00 && value <= 0x0000ffff)
760 || (value >= 0x00ffff00 && value <= 0x00ffffff)
761 || (value >= 0xffffff00 && value <= 0xffffffff))
763 /* Everything looks OK. Apply the relocation and update the
764 src/dst address appropriately. */
766 bfd_put_8 (abfd, value & 0xff, data + dst_address);
767 dst_address += 1;
768 src_address += 1;
770 else
772 if (! ((*link_info->callbacks->reloc_overflow)
773 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
774 reloc->howto->name, reloc->addend, input_section->owner,
775 input_section, reloc->address)))
776 abort ();
779 /* All done. */
780 break;
782 /* Various simple 16bit absolute relocations. */
783 case R_MOV16B1:
784 case R_JMP1:
785 case R_RELWORD:
786 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
787 bfd_put_16 (abfd, value, data + dst_address);
788 dst_address += 2;
789 src_address += 2;
790 break;
792 /* Various simple 24/32bit absolute relocations. */
793 case R_MOV24B1:
794 case R_MOVL1:
795 case R_RELLONG:
796 /* Get the address of the target of this branch. */
797 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
798 bfd_put_32 (abfd, value, data + dst_address);
799 dst_address += 4;
800 src_address += 4;
801 break;
803 /* Another 24/32bit absolute relocation. */
804 case R_JMPL1:
805 /* Get the address of the target of this branch. */
806 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
808 value = ((value & 0x00ffffff)
809 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
810 bfd_put_32 (abfd, value, data + dst_address);
811 dst_address += 4;
812 src_address += 4;
813 break;
815 /* A 16bit abolute relocation that was formerlly a 24/32bit
816 absolute relocation. */
817 case R_MOVL2:
818 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
820 /* Sanity check. */
821 if (value <= 0x7fff || value >= 0xff8000)
823 /* Insert the 16bit value into the proper location. */
824 bfd_put_16 (abfd, value, data + dst_address);
826 /* Fix the opcode. For all the move insns, we simply
827 need to turn off bit 0x20 in the previous byte. */
828 data[dst_address - 1] &= ~0x20;
829 dst_address += 2;
830 src_address += 4;
832 else
834 if (! ((*link_info->callbacks->reloc_overflow)
835 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
836 reloc->howto->name, reloc->addend, input_section->owner,
837 input_section, reloc->address)))
838 abort ();
840 break;
842 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
843 case R_JMP2:
844 /* Get the address of the target of this branch. */
845 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
847 /* Get the address of the next instruction. */
848 dot = (link_order->offset
849 + dst_address
850 + link_order->u.indirect.section->output_section->vma + 1);
852 gap = value - dot;
854 /* Sanity check. */
855 if (gap < -128 || gap > 126)
857 if (! ((*link_info->callbacks->reloc_overflow)
858 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
859 reloc->howto->name, reloc->addend, input_section->owner,
860 input_section, reloc->address)))
861 abort ();
864 /* Now fix the instruction itself. */
865 switch (data[dst_address - 1])
867 case 0x5e:
868 /* jsr -> bsr */
869 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
870 break;
871 case 0x5a:
872 /* jmp ->bra */
873 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
874 break;
876 default:
877 abort ();
880 /* Write out the 8bit value. */
881 bfd_put_8 (abfd, gap, data + dst_address);
883 dst_address += 1;
884 src_address += 3;
886 break;
888 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
889 case R_PCRWORD_B:
890 /* Get the address of the target of this branch. */
891 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
893 /* Get the address of the instruction (not the reloc). */
894 dot = (link_order->offset
895 + dst_address
896 + link_order->u.indirect.section->output_section->vma - 1);
898 gap = value - dot;
900 /* Sanity check. */
901 if (gap < -128 || gap > 126)
903 if (! ((*link_info->callbacks->reloc_overflow)
904 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
905 reloc->howto->name, reloc->addend, input_section->owner,
906 input_section, reloc->address)))
907 abort ();
910 /* Now fix the instruction. */
911 switch (data[dst_address - 2])
913 case 0x58:
914 /* bCC:16 -> bCC:8 */
915 /* Get the condition code from the original insn. */
916 tmp = data[dst_address - 1];
917 tmp &= 0xf0;
918 tmp >>= 4;
920 /* Now or in the high nibble of the opcode. */
921 tmp |= 0x40;
923 /* Write it. */
924 bfd_put_8 (abfd, tmp, data + dst_address - 2);
925 break;
927 case 0x5c:
928 /* bsr:16 -> bsr:8 */
929 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
930 break;
932 default:
933 abort ();
936 /* Output the target. */
937 bfd_put_8 (abfd, gap, data + dst_address - 1);
939 /* We don't advance dst_address -- the 8bit reloc is applied at
940 dst_address - 1, so the next insn should begin at dst_address. */
941 src_address += 2;
943 break;
945 /* Similarly for a 24bit absolute that is now 8 bits. */
946 case R_JMPL2:
947 /* Get the address of the target of this branch. */
948 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
950 /* Get the address of the instruction (not the reloc). */
951 dot = (link_order->offset
952 + dst_address
953 + link_order->u.indirect.section->output_section->vma + 2);
955 gap = value - dot;
957 /* Fix the instruction. */
958 switch (data[src_address])
960 case 0x5e:
961 /* jsr -> bsr */
962 bfd_put_8 (abfd, 0x55, data + dst_address);
963 break;
964 case 0x5a:
965 /* jmp ->bra */
966 bfd_put_8 (abfd, 0x40, data + dst_address);
967 break;
968 default:
969 abort ();
972 bfd_put_8 (abfd, gap, data + dst_address + 1);
973 dst_address += 2;
974 src_address += 4;
976 break;
978 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
979 case R_MOV16B2:
980 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
982 /* Sanity check. */
983 if (data[dst_address - 2] != 0x6a)
984 abort ();
986 /* Fix up the opcode. */
987 switch (data[src_address - 1] & 0xf0)
989 case 0x00:
990 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
991 break;
992 case 0x80:
993 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
994 break;
995 default:
996 abort ();
999 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1000 src_address += 2;
1001 break;
1003 /* Similarly for a 24bit mov.b */
1004 case R_MOV24B2:
1005 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1007 /* Sanity check. */
1008 if (data[dst_address - 2] != 0x6a)
1009 abort ();
1011 /* Fix up the opcode. */
1012 switch (data[src_address - 1] & 0xf0)
1014 case 0x20:
1015 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
1016 break;
1017 case 0xa0:
1018 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
1019 break;
1020 default:
1021 abort ();
1024 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1025 src_address += 4;
1026 break;
1028 case R_BCC_INV:
1029 /* Get the address of the target of this branch. */
1030 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1032 dot = (link_order->offset
1033 + dst_address
1034 + link_order->u.indirect.section->output_section->vma) + 1;
1036 gap = value - dot;
1038 /* Sanity check. */
1039 if (gap < -128 || gap > 126)
1041 if (! ((*link_info->callbacks->reloc_overflow)
1042 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1043 reloc->howto->name, reloc->addend, input_section->owner,
1044 input_section, reloc->address)))
1045 abort ();
1048 /* Everything looks OK. Fix the condition in the instruction, apply
1049 the relocation, and update the src/dst address appropriately. */
1051 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1052 data + dst_address - 1);
1053 bfd_put_8 (abfd, gap, data + dst_address);
1054 dst_address++;
1055 src_address++;
1057 /* All done. */
1058 break;
1060 case R_JMP_DEL:
1061 src_address += 4;
1062 break;
1064 /* An 8bit memory indirect instruction (jmp/jsr).
1066 There's several things that need to be done to handle
1067 this relocation.
1069 If this is a reloc against the absolute symbol, then
1070 we should handle it just R_RELBYTE. Likewise if it's
1071 for a symbol with a value ge 0 and le 0xff.
1073 Otherwise it's a jump/call through the function vector,
1074 and the linker is expected to set up the function vector
1075 and put the right value into the jump/call instruction. */
1076 case R_MEM_INDIRECT:
1078 /* We need to find the symbol so we can determine it's
1079 address in the function vector table. */
1080 asymbol *symbol;
1081 const char *name;
1082 struct funcvec_hash_table *ftab;
1083 struct funcvec_hash_entry *h;
1084 asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec;
1086 /* First see if this is a reloc against the absolute symbol
1087 or against a symbol with a nonnegative value <= 0xff. */
1088 symbol = *(reloc->sym_ptr_ptr);
1089 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1090 if (symbol == bfd_abs_section_ptr->symbol
1091 || value <= 0xff)
1093 /* This should be handled in a manner very similar to
1094 R_RELBYTES. If the value is in range, then just slam
1095 the value into the right location. Else trigger a
1096 reloc overflow callback. */
1097 if (value <= 0xff)
1099 bfd_put_8 (abfd, value, data + dst_address);
1100 dst_address += 1;
1101 src_address += 1;
1103 else
1105 if (! ((*link_info->callbacks->reloc_overflow)
1106 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1107 reloc->howto->name, reloc->addend, input_section->owner,
1108 input_section, reloc->address)))
1109 abort ();
1111 break;
1114 /* This is a jump/call through a function vector, and we're
1115 expected to create the function vector ourselves.
1117 First look up this symbol in the linker hash table -- we need
1118 the derived linker symbol which holds this symbol's index
1119 in the function vector. */
1120 name = symbol->name;
1121 if (symbol->flags & BSF_LOCAL)
1123 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1124 if (new_name == NULL)
1125 abort ();
1127 strcpy (new_name, name);
1128 sprintf (new_name + strlen (name), "_%08x",
1129 (int) symbol->section);
1130 name = new_name;
1133 ftab = h8300_coff_hash_table (link_info)->funcvec_hash_table;
1134 h = funcvec_hash_lookup (ftab, name, false, false);
1136 /* This shouldn't ever happen. If it does that means we've got
1137 data corruption of some kind. Aborting seems like a reasonable
1138 think to do here. */
1139 if (h == NULL || vectors_sec == NULL)
1140 abort ();
1142 /* Place the address of the function vector entry into the
1143 reloc's address. */
1144 bfd_put_8 (abfd,
1145 vectors_sec->output_offset + h->offset,
1146 data + dst_address);
1148 dst_address++;
1149 src_address++;
1151 /* Now create an entry in the function vector itself. */
1152 if (bfd_get_mach (input_section->owner) == bfd_mach_h8300)
1153 bfd_put_16 (abfd,
1154 bfd_coff_reloc16_get_value (reloc,
1155 link_info,
1156 input_section),
1157 vectors_sec->contents + h->offset);
1158 else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h
1159 || bfd_get_mach (input_section->owner) == bfd_mach_h8300s)
1160 bfd_put_32 (abfd,
1161 bfd_coff_reloc16_get_value (reloc,
1162 link_info,
1163 input_section),
1164 vectors_sec->contents + h->offset);
1165 else
1166 abort ();
1168 /* Gross. We've already written the contents of the vector section
1169 before we get here... So we write it again with the new data. */
1170 bfd_set_section_contents (vectors_sec->output_section->owner,
1171 vectors_sec->output_section,
1172 vectors_sec->contents,
1173 (file_ptr) vectors_sec->output_offset,
1174 vectors_sec->_raw_size);
1175 break;
1178 default:
1179 abort ();
1180 break;
1184 *src_ptr = src_address;
1185 *dst_ptr = dst_address;
1188 /* Routine for the h8300 linker.
1190 This routine is necessary to handle the special R_MEM_INDIRECT
1191 relocs on the h8300. It's responsible for generating a vectors
1192 section and attaching it to an input bfd as well as sizing
1193 the vectors section. It also creates our vectors hash table.
1195 It uses the generic linker routines to actually add the symbols.
1196 from this BFD to the bfd linker hash table. It may add a few
1197 selected static symbols to the bfd linker hash table. */
1199 static boolean
1200 h8300_bfd_link_add_symbols (abfd, info)
1201 bfd *abfd;
1202 struct bfd_link_info *info;
1204 asection *sec;
1205 struct funcvec_hash_table *funcvec_hash_table;
1206 bfd_size_type amt;
1208 /* If we haven't created a vectors section, do so now. */
1209 if (!h8300_coff_hash_table (info)->vectors_sec)
1211 flagword flags;
1213 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1214 flags = (SEC_ALLOC | SEC_LOAD
1215 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1216 h8300_coff_hash_table (info)->vectors_sec = bfd_make_section (abfd,
1217 ".vectors");
1219 /* If the section wasn't created, or we couldn't set the flags,
1220 quit quickly now, rather than dieing a painful death later. */
1221 if (! h8300_coff_hash_table (info)->vectors_sec
1222 || ! bfd_set_section_flags (abfd,
1223 h8300_coff_hash_table(info)->vectors_sec,
1224 flags))
1225 return false;
1227 /* Also create the vector hash table. */
1228 amt = sizeof (struct funcvec_hash_table);
1229 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1231 if (!funcvec_hash_table)
1232 return false;
1234 /* And initialize the funcvec hash table. */
1235 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1236 funcvec_hash_newfunc))
1238 bfd_release (abfd, funcvec_hash_table);
1239 return false;
1242 /* Store away a pointer to the funcvec hash table. */
1243 h8300_coff_hash_table (info)->funcvec_hash_table = funcvec_hash_table;
1246 /* Load up the function vector hash table. */
1247 funcvec_hash_table = h8300_coff_hash_table (info)->funcvec_hash_table;
1249 /* Add the symbols using the generic code. */
1250 _bfd_generic_link_add_symbols (abfd, info);
1252 /* Now scan the relocs for all the sections in this bfd; create
1253 additional space in the .vectors section as needed. */
1254 for (sec = abfd->sections; sec; sec = sec->next)
1256 long reloc_size, reloc_count, i;
1257 asymbol **symbols;
1258 arelent **relocs;
1260 /* Suck in the relocs, symbols & canonicalize them. */
1261 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1262 if (reloc_size <= 0)
1263 continue;
1265 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1266 if (!relocs)
1267 return false;
1269 /* The symbols should have been read in by _bfd_generic link_add_symbols
1270 call abovec, so we can cheat and use the pointer to them that was
1271 saved in the above call. */
1272 symbols = _bfd_generic_link_get_symbols(abfd);
1273 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1274 if (reloc_count <= 0)
1276 free (relocs);
1277 continue;
1280 /* Now walk through all the relocations in this section. */
1281 for (i = 0; i < reloc_count; i++)
1283 arelent *reloc = relocs[i];
1284 asymbol *symbol = *(reloc->sym_ptr_ptr);
1285 const char *name;
1287 /* We've got an indirect reloc. See if we need to add it
1288 to the function vector table. At this point, we have
1289 to add a new entry for each unique symbol referenced
1290 by an R_MEM_INDIRECT relocation except for a reloc
1291 against the absolute section symbol. */
1292 if (reloc->howto->type == R_MEM_INDIRECT
1293 && symbol != bfd_abs_section_ptr->symbol)
1296 struct funcvec_hash_table *ftab;
1297 struct funcvec_hash_entry *h;
1299 name = symbol->name;
1300 if (symbol->flags & BSF_LOCAL)
1302 char *new_name;
1304 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1305 if (new_name == NULL)
1306 abort ();
1308 strcpy (new_name, name);
1309 sprintf (new_name + strlen (name), "_%08x",
1310 (int) symbol->section);
1311 name = new_name;
1314 /* Look this symbol up in the function vector hash table. */
1315 ftab = h8300_coff_hash_table (info)->funcvec_hash_table;
1316 h = funcvec_hash_lookup (ftab, name, false, false);
1318 /* If this symbol isn't already in the hash table, add
1319 it and bump up the size of the hash table. */
1320 if (h == NULL)
1322 h = funcvec_hash_lookup (ftab, name, true, true);
1323 if (h == NULL)
1325 free (relocs);
1326 return false;
1329 /* Bump the size of the vectors section. Each vector
1330 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1331 if (bfd_get_mach (abfd) == bfd_mach_h8300)
1332 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2;
1333 else if (bfd_get_mach (abfd) == bfd_mach_h8300h
1334 || bfd_get_mach (abfd) == bfd_mach_h8300s)
1335 h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4;
1340 /* We're done with the relocations, release them. */
1341 free (relocs);
1344 /* Now actually allocate some space for the function vector. It's
1345 wasteful to do this more than once, but this is easier. */
1346 sec = h8300_coff_hash_table (info)->vectors_sec;
1347 if (sec->_raw_size != 0)
1349 /* Free the old contents. */
1350 if (sec->contents)
1351 free (sec->contents);
1353 /* Allocate new contents. */
1354 sec->contents = bfd_malloc (sec->_raw_size);
1357 return true;
1360 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1361 #define coff_reloc16_estimate h8300_reloc16_estimate
1362 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1363 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1365 #define COFF_LONG_FILENAMES
1366 #include "coffcode.h"
1368 #undef coff_bfd_get_relocated_section_contents
1369 #undef coff_bfd_relax_section
1370 #define coff_bfd_get_relocated_section_contents \
1371 bfd_coff_reloc16_get_relocated_section_contents
1372 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1374 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL)