2 Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
21 /*======================================================================*/
23 * Herein lies the support for dynamic specification of processor
24 * instructions and registers. Mnemonics, values, and formats for each
25 * instruction and register are specified in an ascii file consisting of
26 * table entries. The grammar for the table is defined in the document
27 * "Processor instruction table specification".
29 * Instructions use the gnu assembler syntax, with the addition of
30 * allowing mnemonics for register.
31 * Eg. "func $2,reg3,0x100,symbol ; comment"
34 * reg3 - mnemonic for processor's register defined in table
35 * 0xddd..d - immediate value
36 * symbol - address of label or external symbol
38 * First, itbl_parse reads in the table of register and instruction
39 * names and formats, and builds a list of entries for each
40 * processor/type combination. lex and yacc are used to parse
41 * the entries in the table and call functions defined here to
42 * add each entry to our list.
44 * Then, when assembling or disassembling, these functions are called to
45 * 1) get information on a processor's registers and
46 * 2) assemble/disassemble an instruction.
47 * To assemble(disassemble) an instruction, the function
48 * itbl_assemble(itbl_disassemble) is called to search the list of
49 * instruction entries, and if a match is found, uses the format
50 * described in the instruction entry structure to complete the action.
52 * Eg. Suppose we have a Mips coprocessor "cop3" with data register "d2"
53 * and we want to define function "pig" which takes two operands.
55 * Given the table entries:
56 * "p3 insn pig 0x1:24-21 dreg:20-16 immed:15-0"
58 * and that the instruction encoding for coprocessor pz has encoding:
59 * #define MIPS_ENCODE_COP_NUM(z) ((0x21|(z<<1))<<25)
60 * #define ITBL_ENCODE_PNUM(pnum) MIPS_ENCODE_COP_NUM(pnum)
62 * a structure to describe the instruction might look something like:
63 * struct itbl_entry = {
64 * e_processor processor = e_p3
65 * e_type type = e_insn
69 * struct itbl_range range = 24-21
70 * struct itbl_field *field = {
71 * e_type type = e_dreg
72 * struct itbl_range range = 20-16
73 * struct itbl_field *next = {
74 * e_type type = e_immed
75 * struct itbl_range range = 15-0
76 * struct itbl_field *next = 0
79 * struct itbl_entry *next = 0
82 * And the assembler instructions:
86 * would both assemble to the hex value:
95 #include "itbl-parse.h"
101 #define ASSERT(x) assert(x)
102 #define DBG(x) printf x
109 #define min(a,b) (a<b?a:b)
112 int itbl_have_entries
= 0;
114 /*======================================================================*/
115 /* structures for keeping itbl format entries */
118 int sbit
; /* mask starting bit position */
119 int ebit
; /* mask ending bit position */
123 e_type type
; /* dreg/creg/greg/immed/symb */
124 struct itbl_range range
; /* field's bitfield range within instruction */
125 unsigned long flags
; /* field flags */
126 struct itbl_field
*next
; /* next field in list */
129 /* These structures define the instructions and registers for a processor.
130 * If the type is an instruction, the structure defines the format of an
131 * instruction where the fields are the list of operands.
132 * The flags field below uses the same values as those defined in the
133 * gnu assembler and are machine specific. */
135 e_processor processor
; /* processor number */
136 e_type type
; /* dreg/creg/greg/insn */
137 char *name
; /* mnemionic name for insn/register */
138 unsigned long value
; /* opcode/instruction mask/register number */
139 unsigned long flags
; /* effects of the instruction */
140 struct itbl_range range
; /* bit range within instruction for value */
141 struct itbl_field
*fields
; /* list of operand definitions (if any) */
142 struct itbl_entry
*next
; /* next entry */
145 /* local data and structures */
147 static int itbl_num_opcodes
= 0;
148 /* Array of entries for each processor and entry type */
149 static struct itbl_entry
*entries
[e_nprocs
][e_ntypes
] = {
156 /* local prototypes */
157 static unsigned long build_opcode
PARAMS ((struct itbl_entry
*e
));
158 static e_type get_type
PARAMS ((int yytype
));
159 static e_processor get_processor
PARAMS ((int yyproc
));
160 static struct itbl_entry
**get_entries
PARAMS ((e_processor processor
,
162 static struct itbl_entry
*find_entry_byname
PARAMS ((e_processor processor
,
163 e_type type
, char *name
));
164 static struct itbl_entry
*find_entry_byval
PARAMS ((e_processor processor
,
165 e_type type
, unsigned long val
, struct itbl_range
*r
));
166 static struct itbl_entry
*alloc_entry
PARAMS ((e_processor processor
,
167 e_type type
, char *name
, unsigned long value
));
168 static unsigned long apply_range
PARAMS ((unsigned long value
,
169 struct itbl_range r
));
170 static unsigned long extract_range
PARAMS ((unsigned long value
,
171 struct itbl_range r
));
172 static struct itbl_field
*alloc_field
PARAMS ((e_type type
, int sbit
,
173 int ebit
, unsigned long flags
));
175 /*======================================================================*/
176 /* Interfaces to the parser */
178 /* Open the table and use lex and yacc to parse the entries.
179 * Return 1 for failure; 0 for success. */
182 itbl_parse (char *insntbl
)
185 extern int yyparse (void);
186 yyin
= fopen (insntbl
, "r");
189 printf ("Can't open processor instruction specification file \"%s\"\n",
198 itbl_have_entries
= 1;
202 /* Add a register entry */
205 itbl_add_reg (int yyprocessor
, int yytype
, char *regname
,
211 /* Since register names don't have a prefix, we put them in the symbol table so
212 they can't be used as symbols. This also simplifies argument parsing as
213 we can let gas parse registers for us. The recorded register number is
215 /* Use symbol_create here instead of symbol_new so we don't try to
216 output registers into the object file's symbol table. */
217 symbol_table_insert (symbol_create (regname
, reg_section
,
218 regnum
, &zero_address_frag
));
220 return alloc_entry (get_processor (yyprocessor
), get_type (yytype
), regname
,
221 (unsigned long) regnum
);
224 /* Add an instruction entry */
227 itbl_add_insn (int yyprocessor
, char *name
, unsigned long value
,
228 int sbit
, int ebit
, unsigned long flags
)
230 struct itbl_entry
*e
;
231 e
= alloc_entry (get_processor (yyprocessor
), e_insn
, name
, value
);
234 e
->range
.sbit
= sbit
;
235 e
->range
.ebit
= ebit
;
242 /* Add an operand to an instruction entry */
245 itbl_add_operand (struct itbl_entry
*e
, int yytype
, int sbit
,
246 int ebit
, unsigned long flags
)
248 struct itbl_field
*f
, **last_f
;
251 /* Add to end of fields' list. */
252 f
= alloc_field (get_type (yytype
), sbit
, ebit
, flags
);
257 last_f
= &(*last_f
)->next
;
264 /*======================================================================*/
265 /* Interfaces for assembler and disassembler */
270 static void append_insns_as_macros (void);
272 /* Initialize for gas. */
277 struct itbl_entry
*e
, **es
;
281 if (!itbl_have_entries
)
284 /* Since register names don't have a prefix, put them in the symbol table so
285 they can't be used as symbols. This simplifies argument parsing as
286 we can let gas parse registers for us. */
287 /* Use symbol_create instead of symbol_new so we don't try to
288 output registers into the object file's symbol table. */
290 for (type
= e_regtype0
; type
< e_nregtypes
; type
++)
291 for (procn
= e_p0
; procn
< e_nprocs
; procn
++)
293 es
= get_entries (procn
, type
);
294 for (e
= *es
; e
; e
= e
->next
)
296 symbol_table_insert (symbol_create (e
->name
, reg_section
,
297 e
->value
, &zero_address_frag
));
300 append_insns_as_macros ();
303 /* Append insns to opcodes table and increase number of opcodes
304 * Structure of opcodes table:
308 * const char *args; - string describing the arguments.
309 * unsigned long match; - opcode, or ISA level if pinfo=INSN_MACRO
310 * unsigned long mask; - opcode mask, or macro id if pinfo=INSN_MACRO
311 * unsigned long pinfo; - insn flags, or INSN_MACRO
314 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t },
315 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO },
318 static char *form_args (struct itbl_entry
*e
);
320 append_insns_as_macros (void)
322 struct ITBL_OPCODE_STRUCT
*new_opcodes
, *o
;
323 struct itbl_entry
*e
, **es
;
324 int n
, id
, size
, new_size
, new_num_opcodes
;
326 if (!itbl_have_entries
)
329 if (!itbl_num_opcodes
) /* no new instructions to add! */
333 DBG (("previous num_opcodes=%d\n", ITBL_NUM_OPCODES
));
335 new_num_opcodes
= ITBL_NUM_OPCODES
+ itbl_num_opcodes
;
336 ASSERT (new_num_opcodes
>= itbl_num_opcodes
);
338 size
= sizeof (struct ITBL_OPCODE_STRUCT
) * ITBL_NUM_OPCODES
;
340 DBG (("I get=%d\n", size
/ sizeof (ITBL_OPCODES
[0])));
342 new_size
= sizeof (struct ITBL_OPCODE_STRUCT
) * new_num_opcodes
;
343 ASSERT (new_size
> size
);
345 /* FIXME since ITBL_OPCODES culd be a static table,
346 we can't realloc or delete the old memory. */
347 new_opcodes
= (struct ITBL_OPCODE_STRUCT
*) malloc (new_size
);
350 printf (_("Unable to allocate memory for new instructions\n"));
353 if (size
) /* copy prexisting opcodes table */
354 memcpy (new_opcodes
, ITBL_OPCODES
, size
);
356 /* FIXME! some NUMOPCODES are calculated expressions.
357 These need to be changed before itbls can be supported. */
359 id
= ITBL_NUM_MACROS
; /* begin the next macro id after the last */
360 o
= &new_opcodes
[ITBL_NUM_OPCODES
]; /* append macro to opcodes list */
361 for (n
= e_p0
; n
< e_nprocs
; n
++)
363 es
= get_entries (n
, e_insn
);
364 for (e
= *es
; e
; e
= e
->next
)
366 /* name, args, mask, match, pinfo
367 * {"li", "t,i", 0x34000000, 0xffe00000, WR_t },
368 * {"li", "t,I", 0, (int) M_LI, INSN_MACRO },
369 * Construct args from itbl_fields.
372 o
->args
= strdup (form_args (e
));
373 o
->mask
= apply_range (e
->value
, e
->range
);
374 /* FIXME how to catch durring assembly? */
375 /* mask to identify this insn */
376 o
->match
= apply_range (e
->value
, e
->range
);
380 o
->mask
= id
++; /* FIXME how to catch durring assembly? */
381 o
->match
= 0; /* for macros, the insn_isa number */
382 o
->pinfo
= INSN_MACRO
;
385 /* Don't add instructions which caused an error */
392 ITBL_OPCODES
= new_opcodes
;
393 ITBL_NUM_OPCODES
= new_num_opcodes
;
396 At this point, we can free the entries, as they should have
397 been added to the assembler's tables.
398 Don't free name though, since name is being used by the new
401 Eventually, we should also free the new opcodes table itself
407 form_args (struct itbl_entry
*e
)
411 struct itbl_field
*f
;
414 for (f
= e
->fields
; f
; f
= f
->next
)
434 c
= 0; /* ignore; unknown field type */
446 #endif /* !STAND_ALONE */
448 /* Get processor's register name from val */
451 itbl_get_reg_val (char *name
, unsigned long *pval
)
456 for (p
= e_p0
; p
< e_nprocs
; p
++)
458 for (t
= e_regtype0
; t
< e_nregtypes
; t
++)
460 if (itbl_get_val (p
, t
, name
, pval
))
468 itbl_get_name (e_processor processor
, e_type type
, unsigned long val
)
470 struct itbl_entry
*r
;
471 /* type depends on instruction passed */
472 r
= find_entry_byval (processor
, type
, val
, 0);
476 return 0; /* error; invalid operand */
479 /* Get processor's register value from name */
482 itbl_get_val (e_processor processor
, e_type type
, char *name
,
485 struct itbl_entry
*r
;
486 /* type depends on instruction passed */
487 r
= find_entry_byname (processor
, type
, name
);
494 /* Assemble instruction "name" with operands "s".
495 * name - name of instruction
497 * returns - long word for assembled instruction */
500 itbl_assemble (char *name
, char *s
)
502 unsigned long opcode
;
503 struct itbl_entry
*e
;
504 struct itbl_field
*f
;
509 return 0; /* error! must have a opcode name/expr */
511 /* find entry in list of instructions for all processors */
512 for (processor
= 0; processor
< e_nprocs
; processor
++)
514 e
= find_entry_byname (processor
, e_insn
, name
);
519 return 0; /* opcode not in table; invalid instrustion */
520 opcode
= build_opcode (e
);
522 /* parse opcode's args (if any) */
523 for (f
= e
->fields
; f
; f
= f
->next
) /* for each arg, ... */
525 struct itbl_entry
*r
;
528 return 0; /* error - not enough operands */
529 n
= itbl_get_field (&s
);
530 /* n should be in form $n or 0xhhh (are symbol names valid?? */
536 /* Accept either a string name
537 * or '$' followed by the register number */
541 value
= strtol (n
, 0, 10);
542 /* FIXME! could have "0l"... then what?? */
543 if (value
== 0 && *n
!= '0')
544 return 0; /* error; invalid operand */
548 r
= find_entry_byname (e
->processor
, f
->type
, n
);
552 return 0; /* error; invalid operand */
556 /* use assembler's symbol table to find symbol */
557 /* FIXME!! Do we need this?
558 if so, what about relocs??
559 my_getExpression (&imm_expr, s);
560 return 0; /-* error; invalid operand *-/
563 /* If not a symbol, fall thru to IMMED */
565 if (*n
== '0' && *(n
+ 1) == 'x') /* hex begins 0x... */
568 value
= strtol (n
, 0, 16);
569 /* FIXME! could have "0xl"... then what?? */
573 value
= strtol (n
, 0, 10);
574 /* FIXME! could have "0l"... then what?? */
575 if (value
== 0 && *n
!= '0')
576 return 0; /* error; invalid operand */
580 return 0; /* error; invalid field spec */
582 opcode
|= apply_range (value
, f
->range
);
585 return 0; /* error - too many operands */
586 return opcode
; /* done! */
589 /* Disassemble instruction "insn".
591 * s - buffer to hold disassembled instruction
592 * returns - 1 if succeeded; 0 if failed
596 itbl_disassemble (char *s
, unsigned long insn
)
598 e_processor processor
;
599 struct itbl_entry
*e
;
600 struct itbl_field
*f
;
602 if (!ITBL_IS_INSN (insn
))
603 return 0; /* error */
604 processor
= get_processor (ITBL_DECODE_PNUM (insn
));
606 /* find entry in list */
607 e
= find_entry_byval (processor
, e_insn
, insn
, 0);
609 return 0; /* opcode not in table; invalid instrustion */
612 /* Parse insn's args (if any). */
613 for (f
= e
->fields
; f
; f
= f
->next
) /* for each arg, ... */
615 struct itbl_entry
*r
;
618 if (f
== e
->fields
) /* First operand is preceeded by tab. */
620 else /* ','s separate following operands. */
622 value
= extract_range (insn
, f
->range
);
623 /* n should be in form $n or 0xhhh (are symbol names valid?? */
629 /* Accept either a string name
630 or '$' followed by the register number. */
631 r
= find_entry_byval (e
->processor
, f
->type
, value
, &f
->range
);
635 sprintf (s
, "%s$%lu", s
, value
);
638 /* Use assembler's symbol table to find symbol. */
639 /* FIXME!! Do we need this? If so, what about relocs?? */
640 /* If not a symbol, fall through to IMMED. */
642 sprintf (s
, "%s0x%lx", s
, value
);
645 return 0; /* error; invalid field spec */
648 return 1; /* Done! */
651 /*======================================================================*/
653 * Local functions for manipulating private structures containing
654 * the names and format for the new instructions and registers
655 * for each processor.
658 /* Calculate instruction's opcode and function values from entry */
661 build_opcode (struct itbl_entry
*e
)
663 unsigned long opcode
;
665 opcode
= apply_range (e
->value
, e
->range
);
666 opcode
|= ITBL_ENCODE_PNUM (e
->processor
);
670 /* Calculate absolute value given the relative value and bit position range
671 * within the instruction.
672 * The range is inclusive where 0 is least significant bit.
673 * A range of { 24, 20 } will have a mask of
675 * pos: 1098 7654 3210 9876 5432 1098 7654 3210
676 * bin: 0000 0001 1111 0000 0000 0000 0000 0000
677 * hex: 0 1 f 0 0 0 0 0
682 apply_range (unsigned long rval
, struct itbl_range r
)
686 int len
= MAX_BITPOS
- r
.sbit
;
688 ASSERT (r
.sbit
>= r
.ebit
);
689 ASSERT (MAX_BITPOS
>= r
.sbit
);
690 ASSERT (r
.ebit
>= 0);
692 /* create mask by truncating 1s by shifting */
693 mask
= 0xffffffff << len
;
695 mask
= mask
>> r
.ebit
;
696 mask
= mask
<< r
.ebit
;
698 aval
= (rval
<< r
.ebit
) & mask
;
702 /* Calculate relative value given the absolute value and bit position range
703 * within the instruction. */
706 extract_range (unsigned long aval
, struct itbl_range r
)
710 int len
= MAX_BITPOS
- r
.sbit
;
712 /* create mask by truncating 1s by shifting */
713 mask
= 0xffffffff << len
;
715 mask
= mask
>> r
.ebit
;
716 mask
= mask
<< r
.ebit
;
718 rval
= (aval
& mask
) >> r
.ebit
;
722 /* Extract processor's assembly instruction field name from s;
723 * forms are "n args" "n,args" or "n" */
724 /* Return next argument from string pointer "s" and advance s.
725 * delimiters are " ,()" */
728 itbl_get_field (char **S
)
737 /* FIXME: This is a weird set of delimiters. */
738 len
= strcspn (s
, " \t,()");
739 ASSERT (128 > len
+ 1);
743 s
= 0; /* no more args */
745 s
+= len
+ 1; /* advance to next arg */
751 /* Search entries for a given processor and type
752 * to find one matching the name "n".
753 * Return a pointer to the entry */
755 static struct itbl_entry
*
756 find_entry_byname (e_processor processor
,
757 e_type type
, char *n
)
759 struct itbl_entry
*e
, **es
;
761 es
= get_entries (processor
, type
);
762 for (e
= *es
; e
; e
= e
->next
) /* for each entry, ... */
764 if (!strcmp (e
->name
, n
))
770 /* Search entries for a given processor and type
771 * to find one matching the value "val" for the range "r".
772 * Return a pointer to the entry.
773 * This function is used for disassembling fields of an instruction.
776 static struct itbl_entry
*
777 find_entry_byval (e_processor processor
, e_type type
,
778 unsigned long val
, struct itbl_range
*r
)
780 struct itbl_entry
*e
, **es
;
783 es
= get_entries (processor
, type
);
784 for (e
= *es
; e
; e
= e
->next
) /* for each entry, ... */
786 if (processor
!= e
->processor
)
788 /* For insns, we might not know the range of the opcode,
789 * so a range of 0 will allow this routine to match against
790 * the range of the entry to be compared with.
791 * This could cause ambiguities.
792 * For operands, we get an extracted value and a range.
794 /* if range is 0, mask val against the range of the compared entry. */
795 if (r
== 0) /* if no range passed, must be whole 32-bits
796 * so create 32-bit value from entry's range */
798 eval
= apply_range (e
->value
, e
->range
);
799 val
&= apply_range (0xffffffff, e
->range
);
801 else if ((r
->sbit
== e
->range
.sbit
&& r
->ebit
== e
->range
.ebit
)
802 || (e
->range
.sbit
== 0 && e
->range
.ebit
== 0))
804 eval
= apply_range (e
->value
, *r
);
805 val
= apply_range (val
, *r
);
815 /* Return a pointer to the list of entries for a given processor and type. */
817 static struct itbl_entry
**
818 get_entries (e_processor processor
, e_type type
)
820 return &entries
[processor
][type
];
823 /* Return an integral value for the processor passed from yyparse. */
826 get_processor (int yyproc
)
828 /* translate from yacc's processor to enum */
829 if (yyproc
>= e_p0
&& yyproc
< e_nprocs
)
830 return (e_processor
) yyproc
;
831 return e_invproc
; /* error; invalid processor */
834 /* Return an integral value for the entry type passed from yyparse. */
837 get_type (int yytype
)
841 /* translate from yacc's type to enum */
855 return e_invtype
; /* error; invalid type */
859 /* Allocate and initialize an entry */
861 static struct itbl_entry
*
862 alloc_entry (e_processor processor
, e_type type
,
863 char *name
, unsigned long value
)
865 struct itbl_entry
*e
, **es
;
868 e
= (struct itbl_entry
*) malloc (sizeof (struct itbl_entry
));
871 memset (e
, 0, sizeof (struct itbl_entry
));
872 e
->name
= (char *) malloc (sizeof (strlen (name
)) + 1);
874 strcpy (e
->name
, name
);
875 e
->processor
= processor
;
878 es
= get_entries (e
->processor
, e
->type
);
885 /* Allocate and initialize an entry's field */
887 static struct itbl_field
*
888 alloc_field (e_type type
, int sbit
, int ebit
,
891 struct itbl_field
*f
;
892 f
= (struct itbl_field
*) malloc (sizeof (struct itbl_field
));
895 memset (f
, 0, sizeof (struct itbl_field
));
897 f
->range
.sbit
= sbit
;
898 f
->range
.ebit
= ebit
;