3 #name
: PowerPC Test
1, 32 bit XCOFF
5 .*: +file format aixcoff
-rs6000
7 architecture
: rs6000
:6000, flags
0x00000031:
8 HAS_RELOC
, HAS_SYMS
, HAS_LOCALS
12 Idx Name
+Size
+VMA
+LMA
+File off
+Algn
13 0 \
.text
+00000068 0+0000 0+0000 000000a8
2\
*\
*2
14 +CONTENTS
, ALLOC
, LOAD
, RELOC
, CODE
15 1 \
.data
+00000028 0+0068 0+0068 00000110 2\
*\
*3
16 +CONTENTS
, ALLOC
, LOAD
, RELOC
, DATA
17 2 \
.bss
+00000000 0+0090 0+0090 00000000 2\
*\
*3
20 \
[ 0\
]\
(sec
-2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
103\
) \
(nx
1\
) 0x00000000 fake
22 \
[ 2\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000000 \
.crazy_table
23 AUX val
8 prmhsh
0 snhsh
0 typ
1 algn
2 clss
1 stb
0 snstb
0
24 \
[ 4\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000008
25 AUX val
96 prmhsh
0 snhsh
0 typ
1 algn
2 clss
0 stb
0 snstb
0
26 \
[ 6\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000008 reference_csect_relative_symbols
27 AUX indx
4 prmhsh
0 snhsh
0 typ
2 algn
0 clss
0 stb
0 snstb
0
28 \
[ 8\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000018 dubious_references_to_default_RW_csect
29 AUX indx
4 prmhsh
0 snhsh
0 typ
2 algn
0 clss
0 stb
0 snstb
0
30 \
[ 10\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000028 reference_via_toc
31 AUX indx
4 prmhsh
0 snhsh
0 typ
2 algn
0 clss
0 stb
0 snstb
0
32 \
[ 12\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000040 subtract_symbols
33 AUX indx
4 prmhsh
0 snhsh
0 typ
2 algn
0 clss
0 stb
0 snstb
0
34 \
[ 14\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x0000005c load_addresses
35 AUX indx
4 prmhsh
0 snhsh
0 typ
2 algn
0 clss
0 stb
0 snstb
0
36 \
[ 16\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000068
37 AUX val
12 prmhsh
0 snhsh
0 typ
1 algn
2 clss
5 stb
0 snstb
0
38 \
[ 18\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000074 TOC
39 AUX val
0 prmhsh
0 snhsh
0 typ
1 algn
2 clss
15 stb
0 snstb
0
40 \
[ 20\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000074 ignored0
41 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
42 \
[ 22\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000078 ignored1
43 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
44 \
[ 24\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x0000007c ignored2
45 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
46 \
[ 26\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000080 ignored3
47 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
48 \
[ 28\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000084 ignored4
49 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
50 \
[ 30\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x00000088 ignored5
51 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
52 \
[ 32\
]\
(sec
2\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
107\
) \
(nx
1\
) 0x0000008c ignored6
53 AUX val
4 prmhsh
0 snhsh
0 typ
1 algn
2 clss
3 stb
0 snstb
0
54 \
[ 34\
]\
(sec
0\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
2\
) \
(nx
1\
) 0x00000000 esym0
55 AUX val
0 prmhsh
0 snhsh
0 typ
0 algn
0 clss
0 stb
0 snstb
0
56 \
[ 36\
]\
(sec
0\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
2\
) \
(nx
1\
) 0x00000000 esym1
57 AUX val
0 prmhsh
0 snhsh
0 typ
0 algn
0 clss
0 stb
0 snstb
0
58 \
[ 38\
]\
(sec
1\
)\
(fl
0x00\
)\
(ty
0\
)\
(scl
3\
) \
(nx
1\
) 0x00000000 \
.text
59 AUX scnlen
0x68 nreloc
7 nlnno
0
62 Disassembly of section \
.text
:
64 0+0000 <\
.crazy_table
>:
65 0: 00 be ef ed \
.long 0xbeefed
66 4: 00 be ef ed \
.long 0xbeefed
68 0+0008 <reference_csect_relative_symbols
>:
69 8: 80 63 00 00 l r3
,0\
(r3\
)
70 c
: 80 63 00 04 l r3
,4\
(r3\
)
71 10: 80 63 00 04 l r3
,4\
(r3\
)
72 14: 80 63 00 08 l r3
,8\
(r3\
)
74 0+0018 <dubious_references_to_default_RW_csect
>:
75 18: 80 63 00 00 l r3
,0\
(r3\
)
76 1c
: 80 63 00 04 l r3
,4\
(r3\
)
77 20: 80 63 00 04 l r3
,4\
(r3\
)
78 24: 80 63 00 08 l r3
,8\
(r3\
)
80 0+0028 <reference_via_toc
>:
81 28: 80 62 00 00 l r3
,0\
(r2\
)
82 2a
: R_TOC ignored0\
+0xf+ff8c
83 2c
: 80 62 00 04 l r3
,4\
(r2\
)
84 2e
: R_TOC ignored1\
+0xf+ff88
85 30: 80 62 00 08 l r3
,8\
(r2\
)
86 32: R_TOC ignored2\
+0xf+ff84
87 34: 80 62 00 0c l r3
,12\
(r2\
)
88 36: R_TOC ignored3\
+0xf+ff80
89 38: 80 62 00 10 l r3
,16\
(r2\
)
90 3a
: R_TOC ignored4\
+0xf+ff7c
91 3c
: 80 62 00 14 l r3
,20\
(r2\
)
92 3e
: R_TOC ignored5\
+0xf+ff78
94 0+0040 <subtract_symbols
>:
95 40: 38 60 00 04 lil r3
,4
96 44: 38 60 ff fc lil r3
,-4
97 48: 38 60 00 04 lil r3
,4
98 4c
: 38 60 ff fc lil r3
,-4
99 50: 38 60 ff fc lil r3
,-4
100 54: 38 60 00 04 lil r3
,4
101 58: 80 64 00 04 l r3
,4\
(r4\
)
103 0+005c
<load_addresses
>:
104 5c
: 38 60 00 00 lil r3
,0
105 60: 38 60 00 04 lil r3
,4
106 64: 38 62 00 18 cal r3
,24\
(r2\
)
107 66: R_TOC ignored6\
+0xf+ff74
108 Disassembly of section \
.data
:
111 68: de ad be ef stfdu f21
,-16657\
(r13\
)
112 6c
: ca fe ba be lfd f23
,-17730\
(r30\
)
113 70: 00 00 ba ad \
.long 0xbaad
116 74: 00 00 00 68 \
.long 0x68
117 74: R_POS \
.data\
+0xf+ff98
120 78: 00 00 00 6c \
.long 0x6c
121 78: R_POS \
.data\
+0xf+ff98
124 7c
: 00 00 00 6c \
.long 0x6c
125 7c
: R_POS \
.data\
+0xf+ff98
128 80: 00 00 00 70 \
.long 0x70
129 80: R_POS \
.data\
+0xf+ff98
132 84: 00 00 00 00 \
.long 0x0
136 88: 00 00 00 00 \
.long 0x0
140 8c
: 00 00 00 00 \
.long 0x0