1 /* Disassemble AVR instructions.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 int insn_size
; /* in words */
33 unsigned int bin_opcode
;
34 unsigned int bin_mask
;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN, 0},
40 struct avr_opcodes_s avr_opcodes
[] =
42 #include "opcode/avr.h"
43 {NULL
, NULL
, NULL
, 0, 0, 0, 0}
47 static void avr_operand (unsigned int insn
, unsigned int insn2
,
48 unsigned int pc
, int constraint
, char *buf
,
49 char *comment
, int regs
);
52 avr_operand (insn
, insn2
, pc
, constraint
, buf
, comment
, regs
)
63 /* Any register operand. */
66 insn
= (insn
& 0xf) | ((insn
& 0x0200) >> 5); /* source register */
68 insn
= (insn
& 0x01f0) >> 4; /* destination register */
70 sprintf (buf
, "r%d", insn
);
75 sprintf (buf
, "r%d", 16 + (insn
& 0xf));
77 sprintf (buf
, "r%d", 16 + ((insn
& 0xf0) >> 4));
81 sprintf (buf
, "r%d", 24 + ((insn
& 0x30) >> 3));
86 sprintf (buf
, "r%d", 16 + (insn
& 7));
88 sprintf (buf
, "r%d", 16 + ((insn
>> 4) & 7));
93 sprintf (buf
, "r%d", (insn
& 0xf) * 2);
95 sprintf (buf
, "r%d", ((insn
& 0xf0) >> 3));
101 switch ((insn
>> 2) & 0x3)
103 case 0: *buf
++ = 'Z'; break;
104 case 2: *buf
++ = 'Y'; break;
105 case 3: *buf
++ = 'X'; break;
106 default: buf
+= sprintf (buf
, _ (" unknown register ")); break;
122 unsigned int x
= insn
;
125 x
|= (insn
>> 7) & (3 << 3);
126 x
|= (insn
>> 8) & (1 << 5);
132 sprintf (buf
, "+%d", x
);
133 sprintf (comment
, "0x%02x", x
);
138 sprintf (buf
, "0x%x%x", (insn
& 1) | ((insn
& (0x1f << 4)) >> 3), insn2
);
143 int rel_addr
= (((insn
& 0xfff) ^ 0x800) - 0x800) * 2;
144 sprintf (buf
, ".%+-8d", rel_addr
);
145 sprintf (comment
, "0x%x", pc
+ 2 + rel_addr
);
151 int rel_addr
= ((((insn
>> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
152 sprintf (buf
, ".%+-8d", rel_addr
);
153 sprintf (comment
, "0x%x", pc
+ 2 + rel_addr
);
158 sprintf (buf
, "0x%04X", insn2
);
162 sprintf (buf
, "0x%02X", ((insn
& 0xf00) >> 4) | (insn
& 0xf));
163 sprintf (comment
, "%d", ((insn
& 0xf00) >> 4) | (insn
& 0xf));
167 sprintf (buf
, _ ("Internal disassembler error"));
171 sprintf (buf
, "%d", (insn
& 0xf) | ((insn
>> 2) & 0x30));
175 sprintf (buf
, "%d", insn
& 7);
179 sprintf (buf
, "%d", (insn
>> 4) & 7);
186 x
|= (insn
>> 5) & 0x30;
187 sprintf (buf
, "0x%02x", x
);
188 sprintf (comment
, "%d", x
);
196 x
= (insn
>> 3) & 0x1f;
197 sprintf (buf
, "0x%02x", x
);
198 sprintf (comment
, "%d", x
);
207 sprintf (buf
, _ ("unknown constraint `%c'"), constraint
);
211 static unsigned short avrdis_opcode
PARAMS ((bfd_vma
, disassemble_info
*));
213 static unsigned short
214 avrdis_opcode (addr
, info
)
216 disassemble_info
*info
;
220 status
= info
->read_memory_func(addr
, buffer
, 2, info
);
223 info
->memory_error_func(status
, addr
, info
);
226 return bfd_getl16 (buffer
);
231 print_insn_avr(addr
, info
)
233 disassemble_info
*info
;
235 unsigned int insn
, insn2
;
236 struct avr_opcodes_s
*opcode
;
237 void *stream
= info
->stream
;
238 fprintf_ftype prin
= info
->fprintf_func
;
239 static int initialized
;
246 for (opcode
= avr_opcodes
; opcode
->name
; opcode
++)
249 unsigned int bin
= 0;
250 unsigned int mask
= 0;
252 for (s
= opcode
->opcode
; *s
; ++s
)
257 mask
|= (*s
== '1' || *s
== '0');
259 assert (s
- opcode
->opcode
== 16);
260 assert (opcode
->bin_opcode
== bin
);
261 opcode
->bin_mask
= mask
;
265 insn
= avrdis_opcode (addr
, info
);
267 for (opcode
= avr_opcodes
; opcode
->name
; opcode
++)
269 if ((insn
& opcode
->bin_mask
) == opcode
->bin_opcode
)
275 char op1
[20], op2
[20], comment1
[40], comment2
[40];
276 char *op
= opcode
->constraints
;
283 if (opcode
->insn_size
> 1)
285 insn2
= avrdis_opcode (addr
+ 2, info
);
289 if (*op
&& *op
!= '?')
291 int regs
= REGISTER_P (*op
);
293 avr_operand (insn
, insn2
, addr
, *op
, op1
, comment1
, 0);
296 avr_operand (insn
, insn2
, addr
, *(++op
), op2
,
297 *comment1
? comment2
: comment1
, regs
);
300 (*prin
) (stream
, " %-8s", opcode
->name
);
303 (*prin
) (stream
, "%s", op1
);
306 (*prin
) (stream
, ", %s", op2
);
309 (*prin
) (stream
, "\t; %s", comment1
);
312 (*prin
) (stream
, " %s", comment2
);
315 (*prin
) (stream
, ".word 0x%04x\t; ????", insn
);