1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct symbol_cache_entry **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is
126 the pointer into the table returned by the back end's
127 <<get_symtab>> action. @xref{Symbols}. The symbol is referenced
128 through a pointer to a pointer so that tools like the linker
129 can fix up all the symbols of the same name by modifying only
130 one pointer. The relocation routine looks in the symbol and
131 uses the base of the section the symbol is attached to and the
132 value of the symbol as the initial relocation offset. If the
133 symbol pointer is zero, then the section provided is looked up.
137 The <<address>> field gives the offset in bytes from the base of
138 the section data which owns the relocation record to the first
139 byte of relocatable information. The actual data relocated
140 will be relative to this point; for example, a relocation
141 type which modifies the bottom two bytes of a four byte word
142 would not touch the first byte pointed to in a big endian
147 The <<addend>> is a value provided by the back end to be added (!)
148 to the relocation offset. Its interpretation is dependent upon
149 the howto. For example, on the 68k the code:
154 | return foo[0x12345678];
157 Could be compiled into:
160 | moveb @@#12345678,d0
165 This could create a reloc pointing to <<foo>>, but leave the
166 offset in the data, something like:
168 |RELOCATION RECORDS FOR [.text]:
172 |00000000 4e56 fffc ; linkw fp,#-4
173 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
174 |0000000a 49c0 ; extbl d0
175 |0000000c 4e5e ; unlk fp
178 Using coff and an 88k, some instructions don't have enough
179 space in them to represent the full address range, and
180 pointers have to be loaded in two parts. So you'd get something like:
182 | or.u r13,r0,hi16(_foo+0x12345678)
183 | ld.b r2,r13,lo16(_foo+0x12345678)
186 This should create two relocs, both pointing to <<_foo>>, and with
187 0x12340000 in their addend field. The data would consist of:
189 |RELOCATION RECORDS FOR [.text]:
191 |00000002 HVRT16 _foo+0x12340000
192 |00000006 LVRT16 _foo+0x12340000
194 |00000000 5da05678 ; or.u r13,r0,0x5678
195 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
196 |00000008 f400c001 ; jmp r1
198 The relocation routine digs out the value from the data, adds
199 it to the addend to get the original offset, and then adds the
200 value of <<_foo>>. Note that all 32 bits have to be kept around
201 somewhere, to cope with carry from bit 15 to bit 16.
203 One further example is the sparc and the a.out format. The
204 sparc has a similar problem to the 88k, in that some
205 instructions don't have room for an entire offset, but on the
206 sparc the parts are created in odd sized lumps. The designers of
207 the a.out format chose to not use the data within the section
208 for storing part of the offset; all the offset is kept within
209 the reloc. Anything in the data should be ignored.
212 | sethi %hi(_foo+0x12345678),%g2
213 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
217 Both relocs contain a pointer to <<foo>>, and the offsets
220 |RELOCATION RECORDS FOR [.text]:
222 |00000004 HI22 _foo+0x12345678
223 |00000008 LO10 _foo+0x12345678
225 |00000000 9de3bf90 ; save %sp,-112,%sp
226 |00000004 05000000 ; sethi %hi(_foo+0),%g2
227 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
228 |0000000c 81c7e008 ; ret
229 |00000010 81e80000 ; restore
233 The <<howto>> field can be imagined as a
234 relocation instruction. It is a pointer to a structure which
235 contains information on what to do with all of the other
236 information in the reloc record and data section. A back end
237 would normally have a relocation instruction set and turn
238 relocations into pointers to the correct structure on input -
239 but it would be possible to create each howto field on demand.
245 <<enum complain_overflow>>
247 Indicates what sort of overflow checking should be done when
248 performing a relocation.
252 .enum complain_overflow
254 . {* Do not complain on overflow. *}
255 . complain_overflow_dont,
257 . {* Complain if the bitfield overflows, whether it is considered
258 . as signed or unsigned. *}
259 . complain_overflow_bitfield,
261 . {* Complain if the value overflows when considered as signed
263 . complain_overflow_signed,
265 . {* Complain if the value overflows when considered as an
266 . unsigned number. *}
267 . complain_overflow_unsigned
276 The <<reloc_howto_type>> is a structure which contains all the
277 information that libbfd needs to know to tie up a back end's data.
280 .struct symbol_cache_entry; {* Forward declaration. *}
282 .struct reloc_howto_struct
284 . {* The type field has mainly a documentary use - the back end can
285 . do what it wants with it, though normally the back end's
286 . external idea of what a reloc number is stored
287 . in this field. For example, a PC relative word relocation
288 . in a coff environment has the type 023 - because that's
289 . what the outside world calls a R_PCRWORD reloc. *}
292 . {* The value the final relocation is shifted right by. This drops
293 . unwanted data from the relocation. *}
294 . unsigned int rightshift;
296 . {* The size of the item to be relocated. This is *not* a
297 . power-of-two measure. To get the number of bytes operated
298 . on by a type of relocation, use bfd_get_reloc_size. *}
301 . {* The number of bits in the item to be relocated. This is used
302 . when doing overflow checking. *}
303 . unsigned int bitsize;
305 . {* Notes that the relocation is relative to the location in the
306 . data section of the addend. The relocation function will
307 . subtract from the relocation value the address of the location
308 . being relocated. *}
309 . bfd_boolean pc_relative;
311 . {* The bit position of the reloc value in the destination.
312 . The relocated value is left shifted by this amount. *}
313 . unsigned int bitpos;
315 . {* What type of overflow error should be checked for when
317 . enum complain_overflow complain_on_overflow;
319 . {* If this field is non null, then the supplied function is
320 . called rather than the normal function. This allows really
321 . strange relocation methods to be accomodated (e.g., i960 callj
323 . bfd_reloc_status_type (*special_function)
324 . PARAMS ((bfd *, arelent *, struct symbol_cache_entry *, PTR, asection *,
327 . {* The textual name of the relocation type. *}
330 . {* Some formats record a relocation addend in the section contents
331 . rather than with the relocation. For ELF formats this is the
332 . distinction between USE_REL and USE_RELA (though the code checks
333 . for USE_REL == 1/0). The value of this field is TRUE if the
334 . addend is recorded with the section contents; when performing a
335 . partial link (ld -r) the section contents (the data) will be
336 . modified. The value of this field is FALSE if addends are
337 . recorded with the relocation (in arelent.addend); when performing
338 . a partial link the relocation will be modified.
339 . All relocations for all ELF USE_RELA targets should set this field
340 . to FALSE (values of TRUE should be looked on with suspicion).
341 . However, the converse is not true: not all relocations of all ELF
342 . USE_REL targets set this field to TRUE. Why this is so is peculiar
343 . to each particular target. For relocs that aren't used in partial
344 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
345 . bfd_boolean partial_inplace;
347 . {* The src_mask selects which parts of the read in data
348 . are to be used in the relocation sum. E.g., if this was an 8 bit
349 . byte of data which we read and relocated, this would be
350 . 0x000000ff. When we have relocs which have an addend, such as
351 . sun4 extended relocs, the value in the offset part of a
352 . relocating field is garbage so we never use it. In this case
353 . the mask would be 0x00000000. *}
356 . {* The dst_mask selects which parts of the instruction are replaced
357 . into the instruction. In most cases src_mask == dst_mask,
358 . except in the above special case, where dst_mask would be
359 . 0x000000ff, and src_mask would be 0x00000000. *}
362 . {* When some formats create PC relative instructions, they leave
363 . the value of the pc of the place being relocated in the offset
364 . slot of the instruction, so that a PC relative relocation can
365 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
366 . Some formats leave the displacement part of an instruction
367 . empty (e.g., m88k bcs); this flag signals the fact. *}
368 . bfd_boolean pcrel_offset;
378 The HOWTO define is horrible and will go away.
380 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
381 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
384 And will be replaced with the totally magic way. But for the
385 moment, we are compatible, so do it this way.
387 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
388 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
389 . NAME, FALSE, 0, 0, IN)
393 This is used to fill in an empty howto entry in an array.
395 .#define EMPTY_HOWTO(C) \
396 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
397 . NULL, FALSE, 0, 0, FALSE)
401 Helper routine to turn a symbol into a relocation value.
403 .#define HOWTO_PREPARE(relocation, symbol) \
405 . if (symbol != (asymbol *) NULL) \
407 . if (bfd_is_com_section (symbol->section)) \
413 . relocation = symbol->value; \
425 unsigned int bfd_get_reloc_size (reloc_howto_type *);
428 For a reloc_howto_type that operates on a fixed number of bytes,
429 this returns the number of bytes operated on.
433 bfd_get_reloc_size (howto
)
434 reloc_howto_type
*howto
;
455 How relocs are tied together in an <<asection>>:
457 .typedef struct relent_chain
460 . struct relent_chain *next;
466 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
467 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
474 bfd_reloc_status_type
476 (enum complain_overflow how,
477 unsigned int bitsize,
478 unsigned int rightshift,
479 unsigned int addrsize,
483 Perform overflow checking on @var{relocation} which has
484 @var{bitsize} significant bits and will be shifted right by
485 @var{rightshift} bits, on a machine with addresses containing
486 @var{addrsize} significant bits. The result is either of
487 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
491 bfd_reloc_status_type
492 bfd_check_overflow (how
, bitsize
, rightshift
, addrsize
, relocation
)
493 enum complain_overflow how
;
494 unsigned int bitsize
;
495 unsigned int rightshift
;
496 unsigned int addrsize
;
499 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
500 bfd_reloc_status_type flag
= bfd_reloc_ok
;
504 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
505 we'll be permissive: extra bits in the field mask will
506 automatically extend the address mask for purposes of the
508 fieldmask
= N_ONES (bitsize
);
509 addrmask
= N_ONES (addrsize
) | fieldmask
;
513 case complain_overflow_dont
:
516 case complain_overflow_signed
:
517 /* If any sign bits are set, all sign bits must be set. That
518 is, A must be a valid negative address after shifting. */
519 a
= (a
& addrmask
) >> rightshift
;
520 signmask
= ~ (fieldmask
>> 1);
522 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
523 flag
= bfd_reloc_overflow
;
526 case complain_overflow_unsigned
:
527 /* We have an overflow if the address does not fit in the field. */
528 a
= (a
& addrmask
) >> rightshift
;
529 if ((a
& ~ fieldmask
) != 0)
530 flag
= bfd_reloc_overflow
;
533 case complain_overflow_bitfield
:
534 /* Bitfields are sometimes signed, sometimes unsigned. We
535 explicitly allow an address wrap too, which means a bitfield
536 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
537 if the value has some, but not all, bits set outside the
540 ss
= a
& ~ fieldmask
;
541 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & ~ fieldmask
))
542 flag
= bfd_reloc_overflow
;
554 bfd_perform_relocation
557 bfd_reloc_status_type
558 bfd_perform_relocation
560 arelent *reloc_entry,
562 asection *input_section,
564 char **error_message);
567 If @var{output_bfd} is supplied to this function, the
568 generated image will be relocatable; the relocations are
569 copied to the output file after they have been changed to
570 reflect the new state of the world. There are two ways of
571 reflecting the results of partial linkage in an output file:
572 by modifying the output data in place, and by modifying the
573 relocation record. Some native formats (e.g., basic a.out and
574 basic coff) have no way of specifying an addend in the
575 relocation type, so the addend has to go in the output data.
576 This is no big deal since in these formats the output data
577 slot will always be big enough for the addend. Complex reloc
578 types with addends were invented to solve just this problem.
579 The @var{error_message} argument is set to an error message if
580 this return @code{bfd_reloc_dangerous}.
584 bfd_reloc_status_type
585 bfd_perform_relocation (abfd
, reloc_entry
, data
, input_section
, output_bfd
,
588 arelent
*reloc_entry
;
590 asection
*input_section
;
592 char **error_message
;
595 bfd_reloc_status_type flag
= bfd_reloc_ok
;
596 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
597 bfd_vma output_base
= 0;
598 reloc_howto_type
*howto
= reloc_entry
->howto
;
599 asection
*reloc_target_output_section
;
602 symbol
= *(reloc_entry
->sym_ptr_ptr
);
603 if (bfd_is_abs_section (symbol
->section
)
604 && output_bfd
!= (bfd
*) NULL
)
606 reloc_entry
->address
+= input_section
->output_offset
;
610 /* If we are not producing relocateable output, return an error if
611 the symbol is not defined. An undefined weak symbol is
612 considered to have a value of zero (SVR4 ABI, p. 4-27). */
613 if (bfd_is_und_section (symbol
->section
)
614 && (symbol
->flags
& BSF_WEAK
) == 0
615 && output_bfd
== (bfd
*) NULL
)
616 flag
= bfd_reloc_undefined
;
618 /* If there is a function supplied to handle this relocation type,
619 call it. It'll return `bfd_reloc_continue' if further processing
621 if (howto
->special_function
)
623 bfd_reloc_status_type cont
;
624 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
625 input_section
, output_bfd
,
627 if (cont
!= bfd_reloc_continue
)
631 /* Is the address of the relocation really within the section? */
632 if (reloc_entry
->address
> (input_section
->_cooked_size
633 / bfd_octets_per_byte (abfd
)))
634 return bfd_reloc_outofrange
;
636 /* Work out which section the relocation is targetted at and the
637 initial relocation command value. */
639 /* Get symbol value. (Common symbols are special.) */
640 if (bfd_is_com_section (symbol
->section
))
643 relocation
= symbol
->value
;
645 reloc_target_output_section
= symbol
->section
->output_section
;
647 /* Convert input-section-relative symbol value to absolute. */
648 if ((output_bfd
&& ! howto
->partial_inplace
)
649 || reloc_target_output_section
== NULL
)
652 output_base
= reloc_target_output_section
->vma
;
654 relocation
+= output_base
+ symbol
->section
->output_offset
;
656 /* Add in supplied addend. */
657 relocation
+= reloc_entry
->addend
;
659 /* Here the variable relocation holds the final address of the
660 symbol we are relocating against, plus any addend. */
662 if (howto
->pc_relative
)
664 /* This is a PC relative relocation. We want to set RELOCATION
665 to the distance between the address of the symbol and the
666 location. RELOCATION is already the address of the symbol.
668 We start by subtracting the address of the section containing
671 If pcrel_offset is set, we must further subtract the position
672 of the location within the section. Some targets arrange for
673 the addend to be the negative of the position of the location
674 within the section; for example, i386-aout does this. For
675 i386-aout, pcrel_offset is FALSE. Some other targets do not
676 include the position of the location; for example, m88kbcs,
677 or ELF. For those targets, pcrel_offset is TRUE.
679 If we are producing relocateable output, then we must ensure
680 that this reloc will be correctly computed when the final
681 relocation is done. If pcrel_offset is FALSE we want to wind
682 up with the negative of the location within the section,
683 which means we must adjust the existing addend by the change
684 in the location within the section. If pcrel_offset is TRUE
685 we do not want to adjust the existing addend at all.
687 FIXME: This seems logical to me, but for the case of
688 producing relocateable output it is not what the code
689 actually does. I don't want to change it, because it seems
690 far too likely that something will break. */
693 input_section
->output_section
->vma
+ input_section
->output_offset
;
695 if (howto
->pcrel_offset
)
696 relocation
-= reloc_entry
->address
;
699 if (output_bfd
!= (bfd
*) NULL
)
701 if (! howto
->partial_inplace
)
703 /* This is a partial relocation, and we want to apply the relocation
704 to the reloc entry rather than the raw data. Modify the reloc
705 inplace to reflect what we now know. */
706 reloc_entry
->addend
= relocation
;
707 reloc_entry
->address
+= input_section
->output_offset
;
712 /* This is a partial relocation, but inplace, so modify the
715 If we've relocated with a symbol with a section, change
716 into a ref to the section belonging to the symbol. */
718 reloc_entry
->address
+= input_section
->output_offset
;
721 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
722 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
723 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
726 /* For m68k-coff, the addend was being subtracted twice during
727 relocation with -r. Removing the line below this comment
728 fixes that problem; see PR 2953.
730 However, Ian wrote the following, regarding removing the line below,
731 which explains why it is still enabled: --djm
733 If you put a patch like that into BFD you need to check all the COFF
734 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
735 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
736 problem in a different way. There may very well be a reason that the
737 code works as it does.
739 Hmmm. The first obvious point is that bfd_perform_relocation should
740 not have any tests that depend upon the flavour. It's seem like
741 entirely the wrong place for such a thing. The second obvious point
742 is that the current code ignores the reloc addend when producing
743 relocateable output for COFF. That's peculiar. In fact, I really
744 have no idea what the point of the line you want to remove is.
746 A typical COFF reloc subtracts the old value of the symbol and adds in
747 the new value to the location in the object file (if it's a pc
748 relative reloc it adds the difference between the symbol value and the
749 location). When relocating we need to preserve that property.
751 BFD handles this by setting the addend to the negative of the old
752 value of the symbol. Unfortunately it handles common symbols in a
753 non-standard way (it doesn't subtract the old value) but that's a
754 different story (we can't change it without losing backward
755 compatibility with old object files) (coff-i386 does subtract the old
756 value, to be compatible with existing coff-i386 targets, like SCO).
758 So everything works fine when not producing relocateable output. When
759 we are producing relocateable output, logically we should do exactly
760 what we do when not producing relocateable output. Therefore, your
761 patch is correct. In fact, it should probably always just set
762 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
763 add the value into the object file. This won't hurt the COFF code,
764 which doesn't use the addend; I'm not sure what it will do to other
765 formats (the thing to check for would be whether any formats both use
766 the addend and set partial_inplace).
768 When I wanted to make coff-i386 produce relocateable output, I ran
769 into the problem that you are running into: I wanted to remove that
770 line. Rather than risk it, I made the coff-i386 relocs use a special
771 function; it's coff_i386_reloc in coff-i386.c. The function
772 specifically adds the addend field into the object file, knowing that
773 bfd_perform_relocation is not going to. If you remove that line, then
774 coff-i386.c will wind up adding the addend field in twice. It's
775 trivial to fix; it just needs to be done.
777 The problem with removing the line is just that it may break some
778 working code. With BFD it's hard to be sure of anything. The right
779 way to deal with this is simply to build and test at least all the
780 supported COFF targets. It should be straightforward if time and disk
781 space consuming. For each target:
783 2) generate some executable, and link it using -r (I would
784 probably use paranoia.o and link against newlib/libc.a, which
785 for all the supported targets would be available in
786 /usr/cygnus/progressive/H-host/target/lib/libc.a).
787 3) make the change to reloc.c
788 4) rebuild the linker
790 6) if the resulting object files are the same, you have at least
792 7) if they are different you have to figure out which version is
795 relocation
-= reloc_entry
->addend
;
797 reloc_entry
->addend
= 0;
801 reloc_entry
->addend
= relocation
;
807 reloc_entry
->addend
= 0;
810 /* FIXME: This overflow checking is incomplete, because the value
811 might have overflowed before we get here. For a correct check we
812 need to compute the value in a size larger than bitsize, but we
813 can't reasonably do that for a reloc the same size as a host
815 FIXME: We should also do overflow checking on the result after
816 adding in the value contained in the object file. */
817 if (howto
->complain_on_overflow
!= complain_overflow_dont
818 && flag
== bfd_reloc_ok
)
819 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
822 bfd_arch_bits_per_address (abfd
),
825 /* Either we are relocating all the way, or we don't want to apply
826 the relocation to the reloc entry (probably because there isn't
827 any room in the output format to describe addends to relocs). */
829 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
830 (OSF version 1.3, compiler version 3.11). It miscompiles the
844 x <<= (unsigned long) s.i0;
848 printf ("succeeded (%lx)\n", x);
852 relocation
>>= (bfd_vma
) howto
->rightshift
;
854 /* Shift everything up to where it's going to be used. */
855 relocation
<<= (bfd_vma
) howto
->bitpos
;
857 /* Wait for the day when all have the mask in them. */
860 i instruction to be left alone
861 o offset within instruction
862 r relocation offset to apply
871 (( i i i i i o o o o o from bfd_get<size>
872 and S S S S S) to get the size offset we want
873 + r r r r r r r r r r) to get the final value to place
874 and D D D D D to chop to right size
875 -----------------------
878 ( i i i i i o o o o o from bfd_get<size>
879 and N N N N N ) get instruction
880 -----------------------
886 -----------------------
887 = R R R R R R R R R R put into bfd_put<size>
891 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
897 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
899 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
905 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
907 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
912 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
914 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
919 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
920 relocation
= -relocation
;
922 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
928 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
929 relocation
= -relocation
;
931 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
942 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
944 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
951 return bfd_reloc_other
;
959 bfd_install_relocation
962 bfd_reloc_status_type
963 bfd_install_relocation
965 arelent *reloc_entry,
966 PTR data, bfd_vma data_start,
967 asection *input_section,
968 char **error_message);
971 This looks remarkably like <<bfd_perform_relocation>>, except it
972 does not expect that the section contents have been filled in.
973 I.e., it's suitable for use when creating, rather than applying
976 For now, this function should be considered reserved for the
980 bfd_reloc_status_type
981 bfd_install_relocation (abfd
, reloc_entry
, data_start
, data_start_offset
,
982 input_section
, error_message
)
984 arelent
*reloc_entry
;
986 bfd_vma data_start_offset
;
987 asection
*input_section
;
988 char **error_message
;
991 bfd_reloc_status_type flag
= bfd_reloc_ok
;
992 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
993 bfd_vma output_base
= 0;
994 reloc_howto_type
*howto
= reloc_entry
->howto
;
995 asection
*reloc_target_output_section
;
999 symbol
= *(reloc_entry
->sym_ptr_ptr
);
1000 if (bfd_is_abs_section (symbol
->section
))
1002 reloc_entry
->address
+= input_section
->output_offset
;
1003 return bfd_reloc_ok
;
1006 /* If there is a function supplied to handle this relocation type,
1007 call it. It'll return `bfd_reloc_continue' if further processing
1009 if (howto
->special_function
)
1011 bfd_reloc_status_type cont
;
1013 /* XXX - The special_function calls haven't been fixed up to deal
1014 with creating new relocations and section contents. */
1015 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1016 /* XXX - Non-portable! */
1017 ((bfd_byte
*) data_start
1018 - data_start_offset
),
1019 input_section
, abfd
, error_message
);
1020 if (cont
!= bfd_reloc_continue
)
1024 /* Is the address of the relocation really within the section? */
1025 if (reloc_entry
->address
> (input_section
->_cooked_size
1026 / bfd_octets_per_byte (abfd
)))
1027 return bfd_reloc_outofrange
;
1029 /* Work out which section the relocation is targetted at and the
1030 initial relocation command value. */
1032 /* Get symbol value. (Common symbols are special.) */
1033 if (bfd_is_com_section (symbol
->section
))
1036 relocation
= symbol
->value
;
1038 reloc_target_output_section
= symbol
->section
->output_section
;
1040 /* Convert input-section-relative symbol value to absolute. */
1041 if (! howto
->partial_inplace
)
1044 output_base
= reloc_target_output_section
->vma
;
1046 relocation
+= output_base
+ symbol
->section
->output_offset
;
1048 /* Add in supplied addend. */
1049 relocation
+= reloc_entry
->addend
;
1051 /* Here the variable relocation holds the final address of the
1052 symbol we are relocating against, plus any addend. */
1054 if (howto
->pc_relative
)
1056 /* This is a PC relative relocation. We want to set RELOCATION
1057 to the distance between the address of the symbol and the
1058 location. RELOCATION is already the address of the symbol.
1060 We start by subtracting the address of the section containing
1063 If pcrel_offset is set, we must further subtract the position
1064 of the location within the section. Some targets arrange for
1065 the addend to be the negative of the position of the location
1066 within the section; for example, i386-aout does this. For
1067 i386-aout, pcrel_offset is FALSE. Some other targets do not
1068 include the position of the location; for example, m88kbcs,
1069 or ELF. For those targets, pcrel_offset is TRUE.
1071 If we are producing relocateable output, then we must ensure
1072 that this reloc will be correctly computed when the final
1073 relocation is done. If pcrel_offset is FALSE we want to wind
1074 up with the negative of the location within the section,
1075 which means we must adjust the existing addend by the change
1076 in the location within the section. If pcrel_offset is TRUE
1077 we do not want to adjust the existing addend at all.
1079 FIXME: This seems logical to me, but for the case of
1080 producing relocateable output it is not what the code
1081 actually does. I don't want to change it, because it seems
1082 far too likely that something will break. */
1085 input_section
->output_section
->vma
+ input_section
->output_offset
;
1087 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1088 relocation
-= reloc_entry
->address
;
1091 if (! howto
->partial_inplace
)
1093 /* This is a partial relocation, and we want to apply the relocation
1094 to the reloc entry rather than the raw data. Modify the reloc
1095 inplace to reflect what we now know. */
1096 reloc_entry
->addend
= relocation
;
1097 reloc_entry
->address
+= input_section
->output_offset
;
1102 /* This is a partial relocation, but inplace, so modify the
1105 If we've relocated with a symbol with a section, change
1106 into a ref to the section belonging to the symbol. */
1107 reloc_entry
->address
+= input_section
->output_offset
;
1110 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1111 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1112 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1115 /* For m68k-coff, the addend was being subtracted twice during
1116 relocation with -r. Removing the line below this comment
1117 fixes that problem; see PR 2953.
1119 However, Ian wrote the following, regarding removing the line below,
1120 which explains why it is still enabled: --djm
1122 If you put a patch like that into BFD you need to check all the COFF
1123 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1124 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1125 problem in a different way. There may very well be a reason that the
1126 code works as it does.
1128 Hmmm. The first obvious point is that bfd_install_relocation should
1129 not have any tests that depend upon the flavour. It's seem like
1130 entirely the wrong place for such a thing. The second obvious point
1131 is that the current code ignores the reloc addend when producing
1132 relocateable output for COFF. That's peculiar. In fact, I really
1133 have no idea what the point of the line you want to remove is.
1135 A typical COFF reloc subtracts the old value of the symbol and adds in
1136 the new value to the location in the object file (if it's a pc
1137 relative reloc it adds the difference between the symbol value and the
1138 location). When relocating we need to preserve that property.
1140 BFD handles this by setting the addend to the negative of the old
1141 value of the symbol. Unfortunately it handles common symbols in a
1142 non-standard way (it doesn't subtract the old value) but that's a
1143 different story (we can't change it without losing backward
1144 compatibility with old object files) (coff-i386 does subtract the old
1145 value, to be compatible with existing coff-i386 targets, like SCO).
1147 So everything works fine when not producing relocateable output. When
1148 we are producing relocateable output, logically we should do exactly
1149 what we do when not producing relocateable output. Therefore, your
1150 patch is correct. In fact, it should probably always just set
1151 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1152 add the value into the object file. This won't hurt the COFF code,
1153 which doesn't use the addend; I'm not sure what it will do to other
1154 formats (the thing to check for would be whether any formats both use
1155 the addend and set partial_inplace).
1157 When I wanted to make coff-i386 produce relocateable output, I ran
1158 into the problem that you are running into: I wanted to remove that
1159 line. Rather than risk it, I made the coff-i386 relocs use a special
1160 function; it's coff_i386_reloc in coff-i386.c. The function
1161 specifically adds the addend field into the object file, knowing that
1162 bfd_install_relocation is not going to. If you remove that line, then
1163 coff-i386.c will wind up adding the addend field in twice. It's
1164 trivial to fix; it just needs to be done.
1166 The problem with removing the line is just that it may break some
1167 working code. With BFD it's hard to be sure of anything. The right
1168 way to deal with this is simply to build and test at least all the
1169 supported COFF targets. It should be straightforward if time and disk
1170 space consuming. For each target:
1172 2) generate some executable, and link it using -r (I would
1173 probably use paranoia.o and link against newlib/libc.a, which
1174 for all the supported targets would be available in
1175 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1176 3) make the change to reloc.c
1177 4) rebuild the linker
1179 6) if the resulting object files are the same, you have at least
1181 7) if they are different you have to figure out which version is
1183 relocation
-= reloc_entry
->addend
;
1185 reloc_entry
->addend
= 0;
1189 reloc_entry
->addend
= relocation
;
1193 /* FIXME: This overflow checking is incomplete, because the value
1194 might have overflowed before we get here. For a correct check we
1195 need to compute the value in a size larger than bitsize, but we
1196 can't reasonably do that for a reloc the same size as a host
1198 FIXME: We should also do overflow checking on the result after
1199 adding in the value contained in the object file. */
1200 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1201 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1204 bfd_arch_bits_per_address (abfd
),
1207 /* Either we are relocating all the way, or we don't want to apply
1208 the relocation to the reloc entry (probably because there isn't
1209 any room in the output format to describe addends to relocs). */
1211 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1212 (OSF version 1.3, compiler version 3.11). It miscompiles the
1226 x <<= (unsigned long) s.i0;
1228 printf ("failed\n");
1230 printf ("succeeded (%lx)\n", x);
1234 relocation
>>= (bfd_vma
) howto
->rightshift
;
1236 /* Shift everything up to where it's going to be used. */
1237 relocation
<<= (bfd_vma
) howto
->bitpos
;
1239 /* Wait for the day when all have the mask in them. */
1242 i instruction to be left alone
1243 o offset within instruction
1244 r relocation offset to apply
1253 (( i i i i i o o o o o from bfd_get<size>
1254 and S S S S S) to get the size offset we want
1255 + r r r r r r r r r r) to get the final value to place
1256 and D D D D D to chop to right size
1257 -----------------------
1260 ( i i i i i o o o o o from bfd_get<size>
1261 and N N N N N ) get instruction
1262 -----------------------
1268 -----------------------
1269 = R R R R R R R R R R put into bfd_put<size>
1273 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1275 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1277 switch (howto
->size
)
1281 char x
= bfd_get_8 (abfd
, (char *) data
);
1283 bfd_put_8 (abfd
, x
, (unsigned char *) data
);
1289 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
);
1291 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
);
1296 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
);
1298 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
);
1303 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
);
1304 relocation
= -relocation
;
1306 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
);
1316 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
);
1318 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
);
1322 return bfd_reloc_other
;
1328 /* This relocation routine is used by some of the backend linkers.
1329 They do not construct asymbol or arelent structures, so there is no
1330 reason for them to use bfd_perform_relocation. Also,
1331 bfd_perform_relocation is so hacked up it is easier to write a new
1332 function than to try to deal with it.
1334 This routine does a final relocation. Whether it is useful for a
1335 relocateable link depends upon how the object format defines
1338 FIXME: This routine ignores any special_function in the HOWTO,
1339 since the existing special_function values have been written for
1340 bfd_perform_relocation.
1342 HOWTO is the reloc howto information.
1343 INPUT_BFD is the BFD which the reloc applies to.
1344 INPUT_SECTION is the section which the reloc applies to.
1345 CONTENTS is the contents of the section.
1346 ADDRESS is the address of the reloc within INPUT_SECTION.
1347 VALUE is the value of the symbol the reloc refers to.
1348 ADDEND is the addend of the reloc. */
1350 bfd_reloc_status_type
1351 _bfd_final_link_relocate (howto
, input_bfd
, input_section
, contents
, address
,
1353 reloc_howto_type
*howto
;
1355 asection
*input_section
;
1363 /* Sanity check the address. */
1364 if (address
> input_section
->_raw_size
)
1365 return bfd_reloc_outofrange
;
1367 /* This function assumes that we are dealing with a basic relocation
1368 against a symbol. We want to compute the value of the symbol to
1369 relocate to. This is just VALUE, the value of the symbol, plus
1370 ADDEND, any addend associated with the reloc. */
1371 relocation
= value
+ addend
;
1373 /* If the relocation is PC relative, we want to set RELOCATION to
1374 the distance between the symbol (currently in RELOCATION) and the
1375 location we are relocating. Some targets (e.g., i386-aout)
1376 arrange for the contents of the section to be the negative of the
1377 offset of the location within the section; for such targets
1378 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1379 simply leave the contents of the section as zero; for such
1380 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1381 need to subtract out the offset of the location within the
1382 section (which is just ADDRESS). */
1383 if (howto
->pc_relative
)
1385 relocation
-= (input_section
->output_section
->vma
1386 + input_section
->output_offset
);
1387 if (howto
->pcrel_offset
)
1388 relocation
-= address
;
1391 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1392 contents
+ address
);
1395 /* Relocate a given location using a given value and howto. */
1397 bfd_reloc_status_type
1398 _bfd_relocate_contents (howto
, input_bfd
, relocation
, location
)
1399 reloc_howto_type
*howto
;
1406 bfd_reloc_status_type flag
;
1407 unsigned int rightshift
= howto
->rightshift
;
1408 unsigned int bitpos
= howto
->bitpos
;
1410 /* If the size is negative, negate RELOCATION. This isn't very
1412 if (howto
->size
< 0)
1413 relocation
= -relocation
;
1415 /* Get the value we are going to relocate. */
1416 size
= bfd_get_reloc_size (howto
);
1423 x
= bfd_get_8 (input_bfd
, location
);
1426 x
= bfd_get_16 (input_bfd
, location
);
1429 x
= bfd_get_32 (input_bfd
, location
);
1433 x
= bfd_get_64 (input_bfd
, location
);
1440 /* Check for overflow. FIXME: We may drop bits during the addition
1441 which we don't check for. We must either check at every single
1442 operation, which would be tedious, or we must do the computations
1443 in a type larger than bfd_vma, which would be inefficient. */
1444 flag
= bfd_reloc_ok
;
1445 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1447 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1450 /* Get the values to be added together. For signed and unsigned
1451 relocations, we assume that all values should be truncated to
1452 the size of an address. For bitfields, all the bits matter.
1453 See also bfd_check_overflow. */
1454 fieldmask
= N_ONES (howto
->bitsize
);
1455 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1457 b
= x
& howto
->src_mask
;
1459 switch (howto
->complain_on_overflow
)
1461 case complain_overflow_signed
:
1462 a
= (a
& addrmask
) >> rightshift
;
1464 /* If any sign bits are set, all sign bits must be set.
1465 That is, A must be a valid negative address after
1467 signmask
= ~ (fieldmask
>> 1);
1469 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1470 flag
= bfd_reloc_overflow
;
1472 /* We only need this next bit of code if the sign bit of B
1473 is below the sign bit of A. This would only happen if
1474 SRC_MASK had fewer bits than BITSIZE. Note that if
1475 SRC_MASK has more bits than BITSIZE, we can get into
1476 trouble; we would need to verify that B is in range, as
1477 we do for A above. */
1478 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1480 /* Set all the bits above the sign bit. */
1481 b
= (b
^ signmask
) - signmask
;
1483 b
= (b
& addrmask
) >> bitpos
;
1485 /* Now we can do the addition. */
1488 /* See if the result has the correct sign. Bits above the
1489 sign bit are junk now; ignore them. If the sum is
1490 positive, make sure we did not have all negative inputs;
1491 if the sum is negative, make sure we did not have all
1492 positive inputs. The test below looks only at the sign
1493 bits, and it really just
1494 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1496 signmask
= (fieldmask
>> 1) + 1;
1497 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
)
1498 flag
= bfd_reloc_overflow
;
1502 case complain_overflow_unsigned
:
1503 /* Checking for an unsigned overflow is relatively easy:
1504 trim the addresses and add, and trim the result as well.
1505 Overflow is normally indicated when the result does not
1506 fit in the field. However, we also need to consider the
1507 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1508 input is 0x80000000, and bfd_vma is only 32 bits; then we
1509 will get sum == 0, but there is an overflow, since the
1510 inputs did not fit in the field. Instead of doing a
1511 separate test, we can check for this by or-ing in the
1512 operands when testing for the sum overflowing its final
1514 a
= (a
& addrmask
) >> rightshift
;
1515 b
= (b
& addrmask
) >> bitpos
;
1516 sum
= (a
+ b
) & addrmask
;
1517 if ((a
| b
| sum
) & ~ fieldmask
)
1518 flag
= bfd_reloc_overflow
;
1522 case complain_overflow_bitfield
:
1523 /* Much like the signed check, but for a field one bit
1524 wider, and no trimming inputs with addrmask. We allow a
1525 bitfield to represent numbers in the range -2**n to
1526 2**n-1, where n is the number of bits in the field.
1527 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1528 overflow, which is exactly what we want. */
1531 signmask
= ~ fieldmask
;
1533 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & signmask
))
1534 flag
= bfd_reloc_overflow
;
1536 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1537 b
= (b
^ signmask
) - signmask
;
1543 /* We mask with addrmask here to explicitly allow an address
1544 wrap-around. The Linux kernel relies on it, and it is
1545 the only way to write assembler code which can run when
1546 loaded at a location 0x80000000 away from the location at
1547 which it is linked. */
1548 signmask
= fieldmask
+ 1;
1549 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1550 flag
= bfd_reloc_overflow
;
1559 /* Put RELOCATION in the right bits. */
1560 relocation
>>= (bfd_vma
) rightshift
;
1561 relocation
<<= (bfd_vma
) bitpos
;
1563 /* Add RELOCATION to the right bits of X. */
1564 x
= ((x
& ~howto
->dst_mask
)
1565 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1567 /* Put the relocated value back in the object file. */
1574 bfd_put_8 (input_bfd
, x
, location
);
1577 bfd_put_16 (input_bfd
, x
, location
);
1580 bfd_put_32 (input_bfd
, x
, location
);
1584 bfd_put_64 (input_bfd
, x
, location
);
1597 howto manager, , typedef arelent, Relocations
1602 When an application wants to create a relocation, but doesn't
1603 know what the target machine might call it, it can find out by
1604 using this bit of code.
1613 The insides of a reloc code. The idea is that, eventually, there
1614 will be one enumerator for every type of relocation we ever do.
1615 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1616 return a howto pointer.
1618 This does mean that the application must determine the correct
1619 enumerator value; you can't get a howto pointer from a random set
1640 Basic absolute relocations of N bits.
1655 PC-relative relocations. Sometimes these are relative to the address
1656 of the relocation itself; sometimes they are relative to the start of
1657 the section containing the relocation. It depends on the specific target.
1659 The 24-bit relocation is used in some Intel 960 configurations.
1662 BFD_RELOC_32_GOT_PCREL
1664 BFD_RELOC_16_GOT_PCREL
1666 BFD_RELOC_8_GOT_PCREL
1672 BFD_RELOC_LO16_GOTOFF
1674 BFD_RELOC_HI16_GOTOFF
1676 BFD_RELOC_HI16_S_GOTOFF
1680 BFD_RELOC_64_PLT_PCREL
1682 BFD_RELOC_32_PLT_PCREL
1684 BFD_RELOC_24_PLT_PCREL
1686 BFD_RELOC_16_PLT_PCREL
1688 BFD_RELOC_8_PLT_PCREL
1696 BFD_RELOC_LO16_PLTOFF
1698 BFD_RELOC_HI16_PLTOFF
1700 BFD_RELOC_HI16_S_PLTOFF
1707 BFD_RELOC_68K_GLOB_DAT
1709 BFD_RELOC_68K_JMP_SLOT
1711 BFD_RELOC_68K_RELATIVE
1713 Relocations used by 68K ELF.
1716 BFD_RELOC_32_BASEREL
1718 BFD_RELOC_16_BASEREL
1720 BFD_RELOC_LO16_BASEREL
1722 BFD_RELOC_HI16_BASEREL
1724 BFD_RELOC_HI16_S_BASEREL
1730 Linkage-table relative.
1735 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1738 BFD_RELOC_32_PCREL_S2
1740 BFD_RELOC_16_PCREL_S2
1742 BFD_RELOC_23_PCREL_S2
1744 These PC-relative relocations are stored as word displacements --
1745 i.e., byte displacements shifted right two bits. The 30-bit word
1746 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1747 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1748 signed 16-bit displacement is used on the MIPS, and the 23-bit
1749 displacement is used on the Alpha.
1756 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1757 the target word. These are used on the SPARC.
1764 For systems that allocate a Global Pointer register, these are
1765 displacements off that register. These relocation types are
1766 handled specially, because the value the register will have is
1767 decided relatively late.
1770 BFD_RELOC_I960_CALLJ
1772 Reloc types used for i960/b.out.
1777 BFD_RELOC_SPARC_WDISP22
1783 BFD_RELOC_SPARC_GOT10
1785 BFD_RELOC_SPARC_GOT13
1787 BFD_RELOC_SPARC_GOT22
1789 BFD_RELOC_SPARC_PC10
1791 BFD_RELOC_SPARC_PC22
1793 BFD_RELOC_SPARC_WPLT30
1795 BFD_RELOC_SPARC_COPY
1797 BFD_RELOC_SPARC_GLOB_DAT
1799 BFD_RELOC_SPARC_JMP_SLOT
1801 BFD_RELOC_SPARC_RELATIVE
1803 BFD_RELOC_SPARC_UA16
1805 BFD_RELOC_SPARC_UA32
1807 BFD_RELOC_SPARC_UA64
1809 SPARC ELF relocations. There is probably some overlap with other
1810 relocation types already defined.
1813 BFD_RELOC_SPARC_BASE13
1815 BFD_RELOC_SPARC_BASE22
1817 I think these are specific to SPARC a.out (e.g., Sun 4).
1827 BFD_RELOC_SPARC_OLO10
1829 BFD_RELOC_SPARC_HH22
1831 BFD_RELOC_SPARC_HM10
1833 BFD_RELOC_SPARC_LM22
1835 BFD_RELOC_SPARC_PC_HH22
1837 BFD_RELOC_SPARC_PC_HM10
1839 BFD_RELOC_SPARC_PC_LM22
1841 BFD_RELOC_SPARC_WDISP16
1843 BFD_RELOC_SPARC_WDISP19
1851 BFD_RELOC_SPARC_DISP64
1854 BFD_RELOC_SPARC_PLT32
1856 BFD_RELOC_SPARC_PLT64
1858 BFD_RELOC_SPARC_HIX22
1860 BFD_RELOC_SPARC_LOX10
1868 BFD_RELOC_SPARC_REGISTER
1873 BFD_RELOC_SPARC_REV32
1875 SPARC little endian relocation
1878 BFD_RELOC_ALPHA_GPDISP_HI16
1880 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1881 "addend" in some special way.
1882 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1883 writing; when reading, it will be the absolute section symbol. The
1884 addend is the displacement in bytes of the "lda" instruction from
1885 the "ldah" instruction (which is at the address of this reloc).
1887 BFD_RELOC_ALPHA_GPDISP_LO16
1889 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1890 with GPDISP_HI16 relocs. The addend is ignored when writing the
1891 relocations out, and is filled in with the file's GP value on
1892 reading, for convenience.
1895 BFD_RELOC_ALPHA_GPDISP
1897 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1898 relocation except that there is no accompanying GPDISP_LO16
1902 BFD_RELOC_ALPHA_LITERAL
1904 BFD_RELOC_ALPHA_ELF_LITERAL
1906 BFD_RELOC_ALPHA_LITUSE
1908 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1909 the assembler turns it into a LDQ instruction to load the address of
1910 the symbol, and then fills in a register in the real instruction.
1912 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1913 section symbol. The addend is ignored when writing, but is filled
1914 in with the file's GP value on reading, for convenience, as with the
1917 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1918 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1919 but it generates output not based on the position within the .got
1920 section, but relative to the GP value chosen for the file during the
1923 The LITUSE reloc, on the instruction using the loaded address, gives
1924 information to the linker that it might be able to use to optimize
1925 away some literal section references. The symbol is ignored (read
1926 as the absolute section symbol), and the "addend" indicates the type
1927 of instruction using the register:
1928 1 - "memory" fmt insn
1929 2 - byte-manipulation (byte offset reg)
1930 3 - jsr (target of branch)
1933 BFD_RELOC_ALPHA_HINT
1935 The HINT relocation indicates a value that should be filled into the
1936 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1937 prediction logic which may be provided on some processors.
1940 BFD_RELOC_ALPHA_LINKAGE
1942 The LINKAGE relocation outputs a linkage pair in the object file,
1943 which is filled by the linker.
1946 BFD_RELOC_ALPHA_CODEADDR
1948 The CODEADDR relocation outputs a STO_CA in the object file,
1949 which is filled by the linker.
1952 BFD_RELOC_ALPHA_GPREL_HI16
1954 BFD_RELOC_ALPHA_GPREL_LO16
1956 The GPREL_HI/LO relocations together form a 32-bit offset from the
1960 BFD_RELOC_ALPHA_BRSGP
1962 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
1963 share a common GP, and the target address is adjusted for
1964 STO_ALPHA_STD_GPLOAD.
1967 BFD_RELOC_ALPHA_TLSGD
1969 BFD_RELOC_ALPHA_TLSLDM
1971 BFD_RELOC_ALPHA_DTPMOD64
1973 BFD_RELOC_ALPHA_GOTDTPREL16
1975 BFD_RELOC_ALPHA_DTPREL64
1977 BFD_RELOC_ALPHA_DTPREL_HI16
1979 BFD_RELOC_ALPHA_DTPREL_LO16
1981 BFD_RELOC_ALPHA_DTPREL16
1983 BFD_RELOC_ALPHA_GOTTPREL16
1985 BFD_RELOC_ALPHA_TPREL64
1987 BFD_RELOC_ALPHA_TPREL_HI16
1989 BFD_RELOC_ALPHA_TPREL_LO16
1991 BFD_RELOC_ALPHA_TPREL16
1993 Alpha thread-local storage relocations.
1998 Bits 27..2 of the relocation address shifted right 2 bits;
1999 simple reloc otherwise.
2002 BFD_RELOC_MIPS16_JMP
2004 The MIPS16 jump instruction.
2007 BFD_RELOC_MIPS16_GPREL
2009 MIPS16 GP relative reloc.
2014 High 16 bits of 32-bit value; simple reloc.
2018 High 16 bits of 32-bit value but the low 16 bits will be sign
2019 extended and added to form the final result. If the low 16
2020 bits form a negative number, we need to add one to the high value
2021 to compensate for the borrow when the low bits are added.
2027 BFD_RELOC_PCREL_HI16_S
2029 Like BFD_RELOC_HI16_S, but PC relative.
2031 BFD_RELOC_PCREL_LO16
2033 Like BFD_RELOC_LO16, but PC relative.
2036 BFD_RELOC_MIPS_LITERAL
2038 Relocation against a MIPS literal section.
2041 BFD_RELOC_MIPS_GOT16
2043 BFD_RELOC_MIPS_CALL16
2045 BFD_RELOC_MIPS_GOT_HI16
2047 BFD_RELOC_MIPS_GOT_LO16
2049 BFD_RELOC_MIPS_CALL_HI16
2051 BFD_RELOC_MIPS_CALL_LO16
2055 BFD_RELOC_MIPS_GOT_PAGE
2057 BFD_RELOC_MIPS_GOT_OFST
2059 BFD_RELOC_MIPS_GOT_DISP
2061 BFD_RELOC_MIPS_SHIFT5
2063 BFD_RELOC_MIPS_SHIFT6
2065 BFD_RELOC_MIPS_INSERT_A
2067 BFD_RELOC_MIPS_INSERT_B
2069 BFD_RELOC_MIPS_DELETE
2071 BFD_RELOC_MIPS_HIGHEST
2073 BFD_RELOC_MIPS_HIGHER
2075 BFD_RELOC_MIPS_SCN_DISP
2077 BFD_RELOC_MIPS_REL16
2079 BFD_RELOC_MIPS_RELGOT
2084 BFD_RELOC_FRV_LABEL16
2086 BFD_RELOC_FRV_LABEL24
2092 BFD_RELOC_FRV_GPREL12
2094 BFD_RELOC_FRV_GPRELU12
2096 BFD_RELOC_FRV_GPREL32
2098 BFD_RELOC_FRV_GPRELHI
2100 BFD_RELOC_FRV_GPRELLO
2102 Fujitsu Frv Relocations.
2106 MIPS ELF relocations.
2117 BFD_RELOC_386_GLOB_DAT
2119 BFD_RELOC_386_JUMP_SLOT
2121 BFD_RELOC_386_RELATIVE
2123 BFD_RELOC_386_GOTOFF
2127 BFD_RELOC_386_TLS_TPOFF
2129 BFD_RELOC_386_TLS_IE
2131 BFD_RELOC_386_TLS_GOTIE
2133 BFD_RELOC_386_TLS_LE
2135 BFD_RELOC_386_TLS_GD
2137 BFD_RELOC_386_TLS_LDM
2139 BFD_RELOC_386_TLS_LDO_32
2141 BFD_RELOC_386_TLS_IE_32
2143 BFD_RELOC_386_TLS_LE_32
2145 BFD_RELOC_386_TLS_DTPMOD32
2147 BFD_RELOC_386_TLS_DTPOFF32
2149 BFD_RELOC_386_TLS_TPOFF32
2151 i386/elf relocations
2154 BFD_RELOC_X86_64_GOT32
2156 BFD_RELOC_X86_64_PLT32
2158 BFD_RELOC_X86_64_COPY
2160 BFD_RELOC_X86_64_GLOB_DAT
2162 BFD_RELOC_X86_64_JUMP_SLOT
2164 BFD_RELOC_X86_64_RELATIVE
2166 BFD_RELOC_X86_64_GOTPCREL
2168 BFD_RELOC_X86_64_32S
2170 BFD_RELOC_X86_64_DTPMOD64
2172 BFD_RELOC_X86_64_DTPOFF64
2174 BFD_RELOC_X86_64_TPOFF64
2176 BFD_RELOC_X86_64_TLSGD
2178 BFD_RELOC_X86_64_TLSLD
2180 BFD_RELOC_X86_64_DTPOFF32
2182 BFD_RELOC_X86_64_GOTTPOFF
2184 BFD_RELOC_X86_64_TPOFF32
2186 x86-64/elf relocations
2189 BFD_RELOC_NS32K_IMM_8
2191 BFD_RELOC_NS32K_IMM_16
2193 BFD_RELOC_NS32K_IMM_32
2195 BFD_RELOC_NS32K_IMM_8_PCREL
2197 BFD_RELOC_NS32K_IMM_16_PCREL
2199 BFD_RELOC_NS32K_IMM_32_PCREL
2201 BFD_RELOC_NS32K_DISP_8
2203 BFD_RELOC_NS32K_DISP_16
2205 BFD_RELOC_NS32K_DISP_32
2207 BFD_RELOC_NS32K_DISP_8_PCREL
2209 BFD_RELOC_NS32K_DISP_16_PCREL
2211 BFD_RELOC_NS32K_DISP_32_PCREL
2216 BFD_RELOC_PDP11_DISP_8_PCREL
2218 BFD_RELOC_PDP11_DISP_6_PCREL
2223 BFD_RELOC_PJ_CODE_HI16
2225 BFD_RELOC_PJ_CODE_LO16
2227 BFD_RELOC_PJ_CODE_DIR16
2229 BFD_RELOC_PJ_CODE_DIR32
2231 BFD_RELOC_PJ_CODE_REL16
2233 BFD_RELOC_PJ_CODE_REL32
2235 Picojava relocs. Not all of these appear in object files.
2246 BFD_RELOC_PPC_B16_BRTAKEN
2248 BFD_RELOC_PPC_B16_BRNTAKEN
2252 BFD_RELOC_PPC_BA16_BRTAKEN
2254 BFD_RELOC_PPC_BA16_BRNTAKEN
2258 BFD_RELOC_PPC_GLOB_DAT
2260 BFD_RELOC_PPC_JMP_SLOT
2262 BFD_RELOC_PPC_RELATIVE
2264 BFD_RELOC_PPC_LOCAL24PC
2266 BFD_RELOC_PPC_EMB_NADDR32
2268 BFD_RELOC_PPC_EMB_NADDR16
2270 BFD_RELOC_PPC_EMB_NADDR16_LO
2272 BFD_RELOC_PPC_EMB_NADDR16_HI
2274 BFD_RELOC_PPC_EMB_NADDR16_HA
2276 BFD_RELOC_PPC_EMB_SDAI16
2278 BFD_RELOC_PPC_EMB_SDA2I16
2280 BFD_RELOC_PPC_EMB_SDA2REL
2282 BFD_RELOC_PPC_EMB_SDA21
2284 BFD_RELOC_PPC_EMB_MRKREF
2286 BFD_RELOC_PPC_EMB_RELSEC16
2288 BFD_RELOC_PPC_EMB_RELST_LO
2290 BFD_RELOC_PPC_EMB_RELST_HI
2292 BFD_RELOC_PPC_EMB_RELST_HA
2294 BFD_RELOC_PPC_EMB_BIT_FLD
2296 BFD_RELOC_PPC_EMB_RELSDA
2298 BFD_RELOC_PPC64_HIGHER
2300 BFD_RELOC_PPC64_HIGHER_S
2302 BFD_RELOC_PPC64_HIGHEST
2304 BFD_RELOC_PPC64_HIGHEST_S
2306 BFD_RELOC_PPC64_TOC16_LO
2308 BFD_RELOC_PPC64_TOC16_HI
2310 BFD_RELOC_PPC64_TOC16_HA
2314 BFD_RELOC_PPC64_PLTGOT16
2316 BFD_RELOC_PPC64_PLTGOT16_LO
2318 BFD_RELOC_PPC64_PLTGOT16_HI
2320 BFD_RELOC_PPC64_PLTGOT16_HA
2322 BFD_RELOC_PPC64_ADDR16_DS
2324 BFD_RELOC_PPC64_ADDR16_LO_DS
2326 BFD_RELOC_PPC64_GOT16_DS
2328 BFD_RELOC_PPC64_GOT16_LO_DS
2330 BFD_RELOC_PPC64_PLT16_LO_DS
2332 BFD_RELOC_PPC64_SECTOFF_DS
2334 BFD_RELOC_PPC64_SECTOFF_LO_DS
2336 BFD_RELOC_PPC64_TOC16_DS
2338 BFD_RELOC_PPC64_TOC16_LO_DS
2340 BFD_RELOC_PPC64_PLTGOT16_DS
2342 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2344 Power(rs6000) and PowerPC relocations.
2349 IBM 370/390 relocations
2354 The type of reloc used to build a contructor table - at the moment
2355 probably a 32 bit wide absolute relocation, but the target can choose.
2356 It generally does map to one of the other relocation types.
2359 BFD_RELOC_ARM_PCREL_BRANCH
2361 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2362 not stored in the instruction.
2364 BFD_RELOC_ARM_PCREL_BLX
2366 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2367 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2368 field in the instruction.
2370 BFD_RELOC_THUMB_PCREL_BLX
2372 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2373 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2374 field in the instruction.
2376 BFD_RELOC_ARM_IMMEDIATE
2378 BFD_RELOC_ARM_ADRL_IMMEDIATE
2380 BFD_RELOC_ARM_OFFSET_IMM
2382 BFD_RELOC_ARM_SHIFT_IMM
2388 BFD_RELOC_ARM_CP_OFF_IMM
2390 BFD_RELOC_ARM_ADR_IMM
2392 BFD_RELOC_ARM_LDR_IMM
2394 BFD_RELOC_ARM_LITERAL
2396 BFD_RELOC_ARM_IN_POOL
2398 BFD_RELOC_ARM_OFFSET_IMM8
2400 BFD_RELOC_ARM_HWLITERAL
2402 BFD_RELOC_ARM_THUMB_ADD
2404 BFD_RELOC_ARM_THUMB_IMM
2406 BFD_RELOC_ARM_THUMB_SHIFT
2408 BFD_RELOC_ARM_THUMB_OFFSET
2414 BFD_RELOC_ARM_JUMP_SLOT
2418 BFD_RELOC_ARM_GLOB_DAT
2422 BFD_RELOC_ARM_RELATIVE
2424 BFD_RELOC_ARM_GOTOFF
2428 These relocs are only used within the ARM assembler. They are not
2429 (at present) written to any object files.
2432 BFD_RELOC_SH_PCDISP8BY2
2434 BFD_RELOC_SH_PCDISP12BY2
2438 BFD_RELOC_SH_IMM4BY2
2440 BFD_RELOC_SH_IMM4BY4
2444 BFD_RELOC_SH_IMM8BY2
2446 BFD_RELOC_SH_IMM8BY4
2448 BFD_RELOC_SH_PCRELIMM8BY2
2450 BFD_RELOC_SH_PCRELIMM8BY4
2452 BFD_RELOC_SH_SWITCH16
2454 BFD_RELOC_SH_SWITCH32
2468 BFD_RELOC_SH_LOOP_START
2470 BFD_RELOC_SH_LOOP_END
2474 BFD_RELOC_SH_GLOB_DAT
2476 BFD_RELOC_SH_JMP_SLOT
2478 BFD_RELOC_SH_RELATIVE
2482 BFD_RELOC_SH_GOT_LOW16
2484 BFD_RELOC_SH_GOT_MEDLOW16
2486 BFD_RELOC_SH_GOT_MEDHI16
2488 BFD_RELOC_SH_GOT_HI16
2490 BFD_RELOC_SH_GOTPLT_LOW16
2492 BFD_RELOC_SH_GOTPLT_MEDLOW16
2494 BFD_RELOC_SH_GOTPLT_MEDHI16
2496 BFD_RELOC_SH_GOTPLT_HI16
2498 BFD_RELOC_SH_PLT_LOW16
2500 BFD_RELOC_SH_PLT_MEDLOW16
2502 BFD_RELOC_SH_PLT_MEDHI16
2504 BFD_RELOC_SH_PLT_HI16
2506 BFD_RELOC_SH_GOTOFF_LOW16
2508 BFD_RELOC_SH_GOTOFF_MEDLOW16
2510 BFD_RELOC_SH_GOTOFF_MEDHI16
2512 BFD_RELOC_SH_GOTOFF_HI16
2514 BFD_RELOC_SH_GOTPC_LOW16
2516 BFD_RELOC_SH_GOTPC_MEDLOW16
2518 BFD_RELOC_SH_GOTPC_MEDHI16
2520 BFD_RELOC_SH_GOTPC_HI16
2524 BFD_RELOC_SH_GLOB_DAT64
2526 BFD_RELOC_SH_JMP_SLOT64
2528 BFD_RELOC_SH_RELATIVE64
2530 BFD_RELOC_SH_GOT10BY4
2532 BFD_RELOC_SH_GOT10BY8
2534 BFD_RELOC_SH_GOTPLT10BY4
2536 BFD_RELOC_SH_GOTPLT10BY8
2538 BFD_RELOC_SH_GOTPLT32
2540 BFD_RELOC_SH_SHMEDIA_CODE
2546 BFD_RELOC_SH_IMMS6BY32
2552 BFD_RELOC_SH_IMMS10BY2
2554 BFD_RELOC_SH_IMMS10BY4
2556 BFD_RELOC_SH_IMMS10BY8
2562 BFD_RELOC_SH_IMM_LOW16
2564 BFD_RELOC_SH_IMM_LOW16_PCREL
2566 BFD_RELOC_SH_IMM_MEDLOW16
2568 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2570 BFD_RELOC_SH_IMM_MEDHI16
2572 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2574 BFD_RELOC_SH_IMM_HI16
2576 BFD_RELOC_SH_IMM_HI16_PCREL
2580 BFD_RELOC_SH_TLS_GD_32
2582 BFD_RELOC_SH_TLS_LD_32
2584 BFD_RELOC_SH_TLS_LDO_32
2586 BFD_RELOC_SH_TLS_IE_32
2588 BFD_RELOC_SH_TLS_LE_32
2590 BFD_RELOC_SH_TLS_DTPMOD32
2592 BFD_RELOC_SH_TLS_DTPOFF32
2594 BFD_RELOC_SH_TLS_TPOFF32
2596 Hitachi SH relocs. Not all of these appear in object files.
2599 BFD_RELOC_THUMB_PCREL_BRANCH9
2601 BFD_RELOC_THUMB_PCREL_BRANCH12
2603 BFD_RELOC_THUMB_PCREL_BRANCH23
2605 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2606 be zero and is not stored in the instruction.
2609 BFD_RELOC_ARC_B22_PCREL
2612 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2613 not stored in the instruction. The high 20 bits are installed in bits 26
2614 through 7 of the instruction.
2618 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2619 stored in the instruction. The high 24 bits are installed in bits 23
2623 BFD_RELOC_D10V_10_PCREL_R
2625 Mitsubishi D10V relocs.
2626 This is a 10-bit reloc with the right 2 bits
2629 BFD_RELOC_D10V_10_PCREL_L
2631 Mitsubishi D10V relocs.
2632 This is a 10-bit reloc with the right 2 bits
2633 assumed to be 0. This is the same as the previous reloc
2634 except it is in the left container, i.e.,
2635 shifted left 15 bits.
2639 This is an 18-bit reloc with the right 2 bits
2642 BFD_RELOC_D10V_18_PCREL
2644 This is an 18-bit reloc with the right 2 bits
2650 Mitsubishi D30V relocs.
2651 This is a 6-bit absolute reloc.
2653 BFD_RELOC_D30V_9_PCREL
2655 This is a 6-bit pc-relative reloc with
2656 the right 3 bits assumed to be 0.
2658 BFD_RELOC_D30V_9_PCREL_R
2660 This is a 6-bit pc-relative reloc with
2661 the right 3 bits assumed to be 0. Same
2662 as the previous reloc but on the right side
2667 This is a 12-bit absolute reloc with the
2668 right 3 bitsassumed to be 0.
2670 BFD_RELOC_D30V_15_PCREL
2672 This is a 12-bit pc-relative reloc with
2673 the right 3 bits assumed to be 0.
2675 BFD_RELOC_D30V_15_PCREL_R
2677 This is a 12-bit pc-relative reloc with
2678 the right 3 bits assumed to be 0. Same
2679 as the previous reloc but on the right side
2684 This is an 18-bit absolute reloc with
2685 the right 3 bits assumed to be 0.
2687 BFD_RELOC_D30V_21_PCREL
2689 This is an 18-bit pc-relative reloc with
2690 the right 3 bits assumed to be 0.
2692 BFD_RELOC_D30V_21_PCREL_R
2694 This is an 18-bit pc-relative reloc with
2695 the right 3 bits assumed to be 0. Same
2696 as the previous reloc but on the right side
2701 This is a 32-bit absolute reloc.
2703 BFD_RELOC_D30V_32_PCREL
2705 This is a 32-bit pc-relative reloc.
2708 BFD_RELOC_DLX_HI16_S
2723 Mitsubishi M32R relocs.
2724 This is a 24 bit absolute address.
2726 BFD_RELOC_M32R_10_PCREL
2728 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2730 BFD_RELOC_M32R_18_PCREL
2732 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2734 BFD_RELOC_M32R_26_PCREL
2736 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2738 BFD_RELOC_M32R_HI16_ULO
2740 This is a 16-bit reloc containing the high 16 bits of an address
2741 used when the lower 16 bits are treated as unsigned.
2743 BFD_RELOC_M32R_HI16_SLO
2745 This is a 16-bit reloc containing the high 16 bits of an address
2746 used when the lower 16 bits are treated as signed.
2750 This is a 16-bit reloc containing the lower 16 bits of an address.
2752 BFD_RELOC_M32R_SDA16
2754 This is a 16-bit reloc containing the small data area offset for use in
2755 add3, load, and store instructions.
2758 BFD_RELOC_V850_9_PCREL
2760 This is a 9-bit reloc
2762 BFD_RELOC_V850_22_PCREL
2764 This is a 22-bit reloc
2767 BFD_RELOC_V850_SDA_16_16_OFFSET
2769 This is a 16 bit offset from the short data area pointer.
2771 BFD_RELOC_V850_SDA_15_16_OFFSET
2773 This is a 16 bit offset (of which only 15 bits are used) from the
2774 short data area pointer.
2776 BFD_RELOC_V850_ZDA_16_16_OFFSET
2778 This is a 16 bit offset from the zero data area pointer.
2780 BFD_RELOC_V850_ZDA_15_16_OFFSET
2782 This is a 16 bit offset (of which only 15 bits are used) from the
2783 zero data area pointer.
2785 BFD_RELOC_V850_TDA_6_8_OFFSET
2787 This is an 8 bit offset (of which only 6 bits are used) from the
2788 tiny data area pointer.
2790 BFD_RELOC_V850_TDA_7_8_OFFSET
2792 This is an 8bit offset (of which only 7 bits are used) from the tiny
2795 BFD_RELOC_V850_TDA_7_7_OFFSET
2797 This is a 7 bit offset from the tiny data area pointer.
2799 BFD_RELOC_V850_TDA_16_16_OFFSET
2801 This is a 16 bit offset from the tiny data area pointer.
2804 BFD_RELOC_V850_TDA_4_5_OFFSET
2806 This is a 5 bit offset (of which only 4 bits are used) from the tiny
2809 BFD_RELOC_V850_TDA_4_4_OFFSET
2811 This is a 4 bit offset from the tiny data area pointer.
2813 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
2815 This is a 16 bit offset from the short data area pointer, with the
2816 bits placed non-contigously in the instruction.
2818 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
2820 This is a 16 bit offset from the zero data area pointer, with the
2821 bits placed non-contigously in the instruction.
2823 BFD_RELOC_V850_CALLT_6_7_OFFSET
2825 This is a 6 bit offset from the call table base pointer.
2827 BFD_RELOC_V850_CALLT_16_16_OFFSET
2829 This is a 16 bit offset from the call table base pointer.
2831 BFD_RELOC_V850_LONGCALL
2833 Used for relaxing indirect function calls.
2835 BFD_RELOC_V850_LONGJUMP
2837 Used for relaxing indirect jumps.
2839 BFD_RELOC_V850_ALIGN
2841 Used to maintain alignment whilst relaxing.
2843 BFD_RELOC_MN10300_32_PCREL
2845 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2848 BFD_RELOC_MN10300_16_PCREL
2850 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2856 This is a 8bit DP reloc for the tms320c30, where the most
2857 significant 8 bits of a 24 bit word are placed into the least
2858 significant 8 bits of the opcode.
2861 BFD_RELOC_TIC54X_PARTLS7
2863 This is a 7bit reloc for the tms320c54x, where the least
2864 significant 7 bits of a 16 bit word are placed into the least
2865 significant 7 bits of the opcode.
2868 BFD_RELOC_TIC54X_PARTMS9
2870 This is a 9bit DP reloc for the tms320c54x, where the most
2871 significant 9 bits of a 16 bit word are placed into the least
2872 significant 9 bits of the opcode.
2877 This is an extended address 23-bit reloc for the tms320c54x.
2880 BFD_RELOC_TIC54X_16_OF_23
2882 This is a 16-bit reloc for the tms320c54x, where the least
2883 significant 16 bits of a 23-bit extended address are placed into
2887 BFD_RELOC_TIC54X_MS7_OF_23
2889 This is a reloc for the tms320c54x, where the most
2890 significant 7 bits of a 23-bit extended address are placed into
2896 This is a 48 bit reloc for the FR30 that stores 32 bits.
2900 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
2903 BFD_RELOC_FR30_6_IN_4
2905 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
2908 BFD_RELOC_FR30_8_IN_8
2910 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
2913 BFD_RELOC_FR30_9_IN_8
2915 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
2918 BFD_RELOC_FR30_10_IN_8
2920 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
2923 BFD_RELOC_FR30_9_PCREL
2925 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
2926 short offset into 8 bits.
2928 BFD_RELOC_FR30_12_PCREL
2930 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
2931 short offset into 11 bits.
2934 BFD_RELOC_MCORE_PCREL_IMM8BY4
2936 BFD_RELOC_MCORE_PCREL_IMM11BY2
2938 BFD_RELOC_MCORE_PCREL_IMM4BY2
2940 BFD_RELOC_MCORE_PCREL_32
2942 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
2946 Motorola Mcore relocations.
2951 BFD_RELOC_MMIX_GETA_1
2953 BFD_RELOC_MMIX_GETA_2
2955 BFD_RELOC_MMIX_GETA_3
2957 These are relocations for the GETA instruction.
2959 BFD_RELOC_MMIX_CBRANCH
2961 BFD_RELOC_MMIX_CBRANCH_J
2963 BFD_RELOC_MMIX_CBRANCH_1
2965 BFD_RELOC_MMIX_CBRANCH_2
2967 BFD_RELOC_MMIX_CBRANCH_3
2969 These are relocations for a conditional branch instruction.
2971 BFD_RELOC_MMIX_PUSHJ
2973 BFD_RELOC_MMIX_PUSHJ_1
2975 BFD_RELOC_MMIX_PUSHJ_2
2977 BFD_RELOC_MMIX_PUSHJ_3
2979 These are relocations for the PUSHJ instruction.
2983 BFD_RELOC_MMIX_JMP_1
2985 BFD_RELOC_MMIX_JMP_2
2987 BFD_RELOC_MMIX_JMP_3
2989 These are relocations for the JMP instruction.
2991 BFD_RELOC_MMIX_ADDR19
2993 This is a relocation for a relative address as in a GETA instruction or
2996 BFD_RELOC_MMIX_ADDR27
2998 This is a relocation for a relative address as in a JMP instruction.
3000 BFD_RELOC_MMIX_REG_OR_BYTE
3002 This is a relocation for an instruction field that may be a general
3003 register or a value 0..255.
3007 This is a relocation for an instruction field that may be a general
3010 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3012 This is a relocation for two instruction fields holding a register and
3013 an offset, the equivalent of the relocation.
3015 BFD_RELOC_MMIX_LOCAL
3017 This relocation is an assertion that the expression is not allocated as
3018 a global register. It does not modify contents.
3021 BFD_RELOC_AVR_7_PCREL
3023 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3024 short offset into 7 bits.
3026 BFD_RELOC_AVR_13_PCREL
3028 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3029 short offset into 12 bits.
3033 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3034 program memory address) into 16 bits.
3036 BFD_RELOC_AVR_LO8_LDI
3038 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3039 data memory address) into 8 bit immediate value of LDI insn.
3041 BFD_RELOC_AVR_HI8_LDI
3043 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3044 of data memory address) into 8 bit immediate value of LDI insn.
3046 BFD_RELOC_AVR_HH8_LDI
3048 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3049 of program memory address) into 8 bit immediate value of LDI insn.
3051 BFD_RELOC_AVR_LO8_LDI_NEG
3053 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3054 (usually data memory address) into 8 bit immediate value of SUBI insn.
3056 BFD_RELOC_AVR_HI8_LDI_NEG
3058 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3059 (high 8 bit of data memory address) into 8 bit immediate value of
3062 BFD_RELOC_AVR_HH8_LDI_NEG
3064 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3065 (most high 8 bit of program memory address) into 8 bit immediate value
3066 of LDI or SUBI insn.
3068 BFD_RELOC_AVR_LO8_LDI_PM
3070 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3071 command address) into 8 bit immediate value of LDI insn.
3073 BFD_RELOC_AVR_HI8_LDI_PM
3075 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3076 of command address) into 8 bit immediate value of LDI insn.
3078 BFD_RELOC_AVR_HH8_LDI_PM
3080 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3081 of command address) into 8 bit immediate value of LDI insn.
3083 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3085 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3086 (usually command address) into 8 bit immediate value of SUBI insn.
3088 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3090 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3091 (high 8 bit of 16 bit command address) into 8 bit immediate value
3094 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3096 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3097 (high 6 bit of 22 bit command address) into 8 bit immediate
3102 This is a 32 bit reloc for the AVR that stores 23 bit value
3116 32 bit PC relative PLT address.
3120 Copy symbol at runtime.
3122 BFD_RELOC_390_GLOB_DAT
3126 BFD_RELOC_390_JMP_SLOT
3130 BFD_RELOC_390_RELATIVE
3132 Adjust by program base.
3136 32 bit PC relative offset to GOT.
3142 BFD_RELOC_390_PC16DBL
3144 PC relative 16 bit shifted by 1.
3146 BFD_RELOC_390_PLT16DBL
3148 16 bit PC rel. PLT shifted by 1.
3150 BFD_RELOC_390_PC32DBL
3152 PC relative 32 bit shifted by 1.
3154 BFD_RELOC_390_PLT32DBL
3156 32 bit PC rel. PLT shifted by 1.
3158 BFD_RELOC_390_GOTPCDBL
3160 32 bit PC rel. GOT shifted by 1.
3168 64 bit PC relative PLT address.
3170 BFD_RELOC_390_GOTENT
3172 32 bit rel. offset to GOT entry.
3177 Scenix IP2K - 9-bit register number / data address
3181 Scenix IP2K - 4-bit register/data bank number
3183 BFD_RELOC_IP2K_ADDR16CJP
3185 Scenix IP2K - low 13 bits of instruction word address
3187 BFD_RELOC_IP2K_PAGE3
3189 Scenix IP2K - high 3 bits of instruction word address
3191 BFD_RELOC_IP2K_LO8DATA
3193 BFD_RELOC_IP2K_HI8DATA
3195 BFD_RELOC_IP2K_EX8DATA
3197 Scenix IP2K - ext/low/high 8 bits of data address
3199 BFD_RELOC_IP2K_LO8INSN
3201 BFD_RELOC_IP2K_HI8INSN
3203 Scenix IP2K - low/high 8 bits of instruction word address
3205 BFD_RELOC_IP2K_PC_SKIP
3207 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3211 Scenix IP2K - 16 bit word address in text section.
3213 BFD_RELOC_IP2K_FR_OFFSET
3215 Scenix IP2K - 7-bit sp or dp offset
3217 BFD_RELOC_VPE4KMATH_DATA
3219 BFD_RELOC_VPE4KMATH_INSN
3221 Scenix VPE4K coprocessor - data/insn-space addressing
3224 BFD_RELOC_VTABLE_INHERIT
3226 BFD_RELOC_VTABLE_ENTRY
3228 These two relocations are used by the linker to determine which of
3229 the entries in a C++ virtual function table are actually used. When
3230 the --gc-sections option is given, the linker will zero out the entries
3231 that are not used, so that the code for those functions need not be
3232 included in the output.
3234 VTABLE_INHERIT is a zero-space relocation used to describe to the
3235 linker the inheritence tree of a C++ virtual function table. The
3236 relocation's symbol should be the parent class' vtable, and the
3237 relocation should be located at the child vtable.
3239 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3240 virtual function table entry. The reloc's symbol should refer to the
3241 table of the class mentioned in the code. Off of that base, an offset
3242 describes the entry that is being used. For Rela hosts, this offset
3243 is stored in the reloc's addend. For Rel hosts, we are forced to put
3244 this offset in the reloc's section offset.
3247 BFD_RELOC_IA64_IMM14
3249 BFD_RELOC_IA64_IMM22
3251 BFD_RELOC_IA64_IMM64
3253 BFD_RELOC_IA64_DIR32MSB
3255 BFD_RELOC_IA64_DIR32LSB
3257 BFD_RELOC_IA64_DIR64MSB
3259 BFD_RELOC_IA64_DIR64LSB
3261 BFD_RELOC_IA64_GPREL22
3263 BFD_RELOC_IA64_GPREL64I
3265 BFD_RELOC_IA64_GPREL32MSB
3267 BFD_RELOC_IA64_GPREL32LSB
3269 BFD_RELOC_IA64_GPREL64MSB
3271 BFD_RELOC_IA64_GPREL64LSB
3273 BFD_RELOC_IA64_LTOFF22
3275 BFD_RELOC_IA64_LTOFF64I
3277 BFD_RELOC_IA64_PLTOFF22
3279 BFD_RELOC_IA64_PLTOFF64I
3281 BFD_RELOC_IA64_PLTOFF64MSB
3283 BFD_RELOC_IA64_PLTOFF64LSB
3285 BFD_RELOC_IA64_FPTR64I
3287 BFD_RELOC_IA64_FPTR32MSB
3289 BFD_RELOC_IA64_FPTR32LSB
3291 BFD_RELOC_IA64_FPTR64MSB
3293 BFD_RELOC_IA64_FPTR64LSB
3295 BFD_RELOC_IA64_PCREL21B
3297 BFD_RELOC_IA64_PCREL21BI
3299 BFD_RELOC_IA64_PCREL21M
3301 BFD_RELOC_IA64_PCREL21F
3303 BFD_RELOC_IA64_PCREL22
3305 BFD_RELOC_IA64_PCREL60B
3307 BFD_RELOC_IA64_PCREL64I
3309 BFD_RELOC_IA64_PCREL32MSB
3311 BFD_RELOC_IA64_PCREL32LSB
3313 BFD_RELOC_IA64_PCREL64MSB
3315 BFD_RELOC_IA64_PCREL64LSB
3317 BFD_RELOC_IA64_LTOFF_FPTR22
3319 BFD_RELOC_IA64_LTOFF_FPTR64I
3321 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3323 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3325 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3327 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3329 BFD_RELOC_IA64_SEGREL32MSB
3331 BFD_RELOC_IA64_SEGREL32LSB
3333 BFD_RELOC_IA64_SEGREL64MSB
3335 BFD_RELOC_IA64_SEGREL64LSB
3337 BFD_RELOC_IA64_SECREL32MSB
3339 BFD_RELOC_IA64_SECREL32LSB
3341 BFD_RELOC_IA64_SECREL64MSB
3343 BFD_RELOC_IA64_SECREL64LSB
3345 BFD_RELOC_IA64_REL32MSB
3347 BFD_RELOC_IA64_REL32LSB
3349 BFD_RELOC_IA64_REL64MSB
3351 BFD_RELOC_IA64_REL64LSB
3353 BFD_RELOC_IA64_LTV32MSB
3355 BFD_RELOC_IA64_LTV32LSB
3357 BFD_RELOC_IA64_LTV64MSB
3359 BFD_RELOC_IA64_LTV64LSB
3361 BFD_RELOC_IA64_IPLTMSB
3363 BFD_RELOC_IA64_IPLTLSB
3367 BFD_RELOC_IA64_LTOFF22X
3369 BFD_RELOC_IA64_LDXMOV
3371 BFD_RELOC_IA64_TPREL14
3373 BFD_RELOC_IA64_TPREL22
3375 BFD_RELOC_IA64_TPREL64I
3377 BFD_RELOC_IA64_TPREL64MSB
3379 BFD_RELOC_IA64_TPREL64LSB
3381 BFD_RELOC_IA64_LTOFF_TPREL22
3383 BFD_RELOC_IA64_DTPMOD64MSB
3385 BFD_RELOC_IA64_DTPMOD64LSB
3387 BFD_RELOC_IA64_LTOFF_DTPMOD22
3389 BFD_RELOC_IA64_DTPREL14
3391 BFD_RELOC_IA64_DTPREL22
3393 BFD_RELOC_IA64_DTPREL64I
3395 BFD_RELOC_IA64_DTPREL32MSB
3397 BFD_RELOC_IA64_DTPREL32LSB
3399 BFD_RELOC_IA64_DTPREL64MSB
3401 BFD_RELOC_IA64_DTPREL64LSB
3403 BFD_RELOC_IA64_LTOFF_DTPREL22
3405 Intel IA64 Relocations.
3408 BFD_RELOC_M68HC11_HI8
3410 Motorola 68HC11 reloc.
3411 This is the 8 bit high part of an absolute address.
3413 BFD_RELOC_M68HC11_LO8
3415 Motorola 68HC11 reloc.
3416 This is the 8 bit low part of an absolute address.
3418 BFD_RELOC_M68HC11_3B
3420 Motorola 68HC11 reloc.
3421 This is the 3 bit of a value.
3423 BFD_RELOC_M68HC11_RL_JUMP
3425 Motorola 68HC11 reloc.
3426 This reloc marks the beginning of a jump/call instruction.
3427 It is used for linker relaxation to correctly identify beginning
3428 of instruction and change some branchs to use PC-relative
3431 BFD_RELOC_M68HC11_RL_GROUP
3433 Motorola 68HC11 reloc.
3434 This reloc marks a group of several instructions that gcc generates
3435 and for which the linker relaxation pass can modify and/or remove
3438 BFD_RELOC_M68HC11_LO16
3440 Motorola 68HC11 reloc.
3441 This is the 16-bit lower part of an address. It is used for 'call'
3442 instruction to specify the symbol address without any special
3443 transformation (due to memory bank window).
3445 BFD_RELOC_M68HC11_PAGE
3447 Motorola 68HC11 reloc.
3448 This is a 8-bit reloc that specifies the page number of an address.
3449 It is used by 'call' instruction to specify the page number of
3452 BFD_RELOC_M68HC11_24
3454 Motorola 68HC11 reloc.
3455 This is a 24-bit reloc that represents the address with a 16-bit
3456 value and a 8-bit page number. The symbol address is transformed
3457 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3460 BFD_RELOC_CRIS_BDISP8
3462 BFD_RELOC_CRIS_UNSIGNED_5
3464 BFD_RELOC_CRIS_SIGNED_6
3466 BFD_RELOC_CRIS_UNSIGNED_6
3468 BFD_RELOC_CRIS_UNSIGNED_4
3470 These relocs are only used within the CRIS assembler. They are not
3471 (at present) written to any object files.
3475 BFD_RELOC_CRIS_GLOB_DAT
3477 BFD_RELOC_CRIS_JUMP_SLOT
3479 BFD_RELOC_CRIS_RELATIVE
3481 Relocs used in ELF shared libraries for CRIS.
3483 BFD_RELOC_CRIS_32_GOT
3485 32-bit offset to symbol-entry within GOT.
3487 BFD_RELOC_CRIS_16_GOT
3489 16-bit offset to symbol-entry within GOT.
3491 BFD_RELOC_CRIS_32_GOTPLT
3493 32-bit offset to symbol-entry within GOT, with PLT handling.
3495 BFD_RELOC_CRIS_16_GOTPLT
3497 16-bit offset to symbol-entry within GOT, with PLT handling.
3499 BFD_RELOC_CRIS_32_GOTREL
3501 32-bit offset to symbol, relative to GOT.
3503 BFD_RELOC_CRIS_32_PLT_GOTREL
3505 32-bit offset to symbol with PLT entry, relative to GOT.
3507 BFD_RELOC_CRIS_32_PLT_PCREL
3509 32-bit offset to symbol with PLT entry, relative to this relocation.
3514 BFD_RELOC_860_GLOB_DAT
3516 BFD_RELOC_860_JUMP_SLOT
3518 BFD_RELOC_860_RELATIVE
3528 BFD_RELOC_860_SPLIT0
3532 BFD_RELOC_860_SPLIT1
3536 BFD_RELOC_860_SPLIT2
3540 BFD_RELOC_860_LOGOT0
3542 BFD_RELOC_860_SPGOT0
3544 BFD_RELOC_860_LOGOT1
3546 BFD_RELOC_860_SPGOT1
3548 BFD_RELOC_860_LOGOTOFF0
3550 BFD_RELOC_860_SPGOTOFF0
3552 BFD_RELOC_860_LOGOTOFF1
3554 BFD_RELOC_860_SPGOTOFF1
3556 BFD_RELOC_860_LOGOTOFF2
3558 BFD_RELOC_860_LOGOTOFF3
3562 BFD_RELOC_860_HIGHADJ
3566 BFD_RELOC_860_HAGOTOFF
3574 BFD_RELOC_860_HIGOTOFF
3576 Intel i860 Relocations.
3579 BFD_RELOC_OPENRISC_ABS_26
3581 BFD_RELOC_OPENRISC_REL_26
3583 OpenRISC Relocations.
3586 BFD_RELOC_H8_DIR16A8
3588 BFD_RELOC_H8_DIR16R8
3590 BFD_RELOC_H8_DIR24A8
3592 BFD_RELOC_H8_DIR24R8
3594 BFD_RELOC_H8_DIR32A16
3599 BFD_RELOC_XSTORMY16_REL_12
3601 BFD_RELOC_XSTORMY16_24
3603 BFD_RELOC_XSTORMY16_FPTR16
3605 Sony Xstormy16 Relocations.
3608 BFD_RELOC_VAX_GLOB_DAT
3610 BFD_RELOC_VAX_JMP_SLOT
3612 BFD_RELOC_VAX_RELATIVE
3614 Relocations used by VAX ELF.
3620 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
3625 bfd_reloc_type_lookup
3629 bfd_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code);
3632 Return a pointer to a howto structure which, when
3633 invoked, will perform the relocation @var{code} on data from the
3639 bfd_reloc_type_lookup (abfd
, code
)
3641 bfd_reloc_code_real_type code
;
3643 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
3646 static reloc_howto_type bfd_howto_32
=
3647 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_bitfield
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
3651 bfd_default_reloc_type_lookup
3654 reloc_howto_type *bfd_default_reloc_type_lookup
3655 (bfd *abfd, bfd_reloc_code_real_type code);
3658 Provides a default relocation lookup routine for any architecture.
3663 bfd_default_reloc_type_lookup (abfd
, code
)
3665 bfd_reloc_code_real_type code
;
3669 case BFD_RELOC_CTOR
:
3670 /* The type of reloc used in a ctor, which will be as wide as the
3671 address - so either a 64, 32, or 16 bitter. */
3672 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
3677 return &bfd_howto_32
;
3686 return (reloc_howto_type
*) NULL
;
3691 bfd_get_reloc_code_name
3694 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
3697 Provides a printable name for the supplied relocation code.
3698 Useful mainly for printing error messages.
3702 bfd_get_reloc_code_name (code
)
3703 bfd_reloc_code_real_type code
;
3705 if ((int) code
> (int) BFD_RELOC_UNUSED
)
3707 return bfd_reloc_code_real_names
[(int)code
];
3712 bfd_generic_relax_section
3715 bfd_boolean bfd_generic_relax_section
3718 struct bfd_link_info *,
3722 Provides default handling for relaxing for back ends which
3723 don't do relaxing -- i.e., does nothing.
3727 bfd_generic_relax_section (abfd
, section
, link_info
, again
)
3728 bfd
*abfd ATTRIBUTE_UNUSED
;
3729 asection
*section ATTRIBUTE_UNUSED
;
3730 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
;
3739 bfd_generic_gc_sections
3742 bfd_boolean bfd_generic_gc_sections
3743 (bfd *, struct bfd_link_info *);
3746 Provides default handling for relaxing for back ends which
3747 don't do section gc -- i.e., does nothing.
3751 bfd_generic_gc_sections (abfd
, link_info
)
3752 bfd
*abfd ATTRIBUTE_UNUSED
;
3753 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
;
3760 bfd_generic_merge_sections
3763 bfd_boolean bfd_generic_merge_sections
3764 (bfd *, struct bfd_link_info *);
3767 Provides default handling for SEC_MERGE section merging for back ends
3768 which don't have SEC_MERGE support -- i.e., does nothing.
3772 bfd_generic_merge_sections (abfd
, link_info
)
3773 bfd
*abfd ATTRIBUTE_UNUSED
;
3774 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
;
3781 bfd_generic_get_relocated_section_contents
3785 bfd_generic_get_relocated_section_contents (bfd *abfd,
3786 struct bfd_link_info *link_info,
3787 struct bfd_link_order *link_order,
3789 bfd_boolean relocateable,
3793 Provides default handling of relocation effort for back ends
3794 which can't be bothered to do it efficiently.
3799 bfd_generic_get_relocated_section_contents (abfd
, link_info
, link_order
, data
,
3800 relocateable
, symbols
)
3802 struct bfd_link_info
*link_info
;
3803 struct bfd_link_order
*link_order
;
3805 bfd_boolean relocateable
;
3808 /* Get enough memory to hold the stuff. */
3809 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
3810 asection
*input_section
= link_order
->u
.indirect
.section
;
3812 long reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
3813 arelent
**reloc_vector
= NULL
;
3819 reloc_vector
= (arelent
**) bfd_malloc ((bfd_size_type
) reloc_size
);
3820 if (reloc_vector
== NULL
&& reloc_size
!= 0)
3823 /* Read in the section. */
3824 if (!bfd_get_section_contents (input_bfd
,
3828 input_section
->_raw_size
))
3831 /* We're not relaxing the section, so just copy the size info. */
3832 input_section
->_cooked_size
= input_section
->_raw_size
;
3833 input_section
->reloc_done
= TRUE
;
3835 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
3839 if (reloc_count
< 0)
3842 if (reloc_count
> 0)
3845 for (parent
= reloc_vector
; *parent
!= (arelent
*) NULL
;
3848 char *error_message
= (char *) NULL
;
3849 bfd_reloc_status_type r
=
3850 bfd_perform_relocation (input_bfd
,
3854 relocateable
? abfd
: (bfd
*) NULL
,
3859 asection
*os
= input_section
->output_section
;
3861 /* A partial link, so keep the relocs. */
3862 os
->orelocation
[os
->reloc_count
] = *parent
;
3866 if (r
!= bfd_reloc_ok
)
3870 case bfd_reloc_undefined
:
3871 if (!((*link_info
->callbacks
->undefined_symbol
)
3872 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
3873 input_bfd
, input_section
, (*parent
)->address
,
3877 case bfd_reloc_dangerous
:
3878 BFD_ASSERT (error_message
!= (char *) NULL
);
3879 if (!((*link_info
->callbacks
->reloc_dangerous
)
3880 (link_info
, error_message
, input_bfd
, input_section
,
3881 (*parent
)->address
)))
3884 case bfd_reloc_overflow
:
3885 if (!((*link_info
->callbacks
->reloc_overflow
)
3886 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
3887 (*parent
)->howto
->name
, (*parent
)->addend
,
3888 input_bfd
, input_section
, (*parent
)->address
)))
3891 case bfd_reloc_outofrange
:
3900 if (reloc_vector
!= NULL
)
3901 free (reloc_vector
);
3905 if (reloc_vector
!= NULL
)
3906 free (reloc_vector
);