1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
8 Free Software Foundation, Inc.
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
35 #include "libiberty.h"
36 #include "@prefix@-desc.h"
37 #include "@prefix@-opc.h"
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
43 static void print_normal
44 PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
45 static void print_address
46 PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
47 static void print_keyword
48 PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
49 static void print_insn_normal
50 PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
53 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, unsigned));
54 static int default_print_insn
55 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
57 PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
58 CGEN_EXTRACT_INFO *, unsigned long *));
60 /* -- disassembler routines inserted here */
62 /* Default print handler. */
65 print_normal (cd, dis_info, value, attrs, pc, length)
66 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
70 bfd_vma pc ATTRIBUTE_UNUSED;
71 int length ATTRIBUTE_UNUSED;
73 disassemble_info *info = (disassemble_info *) dis_info;
75 #ifdef CGEN_PRINT_NORMAL
76 CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
79 /* Print the operand as directed by the attributes. */
80 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
82 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
83 (*info->fprintf_func) (info->stream, "%ld", value);
85 (*info->fprintf_func) (info->stream, "0x%lx", value);
88 /* Default address handler. */
91 print_address (cd, dis_info, value, attrs, pc, length)
92 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
96 bfd_vma pc ATTRIBUTE_UNUSED;
97 int length ATTRIBUTE_UNUSED;
99 disassemble_info *info = (disassemble_info *) dis_info;
101 #ifdef CGEN_PRINT_ADDRESS
102 CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
105 /* Print the operand as directed by the attributes. */
106 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
107 ; /* nothing to do */
108 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
109 (*info->print_address_func) (value, info);
110 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
111 (*info->print_address_func) (value, info);
112 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
113 (*info->fprintf_func) (info->stream, "%ld", (long) value);
115 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
118 /* Keyword print handler. */
121 print_keyword (cd, dis_info, keyword_table, value, attrs)
122 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
124 CGEN_KEYWORD *keyword_table;
126 unsigned int attrs ATTRIBUTE_UNUSED;
128 disassemble_info *info = (disassemble_info *) dis_info;
129 const CGEN_KEYWORD_ENTRY *ke;
131 ke = cgen_keyword_lookup_value (keyword_table, value);
133 (*info->fprintf_func) (info->stream, "%s", ke->name);
135 (*info->fprintf_func) (info->stream, "???");
138 /* Default insn printer.
140 DIS_INFO is defined as `PTR' so the disassembler needn't know anything
141 about disassemble_info. */
144 print_insn_normal (cd, dis_info, insn, fields, pc, length)
147 const CGEN_INSN *insn;
152 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
153 disassemble_info *info = (disassemble_info *) dis_info;
154 const CGEN_SYNTAX_CHAR_TYPE *syn;
156 CGEN_INIT_PRINT (cd);
158 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
160 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
162 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
165 if (CGEN_SYNTAX_CHAR_P (*syn))
167 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
171 /* We have an operand. */
172 @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
173 fields, CGEN_INSN_ATTRS (insn), pc, length);
177 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
179 Returns 0 if all is well, non-zero otherwise. */
182 read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
183 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
185 disassemble_info *info;
188 CGEN_EXTRACT_INFO *ex_info;
189 unsigned long *insn_value;
191 int status = (*info->read_memory_func) (pc, buf, buflen, info);
194 (*info->memory_error_func) (status, pc, info);
198 ex_info->dis_info = info;
199 ex_info->valid = (1 << buflen) - 1;
200 ex_info->insn_bytes = buf;
202 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
206 /* Utility to print an insn.
207 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
208 The result is the size of the insn in bytes or zero for an unknown insn
209 or -1 if an error occurs fetching data (memory_error_func will have
213 print_insn (cd, pc, info, buf, buflen)
216 disassemble_info *info;
220 CGEN_INSN_INT insn_value;
221 const CGEN_INSN_LIST *insn_list;
222 CGEN_EXTRACT_INFO ex_info;
225 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
226 basesize = cd->base_insn_bitsize < buflen * 8 ?
227 cd->base_insn_bitsize : buflen * 8;
228 insn_value = cgen_get_insn_value (cd, buf, basesize);
231 /* Fill in ex_info fields like read_insn would. Don't actually call
232 read_insn, since the incoming buffer is already read (and possibly
233 modified a la m32r). */
234 ex_info.valid = (1 << buflen) - 1;
235 ex_info.dis_info = info;
236 ex_info.insn_bytes = buf;
238 /* The instructions are stored in hash lists.
239 Pick the first one and keep trying until we find the right one. */
241 insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
242 while (insn_list != NULL)
244 const CGEN_INSN *insn = insn_list->insn;
247 unsigned long insn_value_cropped;
249 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
250 /* Not needed as insn shouldn't be in hash lists if not supported. */
251 /* Supported by this cpu? */
252 if (! @arch@_cgen_insn_supported (cd, insn))
254 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
259 /* Basic bit mask must be correct. */
260 /* ??? May wish to allow target to defer this check until the extract
263 /* Base size may exceed this instruction's size. Extract the
264 relevant part from the buffer. */
265 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
266 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
267 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
268 info->endian == BFD_ENDIAN_BIG);
270 insn_value_cropped = insn_value;
272 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
273 == CGEN_INSN_BASE_VALUE (insn))
275 /* Printing is handled in two passes. The first pass parses the
276 machine insn and extracts the fields. The second pass prints
279 /* Make sure the entire insn is loaded into insn_value, if it
281 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
282 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
284 unsigned long full_insn_value;
285 int rc = read_insn (cd, pc, info, buf,
286 CGEN_INSN_BITSIZE (insn) / 8,
287 & ex_info, & full_insn_value);
290 length = CGEN_EXTRACT_FN (cd, insn)
291 (cd, insn, &ex_info, full_insn_value, &fields, pc);
294 length = CGEN_EXTRACT_FN (cd, insn)
295 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
297 /* length < 0 -> error */
302 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
303 /* length is in bits, result is in bytes */
308 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
314 /* Default value for CGEN_PRINT_INSN.
315 The result is the size of the insn in bytes or zero for an unknown insn
316 or -1 if an error occured fetching bytes. */
318 #ifndef CGEN_PRINT_INSN
319 #define CGEN_PRINT_INSN default_print_insn
323 default_print_insn (cd, pc, info)
326 disassemble_info *info;
328 char buf[CGEN_MAX_INSN_SIZE];
332 /* Attempt to read the base part of the insn. */
333 buflen = cd->base_insn_bitsize / 8;
334 status = (*info->read_memory_func) (pc, buf, buflen, info);
336 /* Try again with the minimum part, if min < base. */
337 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
339 buflen = cd->min_insn_bitsize / 8;
340 status = (*info->read_memory_func) (pc, buf, buflen, info);
345 (*info->memory_error_func) (status, pc, info);
349 return print_insn (cd, pc, info, buf, buflen);
353 Print one instruction from PC on INFO->STREAM.
354 Return the size of the instruction (in bytes). */
356 typedef struct cpu_desc_list {
357 struct cpu_desc_list *next;
365 print_insn_@arch@ (pc, info)
367 disassemble_info *info;
369 static cpu_desc_list *cd_list = 0;
370 cpu_desc_list *cl = 0;
371 static CGEN_CPU_DESC cd = 0;
373 static int prev_mach;
374 static int prev_endian;
377 int endian = (info->endian == BFD_ENDIAN_BIG
379 : CGEN_ENDIAN_LITTLE);
380 enum bfd_architecture arch;
382 /* ??? gdb will set mach but leave the architecture as "unknown" */
383 #ifndef CGEN_BFD_ARCH
384 #define CGEN_BFD_ARCH bfd_arch_@arch@
387 if (arch == bfd_arch_unknown)
388 arch = CGEN_BFD_ARCH;
390 /* There's no standard way to compute the machine or isa number
391 so we leave it to the target. */
392 #ifdef CGEN_COMPUTE_MACH
393 mach = CGEN_COMPUTE_MACH (info);
398 #ifdef CGEN_COMPUTE_ISA
399 isa = CGEN_COMPUTE_ISA (info);
401 isa = info->insn_sets;
404 /* If we've switched cpu's, try to find a handle we've used before */
408 || endian != prev_endian))
411 for (cl = cd_list; cl; cl = cl->next)
413 if (cl->isa == isa &&
415 cl->endian == endian)
423 /* If we haven't initialized yet, initialize the opcode table. */
426 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
427 const char *mach_name;
431 mach_name = arch_type->printable_name;
435 prev_endian = endian;
436 cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
437 CGEN_CPU_OPEN_BFDMACH, mach_name,
438 CGEN_CPU_OPEN_ENDIAN, prev_endian,
443 /* save this away for future reference */
444 cl = xmalloc (sizeof (struct cpu_desc_list));
452 @arch@_cgen_init_dis (cd);
455 /* We try to have as much common code as possible.
456 But at this point some targets need to take over. */
457 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
458 but if not possible try to move this hook elsewhere rather than
460 length = CGEN_PRINT_INSN (cd, pc, info);
466 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
467 return cd->default_insn_bitsize / 8;