?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
* config/tc-avr.c (mcu_types): Add new devices: AT90PWM2B, AT90PWM3B.
[binutils.git] / gas / config / tc-avr.c
bloba7d401606d7222aaf3d632d9548361409fa927e4
1 /* tc-avr.c -- Assembler code for the ATMEL AVR
2
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
6
7 This file is part of GAS, the GNU Assembler.
8
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
23
24 #include "as.h"
25 #include "safe-ctype.h"
26 #include "subsegs.h"
27
28 struct avr_opcodes_s
29 {
30 char * name;
31 char * constraints;
32 int insn_size; /* In words. */
33 int isa;
34 unsigned int bin_opcode;
35 };
36
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
39
40 struct avr_opcodes_s avr_opcodes[] =
41 {
42 #include "opcode/avr.h"
43 {NULL, NULL, 0, 0, 0}
44 };
45
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
49
50 const char *md_shortopts = "m:";
51 struct mcu_type_s
52 {
53 char *name;
54 int isa;
55 int mach;
56 };
57
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
61
62 static struct mcu_type_s mcu_types[] =
63 {
64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_M103, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny10", AVR_ISA_TINY1, bfd_mach_avr1}, /* XXX -> tn11 */
72 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
76 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
78 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
79 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
80 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
81 {"attiny26", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
83 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
84 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
85 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
88 {"at86rf401", AVR_ISA_2xxx, bfd_mach_avr2},
89 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"attiny43u", AVR_ISA_TINY2, bfd_mach_avr2},
101 {"attiny48", AVR_ISA_TINY2, bfd_mach_avr2},
102 {"atmega603", AVR_ISA_M603, bfd_mach_avr3}, /* XXX -> m103 */
103 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
104 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
105 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
106 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
107 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
108 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
109 {"atmega83", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8535 */
110 {"atmega85", AVR_ISA_M8, bfd_mach_avr4}, /* XXX -> m8 */
111 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
112 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
113 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
114 {"atmega8hva", AVR_ISA_PWMx, bfd_mach_avr4},
115 {"at90pwm1", AVR_ISA_PWMx, bfd_mach_avr4},
116 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
117 {"at90pwm2b", AVR_ISA_PWMx, bfd_mach_avr4},
118 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
119 {"at90pwm3b", AVR_ISA_PWMx, bfd_mach_avr4},
120 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
121 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
122 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
123 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
124 {"atmega164p", AVR_ISA_M323, bfd_mach_avr5},
125 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
126 {"atmega165p", AVR_ISA_M323, bfd_mach_avr5},
127 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
129 {"atmega169p", AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
132 {"atmega324p", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
134 {"atmega325p", AVR_ISA_M323, bfd_mach_avr5},
135 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
136 {"atmega329p", AVR_ISA_M323, bfd_mach_avr5},
137 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
138 {"atmega3250p",AVR_ISA_M323, bfd_mach_avr5},
139 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
140 {"atmega3290p",AVR_ISA_M323, bfd_mach_avr5},
141 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
142 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
143 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
144 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
145 {"atmega644p", AVR_ISA_M323, bfd_mach_avr5},
146 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
147 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
148 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
149 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
150 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
151 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
152 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
153 {"atmega16hva",AVR_ISA_M323, bfd_mach_avr5},
154 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
155 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
156 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
157 {"at90pwm216", AVR_ISA_M323, bfd_mach_avr5},
158 {"at90pwm316", AVR_ISA_M323, bfd_mach_avr5},
159 {"at90usb82", AVR_ISA_M323, bfd_mach_avr5},
160 {"at90usb162", AVR_ISA_M323, bfd_mach_avr5},
161 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
162 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
163 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
164 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
165 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
166 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
167 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
168 {NULL, 0, 0}
169 };
170
171 /* Current MCU type. */
172 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
173 static struct mcu_type_s * avr_mcu = & default_mcu;
174
175 /* AVR target-specific switches. */
176 struct avr_opt_s
177 {
178 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
179 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
180 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
181 };
182
183 static struct avr_opt_s avr_opt = { 0, 0, 0 };
184
185 const char EXP_CHARS[] = "eE";
186 const char FLT_CHARS[] = "dD";
187
188 static void avr_set_arch (int);
189
190 /* The target specific pseudo-ops which we support. */
191 const pseudo_typeS md_pseudo_table[] =
192 {
193 {"arch", avr_set_arch, 0},
194 { NULL, NULL, 0}
195 };
196
197 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
198
199 #define EXP_MOD_NAME(i) exp_mod[i].name
200 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
201 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
202 #define HAVE_PM_P(i) exp_mod[i].have_pm
203
204 struct exp_mod_s
205 {
206 char * name;
207 bfd_reloc_code_real_type reloc;
208 bfd_reloc_code_real_type neg_reloc;
209 int have_pm;
210 };
211
212 static struct exp_mod_s exp_mod[] =
213 {
214 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
215 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
216 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
217 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
218 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
219 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
220 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
221 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
222 };
223
224 /* A union used to store indicies into the exp_mod[] array
225 in a hash table which expects void * data types. */
226 typedef union
227 {
228 void * ptr;
229 int index;
230 } mod_index;
231
232 /* Opcode hash table. */
233 static struct hash_control *avr_hash;
234
235 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
236 static struct hash_control *avr_mod_hash;
237
238 #define OPTION_MMCU 'm'
239 enum options
240 {
241 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
242 OPTION_NO_SKIP_BUG,
243 OPTION_NO_WRAP
244 };
245
246 struct option md_longopts[] =
247 {
248 { "mmcu", required_argument, NULL, OPTION_MMCU },
249 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
250 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
251 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
252 { NULL, no_argument, NULL, 0 }
253 };
254
255 size_t md_longopts_size = sizeof (md_longopts);
256
257 /* Display nicely formatted list of known MCU names. */
258
259 static void
260 show_mcu_list (FILE *stream)
261 {
262 int i, x;
263
264 fprintf (stream, _("Known MCU names:"));
265 x = 1000;
266
267 for (i = 0; mcu_types[i].name; i++)
268 {
269 int len = strlen (mcu_types[i].name);
270
271 x += len + 1;
272
273 if (x < 75)
274 fprintf (stream, " %s", mcu_types[i].name);
275 else
276 {
277 fprintf (stream, "\n %s", mcu_types[i].name);
278 x = len + 2;
279 }
280 }
281
282 fprintf (stream, "\n");
283 }
284
285 static inline char *
286 skip_space (char *s)
287 {
288 while (*s == ' ' || *s == '\t')
289 ++s;
290 return s;
291 }
292
293 /* Extract one word from FROM and copy it to TO. */
294
295 static char *
296 extract_word (char *from, char *to, int limit)
297 {
298 char *op_start;
299 char *op_end;
300 int size = 0;
301
302 /* Drop leading whitespace. */
303 from = skip_space (from);
304 *to = 0;
305
306 /* Find the op code end. */
307 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
308 {
309 to[size++] = *op_end++;
310 if (size + 1 >= limit)
311 break;
312 }
313
314 to[size] = 0;
315 return op_end;
316 }
317
318 int
319 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
320 asection *seg ATTRIBUTE_UNUSED)
321 {
322 abort ();
323 return 0;
324 }
325
326 void
327 md_show_usage (FILE *stream)
328 {
329 fprintf (stream,
330 _("AVR options:\n"
331 " -mmcu=[avr-name] select microcontroller variant\n"
332 " [avr-name] can be:\n"
333 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
334 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
335 " avr3 - ATmega103, ATmega603\n"
336 " avr4 - ATmega83, ATmega85\n"
337 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
338 " or immediate microcontroller name.\n"));
339 fprintf (stream,
340 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
341 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
342 " (default for avr4, avr5)\n"
343 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
344 " (default for avr3, avr5)\n"));
345 show_mcu_list (stream);
346 }
347
348 static void
349 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
350 {
351 char str[20];
352
353 input_line_pointer = extract_word (input_line_pointer, str, 20);
354 md_parse_option (OPTION_MMCU, str);
355 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
356 }
357
358 int
359 md_parse_option (int c, char *arg)
360 {
361 switch (c)
362 {
363 case OPTION_MMCU:
364 {
365 int i;
366 char *s = alloca (strlen (arg) + 1);
367
368 {
369 char *t = s;
370 char *arg1 = arg;
371
372 do
373 *t = TOLOWER (*arg1++);
374 while (*t++);
375 }
376
377 for (i = 0; mcu_types[i].name; ++i)
378 if (strcmp (mcu_types[i].name, s) == 0)
379 break;
380
381 if (!mcu_types[i].name)
382 {
383 show_mcu_list (stderr);
384 as_fatal (_("unknown MCU: %s\n"), arg);
385 }
386
387 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
388 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
389 as .arch ... in the asm output at the same time. */
390 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
391 avr_mcu = &mcu_types[i];
392 else
393 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
394 avr_mcu->name, mcu_types[i].name);
395 return 1;
396 }
397 case OPTION_ALL_OPCODES:
398 avr_opt.all_opcodes = 1;
399 return 1;
400 case OPTION_NO_SKIP_BUG:
401 avr_opt.no_skip_bug = 1;
402 return 1;
403 case OPTION_NO_WRAP:
404 avr_opt.no_wrap = 1;
405 return 1;
406 }
407
408 return 0;
409 }
410
411 symbolS *
412 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
413 {
414 return NULL;
415 }
416
417 /* Turn a string in input_line_pointer into a floating point constant
418 of type TYPE, and store the appropriate bytes in *LITP. The number
419 of LITTLENUMS emitted is stored in *SIZEP. An error message is
420 returned, or NULL on OK. */
421
422 char *
423 md_atof (int type, char *litP, int *sizeP)
424 {
425 int prec;
426 LITTLENUM_TYPE words[4];
427 LITTLENUM_TYPE *wordP;
428 char *t;
429
430 switch (type)
431 {
432 case 'f':
433 prec = 2;
434 break;
435 case 'd':
436 prec = 4;
437 break;
438 default:
439 *sizeP = 0;
440 return _("bad call to md_atof");
441 }
442
443 t = atof_ieee (input_line_pointer, type, words);
444 if (t)
445 input_line_pointer = t;
446
447 *sizeP = prec * sizeof (LITTLENUM_TYPE);
448
449 /* This loop outputs the LITTLENUMs in REVERSE order. */
450 for (wordP = words + prec - 1; prec--;)
451 {
452 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
453 litP += sizeof (LITTLENUM_TYPE);
454 }
455
456 return NULL;
457 }
458
459 void
460 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
461 asection *sec ATTRIBUTE_UNUSED,
462 fragS *fragP ATTRIBUTE_UNUSED)
463 {
464 abort ();
465 }
466
467 void
468 md_begin (void)
469 {
470 unsigned int i;
471 struct avr_opcodes_s *opcode;
472
473 avr_hash = hash_new ();
474
475 /* Insert unique names into hash table. This hash table then provides a
476 quick index to the first opcode with a particular name in the opcode
477 table. */
478 for (opcode = avr_opcodes; opcode->name; opcode++)
479 hash_insert (avr_hash, opcode->name, (char *) opcode);
480
481 avr_mod_hash = hash_new ();
482
483 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
484 {
485 mod_index m;
486
487 m.index = i + 10;
488 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
489 }
490
491 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
492 }
493
494 /* Resolve STR as a constant expression and return the result.
495 If result greater than MAX then error. */
496
497 static unsigned int
498 avr_get_constant (char *str, int max)
499 {
500 expressionS ex;
501
502 str = skip_space (str);
503 input_line_pointer = str;
504 expression (& ex);
505
506 if (ex.X_op != O_constant)
507 as_bad (_("constant value required"));
508
509 if (ex.X_add_number > max || ex.X_add_number < 0)
510 as_bad (_("number must be positive and less than %d"), max + 1);
511
512 return ex.X_add_number;
513 }
514
515 /* Parse for ldd/std offset. */
516
517 static void
518 avr_offset_expression (expressionS *exp)
519 {
520 char *str = input_line_pointer;
521 char *tmp;
522 char op[8];
523
524 tmp = str;
525 str = extract_word (str, op, sizeof (op));
526
527 input_line_pointer = tmp;
528 expression (exp);
529
530 /* Warn about expressions that fail to use lo8 (). */
531 if (exp->X_op == O_constant)
532 {
533 int x = exp->X_add_number;
534
535 if (x < -255 || x > 255)
536 as_warn (_("constant out of 8-bit range: %d"), x);
537 }
538 }
539
540 /* Parse ordinary expression. */
541
542 static char *
543 parse_exp (char *s, expressionS *op)
544 {
545 input_line_pointer = s;
546 expression (op);
547 if (op->X_op == O_absent)
548 as_bad (_("missing operand"));
549 return input_line_pointer;
550 }
551
552 /* Parse special expressions (needed for LDI command):
553 xx8 (address)
554 xx8 (-address)
555 pm_xx8 (address)
556 pm_xx8 (-address)
557 where xx is: hh, hi, lo. */
558
559 static bfd_reloc_code_real_type
560 avr_ldi_expression (expressionS *exp)
561 {
562 char *str = input_line_pointer;
563 char *tmp;
564 char op[8];
565 int mod;
566 int linker_stubs_should_be_generated = 0;
567
568 tmp = str;
569
570 str = extract_word (str, op, sizeof (op));
571
572 if (op[0])
573 {
574 mod_index m;
575
576 m.ptr = hash_find (avr_mod_hash, op);
577 mod = m.index;
578
579 if (mod)
580 {
581 int closes = 0;
582
583 mod -= 10;
584 str = skip_space (str);
585
586 if (*str == '(')
587 {
588 bfd_reloc_code_real_type reloc_to_return;
589 int neg_p = 0;
590
591 ++str;
592
593 if (strncmp ("pm(", str, 3) == 0
594 || strncmp ("gs(",str,3) == 0
595 || strncmp ("-(gs(",str,5) == 0
596 || strncmp ("-(pm(", str, 5) == 0)
597 {
598 if (HAVE_PM_P (mod))
599 {
600 ++mod;
601 ++closes;
602 }
603 else
604 as_bad (_("illegal expression"));
605
606 if (str[0] == 'g' || str[2] == 'g')
607 linker_stubs_should_be_generated = 1;
608
609 if (*str == '-')
610 {
611 neg_p = 1;
612 ++closes;
613 str += 5;
614 }
615 else
616 str += 3;
617 }
618
619 if (*str == '-' && *(str + 1) == '(')
620 {
621 neg_p ^= 1;
622 ++closes;
623 str += 2;
624 }
625
626 input_line_pointer = str;
627 expression (exp);
628
629 do
630 {
631 if (*input_line_pointer != ')')
632 {
633 as_bad (_("`)' required"));
634 break;
635 }
636 input_line_pointer++;
637 }
638 while (closes--);
639
640 reloc_to_return =
641 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
642 if (linker_stubs_should_be_generated)
643 {
644 switch (reloc_to_return)
645 {
646 case BFD_RELOC_AVR_LO8_LDI_PM:
647 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
648 break;
649 case BFD_RELOC_AVR_HI8_LDI_PM:
650 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
651 break;
652
653 default:
654 as_warn (_("expression dangerous with linker stubs"));
655 }
656 }
657 return reloc_to_return;
658 }
659 }
660 }
661
662 input_line_pointer = tmp;
663 expression (exp);
664
665 /* Warn about expressions that fail to use lo8 (). */
666 if (exp->X_op == O_constant)
667 {
668 int x = exp->X_add_number;
669
670 if (x < -255 || x > 255)
671 as_warn (_("constant out of 8-bit range: %d"), x);
672 }
673
674 return BFD_RELOC_AVR_LDI;
675 }
676
677 /* Parse one instruction operand.
678 Return operand bitmask. Also fixups can be generated. */
679
680 static unsigned int
681 avr_operand (struct avr_opcodes_s *opcode,
682 int where,
683 char *op,
684 char **line)
685 {
686 expressionS op_expr;
687 unsigned int op_mask = 0;
688 char *str = skip_space (*line);
689
690 switch (*op)
691 {
692 /* Any register operand. */
693 case 'w':
694 case 'd':
695 case 'r':
696 case 'a':
697 case 'v':
698 if (*str == 'r' || *str == 'R')
699 {
700 char r_name[20];
701
702 str = extract_word (str, r_name, sizeof (r_name));
703 op_mask = 0xff;
704 if (ISDIGIT (r_name[1]))
705 {
706 if (r_name[2] == '\0')
707 op_mask = r_name[1] - '0';
708 else if (r_name[1] != '0'
709 && ISDIGIT (r_name[2])
710 && r_name[3] == '\0')
711 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
712 }
713 }
714 else
715 {
716 op_mask = avr_get_constant (str, 31);
717 str = input_line_pointer;
718 }
719
720 if (op_mask <= 31)
721 {
722 switch (*op)
723 {
724 case 'a':
725 if (op_mask < 16 || op_mask > 23)
726 as_bad (_("register r16-r23 required"));
727 op_mask -= 16;
728 break;
729
730 case 'd':
731 if (op_mask < 16)
732 as_bad (_("register number above 15 required"));
733 op_mask -= 16;
734 break;
735
736 case 'v':
737 if (op_mask & 1)
738 as_bad (_("even register number required"));
739 op_mask >>= 1;
740 break;
741
742 case 'w':
743 if ((op_mask & 1) || op_mask < 24)
744 as_bad (_("register r24, r26, r28 or r30 required"));
745 op_mask = (op_mask - 24) >> 1;
746 break;
747 }
748 break;
749 }
750 as_bad (_("register name or number from 0 to 31 required"));
751 break;
752
753 case 'e':
754 {
755 char c;
756
757 if (*str == '-')
758 {
759 str = skip_space (str + 1);
760 op_mask = 0x1002;
761 }
762 c = TOLOWER (*str);
763 if (c == 'x')
764 op_mask |= 0x100c;
765 else if (c == 'y')
766 op_mask |= 0x8;
767 else if (c != 'z')
768 as_bad (_("pointer register (X, Y or Z) required"));
769
770 str = skip_space (str + 1);
771 if (*str == '+')
772 {
773 ++str;
774 if (op_mask & 2)
775 as_bad (_("cannot both predecrement and postincrement"));
776 op_mask |= 0x1001;
777 }
778
779 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
780 registers, no predecrement, no postincrement. */
781 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
782 && !(avr_mcu->isa & AVR_ISA_SRAM))
783 as_bad (_("addressing mode not supported"));
784 }
785 break;
786
787 case 'z':
788 if (*str == '-')
789 as_bad (_("can't predecrement"));
790
791 if (! (*str == 'z' || *str == 'Z'))
792 as_bad (_("pointer register Z required"));
793
794 str = skip_space (str + 1);
795
796 if (*str == '+')
797 {
798 ++str;
799 op_mask |= 1;
800 }
801 break;
802
803 case 'b':
804 {
805 char c = TOLOWER (*str++);
806
807 if (c == 'y')
808 op_mask |= 0x8;
809 else if (c != 'z')
810 as_bad (_("pointer register (Y or Z) required"));
811 str = skip_space (str);
812 if (*str++ == '+')
813 {
814 input_line_pointer = str;
815 avr_offset_expression (& op_expr);
816 str = input_line_pointer;
817 fix_new_exp (frag_now, where, 3,
818 &op_expr, FALSE, BFD_RELOC_AVR_6);
819 }
820 }
821 break;
822
823 case 'h':
824 str = parse_exp (str, &op_expr);
825 fix_new_exp (frag_now, where, opcode->insn_size * 2,
826 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
827 break;
828
829 case 'L':
830 str = parse_exp (str, &op_expr);
831 fix_new_exp (frag_now, where, opcode->insn_size * 2,
832 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
833 break;
834
835 case 'l':
836 str = parse_exp (str, &op_expr);
837 fix_new_exp (frag_now, where, opcode->insn_size * 2,
838 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
839 break;
840
841 case 'i':
842 str = parse_exp (str, &op_expr);
843 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
844 &op_expr, FALSE, BFD_RELOC_16);
845 break;
846
847 case 'M':
848 {
849 bfd_reloc_code_real_type r_type;
850
851 input_line_pointer = str;
852 r_type = avr_ldi_expression (&op_expr);
853 str = input_line_pointer;
854 fix_new_exp (frag_now, where, 3,
855 &op_expr, FALSE, r_type);
856 }
857 break;
858
859 case 'n':
860 {
861 unsigned int x;
862
863 x = ~avr_get_constant (str, 255);
864 str = input_line_pointer;
865 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
866 }
867 break;
868
869 case 'K':
870 input_line_pointer = str;
871 avr_offset_expression (& op_expr);
872 str = input_line_pointer;
873 fix_new_exp (frag_now, where, 3,
874 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
875 break;
876
877 case 'S':
878 case 's':
879 {
880 unsigned int x;
881
882 x = avr_get_constant (str, 7);
883 str = input_line_pointer;
884 if (*op == 'S')
885 x <<= 4;
886 op_mask |= x;
887 }
888 break;
889
890 case 'P':
891 {
892 unsigned int x;
893
894 x = avr_get_constant (str, 63);
895 str = input_line_pointer;
896 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
897 }
898 break;
899
900 case 'p':
901 {
902 unsigned int x;
903
904 x = avr_get_constant (str, 31);
905 str = input_line_pointer;
906 op_mask |= x << 3;
907 }
908 break;
909
910 case '?':
911 break;
912
913 default:
914 as_bad (_("unknown constraint `%c'"), *op);
915 }
916
917 *line = str;
918 return op_mask;
919 }
920
921 /* Parse instruction operands.
922 Return binary opcode. */
923
924 static unsigned int
925 avr_operands (struct avr_opcodes_s *opcode, char **line)
926 {
927 char *op = opcode->constraints;
928 unsigned int bin = opcode->bin_opcode;
929 char *frag = frag_more (opcode->insn_size * 2);
930 char *str = *line;
931 int where = frag - frag_now->fr_literal;
932 static unsigned int prev = 0; /* Previous opcode. */
933
934 /* Opcode have operands. */
935 if (*op)
936 {
937 unsigned int reg1 = 0;
938 unsigned int reg2 = 0;
939 int reg1_present = 0;
940 int reg2_present = 0;
941
942 /* Parse first operand. */
943 if (REGISTER_P (*op))
944 reg1_present = 1;
945 reg1 = avr_operand (opcode, where, op, &str);
946 ++op;
947
948 /* Parse second operand. */
949 if (*op)
950 {
951 if (*op == ',')
952 ++op;
953
954 if (*op == '=')
955 {
956 reg2 = reg1;
957 reg2_present = 1;
958 }
959 else
960 {
961 if (REGISTER_P (*op))
962 reg2_present = 1;
963
964 str = skip_space (str);
965 if (*str++ != ',')
966 as_bad (_("`,' required"));
967 str = skip_space (str);
968
969 reg2 = avr_operand (opcode, where, op, &str);
970 }
971
972 if (reg1_present && reg2_present)
973 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
974 else if (reg2_present)
975 reg2 <<= 4;
976 }
977 if (reg1_present)
978 reg1 <<= 4;
979 bin |= reg1 | reg2;
980 }
981
982 /* Detect undefined combinations (like ld r31,Z+). */
983 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
984 as_warn (_("undefined combination of operands"));
985
986 if (opcode->insn_size == 2)
987 {
988 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
989 (AVR core bug, fixed in the newer devices). */
990 if (!(avr_opt.no_skip_bug ||
991 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
992 && AVR_SKIP_P (prev))
993 as_warn (_("skipping two-word instruction"));
994
995 bfd_putl32 ((bfd_vma) bin, frag);
996 }
997 else
998 bfd_putl16 ((bfd_vma) bin, frag);
999
1000 prev = bin;
1001 *line = str;
1002 return bin;
1003 }
1004
1005 /* GAS will call this function for each section at the end of the assembly,
1006 to permit the CPU backend to adjust the alignment of a section. */
1007
1008 valueT
1009 md_section_align (asection *seg, valueT addr)
1010 {
1011 int align = bfd_get_section_alignment (stdoutput, seg);
1012 return ((addr + (1 << align) - 1) & (-1 << align));
1013 }
1014
1015 /* If you define this macro, it should return the offset between the
1016 address of a PC relative fixup and the position from which the PC
1017 relative adjustment should be made. On many processors, the base
1018 of a PC relative instruction is the next instruction, so this
1019 macro would return the length of an instruction. */
1020
1021 long
1022 md_pcrel_from_section (fixS *fixp, segT sec)
1023 {
1024 if (fixp->fx_addsy != (symbolS *) NULL
1025 && (!S_IS_DEFINED (fixp->fx_addsy)
1026 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1027 return 0;
1028
1029 return fixp->fx_frag->fr_address + fixp->fx_where;
1030 }
1031
1032 /* GAS will call this for each fixup. It should store the correct
1033 value in the object file. */
1034
1035 void
1036 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1037 {
1038 unsigned char *where;
1039 unsigned long insn;
1040 long value = *valP;
1041
1042 if (fixP->fx_addsy == (symbolS *) NULL)
1043 fixP->fx_done = 1;
1044
1045 else if (fixP->fx_pcrel)
1046 {
1047 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1048
1049 if (s == seg || s == absolute_section)
1050 {
1051 value += S_GET_VALUE (fixP->fx_addsy);
1052 fixP->fx_done = 1;
1053 }
1054 }
1055
1056 /* We don't actually support subtracting a symbol. */
1057 if (fixP->fx_subsy != (symbolS *) NULL)
1058 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1059
1060 switch (fixP->fx_r_type)
1061 {
1062 default:
1063 fixP->fx_no_overflow = 1;
1064 break;
1065 case BFD_RELOC_AVR_7_PCREL:
1066 case BFD_RELOC_AVR_13_PCREL:
1067 case BFD_RELOC_32:
1068 case BFD_RELOC_16:
1069 case BFD_RELOC_AVR_CALL:
1070 break;
1071 }
1072
1073 if (fixP->fx_done)
1074 {
1075 /* Fetch the instruction, insert the fully resolved operand
1076 value, and stuff the instruction back again. */
1077 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1078 insn = bfd_getl16 (where);
1079
1080 switch (fixP->fx_r_type)
1081 {
1082 case BFD_RELOC_AVR_7_PCREL:
1083 if (value & 1)
1084 as_bad_where (fixP->fx_file, fixP->fx_line,
1085 _("odd address operand: %ld"), value);
1086
1087 /* Instruction addresses are always right-shifted by 1. */
1088 value >>= 1;
1089 --value; /* Correct PC. */
1090
1091 if (value < -64 || value > 63)
1092 as_bad_where (fixP->fx_file, fixP->fx_line,
1093 _("operand out of range: %ld"), value);
1094 value = (value << 3) & 0x3f8;
1095 bfd_putl16 ((bfd_vma) (value | insn), where);
1096 break;
1097
1098 case BFD_RELOC_AVR_13_PCREL:
1099 if (value & 1)
1100 as_bad_where (fixP->fx_file, fixP->fx_line,
1101 _("odd address operand: %ld"), value);
1102
1103 /* Instruction addresses are always right-shifted by 1. */
1104 value >>= 1;
1105 --value; /* Correct PC. */
1106
1107 if (value < -2048 || value > 2047)
1108 {
1109 /* No wrap for devices with >8K of program memory. */
1110 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1111 as_bad_where (fixP->fx_file, fixP->fx_line,
1112 _("operand out of range: %ld"), value);
1113 }
1114
1115 value &= 0xfff;
1116 bfd_putl16 ((bfd_vma) (value | insn), where);
1117 break;
1118
1119 case BFD_RELOC_32:
1120 bfd_putl16 ((bfd_vma) value, where);
1121 break;
1122
1123 case BFD_RELOC_16:
1124 bfd_putl16 ((bfd_vma) value, where);
1125 break;
1126
1127 case BFD_RELOC_AVR_16_PM:
1128 bfd_putl16 ((bfd_vma) (value >> 1), where);
1129 break;
1130
1131 case BFD_RELOC_AVR_LDI:
1132 if (value > 255)
1133 as_bad_where (fixP->fx_file, fixP->fx_line,
1134 _("operand out of range: %ld"), value);
1135 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1136 break;
1137
1138 case BFD_RELOC_AVR_6:
1139 if ((value > 63) || (value < 0))
1140 as_bad_where (fixP->fx_file, fixP->fx_line,
1141 _("operand out of range: %ld"), value);
1142 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1143 break;
1144
1145 case BFD_RELOC_AVR_6_ADIW:
1146 if ((value > 63) || (value < 0))
1147 as_bad_where (fixP->fx_file, fixP->fx_line,
1148 _("operand out of range: %ld"), value);
1149 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1150 break;
1151
1152 case BFD_RELOC_AVR_LO8_LDI:
1153 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1154 break;
1155
1156 case BFD_RELOC_AVR_HI8_LDI:
1157 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1158 break;
1159
1160 case BFD_RELOC_AVR_MS8_LDI:
1161 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1162 break;
1163
1164 case BFD_RELOC_AVR_HH8_LDI:
1165 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1166 break;
1167
1168 case BFD_RELOC_AVR_LO8_LDI_NEG:
1169 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1170 break;
1171
1172 case BFD_RELOC_AVR_HI8_LDI_NEG:
1173 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1174 break;
1175
1176 case BFD_RELOC_AVR_MS8_LDI_NEG:
1177 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1178 break;
1179
1180 case BFD_RELOC_AVR_HH8_LDI_NEG:
1181 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1182 break;
1183
1184 case BFD_RELOC_AVR_LO8_LDI_PM:
1185 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1186 break;
1187
1188 case BFD_RELOC_AVR_HI8_LDI_PM:
1189 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1190 break;
1191
1192 case BFD_RELOC_AVR_HH8_LDI_PM:
1193 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1194 break;
1195
1196 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1197 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1198 break;
1199
1200 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1201 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1202 break;
1203
1204 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1205 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1206 break;
1207
1208 case BFD_RELOC_AVR_CALL:
1209 {
1210 unsigned long x;
1211
1212 x = bfd_getl16 (where);
1213 if (value & 1)
1214 as_bad_where (fixP->fx_file, fixP->fx_line,
1215 _("odd address operand: %ld"), value);
1216 value >>= 1;
1217 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1218 bfd_putl16 ((bfd_vma) x, where);
1219 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1220 }
1221 break;
1222
1223 default:
1224 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1225 fixP->fx_line, fixP->fx_r_type);
1226 break;
1227 }
1228 }
1229 else
1230 {
1231 switch (fixP->fx_r_type)
1232 {
1233 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1234 case -BFD_RELOC_AVR_HI8_LDI:
1235 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1236 case -BFD_RELOC_AVR_LO8_LDI:
1237 as_bad_where (fixP->fx_file, fixP->fx_line,
1238 _("only constant expression allowed"));
1239 fixP->fx_done = 1;
1240 break;
1241 default:
1242 break;
1243 }
1244 }
1245 }
1246
1247 /* GAS will call this to generate a reloc, passing the resulting reloc
1248 to `bfd_install_relocation'. This currently works poorly, as
1249 `bfd_install_relocation' often does the wrong thing, and instances of
1250 `tc_gen_reloc' have been written to work around the problems, which
1251 in turns makes it difficult to fix `bfd_install_relocation'. */
1252
1253 /* If while processing a fixup, a reloc really needs to be created
1254 then it is done here. */
1255
1256 arelent *
1257 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1258 fixS *fixp)
1259 {
1260 arelent *reloc;
1261
1262 if (fixp->fx_addsy && fixp->fx_subsy)
1263 {
1264 long value = 0;
1265
1266 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1267 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1268 {
1269 as_bad_where (fixp->fx_file, fixp->fx_line,
1270 "Difference of symbols in different sections is not supported");
1271 return NULL;
1272 }
1273
1274 /* We are dealing with two symbols defined in the same section.
1275 Let us fix-up them here. */
1276 value += S_GET_VALUE (fixp->fx_addsy);
1277 value -= S_GET_VALUE (fixp->fx_subsy);
1278
1279 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1280 only takes it's second operands for the fixup value. */
1281 fixp->fx_addsy = NULL;
1282 fixp->fx_subsy = NULL;
1283 md_apply_fix (fixp, (valueT *) &value, NULL);
1284
1285 return NULL;
1286 }
1287
1288 reloc = xmalloc (sizeof (arelent));
1289
1290 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1291 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1292
1293 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1294 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1295 if (reloc->howto == (reloc_howto_type *) NULL)
1296 {
1297 as_bad_where (fixp->fx_file, fixp->fx_line,
1298 _("reloc %d not supported by object file format"),
1299 (int) fixp->fx_r_type);
1300 return NULL;
1301 }
1302
1303 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1304 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1305 reloc->address = fixp->fx_offset;
1306
1307 reloc->addend = fixp->fx_offset;
1308
1309 return reloc;
1310 }
1311
1312 void
1313 md_assemble (char *str)
1314 {
1315 struct avr_opcodes_s *opcode;
1316 char op[11];
1317
1318 str = skip_space (extract_word (str, op, sizeof (op)));
1319
1320 if (!op[0])
1321 as_bad (_("can't find opcode "));
1322
1323 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1324
1325 if (opcode == NULL)
1326 {
1327 as_bad (_("unknown opcode `%s'"), op);
1328 return;
1329 }
1330
1331 /* Special case for opcodes with optional operands (lpm, elpm) -
1332 version with operands exists in avr_opcodes[] in the next entry. */
1333
1334 if (*str && *opcode->constraints == '?')
1335 ++opcode;
1336
1337 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1338 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1339
1340 /* We used to set input_line_pointer to the result of get_operands,
1341 but that is wrong. Our caller assumes we don't change it. */
1342 {
1343 char *t = input_line_pointer;
1344
1345 avr_operands (opcode, &str);
1346 if (*skip_space (str))
1347 as_bad (_("garbage at end of line"));
1348 input_line_pointer = t;
1349 }
1350 }
1351
1352 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1353 `avr_cons_fix_new'. */
1354 static int exp_mod_pm = 0;
1355
1356 /* Parse special CONS expression: pm (expression)
1357 or alternatively: gs (expression).
1358 These are used for addressing program memory.
1359 Relocation: BFD_RELOC_AVR_16_PM. */
1360
1361 void
1362 avr_parse_cons_expression (expressionS *exp, int nbytes)
1363 {
1364 char *tmp;
1365
1366 exp_mod_pm = 0;
1367
1368 tmp = input_line_pointer = skip_space (input_line_pointer);
1369
1370 if (nbytes == 2)
1371 {
1372 char *pm_name1 = "pm";
1373 char *pm_name2 = "gs";
1374 int len = strlen (pm_name1);
1375 /* len must be the same for both pm identifiers. */
1376
1377 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1378 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1379 {
1380 input_line_pointer = skip_space (input_line_pointer + len);
1381
1382 if (*input_line_pointer == '(')
1383 {
1384 input_line_pointer = skip_space (input_line_pointer + 1);
1385 exp_mod_pm = 1;
1386 expression (exp);
1387
1388 if (*input_line_pointer == ')')
1389 ++input_line_pointer;
1390 else
1391 {
1392 as_bad (_("`)' required"));
1393 exp_mod_pm = 0;
1394 }
1395
1396 return;
1397 }
1398
1399 input_line_pointer = tmp;
1400 }
1401 }
1402
1403 expression (exp);
1404 }
1405
1406 void
1407 avr_cons_fix_new (fragS *frag,
1408 int where,
1409 int nbytes,
1410 expressionS *exp)
1411 {
1412 if (exp_mod_pm == 0)
1413 {
1414 if (nbytes == 2)
1415 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1416 else if (nbytes == 4)
1417 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1418 else
1419 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1420 }
1421 else
1422 {
1423 if (nbytes == 2)
1424 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1425 else
1426 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);
1427 exp_mod_pm = 0;
1428 }
1429 }
git-cvsimport of binutils cvsroot