3 Free Software Foundation, Inc.
4 Contributed by Joseph Myers <joseph@codesourcery.com>
5 Bernd Schmidt <bernds@codesourcery.com>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
25 #include "dwarf2dbg.h"
26 #include "safe-ctype.h"
28 #include "opcode/tic6x.h"
29 #include "elf/tic6x.h"
30 #include "elf32-tic6x.h"
32 /* Truncate and sign-extend at 32 bits, so that building on a 64-bit
33 host gives identical results to a 32-bit host. */
34 #define TRUNC(X) ((valueT) (X) & 0xffffffffU)
35 #define SEXT(X) ((TRUNC (X) ^ 0x80000000U) - 0x80000000U)
37 const char comment_chars
[] = ";";
38 const char line_comment_chars
[] = "#*;";
39 const char line_separator_chars
[] = "@";
41 const char EXP_CHARS
[] = "eE";
42 const char FLT_CHARS
[] = "dDfF";
44 const char *md_shortopts
= "";
48 OPTION_MARCH
= OPTION_MD_BASE
,
52 OPTION_MLITTLE_ENDIAN
,
61 struct option md_longopts
[] =
63 { "march", required_argument
, NULL
, OPTION_MARCH
},
64 { "matomic", no_argument
, NULL
, OPTION_MATOMIC
},
65 { "mno-atomic", no_argument
, NULL
, OPTION_MNO_ATOMIC
},
66 { "mbig-endian", no_argument
, NULL
, OPTION_MBIG_ENDIAN
},
67 { "mlittle-endian", no_argument
, NULL
, OPTION_MLITTLE_ENDIAN
},
68 { "mdsbt", no_argument
, NULL
, OPTION_MDSBT
},
69 { "mno-dsbt", no_argument
, NULL
, OPTION_MNO_DSBT
},
70 { "mpid", required_argument
, NULL
, OPTION_MPID
},
71 { "mpic", no_argument
, NULL
, OPTION_MPIC
},
72 { "mno-pic", no_argument
, NULL
, OPTION_MNO_PIC
},
73 { "mgenerate-rel", no_argument
, NULL
, OPTION_MGENERATE_REL
},
74 { NULL
, no_argument
, NULL
, 0 }
76 size_t md_longopts_size
= sizeof (md_longopts
);
78 /* Whether to enable atomic instructions. 1 to enable them, 0 to
79 disable, -1 to default from architecture. */
80 static int tic6x_atomic
= -1;
82 /* The instructions enabled based only on the selected architecture
83 (all instructions, if no architecture specified). Atomic
84 instructions may be enabled or disabled separately. */
85 static unsigned short tic6x_arch_enable
= (TIC6X_INSN_C62X
93 /* The instructions enabled based on the current set of features
94 (architecture, as modified by other options). */
95 static unsigned short tic6x_features
;
97 /* The architecture attribute value, or C6XABI_Tag_ISA_none if
99 static int tic6x_arch_attribute
= C6XABI_Tag_ISA_none
;
101 /* Whether any instructions at all have been seen. Once any
102 instructions have been seen, architecture attributes merge into the
103 previous attribute value rather than replacing it. */
104 static bfd_boolean tic6x_seen_insns
= FALSE
;
106 /* The number of registers in each register file supported by the
107 current architecture. */
108 static unsigned int tic6x_num_registers
;
110 /* Whether predication on A0 is possible. */
111 static bfd_boolean tic6x_predicate_a0
;
113 /* Whether execute packets can cross fetch packet boundaries. */
114 static bfd_boolean tic6x_can_cross_fp_boundary
;
116 /* Whether there are constraints on simultaneous reads and writes of
118 static bfd_boolean tic6x_long_data_constraints
;
120 /* Whether compact instructions are available. */
121 static bfd_boolean tic6x_compact_insns
;
123 /* Whether to generate RELA relocations. */
124 static bfd_boolean tic6x_generate_rela
= TRUE
;
126 /* Whether the code uses DSBT addressing. */
127 static bfd_boolean tic6x_dsbt
;
129 /* Types of position-independent data (attribute values for
138 /* The type of data addressing used in this code. */
139 static tic6x_pid_type tic6x_pid
;
141 /* Whether the code uses position-independent code. */
142 static bfd_boolean tic6x_pic
;
144 /* Table of supported architecture variants. */
149 unsigned short features
;
151 static const tic6x_arch_table tic6x_arches
[] =
153 { "c62x", C6XABI_Tag_ISA_C62X
, TIC6X_INSN_C62X
},
154 { "c64x", C6XABI_Tag_ISA_C64X
, TIC6X_INSN_C62X
| TIC6X_INSN_C64X
},
155 { "c64x+", C6XABI_Tag_ISA_C64XP
, (TIC6X_INSN_C62X
157 | TIC6X_INSN_C64XP
) },
158 { "c67x", C6XABI_Tag_ISA_C67X
, TIC6X_INSN_C62X
| TIC6X_INSN_C67X
},
159 { "c67x+", C6XABI_Tag_ISA_C67XP
, (TIC6X_INSN_C62X
161 | TIC6X_INSN_C67XP
) },
162 { "c674x", C6XABI_Tag_ISA_C674X
, (TIC6X_INSN_C62X
167 | TIC6X_INSN_C674X
) }
170 /* Update the selected architecture based on ARCH, giving an error if
171 ARCH is an invalid value. Does not call tic6x_update_features; the
172 caller must do that if necessary. */
175 tic6x_use_arch (const char *arch
)
179 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
180 if (strcmp (arch
, tic6x_arches
[i
].arch
) == 0)
182 tic6x_arch_enable
= tic6x_arches
[i
].features
;
183 if (tic6x_seen_insns
)
185 = elf32_tic6x_merge_arch_attributes (tic6x_arch_attribute
,
186 tic6x_arches
[i
].attr
);
188 tic6x_arch_attribute
= tic6x_arches
[i
].attr
;
192 as_bad (_("unknown architecture '%s'"), arch
);
195 /* Table of supported -mpid arguments. */
200 } tic6x_pid_type_table
;
201 static const tic6x_pid_type_table tic6x_pid_types
[] =
203 { "no", tic6x_pid_no
},
204 { "near", tic6x_pid_near
},
205 { "far", tic6x_pid_far
}
208 /* Handle -mpid=ARG. */
211 tic6x_use_pid (const char *arg
)
215 for (i
= 0; i
< ARRAY_SIZE (tic6x_pid_types
); i
++)
216 if (strcmp (arg
, tic6x_pid_types
[i
].arg
) == 0)
218 tic6x_pid
= tic6x_pid_types
[i
].attr
;
222 as_bad (_("unknown -mpid= argument '%s'"), arg
);
225 /* Parse a target-specific option. */
228 md_parse_option (int c
, char *arg
)
233 tic6x_use_arch (arg
);
240 case OPTION_MNO_ATOMIC
:
244 case OPTION_MBIG_ENDIAN
:
245 target_big_endian
= 1;
248 case OPTION_MLITTLE_ENDIAN
:
249 target_big_endian
= 0;
256 case OPTION_MNO_DSBT
:
272 case OPTION_MGENERATE_REL
:
273 tic6x_generate_rela
= FALSE
;
283 md_show_usage (FILE *stream ATTRIBUTE_UNUSED
)
287 fputc ('\n', stream
);
288 fprintf (stream
, _("TMS320C6000 options:\n"));
289 fprintf (stream
, _(" -march=ARCH enable instructions from architecture ARCH\n"));
290 fprintf (stream
, _(" -matomic enable atomic operation instructions\n"));
291 fprintf (stream
, _(" -mno-atomic disable atomic operation instructions\n"));
292 fprintf (stream
, _(" -mbig-endian generate big-endian code\n"));
293 fprintf (stream
, _(" -mlittle-endian generate little-endian code\n"));
294 fprintf (stream
, _(" -mdsbt code uses DSBT addressing\n"));
295 fprintf (stream
, _(" -mno-dsbt code does not use DSBT addressing\n"));
296 fprintf (stream
, _(" -mpid=no code uses position-dependent data addressing\n"));
297 fprintf (stream
, _(" -mpid=near code uses position-independent data addressing,\n"
298 " GOT accesses use near DP addressing\n"));
299 fprintf (stream
, _(" -mpid=far code uses position-independent data addressing,\n"
300 " GOT accesses use far DP addressing\n"));
301 fprintf (stream
, _(" -mpic code addressing is position-independent\n"));
302 fprintf (stream
, _(" -mno-pic code addressing is position-dependent\n"));
303 /* -mgenerate-rel is only for testsuite use and is deliberately
306 fputc ('\n', stream
);
307 fprintf (stream
, _("Supported ARCH values are:"));
308 for (i
= 0; i
< ARRAY_SIZE (tic6x_arches
); i
++)
309 fprintf (stream
, " %s", tic6x_arches
[i
].arch
);
310 fputc ('\n', stream
);
313 /* Update enabled features based on the current architecture and
316 tic6x_update_features (void)
318 switch (tic6x_atomic
)
321 tic6x_features
= tic6x_arch_enable
;
325 tic6x_features
= tic6x_arch_enable
& ~TIC6X_INSN_ATOMIC
;
329 tic6x_features
= tic6x_arch_enable
| TIC6X_INSN_ATOMIC
;
337 = (tic6x_arch_enable
& (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? 32 : 16;
339 tic6x_predicate_a0
= (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? TRUE
: FALSE
;
341 tic6x_can_cross_fp_boundary
343 & (TIC6X_INSN_C64X
| TIC6X_INSN_C67XP
)) ? TRUE
: FALSE
;
345 tic6x_long_data_constraints
346 = (tic6x_arch_enable
& TIC6X_INSN_C64X
) ? FALSE
: TRUE
;
348 tic6x_compact_insns
= (tic6x_arch_enable
& TIC6X_INSN_C64XP
) ? TRUE
: FALSE
;
351 /* Do configuration after all options have been parsed. */
354 tic6x_after_parse_args (void)
356 tic6x_update_features ();
359 /* Parse a .arch directive. */
362 s_tic6x_arch (int ignored ATTRIBUTE_UNUSED
)
367 arch
= input_line_pointer
;
368 while (*input_line_pointer
&& !ISSPACE (*input_line_pointer
))
369 input_line_pointer
++;
370 c
= *input_line_pointer
;
371 *input_line_pointer
= 0;
373 tic6x_use_arch (arch
);
374 tic6x_update_features ();
375 *input_line_pointer
= c
;
376 demand_empty_rest_of_line ();
379 /* Parse a .atomic directive. */
382 s_tic6x_atomic (int ignored ATTRIBUTE_UNUSED
)
385 tic6x_update_features ();
386 demand_empty_rest_of_line ();
389 /* Parse a .noatomic directive. */
392 s_tic6x_noatomic (int ignored ATTRIBUTE_UNUSED
)
395 tic6x_update_features ();
396 demand_empty_rest_of_line ();
399 /* Parse a .nocmp directive. */
402 s_tic6x_nocmp (int ignored ATTRIBUTE_UNUSED
)
404 seg_info (now_seg
)->tc_segment_info_data
.nocmp
= TRUE
;
405 demand_empty_rest_of_line ();
408 /* Track for each attribute whether it has been set explicitly (and so
409 should not have a default value set by the assembler). */
410 static bfd_boolean tic6x_attributes_set_explicitly
[NUM_KNOWN_OBJ_ATTRIBUTES
];
412 /* Parse a .c6xabi_attribute directive. */
415 s_tic6x_c6xabi_attribute (int ignored ATTRIBUTE_UNUSED
)
417 int tag
= s_vendor_attribute (OBJ_ATTR_PROC
);
419 if (tag
< NUM_KNOWN_OBJ_ATTRIBUTES
)
420 tic6x_attributes_set_explicitly
[tag
] = TRUE
;
427 } tic6x_attribute_table
;
429 static const tic6x_attribute_table tic6x_attributes
[] =
431 #define TAG(tag, value) { #tag, tag },
432 #include "elf/tic6x-attrs.h"
436 /* Convert an attribute name to a number. */
439 tic6x_convert_symbolic_attribute (const char *name
)
443 for (i
= 0; i
< ARRAY_SIZE (tic6x_attributes
); i
++)
444 if (strcmp (name
, tic6x_attributes
[i
].name
) == 0)
445 return tic6x_attributes
[i
].tag
;
450 const pseudo_typeS md_pseudo_table
[] =
452 { "arch", s_tic6x_arch
, 0 },
453 { "atomic", s_tic6x_atomic
, 0 },
454 { "c6xabi_attribute", s_tic6x_c6xabi_attribute
, 0 },
455 { "noatomic", s_tic6x_noatomic
, 0 },
456 { "nocmp", s_tic6x_nocmp
, 0 },
461 /* Hash table of opcodes. For each opcode name, this stores a pointer
462 to a tic6x_opcode_list listing (in an arbitrary order) all opcode
463 table entries with that name. */
464 static struct hash_control
*opcode_hash
;
466 /* Initialize the assembler (called once at assembler startup). */
473 bfd_set_arch_mach (stdoutput
, TARGET_ARCH
, 0);
475 /* Insert opcodes into the hash table. */
476 opcode_hash
= hash_new ();
477 for (id
= 0; id
< tic6x_opcode_max
; id
++)
480 tic6x_opcode_list
*opc
= xmalloc (sizeof (tic6x_opcode_list
));
483 opc
->next
= hash_find (opcode_hash
, tic6x_opcode_table
[id
].name
);
484 if ((errmsg
= hash_jam (opcode_hash
, tic6x_opcode_table
[id
].name
, opc
))
486 as_fatal ("%s", _(errmsg
));
490 /* Whether the current line being parsed had the "||" parallel bars. */
491 static bfd_boolean tic6x_line_parallel
;
493 /* Whether the current line being parsed started "||^" to indicate an
494 SPMASKed parallel instruction. */
495 static bfd_boolean tic6x_line_spmask
;
497 /* If the current line being parsed had an instruction predicate, the
498 creg value for that predicate (which must be nonzero); otherwise
500 static unsigned int tic6x_line_creg
;
502 /* If the current line being parsed had an instruction predicate, the
503 z value for that predicate; otherwise 0. */
504 static unsigned int tic6x_line_z
;
506 /* Return 1 (updating input_line_pointer as appropriate) if the line
507 starting with C (immediately before input_line_pointer) starts with
508 pre-opcode text appropriate for this target, 0 otherwise. */
511 tic6x_unrecognized_line (int c
)
516 bfd_boolean bad_predicate
;
521 if (input_line_pointer
[0] == '|')
523 if (input_line_pointer
[1] == '^')
525 tic6x_line_spmask
= TRUE
;
526 input_line_pointer
+= 2;
529 input_line_pointer
+= 1;
530 if (tic6x_line_parallel
)
531 as_bad (_("multiple '||' on same line"));
532 tic6x_line_parallel
= TRUE
;
534 as_bad (_("'||' after predicate"));
540 /* If it doesn't look like a predicate at all, just return 0.
541 If it looks like one but not a valid one, give a better
543 p
= input_line_pointer
;
544 while (*p
!= ']' && !is_end_of_line
[(unsigned char) *p
])
549 p
= input_line_pointer
;
551 bad_predicate
= FALSE
;
557 if (*p
== 'A' || *p
== 'a')
559 else if (*p
== 'B' || *p
== 'b')
563 areg
= TRUE
; /* Avoid uninitialized warning. */
564 bad_predicate
= TRUE
;
569 if (*p
!= '0' && *p
!= '1' && *p
!= '2')
570 bad_predicate
= TRUE
;
571 else if (p
[1] != ']')
572 bad_predicate
= TRUE
;
574 input_line_pointer
= p
+ 2;
578 as_bad (_("multiple predicates on same line"));
584 as_bad (_("bad predicate '%s'"), input_line_pointer
- 1);
586 input_line_pointer
= endp
;
593 tic6x_line_creg
= (areg
? 6 : 1);
594 if (areg
&& !tic6x_predicate_a0
)
595 as_bad (_("predication on A0 not supported on this architecture"));
599 tic6x_line_creg
= (areg
? 4 : 2);
603 tic6x_line_creg
= (areg
? 5 : 3);
618 /* Do any target-specific handling of a label required. */
621 tic6x_frob_label (symbolS
*sym
)
623 segment_info_type
*si
;
624 tic6x_label_list
*list
;
626 if (tic6x_line_parallel
)
628 as_bad (_("label after '||'"));
629 tic6x_line_parallel
= FALSE
;
630 tic6x_line_spmask
= FALSE
;
634 as_bad (_("label after predicate"));
639 si
= seg_info (now_seg
);
640 list
= si
->tc_segment_info_data
.label_list
;
641 si
->tc_segment_info_data
.label_list
= xmalloc (sizeof (tic6x_label_list
));
642 si
->tc_segment_info_data
.label_list
->next
= list
;
643 si
->tc_segment_info_data
.label_list
->label
= sym
;
645 /* Defining tc_frob_label overrides the ELF definition of
646 obj_frob_label, so we need to apply its effects here. */
647 dwarf2_emit_label (sym
);
650 /* At end-of-line, give errors for start-of-line decorations that
651 needed an instruction but were not followed by one. */
654 tic6x_end_of_line (void)
656 if (tic6x_line_parallel
)
658 as_bad (_("'||' not followed by instruction"));
659 tic6x_line_parallel
= FALSE
;
660 tic6x_line_spmask
= FALSE
;
664 as_bad (_("predicate not followed by instruction"));
670 /* Do any target-specific handling of the start of a logical line. */
673 tic6x_start_line_hook (void)
675 tic6x_end_of_line ();
678 /* Do target-specific handling immediately after an input file from
679 the command line, and any other inputs it includes, have been
685 tic6x_end_of_line ();
688 /* Do target-specific initialization after arguments have been
689 processed and the output file created. */
692 tic6x_init_after_args (void)
694 elf32_tic6x_set_use_rela_p (stdoutput
, tic6x_generate_rela
);
697 /* Free LIST of labels (possibly NULL). */
700 tic6x_free_label_list (tic6x_label_list
*list
)
704 tic6x_label_list
*old
= list
;
711 /* Handle a data alignment of N bytes. */
714 tic6x_cons_align (int n ATTRIBUTE_UNUSED
)
716 segment_info_type
*seginfo
= seg_info (now_seg
);
718 /* Data means there is no current execute packet, and that any label
719 applies to that data rather than a subsequent instruction. */
720 tic6x_free_label_list (seginfo
->tc_segment_info_data
.label_list
);
721 seginfo
->tc_segment_info_data
.label_list
= NULL
;
722 seginfo
->tc_segment_info_data
.execute_packet_frag
= NULL
;
723 seginfo
->tc_segment_info_data
.last_insn_lsb
= NULL
;
724 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
725 seginfo
->tc_segment_info_data
.func_units_used
= 0;
728 /* Handle an alignment directive. Return TRUE if the
729 machine-independent frag generation should be skipped. */
732 tic6x_do_align (int n
, char *fill
, int len ATTRIBUTE_UNUSED
, int max
)
734 /* Given code alignments of 4, 8, 16 or 32 bytes, we try to handle
735 them in the md_end pass by inserting NOPs in parallel with
736 previous instructions. We only do this in sections containing
737 nothing but instructions. Code alignments of 1 or 2 bytes have
738 no effect in such sections (but we record them with
739 machine-dependent frags anyway so they can be skipped or
740 converted to machine-independent), while those of more than 64
741 bytes cannot reliably be handled in this way. */
747 && subseg_text_p (now_seg
))
755 /* Machine-independent code would generate a frag here, but we
756 wish to handle it in a machine-dependent way. */
757 if (frag_now_fix () != 0)
759 if (frag_now
->fr_type
!= rs_machine_dependent
)
760 frag_wane (frag_now
);
765 align_frag
= frag_now
;
766 p
= frag_var (rs_machine_dependent
, 32, 32, max
, NULL
, n
, NULL
);
767 /* This must be the same as the frag to which a pointer was just
769 if (p
!= align_frag
->fr_literal
)
771 align_frag
->tc_frag_data
.is_insns
= FALSE
;
778 /* Types of operand for parsing purposes. These are used as bit-masks
779 to tell tic6x_parse_operand what forms of operand are
781 #define TIC6X_OP_EXP 0x0001u
782 #define TIC6X_OP_REG 0x0002u
783 #define TIC6X_OP_REGPAIR 0x0004u
784 #define TIC6X_OP_IRP 0x0008u
785 #define TIC6X_OP_NRP 0x0010u
786 /* With TIC6X_OP_MEM_NOUNREG, the contents of a () offset are always
787 interpreted as an expression, which may be a symbol with the same
788 name as a register that ends up being implicitly DP-relative. With
789 TIC6X_OP_MEM_UNREG, the contents of a () offset are interpreted as
790 a register if they match one, and failing that as an expression,
791 which must be constant. */
792 #define TIC6X_OP_MEM_NOUNREG 0x0020u
793 #define TIC6X_OP_MEM_UNREG 0x0040u
794 #define TIC6X_OP_CTRL 0x0080u
795 #define TIC6X_OP_FUNC_UNIT 0x0100u
797 /* A register or register pair read by the assembler. */
800 /* The side the register is on (1 or 2). */
802 /* The register number (0 to 31). */
806 /* Types of modification of a base address. */
812 tic6x_mem_mod_preinc
,
813 tic6x_mem_mod_predec
,
814 tic6x_mem_mod_postinc
,
815 tic6x_mem_mod_postdec
818 /* Scaled [] or unscaled () nature of an offset. */
823 tic6x_offset_unscaled
826 /* A memory operand read by the assembler. */
829 /* The base register. */
830 tic6x_register base_reg
;
831 /* How the base register is modified. */
833 /* Whether there is an offset (required with plain "+" and "-"), and
834 whether it is scaled or unscaled if so. */
835 tic6x_mem_scaling scaled
;
836 /* Whether the offset is a register (TRUE) or an expression
838 bfd_boolean offset_is_reg
;
847 /* A functional unit in SPMASK operands read by the assembler. */
850 /* The basic unit. */
851 tic6x_func_unit_base base
;
852 /* The side (1 or 2). */
854 } tic6x_func_unit_operand
;
856 /* An operand read by the assembler. */
859 /* The syntactic form of the operand, as one of the bit-masks
862 /* The operand value. */
865 /* An expression: TIC6X_OP_EXP. */
867 /* A register: TIC6X_OP_REG, TIC6X_OP_REGPAIR. */
869 /* A memory reference: TIC6X_OP_MEM_NOUNREG,
870 TIC6X_OP_MEM_UNREG. */
872 /* A control register: TIC6X_OP_CTRL. */
874 /* A functional unit: TIC6X_OP_FUNC_UNIT. */
875 tic6x_func_unit_operand func_unit
;
879 #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0)
881 /* Parse a register operand, or part of an operand, starting at *P.
882 If syntactically OK (including that the number is in the range 0 to
883 31, but not necessarily in range for this architecture), return
884 TRUE, putting the register side and number in *REG and update *P to
885 point immediately after the register number; otherwise return FALSE
886 without changing *P (but possibly changing *REG). Do not print any
890 tic6x_parse_register (char **p
, tic6x_register
*reg
)
911 if (*r
>= '0' && *r
<= '9')
919 if (reg
->num
> 0 && *r
>= '0' && *r
<= '9')
921 reg
->num
= reg
->num
* 10 + (*r
- '0');
925 if (*r
>= '0' && *r
<= '9')
934 /* Parse the initial two characters of a functional unit name starting
935 at *P. If OK, set *BASE and *SIDE and return TRUE; otherwise,
939 tic6x_parse_func_unit_base (char *p
, tic6x_func_unit_base
*base
,
942 bfd_boolean good_func_unit
= TRUE
;
943 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
944 unsigned int maybe_side
= 0;
950 maybe_base
= tic6x_func_unit_d
;
955 maybe_base
= tic6x_func_unit_l
;
960 maybe_base
= tic6x_func_unit_m
;
965 maybe_base
= tic6x_func_unit_s
;
969 good_func_unit
= FALSE
;
985 good_func_unit
= FALSE
;
995 return good_func_unit
;
998 /* Parse an operand starting at *P. If the operand parses OK, return
999 TRUE and store the value in *OP; otherwise return FALSE (possibly
1000 changing *OP). In any case, update *P to point to the following
1001 comma or end of line. The possible operand forms are given by
1002 OP_FORMS. For diagnostics, this is operand OPNO of an opcode
1003 starting at STR, length OPC_LEN. */
1006 tic6x_parse_operand (char **p
, tic6x_operand
*op
, unsigned int op_forms
,
1007 char *str
, int opc_len
, unsigned int opno
)
1009 bfd_boolean operand_parsed
= FALSE
;
1012 if ((op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
1013 == (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
))
1016 /* Check for functional unit names for SPMASK and SPMASKR. */
1017 if (!operand_parsed
&& (op_forms
& TIC6X_OP_FUNC_UNIT
))
1019 tic6x_func_unit_base base
= tic6x_func_unit_nfu
;
1020 unsigned int side
= 0;
1022 if (tic6x_parse_func_unit_base (q
, &base
, &side
))
1026 skip_whitespace (rq
);
1027 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1029 op
->form
= TIC6X_OP_FUNC_UNIT
;
1030 op
->value
.func_unit
.base
= base
;
1031 op
->value
.func_unit
.side
= side
;
1032 operand_parsed
= TRUE
;
1038 /* Check for literal "irp". */
1039 if (!operand_parsed
&& (op_forms
& TIC6X_OP_IRP
))
1041 if ((q
[0] == 'i' || q
[0] == 'I')
1042 && (q
[1] == 'r' || q
[1] == 'R')
1043 && (q
[2] == 'p' || q
[2] == 'P'))
1047 skip_whitespace (rq
);
1048 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1050 op
->form
= TIC6X_OP_IRP
;
1051 operand_parsed
= TRUE
;
1057 /* Check for literal "nrp". */
1058 if (!operand_parsed
&& (op_forms
& TIC6X_OP_NRP
))
1060 if ((q
[0] == 'n' || q
[0] == 'N')
1061 && (q
[1] == 'r' || q
[1] == 'R')
1062 && (q
[2] == 'p' || q
[2] == 'P'))
1066 skip_whitespace (rq
);
1067 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1069 op
->form
= TIC6X_OP_NRP
;
1070 operand_parsed
= TRUE
;
1076 /* Check for control register names. */
1077 if (!operand_parsed
&& (op_forms
& TIC6X_OP_CTRL
))
1081 for (crid
= 0; crid
< tic6x_ctrl_max
; crid
++)
1083 size_t len
= strlen (tic6x_ctrl_table
[crid
].name
);
1085 if (strncasecmp (tic6x_ctrl_table
[crid
].name
, q
, len
) == 0)
1089 skip_whitespace (rq
);
1090 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1092 op
->form
= TIC6X_OP_CTRL
;
1093 op
->value
.ctrl
= crid
;
1094 operand_parsed
= TRUE
;
1096 if (!(tic6x_ctrl_table
[crid
].isa_variants
& tic6x_features
))
1097 as_bad (_("control register '%s' not supported "
1098 "on this architecture"),
1099 tic6x_ctrl_table
[crid
].name
);
1105 /* See if this looks like a memory reference. */
1107 && (op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
)))
1109 bfd_boolean mem_ok
= TRUE
;
1111 tic6x_mem_mod mem_mod
= tic6x_mem_mod_none
;
1112 tic6x_register base_reg
;
1113 bfd_boolean require_offset
, permit_offset
;
1114 tic6x_mem_scaling scaled
;
1115 bfd_boolean offset_is_reg
;
1116 expressionS offset_exp
;
1117 tic6x_register offset_reg
;
1126 skip_whitespace (mq
);
1132 mem_mod
= tic6x_mem_mod_preinc
;
1137 mem_mod
= tic6x_mem_mod_plus
;
1145 mem_mod
= tic6x_mem_mod_predec
;
1150 mem_mod
= tic6x_mem_mod_minus
;
1162 skip_whitespace (mq
);
1163 mem_ok
= tic6x_parse_register (&mq
, &base_reg
);
1166 if (mem_ok
&& mem_mod
== tic6x_mem_mod_none
)
1168 skip_whitespace (mq
);
1169 if (mq
[0] == '+' && mq
[1] == '+')
1171 mem_mod
= tic6x_mem_mod_postinc
;
1174 else if (mq
[0] == '-' && mq
[1] == '-')
1176 mem_mod
= tic6x_mem_mod_postdec
;
1181 if (mem_mod
== tic6x_mem_mod_none
)
1182 permit_offset
= FALSE
;
1184 permit_offset
= TRUE
;
1185 if (mem_mod
== tic6x_mem_mod_plus
|| mem_mod
== tic6x_mem_mod_minus
)
1186 require_offset
= TRUE
;
1188 require_offset
= FALSE
;
1189 scaled
= tic6x_offset_none
;
1190 offset_is_reg
= FALSE
;
1192 if (mem_ok
&& permit_offset
)
1196 skip_whitespace (mq
);
1200 scaled
= tic6x_offset_scaled
;
1206 scaled
= tic6x_offset_unscaled
;
1214 if (scaled
!= tic6x_offset_none
)
1216 skip_whitespace (mq
);
1217 if (scaled
== tic6x_offset_scaled
1218 || (op_forms
& TIC6X_OP_MEM_UNREG
))
1223 reg_ok
= tic6x_parse_register (&rq
, &offset_reg
);
1226 skip_whitespace (rq
);
1230 offset_is_reg
= TRUE
;
1236 char *save_input_line_pointer
;
1238 save_input_line_pointer
= input_line_pointer
;
1239 input_line_pointer
= mq
;
1240 expression (&offset_exp
);
1241 mq
= input_line_pointer
;
1242 input_line_pointer
= save_input_line_pointer
;
1244 skip_whitespace (mq
);
1252 if (mem_ok
&& require_offset
&& scaled
== tic6x_offset_none
)
1257 skip_whitespace (mq
);
1258 if (!is_end_of_line
[(unsigned char) *mq
] && *mq
!= ',')
1264 op
->form
= op_forms
& (TIC6X_OP_MEM_NOUNREG
| TIC6X_OP_MEM_UNREG
);
1265 op
->value
.mem
.base_reg
= base_reg
;
1266 op
->value
.mem
.mod
= mem_mod
;
1267 op
->value
.mem
.scaled
= scaled
;
1268 op
->value
.mem
.offset_is_reg
= offset_is_reg
;
1270 op
->value
.mem
.offset
.reg
= offset_reg
;
1272 op
->value
.mem
.offset
.exp
= offset_exp
;
1273 operand_parsed
= TRUE
;
1275 if (base_reg
.num
>= tic6x_num_registers
)
1276 as_bad (_("register number %u not supported on this architecture"),
1278 if (offset_is_reg
&& offset_reg
.num
>= tic6x_num_registers
)
1279 as_bad (_("register number %u not supported on this architecture"),
1284 /* See if this looks like a register or register pair. */
1285 if (!operand_parsed
&& (op_forms
& (TIC6X_OP_REG
| TIC6X_OP_REGPAIR
)))
1287 tic6x_register first_reg
, second_reg
;
1291 reg_ok
= tic6x_parse_register (&rq
, &first_reg
);
1295 if (*rq
== ':' && (op_forms
& TIC6X_OP_REGPAIR
))
1298 reg_ok
= tic6x_parse_register (&rq
, &second_reg
);
1301 skip_whitespace (rq
);
1302 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1304 if ((second_reg
.num
& 1)
1305 || (first_reg
.num
!= second_reg
.num
+ 1)
1306 || (first_reg
.side
!= second_reg
.side
))
1307 as_bad (_("register pair for operand %u of '%.*s'"
1308 " not a valid even/odd pair"), opno
,
1310 op
->form
= TIC6X_OP_REGPAIR
;
1311 op
->value
.reg
= second_reg
;
1312 operand_parsed
= TRUE
;
1317 else if (op_forms
& TIC6X_OP_REG
)
1319 skip_whitespace (rq
);
1320 if (is_end_of_line
[(unsigned char) *rq
] || *rq
== ',')
1322 op
->form
= TIC6X_OP_REG
;
1323 op
->value
.reg
= first_reg
;
1324 operand_parsed
= TRUE
;
1331 if (first_reg
.num
>= tic6x_num_registers
)
1332 as_bad (_("register number %u not supported on this architecture"),
1334 if (op
->form
== TIC6X_OP_REGPAIR
1335 && second_reg
.num
>= tic6x_num_registers
)
1336 as_bad (_("register number %u not supported on this architecture"),
1341 /* Otherwise, parse it as an expression. */
1342 if (!operand_parsed
&& (op_forms
& TIC6X_OP_EXP
))
1344 char *save_input_line_pointer
;
1346 save_input_line_pointer
= input_line_pointer
;
1347 input_line_pointer
= q
;
1348 op
->form
= TIC6X_OP_EXP
;
1349 expression (&op
->value
.exp
);
1350 q
= input_line_pointer
;
1351 input_line_pointer
= save_input_line_pointer
;
1352 operand_parsed
= TRUE
;
1357 /* Now the operand has been parsed, there must be nothing more
1358 before the comma or end of line. */
1359 skip_whitespace (q
);
1360 if (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1362 operand_parsed
= FALSE
;
1363 as_bad (_("junk after operand %u of '%.*s'"), opno
,
1365 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1371 /* This could not be parsed as any acceptable form of
1375 case TIC6X_OP_REG
| TIC6X_OP_REGPAIR
:
1376 as_bad (_("bad register or register pair for operand %u of '%.*s'"),
1377 opno
, opc_len
, str
);
1380 case TIC6X_OP_REG
| TIC6X_OP_CTRL
:
1382 as_bad (_("bad register for operand %u of '%.*s'"),
1383 opno
, opc_len
, str
);
1386 case TIC6X_OP_REGPAIR
:
1387 as_bad (_("bad register pair for operand %u of '%.*s'"),
1388 opno
, opc_len
, str
);
1391 case TIC6X_OP_FUNC_UNIT
:
1392 as_bad (_("bad functional unit for operand %u of '%.*s'"),
1393 opno
, opc_len
, str
);
1397 as_bad (_("bad operand %u of '%.*s'"),
1398 opno
, opc_len
, str
);
1402 while (!is_end_of_line
[(unsigned char) *q
] && *q
!= ',')
1406 return operand_parsed
;
1409 /* Table of assembler operators and associated O_* values. */
1414 } tic6x_operator_table
;
1415 static const tic6x_operator_table tic6x_operators
[] = {
1416 #define O_dsbt_index O_md1
1417 { "dsbt_index", O_dsbt_index
},
1420 #define O_dpr_got O_md3
1421 { "dpr_got", O_dpr_got
},
1422 #define O_dpr_byte O_md4
1423 { "dpr_byte", O_dpr_byte
},
1424 #define O_dpr_hword O_md5
1425 { "dpr_hword", O_dpr_hword
},
1426 #define O_dpr_word O_md6
1427 { "dpr_word", O_dpr_word
},
1430 /* Parse a name in some machine-specific way. Used on C6X to handle
1431 assembler operators. */
1434 tic6x_parse_name (const char *name
, expressionS
*exprP
,
1435 enum expr_mode mode ATTRIBUTE_UNUSED
, char *nextchar
)
1437 char *p
= input_line_pointer
;
1438 char c
, *name_start
, *name_end
;
1439 const char *inner_name
;
1441 operatorT op
= O_illegal
;
1447 for (i
= 0; i
< ARRAY_SIZE (tic6x_operators
); i
++)
1448 if (strcasecmp (name
+ 1, tic6x_operators
[i
].name
) == 0)
1450 op
= tic6x_operators
[i
].op
;
1454 if (op
== O_illegal
)
1457 *input_line_pointer
= *nextchar
;
1458 skip_whitespace (p
);
1462 *input_line_pointer
= 0;
1466 skip_whitespace (p
);
1468 if (!is_name_beginner (*p
))
1470 *input_line_pointer
= 0;
1476 while (is_part_of_name (*p
))
1479 skip_whitespace (p
);
1483 *input_line_pointer
= 0;
1487 input_line_pointer
= p
+ 1;
1488 *nextchar
= *input_line_pointer
;
1489 *input_line_pointer
= 0;
1493 inner_name
= name_start
;
1494 if (op
== O_dsbt_index
&& strcmp (inner_name
, "__c6xabi_DSBT_BASE") != 0)
1496 as_bad (_("$DSBT_INDEX must be used with __c6xabi_DSBT_BASE"));
1497 inner_name
= "__c6xabi_DSBT_BASE";
1499 sym
= symbol_find_or_make (inner_name
);
1503 exprP
->X_add_symbol
= sym
;
1504 exprP
->X_add_number
= 0;
1505 exprP
->X_op_symbol
= NULL
;
1511 /* Create a fixup for an expression. Same arguments as fix_new_exp,
1512 plus FIX_ADDA which is TRUE for ADDA instructions (to indicate that
1513 fixes resolving to constants should have those constants implicitly
1514 shifted) and FALSE otherwise, but look for C6X-specific expression
1515 types and adjust the relocations or give errors accordingly. */
1518 tic6x_fix_new_exp (fragS
*frag
, int where
, int size
, expressionS
*exp
,
1519 int pcrel
, bfd_reloc_code_real_type r_type
,
1520 bfd_boolean fix_adda
)
1522 bfd_reloc_code_real_type new_reloc
= BFD_RELOC_UNUSED
;
1530 case BFD_RELOC_C6000_SBR_U15_W
:
1531 new_reloc
= BFD_RELOC_C6000_DSBT_INDEX
;
1535 as_bad (_("$DSBT_INDEX not supported in this context"));
1543 case BFD_RELOC_C6000_SBR_U15_W
:
1544 new_reloc
= BFD_RELOC_C6000_SBR_GOT_U15_W
;
1548 as_bad (_("$GOT not supported in this context"));
1556 case BFD_RELOC_C6000_ABS_L16
:
1557 new_reloc
= BFD_RELOC_C6000_SBR_GOT_L16_W
;
1560 case BFD_RELOC_C6000_ABS_H16
:
1561 new_reloc
= BFD_RELOC_C6000_SBR_GOT_H16_W
;
1565 as_bad (_("$DPR_GOT not supported in this context"));
1573 case BFD_RELOC_C6000_ABS_S16
:
1574 new_reloc
= BFD_RELOC_C6000_SBR_S16
;
1577 case BFD_RELOC_C6000_ABS_L16
:
1578 new_reloc
= BFD_RELOC_C6000_SBR_L16_B
;
1581 case BFD_RELOC_C6000_ABS_H16
:
1582 new_reloc
= BFD_RELOC_C6000_SBR_H16_B
;
1586 as_bad (_("$DPR_BYTE not supported in this context"));
1594 case BFD_RELOC_C6000_ABS_L16
:
1595 new_reloc
= BFD_RELOC_C6000_SBR_L16_H
;
1598 case BFD_RELOC_C6000_ABS_H16
:
1599 new_reloc
= BFD_RELOC_C6000_SBR_H16_H
;
1603 as_bad (_("$DPR_HWORD not supported in this context"));
1611 case BFD_RELOC_C6000_ABS_L16
:
1612 new_reloc
= BFD_RELOC_C6000_SBR_L16_W
;
1615 case BFD_RELOC_C6000_ABS_H16
:
1616 new_reloc
= BFD_RELOC_C6000_SBR_H16_W
;
1620 as_bad (_("$DPR_WORD not supported in this context"));
1631 as_bad (_("invalid PC-relative operand"));
1637 if (new_reloc
== BFD_RELOC_UNUSED
)
1638 fix
= fix_new_exp (frag
, where
, size
, exp
, pcrel
, r_type
);
1640 fix
= fix_new (frag
, where
, size
, exp
->X_add_symbol
, exp
->X_add_number
,
1642 fix
->tc_fix_data
.fix_adda
= fix_adda
;
1645 /* Generate a fix for a constant (.word etc.). Needed to ensure these
1646 go through the error checking in tic6x_fix_new_exp. */
1649 tic6x_cons_fix_new (fragS
*frag
, int where
, int size
, expressionS
*exp
)
1651 bfd_reloc_code_real_type r_type
;
1656 r_type
= BFD_RELOC_8
;
1660 r_type
= BFD_RELOC_16
;
1664 r_type
= BFD_RELOC_32
;
1668 as_bad (_("no %d-byte relocations available"), size
);
1672 tic6x_fix_new_exp (frag
, where
, size
, exp
, 0, r_type
, FALSE
);
1675 /* Initialize target-specific fix data. */
1678 tic6x_init_fix_data (fixS
*fixP
)
1680 fixP
->tc_fix_data
.fix_adda
= FALSE
;
1683 /* Return true if the fix can be handled by GAS, false if it must
1684 be passed through to the linker. */
1687 tic6x_fix_adjustable (fixS
*fixP
)
1689 switch (fixP
->fx_r_type
)
1691 /* Adjust_reloc_syms doesn't know about the GOT. */
1692 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
1693 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
1694 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
1702 /* Given the fine-grained form of an operand, return the coarse
1706 tic6x_coarse_operand_form (tic6x_operand_form form
)
1710 case tic6x_operand_asm_const
:
1711 case tic6x_operand_link_const
:
1712 return TIC6X_OP_EXP
;
1714 case tic6x_operand_reg
:
1715 case tic6x_operand_xreg
:
1716 case tic6x_operand_dreg
:
1717 case tic6x_operand_areg
:
1718 case tic6x_operand_retreg
:
1719 return TIC6X_OP_REG
;
1721 case tic6x_operand_regpair
:
1722 case tic6x_operand_xregpair
:
1723 case tic6x_operand_dregpair
:
1724 return TIC6X_OP_REGPAIR
;
1726 case tic6x_operand_irp
:
1727 return TIC6X_OP_IRP
;
1729 case tic6x_operand_nrp
:
1730 return TIC6X_OP_NRP
;
1732 case tic6x_operand_ctrl
:
1733 return TIC6X_OP_CTRL
;
1735 case tic6x_operand_mem_short
:
1736 case tic6x_operand_mem_long
:
1737 case tic6x_operand_mem_deref
:
1738 return TIC6X_OP_MEM_NOUNREG
;
1740 case tic6x_operand_mem_ndw
:
1741 return TIC6X_OP_MEM_UNREG
;
1743 case tic6x_operand_func_unit
:
1744 return TIC6X_OP_FUNC_UNIT
;
1751 /* How an operand may match or not match a desired form. If different
1752 instruction alternatives fail in different ways, the first failure
1753 in this list determines the diagnostic. */
1757 tic6x_match_matches
,
1758 /* Bad coarse form. */
1761 tic6x_match_non_const
,
1762 /* Register on wrong side. */
1763 tic6x_match_wrong_side
,
1764 /* Not a valid address register. */
1765 tic6x_match_bad_address
,
1766 /* Not a valid return address register. */
1767 tic6x_match_bad_return
,
1768 /* Control register not readable. */
1769 tic6x_match_ctrl_write_only
,
1770 /* Control register not writable. */
1771 tic6x_match_ctrl_read_only
,
1772 /* Not a valid memory reference for this instruction. */
1774 } tic6x_operand_match
;
1776 /* Return whether an operand matches the given fine-grained form and
1777 read/write usage, and, if it does not match, how it fails to match.
1778 The main functional unit side is SIDE; the cross-path side is CROSS
1779 (the same as SIDE if a cross path not used); the data side is
1781 static tic6x_operand_match
1782 tic6x_operand_matches_form (const tic6x_operand
*op
, tic6x_operand_form form
,
1783 tic6x_rw rw
, unsigned int side
, unsigned int cross
,
1784 unsigned int data_side
)
1786 unsigned int coarse
= tic6x_coarse_operand_form (form
);
1788 if (coarse
!= op
->form
)
1789 return tic6x_match_coarse
;
1793 case tic6x_operand_asm_const
:
1794 if (op
->value
.exp
.X_op
== O_constant
)
1795 return tic6x_match_matches
;
1797 return tic6x_match_non_const
;
1799 case tic6x_operand_link_const
:
1800 case tic6x_operand_irp
:
1801 case tic6x_operand_nrp
:
1802 case tic6x_operand_func_unit
:
1803 /* All expressions are link-time constants, although there may
1804 not be relocations to express them in the output file. "irp"
1805 and "nrp" are unique operand values. All parsed functional
1806 unit names are valid. */
1807 return tic6x_match_matches
;
1809 case tic6x_operand_reg
:
1810 case tic6x_operand_regpair
:
1811 if (op
->value
.reg
.side
== side
)
1812 return tic6x_match_matches
;
1814 return tic6x_match_wrong_side
;
1816 case tic6x_operand_xreg
:
1817 case tic6x_operand_xregpair
:
1818 if (op
->value
.reg
.side
== cross
)
1819 return tic6x_match_matches
;
1821 return tic6x_match_wrong_side
;
1823 case tic6x_operand_dreg
:
1824 case tic6x_operand_dregpair
:
1825 if (op
->value
.reg
.side
== data_side
)
1826 return tic6x_match_matches
;
1828 return tic6x_match_wrong_side
;
1830 case tic6x_operand_areg
:
1831 if (op
->value
.reg
.side
!= cross
)
1832 return tic6x_match_wrong_side
;
1833 else if (op
->value
.reg
.side
== 2
1834 && (op
->value
.reg
.num
== 14 || op
->value
.reg
.num
== 15))
1835 return tic6x_match_matches
;
1837 return tic6x_match_bad_address
;
1839 case tic6x_operand_retreg
:
1840 if (op
->value
.reg
.side
!= side
)
1841 return tic6x_match_wrong_side
;
1842 else if (op
->value
.reg
.num
!= 3)
1843 return tic6x_match_bad_return
;
1845 return tic6x_match_matches
;
1847 case tic6x_operand_ctrl
:
1851 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read
1852 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1853 return tic6x_match_matches
;
1855 return tic6x_match_ctrl_write_only
;
1857 case tic6x_rw_write
:
1858 if (tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_write
1859 || tic6x_ctrl_table
[op
->value
.ctrl
].rw
== tic6x_rw_read_write
)
1860 return tic6x_match_matches
;
1862 return tic6x_match_ctrl_read_only
;
1868 case tic6x_operand_mem_deref
:
1869 if (op
->value
.mem
.mod
!= tic6x_mem_mod_none
)
1870 return tic6x_match_bad_mem
;
1871 else if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1873 else if (op
->value
.mem
.base_reg
.side
!= side
)
1874 return tic6x_match_bad_mem
;
1876 return tic6x_match_matches
;
1878 case tic6x_operand_mem_short
:
1879 case tic6x_operand_mem_ndw
:
1880 if (op
->value
.mem
.base_reg
.side
!= side
)
1881 return tic6x_match_bad_mem
;
1882 if (op
->value
.mem
.mod
== tic6x_mem_mod_none
)
1884 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1886 return tic6x_match_matches
;
1888 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1890 if (op
->value
.mem
.mod
== tic6x_mem_mod_plus
1891 || op
->value
.mem
.mod
== tic6x_mem_mod_minus
)
1893 return tic6x_match_matches
;
1895 if (op
->value
.mem
.offset_is_reg
)
1897 if (op
->value
.mem
.scaled
== tic6x_offset_unscaled
1898 && form
!= tic6x_operand_mem_ndw
)
1900 if (op
->value
.mem
.offset
.reg
.side
== side
)
1901 return tic6x_match_matches
;
1903 return tic6x_match_bad_mem
;
1907 if (op
->value
.mem
.offset
.exp
.X_op
== O_constant
)
1908 return tic6x_match_matches
;
1910 return tic6x_match_bad_mem
;
1913 case tic6x_operand_mem_long
:
1914 if (op
->value
.mem
.base_reg
.side
== 2
1915 && (op
->value
.mem
.base_reg
.num
== 14
1916 || op
->value
.mem
.base_reg
.num
== 15))
1918 switch (op
->value
.mem
.mod
)
1920 case tic6x_mem_mod_none
:
1921 if (op
->value
.mem
.scaled
!= tic6x_offset_none
)
1923 return tic6x_match_matches
;
1925 case tic6x_mem_mod_plus
:
1926 if (op
->value
.mem
.scaled
== tic6x_offset_none
)
1928 if (op
->value
.mem
.offset_is_reg
)
1929 return tic6x_match_bad_mem
;
1930 else if (op
->value
.mem
.scaled
== tic6x_offset_scaled
1931 && op
->value
.mem
.offset
.exp
.X_op
!= O_constant
)
1932 return tic6x_match_bad_mem
;
1934 return tic6x_match_matches
;
1936 case tic6x_mem_mod_minus
:
1937 case tic6x_mem_mod_preinc
:
1938 case tic6x_mem_mod_predec
:
1939 case tic6x_mem_mod_postinc
:
1940 case tic6x_mem_mod_postdec
:
1941 return tic6x_match_bad_mem
;
1949 return tic6x_match_bad_mem
;
1956 /* Return the number of bits shift used with DP-relative coding method
1960 tic6x_dpr_shift (tic6x_coding_method coding
)
1964 case tic6x_coding_ulcst_dpr_byte
:
1967 case tic6x_coding_ulcst_dpr_half
:
1970 case tic6x_coding_ulcst_dpr_word
:
1978 /* Return the relocation used with DP-relative coding method
1981 static bfd_reloc_code_real_type
1982 tic6x_dpr_reloc (tic6x_coding_method coding
)
1986 case tic6x_coding_ulcst_dpr_byte
:
1987 return BFD_RELOC_C6000_SBR_U15_B
;
1989 case tic6x_coding_ulcst_dpr_half
:
1990 return BFD_RELOC_C6000_SBR_U15_H
;
1992 case tic6x_coding_ulcst_dpr_word
:
1993 return BFD_RELOC_C6000_SBR_U15_W
;
2000 /* Given a memory reference *MEM_REF as originally parsed, fill in
2001 defaults for missing offsets. */
2004 tic6x_default_mem_ref (tic6x_mem_ref
*mem_ref
)
2006 switch (mem_ref
->mod
)
2008 case tic6x_mem_mod_none
:
2009 if (mem_ref
->scaled
!= tic6x_offset_none
)
2011 mem_ref
->mod
= tic6x_mem_mod_plus
;
2012 mem_ref
->scaled
= tic6x_offset_unscaled
;
2013 mem_ref
->offset_is_reg
= FALSE
;
2014 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
2015 mem_ref
->offset
.exp
.X_op
= O_constant
;
2016 mem_ref
->offset
.exp
.X_add_number
= 0;
2017 mem_ref
->offset
.exp
.X_unsigned
= 0;
2020 case tic6x_mem_mod_plus
:
2021 case tic6x_mem_mod_minus
:
2022 if (mem_ref
->scaled
== tic6x_offset_none
)
2026 case tic6x_mem_mod_preinc
:
2027 case tic6x_mem_mod_predec
:
2028 case tic6x_mem_mod_postinc
:
2029 case tic6x_mem_mod_postdec
:
2030 if (mem_ref
->scaled
!= tic6x_offset_none
)
2032 mem_ref
->scaled
= tic6x_offset_scaled
;
2033 mem_ref
->offset_is_reg
= FALSE
;
2034 memset (&mem_ref
->offset
.exp
, 0, sizeof mem_ref
->offset
.exp
);
2035 mem_ref
->offset
.exp
.X_op
= O_constant
;
2036 mem_ref
->offset
.exp
.X_add_number
= 1;
2037 mem_ref
->offset
.exp
.X_unsigned
= 0;
2045 /* Return the encoding in the 8-bit field of an SPMASK or SPMASKR
2046 instruction of the specified UNIT, side SIDE. */
2049 tic6x_encode_spmask (tic6x_func_unit_base unit
, unsigned int side
)
2053 case tic6x_func_unit_l
:
2054 return 1 << (side
- 1);
2056 case tic6x_func_unit_s
:
2057 return 1 << (side
+ 1);
2059 case tic6x_func_unit_d
:
2060 return 1 << (side
+ 3);
2062 case tic6x_func_unit_m
:
2063 return 1 << (side
+ 5);
2070 /* Try to encode the instruction with opcode number ID and operands
2071 OPERANDS (number NUM_OPERANDS), creg value THIS_LINE_CREG and z
2072 value THIS_LINE_Z; FUNC_UNIT_SIDE, FUNC_UNIT_CROSS and
2073 FUNC_UNIT_DATA_SIDE describe the functional unit specification;
2074 SPLOOP_II is the ii value from the previous SPLOOP-family
2075 instruction, or 0 if not in such a loop; the only possible problems
2076 are operands being out of range (they already match the
2077 fine-grained form), and inappropriate predication. If this
2078 succeeds, return the encoding and set *OK to TRUE; otherwise return
2079 0 and set *OK to FALSE. If a fix is needed, set *FIX_NEEDED to
2080 true and fill in *FIX_EXP, *FIX_PCREL, *FX_R_TYPE and *FIX_ADDA.
2081 Print error messages for failure if PRINT_ERRORS is TRUE; the
2082 opcode starts at STR and has length OPC_LEN. */
2085 tic6x_try_encode (tic6x_opcode_id id
, tic6x_operand
*operands
,
2086 unsigned int num_operands
, unsigned int this_line_creg
,
2087 unsigned int this_line_z
, unsigned int func_unit_side
,
2088 unsigned int func_unit_cross
,
2089 unsigned int func_unit_data_side
, int sploop_ii
,
2090 expressionS
**fix_exp
, int *fix_pcrel
,
2091 bfd_reloc_code_real_type
*fx_r_type
, bfd_boolean
*fix_adda
,
2092 bfd_boolean
*fix_needed
, bfd_boolean
*ok
,
2093 bfd_boolean print_errors
, char *str
, int opc_len
)
2095 const tic6x_opcode
*opct
;
2096 const tic6x_insn_format
*fmt
;
2097 unsigned int opcode_value
;
2100 opct
= &tic6x_opcode_table
[id
];
2101 fmt
= &tic6x_insn_format_table
[opct
->format
];
2102 opcode_value
= fmt
->cst_bits
;
2104 for (fld
= 0; fld
< opct
->num_fixed_fields
; fld
++)
2106 if (opct
->fixed_fields
[fld
].min_val
== opct
->fixed_fields
[fld
].max_val
)
2108 const tic6x_insn_field
*fldd
;
2109 fldd
= tic6x_field_from_fmt (fmt
, opct
->fixed_fields
[fld
].field_id
);
2112 opcode_value
|= opct
->fixed_fields
[fld
].min_val
<< fldd
->low_pos
;
2116 for (fld
= 0; fld
< opct
->num_variable_fields
; fld
++)
2118 const tic6x_insn_field
*fldd
;
2124 unsigned int fcyc_bits
;
2129 fldd
= tic6x_field_from_fmt (fmt
, opct
->variable_fields
[fld
].field_id
);
2132 opno
= opct
->variable_fields
[fld
].operand_num
;
2133 switch (opct
->variable_fields
[fld
].coding_method
)
2135 case tic6x_coding_ucst
:
2136 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2138 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2140 ucexp
= operands
[opno
].value
.exp
;
2142 if (ucexp
.X_add_number
< 0
2143 || ucexp
.X_add_number
>= (1 << fldd
->width
))
2146 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2151 value
= ucexp
.X_add_number
;
2154 case tic6x_coding_scst
:
2155 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2157 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2160 /* Opcode table should not permit non-constants without
2161 a known relocation for them. */
2162 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2165 *fix_exp
= &operands
[opno
].value
.exp
;
2167 *fx_r_type
= BFD_RELOC_C6000_ABS_S16
;
2171 sign_value
= SEXT (operands
[opno
].value
.exp
.X_add_number
);
2173 if (sign_value
< -(1 << (fldd
->width
- 1))
2174 || (sign_value
>= (1 << (fldd
->width
- 1))))
2177 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2182 value
= sign_value
+ (1 << (fldd
->width
- 1));
2183 value
^= (1 << (fldd
->width
- 1));
2186 case tic6x_coding_ucst_minus_one
:
2187 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2189 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2191 if (operands
[opno
].value
.exp
.X_add_number
<= 0
2192 || operands
[opno
].value
.exp
.X_add_number
> (1 << fldd
->width
))
2195 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2200 value
= operands
[opno
].value
.exp
.X_add_number
- 1;
2203 case tic6x_coding_scst_negate
:
2204 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2206 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2208 sign_value
= SEXT (-operands
[opno
].value
.exp
.X_add_number
);
2209 goto signed_constant
;
2211 case tic6x_coding_ulcst_dpr_byte
:
2212 case tic6x_coding_ulcst_dpr_half
:
2213 case tic6x_coding_ulcst_dpr_word
:
2214 bits
= tic6x_dpr_shift (opct
->variable_fields
[fld
].coding_method
);
2215 switch (operands
[opno
].form
)
2218 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2220 ucexp
= operands
[opno
].value
.exp
;
2221 goto unsigned_constant
;
2223 expp
= &operands
[opno
].value
.exp
;
2226 case TIC6X_OP_MEM_NOUNREG
:
2227 mem
= operands
[opno
].value
.mem
;
2228 tic6x_default_mem_ref (&mem
);
2229 if (mem
.offset_is_reg
)
2231 if (mem
.offset
.exp
.X_op
== O_constant
)
2233 ucexp
= mem
.offset
.exp
;
2234 if (mem
.scaled
== tic6x_offset_unscaled
)
2236 if (ucexp
.X_add_number
& ((1 << bits
) - 1))
2239 as_bad (_("offset in operand %u of '%.*s' not "
2240 "divisible by %u"), opno
+ 1, opc_len
,
2245 ucexp
.X_add_number
>>= bits
;
2247 goto unsigned_constant
;
2249 if (mem
.scaled
!= tic6x_offset_unscaled
)
2251 if (operands
[opno
].value
.mem
.mod
== tic6x_mem_mod_none
2252 || operands
[opno
].value
.mem
.scaled
!= tic6x_offset_unscaled
2253 || operands
[opno
].value
.mem
.offset_is_reg
)
2255 expp
= &operands
[opno
].value
.mem
.offset
.exp
;
2262 /* Opcode table should not use this encoding without a known
2264 if (fldd
->low_pos
!= 8 || fldd
->width
!= 15)
2266 /* We do not check for offset divisibility here; such a
2267 check is not needed at this point to encode the value,
2268 and if there is eventually a problem it will be detected
2269 either in md_apply_fix or at link time. */
2274 = tic6x_dpr_reloc (opct
->variable_fields
[fld
].coding_method
);
2275 if (operands
[opno
].form
== TIC6X_OP_EXP
)
2281 case tic6x_coding_lcst_low16
:
2282 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2284 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2285 value
= operands
[opno
].value
.exp
.X_add_number
& 0xffff;
2289 /* Opcode table should not use this encoding without a
2290 known relocation. */
2291 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2294 *fix_exp
= &operands
[opno
].value
.exp
;
2296 *fx_r_type
= BFD_RELOC_C6000_ABS_L16
;
2301 case tic6x_coding_lcst_high16
:
2302 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2304 if (operands
[opno
].value
.exp
.X_op
== O_constant
)
2305 value
= (operands
[opno
].value
.exp
.X_add_number
>> 16) & 0xffff;
2309 /* Opcode table should not use this encoding without a
2310 known relocation. */
2311 if (fldd
->low_pos
!= 7 || fldd
->width
!= 16)
2314 *fix_exp
= &operands
[opno
].value
.exp
;
2316 *fx_r_type
= BFD_RELOC_C6000_ABS_H16
;
2321 case tic6x_coding_pcrel
:
2322 case tic6x_coding_pcrel_half
:
2323 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2327 *fix_exp
= &operands
[opno
].value
.exp
;
2329 if (fldd
->low_pos
== 7 && fldd
->width
== 21)
2330 *fx_r_type
= BFD_RELOC_C6000_PCR_S21
;
2331 else if (fldd
->low_pos
== 16 && fldd
->width
== 12)
2332 *fx_r_type
= BFD_RELOC_C6000_PCR_S12
;
2333 else if (fldd
->low_pos
== 13 && fldd
->width
== 10)
2334 *fx_r_type
= BFD_RELOC_C6000_PCR_S10
;
2335 else if (fldd
->low_pos
== 16 && fldd
->width
== 7)
2336 *fx_r_type
= BFD_RELOC_C6000_PCR_S7
;
2338 /* Opcode table should not use this encoding without a
2339 known relocation. */
2344 case tic6x_coding_reg
:
2345 switch (operands
[opno
].form
)
2348 case TIC6X_OP_REGPAIR
:
2349 value
= operands
[opno
].value
.reg
.num
;
2352 case TIC6X_OP_MEM_NOUNREG
:
2353 case TIC6X_OP_MEM_UNREG
:
2354 value
= operands
[opno
].value
.mem
.base_reg
.num
;
2362 case tic6x_coding_areg
:
2363 switch (operands
[opno
].form
)
2366 value
= (operands
[opno
].value
.reg
.num
== 15 ? 1 : 0);
2369 case TIC6X_OP_MEM_NOUNREG
:
2370 value
= (operands
[opno
].value
.mem
.base_reg
.num
== 15 ? 1 : 0);
2378 case tic6x_coding_crlo
:
2379 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2381 value
= tic6x_ctrl_table
[operands
[opno
].value
.ctrl
].crlo
;
2384 case tic6x_coding_crhi
:
2385 if (operands
[opno
].form
!= TIC6X_OP_CTRL
)
2390 case tic6x_coding_reg_shift
:
2391 if (operands
[opno
].form
!= TIC6X_OP_REGPAIR
)
2393 value
= operands
[opno
].value
.reg
.num
>> 1;
2396 case tic6x_coding_mem_offset
:
2397 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
)
2399 mem
= operands
[opno
].value
.mem
;
2400 tic6x_default_mem_ref (&mem
);
2401 if (mem
.offset_is_reg
)
2403 if (mem
.scaled
!= tic6x_offset_scaled
)
2405 value
= mem
.offset
.reg
.num
;
2411 if (mem
.offset
.exp
.X_op
!= O_constant
)
2415 case tic6x_offset_scaled
:
2419 case tic6x_offset_unscaled
:
2420 scale
= opct
->operand_info
[opno
].size
;
2421 if (scale
!= 1 && scale
!= 2 && scale
!= 4 && scale
!= 8)
2428 if (mem
.offset
.exp
.X_add_number
< 0
2429 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
) * scale
)
2432 as_bad (_("offset in operand %u of '%.*s' out of range"),
2433 opno
+ 1, opc_len
, str
);
2437 if (mem
.offset
.exp
.X_add_number
% scale
)
2440 as_bad (_("offset in operand %u of '%.*s' not "
2442 opno
+ 1, opc_len
, str
, scale
);
2446 value
= mem
.offset
.exp
.X_add_number
/ scale
;
2450 case tic6x_coding_mem_offset_noscale
:
2451 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2453 mem
= operands
[opno
].value
.mem
;
2454 tic6x_default_mem_ref (&mem
);
2455 if (mem
.offset_is_reg
)
2456 value
= mem
.offset
.reg
.num
;
2459 if (mem
.offset
.exp
.X_op
!= O_constant
)
2461 if (mem
.offset
.exp
.X_add_number
< 0
2462 || mem
.offset
.exp
.X_add_number
>= (1 << fldd
->width
))
2465 as_bad (_("offset in operand %u of '%.*s' out of range"),
2466 opno
+ 1, opc_len
, str
);
2470 value
= mem
.offset
.exp
.X_add_number
;
2474 case tic6x_coding_mem_mode
:
2475 if (operands
[opno
].form
!= TIC6X_OP_MEM_NOUNREG
2476 && operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2478 mem
= operands
[opno
].value
.mem
;
2479 tic6x_default_mem_ref (&mem
);
2482 case tic6x_mem_mod_plus
:
2486 case tic6x_mem_mod_minus
:
2490 case tic6x_mem_mod_preinc
:
2494 case tic6x_mem_mod_predec
:
2498 case tic6x_mem_mod_postinc
:
2502 case tic6x_mem_mod_postdec
:
2509 value
+= (mem
.offset_is_reg
? 4 : 0);
2512 case tic6x_coding_scaled
:
2513 if (operands
[opno
].form
!= TIC6X_OP_MEM_UNREG
)
2515 mem
= operands
[opno
].value
.mem
;
2516 tic6x_default_mem_ref (&mem
);
2519 case tic6x_offset_unscaled
:
2523 case tic6x_offset_scaled
:
2532 case tic6x_coding_spmask
:
2533 /* The position of such a field is hardcoded in the handling
2535 if (fldd
->low_pos
!= 18)
2538 for (opno
= 0; opno
< num_operands
; opno
++)
2542 v
= tic6x_encode_spmask (operands
[opno
].value
.func_unit
.base
,
2543 operands
[opno
].value
.func_unit
.side
);
2547 as_bad (_("functional unit already masked for operand "
2548 "%u of '%.*s'"), opno
+ 1, opc_len
, str
);
2556 case tic6x_coding_reg_unused
:
2557 /* This is a placeholder; correct handling goes along with
2558 resource constraint checks. */
2562 case tic6x_coding_fstg
:
2563 case tic6x_coding_fcyc
:
2564 if (operands
[opno
].form
!= TIC6X_OP_EXP
)
2566 if (operands
[opno
].value
.exp
.X_op
!= O_constant
)
2571 as_bad (_("'%.*s' instruction not in a software "
2580 else if (sploop_ii
<= 2)
2582 else if (sploop_ii
<= 4)
2584 else if (sploop_ii
<= 8)
2586 else if (sploop_ii
<= 14)
2590 if (fcyc_bits
> fldd
->width
)
2593 if (opct
->variable_fields
[fld
].coding_method
== tic6x_coding_fstg
)
2596 if (operands
[opno
].value
.exp
.X_add_number
< 0
2597 || (operands
[opno
].value
.exp
.X_add_number
2598 >= (1 << (fldd
->width
- fcyc_bits
))))
2601 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2606 value
= operands
[opno
].value
.exp
.X_add_number
;
2607 for (t
= 0, i
= fcyc_bits
; i
< fldd
->width
; i
++)
2609 t
= (t
<< 1) | (value
& 1);
2612 value
= t
<< fcyc_bits
;
2616 if (operands
[opno
].value
.exp
.X_add_number
< 0
2617 || (operands
[opno
].value
.exp
.X_add_number
>= sploop_ii
))
2620 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2625 value
= operands
[opno
].value
.exp
.X_add_number
;
2629 case tic6x_coding_fu
:
2630 value
= func_unit_side
== 2 ? 1 : 0;
2633 case tic6x_coding_data_fu
:
2634 value
= func_unit_data_side
== 2 ? 1 : 0;
2637 case tic6x_coding_xpath
:
2638 value
= func_unit_cross
;
2645 for (ffld
= 0; ffld
< opct
->num_fixed_fields
; ffld
++)
2646 if ((opct
->fixed_fields
[ffld
].field_id
2647 == opct
->variable_fields
[fld
].field_id
)
2648 && (value
< opct
->fixed_fields
[ffld
].min_val
2649 || value
> opct
->fixed_fields
[ffld
].max_val
))
2652 as_bad (_("operand %u of '%.*s' out of range"), opno
+ 1,
2658 opcode_value
|= value
<< fldd
->low_pos
;
2663 const tic6x_insn_field
*creg
;
2664 const tic6x_insn_field
*z
;
2666 creg
= tic6x_field_from_fmt (fmt
, tic6x_field_creg
);
2670 as_bad (_("instruction '%.*s' cannot be predicated"),
2675 z
= tic6x_field_from_fmt (fmt
, tic6x_field_z
);
2676 /* If there is a creg field, there must be a z field; otherwise
2677 there is an error in the format table. */
2681 opcode_value
|= this_line_creg
<< creg
->low_pos
;
2682 opcode_value
|= this_line_z
<< z
->low_pos
;
2686 return opcode_value
;
2689 /* Convert the target integer stored in N bytes in BUF to a host
2690 integer, returning that value. */
2693 md_chars_to_number (char *buf
, int n
)
2696 unsigned char *p
= (unsigned char *) buf
;
2698 if (target_big_endian
)
2703 result
|= (*p
++ & 0xff);
2711 result
|= (p
[n
] & 0xff);
2718 /* Assemble the instruction starting at STR (an opcode, with the
2719 opcode name all-lowercase). */
2722 md_assemble (char *str
)
2726 bfd_boolean this_line_parallel
;
2727 bfd_boolean this_line_spmask
;
2728 unsigned int this_line_creg
;
2729 unsigned int this_line_z
;
2730 tic6x_label_list
*this_insn_label_list
;
2731 segment_info_type
*seginfo
;
2732 tic6x_opcode_list
*opc_list
, *opc
;
2733 tic6x_func_unit_base func_unit_base
= tic6x_func_unit_nfu
;
2734 unsigned int func_unit_side
= 0;
2735 unsigned int func_unit_cross
= 0;
2736 unsigned int cross_side
= 0;
2737 unsigned int func_unit_data_side
= 0;
2738 unsigned int max_matching_opcodes
, num_matching_opcodes
;
2739 tic6x_opcode_id
*opcm
= NULL
;
2740 unsigned int opc_rank
[TIC6X_NUM_PREFER
];
2741 const tic6x_opcode
*opct
= NULL
;
2742 int min_rank
, try_rank
, max_rank
;
2743 bfd_boolean num_operands_permitted
[TIC6X_MAX_SOURCE_OPERANDS
+ 1]
2745 unsigned int operand_forms
[TIC6X_MAX_SOURCE_OPERANDS
] = { 0 };
2746 tic6x_operand operands
[TIC6X_MAX_SOURCE_OPERANDS
];
2747 unsigned int max_num_operands
;
2748 unsigned int num_operands_read
;
2749 bfd_boolean ok_this_arch
, ok_this_fu
, ok_this_arch_fu
;
2750 bfd_boolean bad_operands
= FALSE
;
2751 unsigned int opcode_value
;
2752 bfd_boolean encoded_ok
;
2753 bfd_boolean fix_needed
= FALSE
;
2754 expressionS
*fix_exp
= NULL
;
2756 bfd_reloc_code_real_type fx_r_type
= BFD_RELOC_UNUSED
;
2757 bfd_boolean fix_adda
= FALSE
;
2762 while (*p
&& !is_end_of_line
[(unsigned char) *p
] && *p
!= ' ')
2765 /* This function should only have been called when there is actually
2766 an instruction to assemble. */
2770 /* Now an instruction has been seen, architecture attributes from
2771 .arch directives merge with rather than overriding the previous
2773 tic6x_seen_insns
= TRUE
;
2774 /* If no .arch directives or -march options have been seen, we are
2775 assessing instruction validity based on the C674X default, so set
2776 the attribute accordingly. */
2777 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
2778 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
2780 /* Reset global settings for parallel bars and predicates now to
2781 avoid extra errors if there are problems with this opcode. */
2782 this_line_parallel
= tic6x_line_parallel
;
2783 this_line_spmask
= tic6x_line_spmask
;
2784 this_line_creg
= tic6x_line_creg
;
2785 this_line_z
= tic6x_line_z
;
2786 tic6x_line_parallel
= FALSE
;
2787 tic6x_line_spmask
= FALSE
;
2788 tic6x_line_creg
= 0;
2790 seginfo
= seg_info (now_seg
);
2791 this_insn_label_list
= seginfo
->tc_segment_info_data
.label_list
;
2792 seginfo
->tc_segment_info_data
.label_list
= NULL
;
2794 opc_list
= hash_find_n (opcode_hash
, str
, p
- str
);
2795 if (opc_list
== NULL
)
2799 as_bad (_("unknown opcode '%s'"), str
);
2805 skip_whitespace (p
);
2807 /* See if there is something that looks like a functional unit
2811 bfd_boolean good_func_unit
;
2812 tic6x_func_unit_base maybe_base
= tic6x_func_unit_nfu
;
2813 unsigned int maybe_side
= 0;
2814 unsigned int maybe_cross
= 0;
2815 unsigned int maybe_data_side
= 0;
2817 good_func_unit
= tic6x_parse_func_unit_base (p
+ 1, &maybe_base
,
2822 if (p
[3] == ' ' || is_end_of_line
[(unsigned char) p
[3]])
2824 else if ((p
[3] == 'x' || p
[3] == 'X')
2825 && (p
[4] == ' ' || is_end_of_line
[(unsigned char) p
[4]]))
2830 else if (maybe_base
== tic6x_func_unit_d
2831 && (p
[3] == 't' || p
[3] == 'T')
2832 && (p
[4] == '1' || p
[4] == '2')
2833 && (p
[5] == ' ' || is_end_of_line
[(unsigned char) p
[5]]))
2835 maybe_data_side
= p
[4] - '0';
2839 good_func_unit
= FALSE
;
2844 func_unit_base
= maybe_base
;
2845 func_unit_side
= maybe_side
;
2846 func_unit_cross
= maybe_cross
;
2847 cross_side
= (func_unit_cross
? 3 - func_unit_side
: func_unit_side
);
2848 func_unit_data_side
= maybe_data_side
;
2851 skip_whitespace (p
);
2854 /* Determine which entries in the opcode table match, and the
2855 associated permitted forms of operands. */
2856 max_matching_opcodes
= 0;
2857 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2858 max_matching_opcodes
++;
2859 num_matching_opcodes
= 0;
2860 opcm
= xmalloc (max_matching_opcodes
* sizeof (*opcm
));
2861 max_num_operands
= 0;
2862 ok_this_arch
= FALSE
;
2864 ok_this_arch_fu
= FALSE
;
2865 for (opc
= opc_list
; opc
; opc
= opc
->next
)
2867 unsigned int num_operands
;
2869 bfd_boolean this_opc_arch_ok
= TRUE
;
2870 bfd_boolean this_opc_fu_ok
= TRUE
;
2872 if (tic6x_insn_format_table
[tic6x_opcode_table
[opc
->id
].format
].num_bits
2875 if (!(tic6x_opcode_table
[opc
->id
].isa_variants
& tic6x_features
))
2876 this_opc_arch_ok
= FALSE
;
2877 if (tic6x_opcode_table
[opc
->id
].func_unit
!= func_unit_base
)
2878 this_opc_fu_ok
= FALSE
;
2879 if (func_unit_side
== 1
2880 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_B_ONLY
))
2881 this_opc_fu_ok
= FALSE
;
2883 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_NO_CROSS
))
2884 this_opc_fu_ok
= FALSE
;
2885 if (!func_unit_data_side
2886 && (tic6x_opcode_table
[opc
->id
].flags
2887 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2888 this_opc_fu_ok
= FALSE
;
2889 if (func_unit_data_side
2890 && !(tic6x_opcode_table
[opc
->id
].flags
2891 & (TIC6X_FLAG_LOAD
| TIC6X_FLAG_STORE
)))
2892 this_opc_fu_ok
= FALSE
;
2893 if (func_unit_data_side
== 1
2894 && (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SIDE_T2_ONLY
))
2895 this_opc_fu_ok
= FALSE
;
2896 if (this_opc_arch_ok
)
2897 ok_this_arch
= TRUE
;
2900 if (!this_opc_arch_ok
|| !this_opc_fu_ok
)
2902 ok_this_arch_fu
= TRUE
;
2903 opcm
[num_matching_opcodes
] = opc
->id
;
2904 num_matching_opcodes
++;
2905 num_operands
= tic6x_opcode_table
[opc
->id
].num_operands
;
2907 if (tic6x_opcode_table
[opc
->id
].flags
& TIC6X_FLAG_SPMASK
)
2909 if (num_operands
!= 1
2910 || (tic6x_opcode_table
[opc
->id
].operand_info
[0].form
2911 != tic6x_operand_func_unit
))
2914 for (i
= 0; i
< num_operands
; i
++)
2917 |= tic6x_coarse_operand_form (tic6x_operand_func_unit
);
2918 num_operands_permitted
[i
] = TRUE
;
2923 for (i
= 0; i
< num_operands
; i
++)
2925 tic6x_operand_form f
2926 = tic6x_opcode_table
[opc
->id
].operand_info
[i
].form
;
2928 operand_forms
[i
] |= tic6x_coarse_operand_form (f
);
2931 num_operands_permitted
[num_operands
] = TRUE
;
2932 if (num_operands
> max_num_operands
)
2933 max_num_operands
= num_operands
;
2938 as_bad (_("'%.*s' instruction not supported on this architecture"),
2946 as_bad (_("'%.*s' instruction not supported on this functional unit"),
2952 if (!ok_this_arch_fu
)
2954 as_bad (_("'%.*s' instruction not supported on this functional unit"
2955 " for this architecture"),
2961 /* If there were no instructions matching the above availability
2962 checks, we should now have given an error and returned. */
2963 if (num_matching_opcodes
== 0)
2966 num_operands_read
= 0;
2969 skip_whitespace (p
);
2970 if (is_end_of_line
[(unsigned char) *p
])
2972 if (num_operands_read
> 0)
2974 as_bad (_("missing operand after comma"));
2975 bad_operands
= TRUE
;
2980 if (max_num_operands
== 0)
2982 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
2983 bad_operands
= TRUE
;
2987 if (!tic6x_parse_operand (&p
, &operands
[num_operands_read
],
2988 operand_forms
[num_operands_read
], str
, opc_len
,
2989 num_operands_read
+ 1))
2990 bad_operands
= TRUE
;
2991 num_operands_read
++;
2993 if (is_end_of_line
[(unsigned char) *p
])
2998 if (num_operands_read
== max_num_operands
)
3000 as_bad (_("too many operands to '%.*s'"), opc_len
, str
);
3001 bad_operands
= TRUE
;
3007 /* Operand parsing should consume whole operands. */
3011 if (!bad_operands
&& !num_operands_permitted
[num_operands_read
])
3013 as_bad (_("bad number of operands to '%.*s'"), opc_len
, str
);
3014 bad_operands
= TRUE
;
3019 /* Each operand is of the right syntactic form for some opcode
3020 choice, and the number of operands is valid. Check that each
3021 operand is OK in detail for some opcode choice with the right
3022 number of operands. */
3025 for (i
= 0; i
< num_operands_read
; i
++)
3027 bfd_boolean coarse_ok
= FALSE
;
3028 bfd_boolean fine_ok
= FALSE
;
3029 tic6x_operand_match fine_failure
= tic6x_match_matches
;
3032 for (j
= 0; j
< num_matching_opcodes
; j
++)
3034 tic6x_operand_form f
;
3037 tic6x_operand_match this_fine_failure
;
3039 if (tic6x_opcode_table
[opcm
[j
]].flags
& TIC6X_FLAG_SPMASK
)
3041 f
= tic6x_operand_func_unit
;
3046 if (tic6x_opcode_table
[opcm
[j
]].num_operands
3047 != num_operands_read
)
3050 f
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].form
;
3051 rw
= tic6x_opcode_table
[opcm
[j
]].operand_info
[i
].rw
;
3053 cf
= tic6x_coarse_operand_form (f
);
3055 if (operands
[i
].form
!= cf
)
3060 = tic6x_operand_matches_form (&operands
[i
], f
, rw
,
3063 func_unit_data_side
);
3064 if (this_fine_failure
== tic6x_match_matches
)
3069 if (fine_failure
== tic6x_match_matches
3070 || fine_failure
> this_fine_failure
)
3071 fine_failure
= this_fine_failure
;
3074 /* No instructions should have operand syntactic forms only
3075 acceptable with certain numbers of operands, so no
3076 diagnostic for this case. */
3082 switch (fine_failure
)
3084 case tic6x_match_non_const
:
3085 as_bad (_("operand %u of '%.*s' not constant"),
3086 i
+ 1, opc_len
, str
);
3089 case tic6x_match_wrong_side
:
3090 as_bad (_("operand %u of '%.*s' on wrong side"),
3091 i
+ 1, opc_len
, str
);
3094 case tic6x_match_bad_return
:
3095 as_bad (_("operand %u of '%.*s' not a valid return "
3096 "address register"),
3097 i
+ 1, opc_len
, str
);
3100 case tic6x_match_ctrl_write_only
:
3101 as_bad (_("operand %u of '%.*s' is write-only"),
3102 i
+ 1, opc_len
, str
);
3105 case tic6x_match_ctrl_read_only
:
3106 as_bad (_("operand %u of '%.*s' is read-only"),
3107 i
+ 1, opc_len
, str
);
3110 case tic6x_match_bad_mem
:
3111 as_bad (_("operand %u of '%.*s' not a valid memory "
3113 i
+ 1, opc_len
, str
);
3116 case tic6x_match_bad_address
:
3117 as_bad (_("operand %u of '%.*s' not a valid base "
3118 "address register"),
3119 i
+ 1, opc_len
, str
);
3125 bad_operands
= TRUE
;
3133 /* Each operand is OK for some opcode choice, and the number of
3134 operands is valid. Check whether there is an opcode choice
3135 for which all operands are simultaneously valid. */
3137 bfd_boolean found_match
= FALSE
;
3139 for (i
= 0; i
< TIC6X_NUM_PREFER
; i
++)
3140 opc_rank
[i
] = (unsigned int) -1;
3142 min_rank
= TIC6X_NUM_PREFER
- 1;
3145 for (i
= 0; i
< num_matching_opcodes
; i
++)
3148 bfd_boolean this_matches
= TRUE
;
3150 if (!(tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3151 && tic6x_opcode_table
[opcm
[i
]].num_operands
!= num_operands_read
)
3154 for (j
= 0; j
< num_operands_read
; j
++)
3156 tic6x_operand_form f
;
3159 if (tic6x_opcode_table
[opcm
[i
]].flags
& TIC6X_FLAG_SPMASK
)
3161 f
= tic6x_operand_func_unit
;
3166 f
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].form
;
3167 rw
= tic6x_opcode_table
[opcm
[i
]].operand_info
[j
].rw
;
3169 if (tic6x_operand_matches_form (&operands
[j
], f
, rw
,
3172 func_unit_data_side
)
3173 != tic6x_match_matches
)
3175 this_matches
= FALSE
;
3182 int rank
= TIC6X_PREFER_VAL (tic6x_opcode_table
[opcm
[i
]].flags
);
3184 if (rank
< min_rank
)
3186 if (rank
> max_rank
)
3189 if (opc_rank
[rank
] == (unsigned int) -1)
3192 /* The opcode table should provide a total ordering
3193 for all cases where multiple matches may get
3203 as_bad (_("bad operand combination for '%.*s'"), opc_len
, str
);
3204 bad_operands
= TRUE
;
3216 for (try_rank
= max_rank
; try_rank
>= min_rank
; try_rank
--)
3220 if (opc_rank
[try_rank
] == (unsigned int) -1)
3223 opcode_value
= tic6x_try_encode (opcm
[opc_rank
[try_rank
]], operands
,
3224 num_operands_read
, this_line_creg
,
3225 this_line_z
, func_unit_side
,
3226 func_unit_cross
, func_unit_data_side
,
3227 seginfo
->tc_segment_info_data
.sploop_ii
,
3228 &fix_exp
, &fix_pcrel
, &fx_r_type
,
3229 &fix_adda
, &fix_needed
, &encoded_ok
,
3230 (try_rank
== min_rank
? TRUE
: FALSE
),
3234 opct
= &tic6x_opcode_table
[opcm
[opc_rank
[try_rank
]]];
3244 if (this_line_parallel
)
3246 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
;
3247 if (insn_frag
== NULL
)
3249 as_bad (_("parallel instruction not following another instruction"));
3253 if (insn_frag
->fr_fix
>= 32)
3255 as_bad (_("too many instructions in execute packet"));
3259 if (this_insn_label_list
!= NULL
)
3260 as_bad (_("label not at start of execute packet"));
3262 if (opct
->flags
& TIC6X_FLAG_FIRST
)
3263 as_bad (_("'%.*s' instruction not at start of execute packet"),
3266 *seginfo
->tc_segment_info_data
.last_insn_lsb
|= 0x1;
3267 output
= insn_frag
->fr_literal
+ insn_frag
->fr_fix
;
3271 tic6x_label_list
*l
;
3273 seginfo
->tc_segment_info_data
.spmask_addr
= NULL
;
3274 seginfo
->tc_segment_info_data
.func_units_used
= 0;
3276 /* Start a new frag for this execute packet. */
3277 if (frag_now_fix () != 0)
3279 if (frag_now
->fr_type
!= rs_machine_dependent
)
3280 frag_wane (frag_now
);
3285 insn_frag
= seginfo
->tc_segment_info_data
.execute_packet_frag
= frag_now
;
3286 for (l
= this_insn_label_list
; l
; l
= l
->next
)
3288 symbol_set_frag (l
->label
, frag_now
);
3289 S_SET_VALUE (l
->label
, 0);
3290 S_SET_SEGMENT (l
->label
, now_seg
);
3292 tic6x_free_label_list (this_insn_label_list
);
3293 dwarf2_emit_insn (0);
3294 output
= frag_var (rs_machine_dependent
, 32, 32, 0, NULL
, 0, NULL
);
3295 /* This must be the same as the frag to which a pointer was just
3297 if (output
!= insn_frag
->fr_literal
)
3299 insn_frag
->tc_frag_data
.is_insns
= TRUE
;
3300 insn_frag
->tc_frag_data
.can_cross_fp_boundary
3301 = tic6x_can_cross_fp_boundary
;
3304 if (func_unit_base
!= tic6x_func_unit_nfu
)
3306 unsigned int func_unit_enc
;
3308 func_unit_enc
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3310 if (seginfo
->tc_segment_info_data
.func_units_used
& func_unit_enc
)
3311 as_bad (_("functional unit already used in this execute packet"));
3313 seginfo
->tc_segment_info_data
.func_units_used
|= func_unit_enc
;
3316 if (opct
->flags
& TIC6X_FLAG_SPLOOP
)
3318 if (seginfo
->tc_segment_info_data
.sploop_ii
)
3319 as_bad (_("nested software pipelined loop"));
3320 if (num_operands_read
!= 1
3321 || operands
[0].form
!= TIC6X_OP_EXP
3322 || operands
[0].value
.exp
.X_op
!= O_constant
)
3324 seginfo
->tc_segment_info_data
.sploop_ii
3325 = operands
[0].value
.exp
.X_add_number
;
3327 else if (opct
->flags
& TIC6X_FLAG_SPKERNEL
)
3329 if (!seginfo
->tc_segment_info_data
.sploop_ii
)
3330 as_bad (_("'%.*s' instruction not in a software pipelined loop"),
3332 seginfo
->tc_segment_info_data
.sploop_ii
= 0;
3335 if (this_line_spmask
)
3337 if (seginfo
->tc_segment_info_data
.spmask_addr
== NULL
)
3338 as_bad (_("'||^' without previous SPMASK"));
3339 else if (func_unit_base
== tic6x_func_unit_nfu
)
3340 as_bad (_("cannot mask instruction using no functional unit"));
3343 unsigned int spmask_opcode
;
3344 unsigned int mask_bit
;
3347 = md_chars_to_number (seginfo
->tc_segment_info_data
.spmask_addr
,
3349 mask_bit
= tic6x_encode_spmask (func_unit_base
, func_unit_side
);
3351 if (spmask_opcode
& mask_bit
)
3352 as_bad (_("functional unit already masked"));
3353 spmask_opcode
|= mask_bit
;
3354 md_number_to_chars (seginfo
->tc_segment_info_data
.spmask_addr
,
3359 record_alignment (now_seg
, 5);
3360 md_number_to_chars (output
, opcode_value
, 4);
3362 tic6x_fix_new_exp (insn_frag
, output
- insn_frag
->fr_literal
, 4, fix_exp
,
3363 fix_pcrel
, fx_r_type
, fix_adda
);
3364 insn_frag
->fr_fix
+= 4;
3365 insn_frag
->fr_var
-= 4;
3366 seginfo
->tc_segment_info_data
.last_insn_lsb
3367 = (target_big_endian
? output
+ 3 : output
);
3368 if (opct
->flags
& TIC6X_FLAG_SPMASK
)
3369 seginfo
->tc_segment_info_data
.spmask_addr
= output
;
3372 /* Modify NEWVAL (32-bit) by inserting VALUE, shifted right by SHIFT
3373 and the least significant BITS bits taken, at position POS. */
3374 #define MODIFY_VALUE(NEWVAL, VALUE, SHIFT, POS, BITS) \
3376 (NEWVAL) &= 0xffffffffU & ~(((1U << (BITS)) - 1) << (POS)); \
3377 (NEWVAL) |= (((VALUE) >> (SHIFT)) & ((1U << (BITS)) - 1)) << (POS); \
3380 /* Apply a fixup to the object file. */
3383 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
3385 offsetT value
= *valP
;
3386 char *buf
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3388 value
= SEXT (value
);
3391 fixP
->fx_offset
= SEXT (fixP
->fx_offset
);
3393 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
3396 /* We do our own overflow checks. */
3397 fixP
->fx_no_overflow
= 1;
3399 switch (fixP
->fx_r_type
)
3401 case BFD_RELOC_NONE
:
3402 /* Force output to the object file. */
3407 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3408 md_number_to_chars (buf
, value
, 4);
3412 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3414 if (value
< -0x8000 || value
> 0xffff)
3415 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3416 _("value too large for 2-byte field"));
3417 md_number_to_chars (buf
, value
, 2);
3422 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3424 if (value
< -0x80 || value
> 0xff)
3425 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3426 _("value too large for 1-byte field"));
3427 md_number_to_chars (buf
, value
, 1);
3431 case BFD_RELOC_C6000_ABS_S16
:
3432 case BFD_RELOC_C6000_ABS_L16
:
3433 case BFD_RELOC_C6000_SBR_S16
:
3434 case BFD_RELOC_C6000_SBR_L16_B
:
3435 case BFD_RELOC_C6000_SBR_L16_H
:
3436 case BFD_RELOC_C6000_SBR_L16_W
:
3437 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3438 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3440 offsetT newval
= md_chars_to_number (buf
, 4);
3443 switch (fixP
->fx_r_type
)
3445 case BFD_RELOC_C6000_SBR_L16_H
:
3449 case BFD_RELOC_C6000_SBR_L16_W
:
3450 case BFD_RELOC_C6000_SBR_GOT_L16_W
:
3459 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3460 if ((value
< -0x8000 || value
> 0x7fff)
3461 && (fixP
->fx_r_type
== BFD_RELOC_C6000_ABS_S16
3462 || fixP
->fx_r_type
== BFD_RELOC_C6000_SBR_S16
))
3463 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3464 _("immediate offset out of range"));
3466 md_number_to_chars (buf
, newval
, 4);
3469 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_S16
3470 && fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_L16
)
3474 case BFD_RELOC_C6000_ABS_H16
:
3475 case BFD_RELOC_C6000_SBR_H16_B
:
3476 case BFD_RELOC_C6000_SBR_H16_H
:
3477 case BFD_RELOC_C6000_SBR_H16_W
:
3478 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3479 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3481 offsetT newval
= md_chars_to_number (buf
, 4);
3484 switch (fixP
->fx_r_type
)
3486 case BFD_RELOC_C6000_SBR_H16_H
:
3490 case BFD_RELOC_C6000_SBR_H16_W
:
3491 case BFD_RELOC_C6000_SBR_GOT_H16_W
:
3500 MODIFY_VALUE (newval
, value
, shift
, 7, 16);
3502 md_number_to_chars (buf
, newval
, 4);
3504 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_ABS_H16
)
3508 case BFD_RELOC_C6000_SBR_U15_B
:
3509 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3511 offsetT newval
= md_chars_to_number (buf
, 4);
3513 MODIFY_VALUE (newval
, value
, 0, 8, 15);
3514 if (value
< 0 || value
> 0x7fff)
3515 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3516 _("immediate offset out of range"));
3518 md_number_to_chars (buf
, newval
, 4);
3522 case BFD_RELOC_C6000_SBR_U15_H
:
3523 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3525 offsetT newval
= md_chars_to_number (buf
, 4);
3527 /* Constant ADDA operands, processed as constant when the
3528 instruction is parsed, are encoded as-is rather than
3529 shifted. If the operand of an ADDA instruction is now
3530 constant (for example, the difference between two labels
3531 found after the instruction), ensure it is encoded the
3532 same way it would have been if the constant value had
3533 been known when the instruction was parsed. */
3534 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3537 MODIFY_VALUE (newval
, value
, 1, 8, 15);
3539 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3540 _("immediate offset not 2-byte-aligned"));
3541 if (value
< 0 || value
> 0xfffe)
3542 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3543 _("immediate offset out of range"));
3545 md_number_to_chars (buf
, newval
, 4);
3549 case BFD_RELOC_C6000_SBR_U15_W
:
3550 case BFD_RELOC_C6000_SBR_GOT_U15_W
:
3551 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3553 offsetT newval
= md_chars_to_number (buf
, 4);
3555 /* Constant ADDA operands, processed as constant when the
3556 instruction is parsed, are encoded as-is rather than
3557 shifted. If the operand of an ADDA instruction is now
3558 constant (for example, the difference between two labels
3559 found after the instruction), ensure it is encoded the
3560 same way it would have been if the constant value had
3561 been known when the instruction was parsed. */
3562 if (fixP
->tc_fix_data
.fix_adda
&& fixP
->fx_done
)
3565 MODIFY_VALUE (newval
, value
, 2, 8, 15);
3567 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3568 _("immediate offset not 4-byte-aligned"));
3569 if (value
< 0 || value
> 0x1fffc)
3570 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3571 _("immediate offset out of range"));
3573 md_number_to_chars (buf
, newval
, 4);
3575 if (fixP
->fx_done
&& fixP
->fx_r_type
!= BFD_RELOC_C6000_SBR_U15_W
)
3579 case BFD_RELOC_C6000_DSBT_INDEX
:
3581 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3582 _("addend used with $DSBT_INDEX"));
3587 case BFD_RELOC_C6000_PCR_S21
:
3588 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3590 offsetT newval
= md_chars_to_number (buf
, 4);
3592 MODIFY_VALUE (newval
, value
, 2, 7, 21);
3595 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3596 _("PC-relative offset not 4-byte-aligned"));
3597 if (value
< -0x400000 || value
> 0x3ffffc)
3598 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3599 _("PC-relative offset out of range"));
3601 md_number_to_chars (buf
, newval
, 4);
3605 case BFD_RELOC_C6000_PCR_S12
:
3606 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3608 offsetT newval
= md_chars_to_number (buf
, 4);
3610 MODIFY_VALUE (newval
, value
, 2, 16, 12);
3613 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3614 _("PC-relative offset not 4-byte-aligned"));
3615 if (value
< -0x2000 || value
> 0x1ffc)
3616 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3617 _("PC-relative offset out of range"));
3619 md_number_to_chars (buf
, newval
, 4);
3623 case BFD_RELOC_C6000_PCR_S10
:
3624 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3626 offsetT newval
= md_chars_to_number (buf
, 4);
3628 MODIFY_VALUE (newval
, value
, 2, 13, 10);
3631 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3632 _("PC-relative offset not 4-byte-aligned"));
3633 if (value
< -0x800 || value
> 0x7fc)
3634 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3635 _("PC-relative offset out of range"));
3637 md_number_to_chars (buf
, newval
, 4);
3641 case BFD_RELOC_C6000_PCR_S7
:
3642 if (fixP
->fx_done
|| !seg
->use_rela_p
)
3644 offsetT newval
= md_chars_to_number (buf
, 4);
3646 MODIFY_VALUE (newval
, value
, 2, 16, 7);
3649 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3650 _("PC-relative offset not 4-byte-aligned"));
3651 if (value
< -0x100 || value
> 0xfc)
3652 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
3653 _("PC-relative offset out of range"));
3655 md_number_to_chars (buf
, newval
, 4);
3664 /* Convert a floating-point number to target (IEEE) format. */
3667 md_atof (int type
, char *litP
, int *sizeP
)
3669 return ieee_md_atof (type
, litP
, sizeP
, target_big_endian
);
3672 /* Adjust the frags in SECTION (see tic6x_end). */
3675 tic6x_adjust_section (bfd
*abfd ATTRIBUTE_UNUSED
, segT section
,
3676 void *dummy ATTRIBUTE_UNUSED
)
3678 segment_info_type
*info
;
3681 bfd_boolean have_code
= FALSE
;
3682 bfd_boolean have_non_code
= FALSE
;
3684 info
= seg_info (section
);
3688 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3689 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3690 switch (fragp
->fr_type
)
3692 case rs_machine_dependent
:
3693 if (fragp
->tc_frag_data
.is_insns
)
3699 if (fragp
->fr_fix
> 0)
3700 have_non_code
= TRUE
;
3704 have_non_code
= TRUE
;
3708 /* Process alignment requirements in a code-only section. */
3709 if (have_code
&& !have_non_code
)
3711 /* If we need to insert an odd number of instructions to meet an
3712 alignment requirement, there must have been an odd number of
3713 instructions since the last 8-byte-aligned execute packet
3714 boundary. So there must have been an execute packet with an
3715 odd number (and so a number fewer than 8) of instructions
3716 into which we can insert a NOP without breaking any previous
3719 If then we need to insert a number 2 mod 4 of instructions,
3720 the number of instructions since the last 16-byte-aligned
3721 execute packet boundary must be 2 mod 4. So between that
3722 boundary and the following 8-byte-aligned boundary there must
3723 either be at least one execute packet with 2-mod-4
3724 instructions, or at least two with an odd number of
3725 instructions; again, greedily inserting NOPs as soon as
3726 possible suffices to meet the alignment requirement.
3728 If then we need to insert 4 instructions, we look between the
3729 last 32-byte-aligned boundary and the following
3730 16-byte-aligned boundary. The sizes of the execute packets
3731 in this range total 4 instructions mod 8, so again there is
3732 room for greedy insertion of NOPs to meet the alignment
3733 requirement, and before any intermediate point with 8-byte
3734 (2-instruction) alignment requirement the sizes of execute
3735 packets (and so the room for NOPs) will total 2 instructions
3736 mod 4 so greedy insertion will not break such alignments.
3738 So we can always meet these alignment requirements by
3739 inserting NOPs in parallel with existing execute packets, and
3740 by induction the approach described above inserts the minimum
3741 number of such NOPs. */
3743 /* The number of NOPs we are currently looking to insert, if we
3744 have gone back to insert NOPs. */
3745 unsigned int want_insert
= 0;
3747 /* Out of that number, the number inserted so far in the current
3748 stage of the above algorithm. */
3749 unsigned int want_insert_done_so_far
= 0;
3751 /* The position mod 32 at the start of the current frag. */
3752 unsigned int pos
= 0;
3754 /* The locations in the frag chain of the most recent frags at
3755 the start of which there is the given alignment. */
3756 frchainS
*frchp_last32
, *frchp_last16
, *frchp_last8
;
3757 fragS
*fragp_last32
, *fragp_last16
, *fragp_last8
;
3758 unsigned int pos_last32
, pos_last16
, pos_last8
;
3760 frchp_last32
= frchp_last16
= frchp_last8
= info
->frchainP
;
3761 fragp_last32
= fragp_last16
= fragp_last8
= info
->frchainP
->frch_root
;
3762 pos_last32
= pos_last16
= pos_last8
= 0;
3764 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3765 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3768 bfd_boolean go_back
= FALSE
;
3769 frchainS
*frchp_next
;
3772 if (fragp
->fr_type
!= rs_machine_dependent
)
3775 if (fragp
->tc_frag_data
.is_insns
3776 && pos
+ fragp
->fr_fix
> 32
3777 && !fragp
->tc_frag_data
.can_cross_fp_boundary
)
3779 /* As described above, we should always have met an
3780 alignment requirement by the time we come back to
3787 want_insert
= (32 - pos
) >> 2;
3788 if (want_insert
> 7)
3790 want_insert_done_so_far
= 0;
3794 if (!fragp
->tc_frag_data
.is_insns
)
3796 unsigned int would_insert_bytes
;
3798 if (!(pos
& ((1 << fragp
->fr_offset
) - 1)))
3799 /* This alignment requirement is already met. */
3802 /* As described above, we should always have met an
3803 alignment requirement by the time we come back to
3808 /* We may not be able to meet this requirement within
3809 the given number of characters. */
3811 = ((1 << fragp
->fr_offset
)
3812 - (pos
& ((1 << fragp
->fr_offset
) - 1)));
3814 if (fragp
->fr_subtype
!= 0
3815 && would_insert_bytes
> fragp
->fr_subtype
)
3818 /* An unmet alignment must be 8, 16 or 32 bytes;
3819 smaller ones must always be met within code-only
3820 sections and larger ones cause the section not to
3822 if (fragp
->fr_offset
!= 3
3823 && fragp
->fr_offset
!= 4
3824 && fragp
->fr_offset
!= 5)
3827 if (would_insert_bytes
& 3)
3829 want_insert
= would_insert_bytes
>> 2;
3830 if (want_insert
> 7)
3832 want_insert_done_so_far
= 0;
3835 else if (want_insert
&& !go_back
)
3837 unsigned int num_insns
= fragp
->fr_fix
>> 2;
3838 unsigned int max_poss_nops
= 8 - num_insns
;
3842 unsigned int cur_want_nops
, max_want_nops
, do_nops
, i
;
3844 if (want_insert
& 1)
3846 else if (want_insert
& 2)
3848 else if (want_insert
& 4)
3853 max_want_nops
= cur_want_nops
- want_insert_done_so_far
;
3855 do_nops
= (max_poss_nops
< max_want_nops
3858 for (i
= 0; i
< do_nops
; i
++)
3860 md_number_to_chars (fragp
->fr_literal
+ fragp
->fr_fix
,
3862 if (target_big_endian
)
3863 fragp
->fr_literal
[fragp
->fr_fix
- 1] |= 0x1;
3865 fragp
->fr_literal
[fragp
->fr_fix
- 4] |= 0x1;
3869 want_insert_done_so_far
+= do_nops
;
3870 if (want_insert_done_so_far
== cur_want_nops
)
3872 want_insert
-= want_insert_done_so_far
;
3873 want_insert_done_so_far
= 0;
3881 if (want_insert
& 1)
3883 frchp
= frchp_last8
;
3884 fragp
= fragp_last8
;
3887 else if (want_insert
& 2)
3889 frchp
= frchp_last8
= frchp_last16
;
3890 fragp
= fragp_last8
= fragp_last16
;
3891 pos
= pos_last8
= pos_last16
;
3893 else if (want_insert
& 4)
3895 frchp
= frchp_last8
= frchp_last16
= frchp_last32
;
3896 fragp
= fragp_last8
= fragp_last16
= fragp_last32
;
3897 pos
= pos_last8
= pos_last16
= pos_last32
;
3905 /* Update current position for moving past a code
3907 pos
+= fragp
->fr_fix
;
3910 fragp_next
= fragp
->fr_next
;
3911 if (fragp_next
== NULL
)
3913 frchp_next
= frchp
->frch_next
;
3914 if (frchp_next
!= NULL
)
3915 fragp_next
= frchp_next
->frch_root
;
3919 frchp_last8
= frchp_next
;
3920 fragp_last8
= fragp_next
;
3925 frchp_last16
= frchp_next
;
3926 fragp_last16
= fragp_next
;
3931 frchp_last32
= frchp_next
;
3932 fragp_last32
= fragp_next
;
3938 /* Now convert the machine-dependent frags to machine-independent
3940 for (frchp
= info
->frchainP
; frchp
; frchp
= frchp
->frch_next
)
3941 for (fragp
= frchp
->frch_root
; fragp
; fragp
= fragp
->fr_next
)
3943 if (fragp
->fr_type
== rs_machine_dependent
)
3945 if (fragp
->tc_frag_data
.is_insns
)
3949 fragp
->fr_type
= rs_align_code
;
3951 *fragp
->fr_literal
= 0;
3957 /* Initialize the machine-dependent parts of a frag. */
3960 tic6x_frag_init (fragS
*fragp
)
3962 fragp
->tc_frag_data
.is_insns
= FALSE
;
3963 fragp
->tc_frag_data
.can_cross_fp_boundary
= FALSE
;
3966 /* Set an attribute if it has not already been set by the user. */
3969 tic6x_set_attribute_int (int tag
, int value
)
3972 || tag
>= NUM_KNOWN_OBJ_ATTRIBUTES
)
3974 if (!tic6x_attributes_set_explicitly
[tag
])
3975 bfd_elf_add_proc_attr_int (stdoutput
, tag
, value
);
3978 /* Set object attributes deduced from the input file and command line
3979 rather than given explicitly. */
3981 tic6x_set_attributes (void)
3983 if (tic6x_arch_attribute
== C6XABI_Tag_ISA_none
)
3984 tic6x_arch_attribute
= C6XABI_Tag_ISA_C674X
;
3986 tic6x_set_attribute_int (Tag_ISA
, tic6x_arch_attribute
);
3987 tic6x_set_attribute_int (Tag_ABI_DSBT
, tic6x_dsbt
);
3988 tic6x_set_attribute_int (Tag_ABI_PID
, tic6x_pid
);
3989 tic6x_set_attribute_int (Tag_ABI_PIC
, tic6x_pic
);
3992 /* Do machine-dependent manipulations of the frag chains after all
3993 input has been read and before the machine-independent sizing and
3999 /* Set object attributes at this point if not explicitly set. */
4000 tic6x_set_attributes ();
4002 /* Meeting alignment requirements may require inserting NOPs in
4003 parallel in execute packets earlier in the segment. Future
4004 16-bit instruction generation involves whole-segment optimization
4005 to determine the best choice and ordering of 32-bit or 16-bit
4006 instructions. This doesn't fit will in the general relaxation
4007 framework, so handle alignment and 16-bit instruction generation
4009 bfd_map_over_sections (stdoutput
, tic6x_adjust_section
, NULL
);
4012 /* No machine-dependent frags at this stage; all converted in
4016 md_convert_frag (bfd
*abfd ATTRIBUTE_UNUSED
, segT asec ATTRIBUTE_UNUSED
,
4017 fragS
*fragp ATTRIBUTE_UNUSED
)
4022 /* No machine-dependent frags at this stage; all converted in
4026 md_estimate_size_before_relax (fragS
*fragp ATTRIBUTE_UNUSED
,
4027 segT seg ATTRIBUTE_UNUSED
)
4032 /* Put a number into target byte order. */
4035 md_number_to_chars (char *buf
, valueT val
, int n
)
4037 if (target_big_endian
)
4038 number_to_chars_bigendian (buf
, val
, n
);
4040 number_to_chars_littleendian (buf
, val
, n
);
4043 /* Machine-dependent operand parsing not currently needed. */
4046 md_operand (expressionS
*op ATTRIBUTE_UNUSED
)
4050 /* PC-relative operands are relative to the start of the fetch
4054 tic6x_pcrel_from_section (fixS
*fixp
, segT sec
)
4056 if (fixp
->fx_addsy
!= NULL
4057 && (!S_IS_DEFINED (fixp
->fx_addsy
)
4058 || S_GET_SEGMENT (fixp
->fx_addsy
) != sec
))
4060 return (fixp
->fx_where
+ fixp
->fx_frag
->fr_address
) & ~(long) 0x1f;
4063 /* Round up a section size to the appropriate boundary. */
4066 md_section_align (segT segment ATTRIBUTE_UNUSED
,
4069 /* Round up section sizes to ensure that text sections consist of
4070 whole fetch packets. */
4071 int align
= bfd_get_section_alignment (stdoutput
, segment
);
4072 return ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4075 /* No special undefined symbol handling needed for now. */
4078 md_undefined_symbol (char *name ATTRIBUTE_UNUSED
)
4083 /* Translate internal representation of relocation info to BFD target
4087 tc_gen_reloc (asection
*section ATTRIBUTE_UNUSED
, fixS
*fixp
)
4090 bfd_reloc_code_real_type r_type
;
4092 reloc
= xmalloc (sizeof (arelent
));
4093 reloc
->sym_ptr_ptr
= xmalloc (sizeof (asymbol
*));
4094 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4095 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4096 reloc
->addend
= (tic6x_generate_rela
? fixp
->fx_offset
: 0);
4097 r_type
= fixp
->fx_r_type
;
4098 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, r_type
);
4100 if (reloc
->howto
== NULL
)
4102 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4103 _("Cannot represent relocation type %s"),
4104 bfd_get_reloc_code_name (r_type
));
4108 /* Correct for adjustments bfd_install_relocation will make. */
4109 if (reloc
->howto
->pcrel_offset
&& reloc
->howto
->partial_inplace
)
4110 reloc
->addend
+= reloc
->address
;