1 /* Instruction opcode table for ip2k.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2005 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
29 #include "ip2k-desc.h"
31 #include "libiberty.h"
35 #include "safe-ctype.h"
37 /* A better hash function for instruction mnemonics. */
39 ip2k_asm_hash (const char* insn
)
44 for (hash
= 0; *m
&& ! ISSPACE (*m
); m
++)
45 hash
= (hash
* 23) ^ (0x1F & TOLOWER (*m
));
47 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
49 return hash
% CGEN_ASM_HASH_SIZE
;
53 /* Special check to ensure that instruction exists for given machine. */
56 ip2k_cgen_insn_supported (CGEN_CPU_DESC cd
, const CGEN_INSN
*insn
)
58 int machs
= CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_MACH
);
60 /* No mach attribute? Assume it's supported for all machs. */
64 return (machs
& cd
->machs
) != 0;
69 /* The hash functions are recorded here to help keep assembler code out of
70 the disassembler and vice versa. */
72 static int asm_hash_insn_p (const CGEN_INSN
*);
73 static unsigned int asm_hash_insn (const char *);
74 static int dis_hash_insn_p (const CGEN_INSN
*);
75 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
77 /* Instruction formats. */
79 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
82 #define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
84 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
88 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED
= {
89 16, 16, 0xe000, { { F (F_OP3
) }, { F (F_ADDR16CJP
) }, { 0 } }
92 static const CGEN_IFMT ifmt_sb ATTRIBUTE_UNUSED
= {
93 16, 16, 0xf000, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
96 static const CGEN_IFMT ifmt_xorw_l ATTRIBUTE_UNUSED
= {
97 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
100 static const CGEN_IFMT ifmt_loadl_a ATTRIBUTE_UNUSED
= {
101 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
104 static const CGEN_IFMT ifmt_loadh_a ATTRIBUTE_UNUSED
= {
105 16, 16, 0xff00, { { F (F_OP4
) }, { F (F_OP4MID
) }, { F (F_IMM8
) }, { 0 } }
108 static const CGEN_IFMT ifmt_addcfr_w ATTRIBUTE_UNUSED
= {
109 16, 16, 0xfe00, { { F (F_OP6
) }, { F (F_DIR
) }, { F (F_REG
) }, { 0 } }
112 static const CGEN_IFMT ifmt_speed ATTRIBUTE_UNUSED
= {
113 16, 16, 0xff00, { { F (F_OP8
) }, { F (F_IMM8
) }, { 0 } }
116 static const CGEN_IFMT ifmt_ireadi ATTRIBUTE_UNUSED
= {
117 16, 16, 0xffff, { { F (F_OP6
) }, { F (F_OP6_10LOW
) }, { 0 } }
120 static const CGEN_IFMT ifmt_page ATTRIBUTE_UNUSED
= {
121 16, 16, 0xfff8, { { F (F_OP6
) }, { F (F_OP6_7LOW
) }, { F (F_PAGE3
) }, { 0 } }
124 static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED
= {
125 16, 16, 0xfff8, { { F (F_OP6
) }, { F (F_OP6_7LOW
) }, { F (F_RETI3
) }, { 0 } }
130 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
131 #define A(a) (1 << CGEN_INSN_##a)
133 #define A(a) (1 << CGEN_INSN_/**/a)
135 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
136 #define OPERAND(op) IP2K_OPERAND_##op
138 #define OPERAND(op) IP2K_OPERAND_/**/op
140 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
141 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
143 /* The instruction table. */
145 static const CGEN_OPCODE ip2k_cgen_insn_opcode_table
[MAX_INSNS
] =
147 /* Special null first entry.
148 A `num' value of zero is thus invalid.
149 Also, the special `invalid' insn resides here. */
150 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
154 { { MNEM
, ' ', OP (ADDR16CJP
), 0 } },
155 & ifmt_jmp
, { 0xe000 }
157 /* call $addr16cjp */
160 { { MNEM
, ' ', OP (ADDR16CJP
), 0 } },
161 & ifmt_jmp
, { 0xc000 }
166 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
167 & ifmt_sb
, { 0xb000 }
172 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
173 & ifmt_sb
, { 0xa000 }
175 /* setb $fr,$bitno */
178 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
179 & ifmt_sb
, { 0x9000 }
181 /* clrb $fr,$bitno */
184 { { MNEM
, ' ', OP (FR
), ',', OP (BITNO
), 0 } },
185 & ifmt_sb
, { 0x8000 }
190 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
191 & ifmt_xorw_l
, { 0x7f00 }
196 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
197 & ifmt_xorw_l
, { 0x7e00 }
202 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
203 & ifmt_xorw_l
, { 0x7d00 }
208 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
209 & ifmt_xorw_l
, { 0x7b00 }
214 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
215 & ifmt_xorw_l
, { 0x7a00 }
220 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
221 & ifmt_xorw_l
, { 0x7900 }
226 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
227 & ifmt_xorw_l
, { 0x7800 }
232 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
233 & ifmt_xorw_l
, { 0x7700 }
238 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
239 & ifmt_xorw_l
, { 0x7600 }
244 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
245 & ifmt_xorw_l
, { 0x7400 }
250 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
251 & ifmt_xorw_l
, { 0x7300 }
256 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
257 & ifmt_xorw_l
, { 0x7200 }
262 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
263 & ifmt_xorw_l
, { 0x7100 }
268 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
269 & ifmt_xorw_l
, { 0x7000 }
274 { { MNEM
, ' ', OP (ADDR16L
), 0 } },
275 & ifmt_loadl_a
, { 0x7100 }
280 { { MNEM
, ' ', OP (ADDR16H
), 0 } },
281 & ifmt_loadh_a
, { 0x7000 }
286 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
287 & ifmt_addcfr_w
, { 0x5e00 }
292 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
293 & ifmt_addcfr_w
, { 0x5c00 }
298 { { MNEM
, ' ', OP (FR
), 0 } },
299 & ifmt_addcfr_w
, { 0x5a00 }
304 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
305 & ifmt_addcfr_w
, { 0x5800 }
310 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
311 & ifmt_addcfr_w
, { 0x5400 }
316 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
317 & ifmt_addcfr_w
, { 0x5000 }
322 { { MNEM
, ' ', OP (FR
), 0 } },
323 & ifmt_addcfr_w
, { 0x4e00 }
328 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
329 & ifmt_addcfr_w
, { 0x4c00 }
334 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
335 & ifmt_addcfr_w
, { 0x4800 }
340 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
341 & ifmt_addcfr_w
, { 0x4a00 }
346 { { MNEM
, ' ', OP (FR
), 0 } },
347 & ifmt_addcfr_w
, { 0x4600 }
352 { { MNEM
, ' ', OP (FR
), 0 } },
353 & ifmt_addcfr_w
, { 0x4400 }
358 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
359 & ifmt_addcfr_w
, { 0x4200 }
364 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
365 & ifmt_addcfr_w
, { 0x4000 }
370 { { MNEM
, ' ', OP (FR
), 0 } },
371 & ifmt_addcfr_w
, { 0x3e00 }
376 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
377 & ifmt_addcfr_w
, { 0x3c00 }
382 { { MNEM
, ' ', OP (FR
), 0 } },
383 & ifmt_addcfr_w
, { 0x3a00 }
388 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
389 & ifmt_addcfr_w
, { 0x3800 }
394 { { MNEM
, ' ', OP (FR
), 0 } },
395 & ifmt_addcfr_w
, { 0x3600 }
400 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
401 & ifmt_addcfr_w
, { 0x3400 }
406 { { MNEM
, ' ', OP (FR
), 0 } },
407 & ifmt_addcfr_w
, { 0x3200 }
412 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
413 & ifmt_addcfr_w
, { 0x3000 }
418 { { MNEM
, ' ', OP (FR
), 0 } },
419 & ifmt_addcfr_w
, { 0x2e00 }
424 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
425 & ifmt_addcfr_w
, { 0x2c00 }
430 { { MNEM
, ' ', OP (FR
), 0 } },
431 & ifmt_addcfr_w
, { 0x2a00 }
436 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
437 & ifmt_addcfr_w
, { 0x2800 }
442 { { MNEM
, ' ', OP (FR
), 0 } },
443 & ifmt_addcfr_w
, { 0x2600 }
448 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
449 & ifmt_addcfr_w
, { 0x2400 }
454 { { MNEM
, ' ', OP (FR
), 0 } },
455 & ifmt_addcfr_w
, { 0x2200 }
460 { { MNEM
, ' ', 'W', ',', '#', OP (LIT8
), 0 } },
461 & ifmt_xorw_l
, { 0x7c00 }
466 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
467 & ifmt_addcfr_w
, { 0x200 }
472 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
473 & ifmt_addcfr_w
, { 0x2000 }
478 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
479 & ifmt_addcfr_w
, { 0x1e00 }
484 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
485 & ifmt_addcfr_w
, { 0x1c00 }
490 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
491 & ifmt_addcfr_w
, { 0x1a00 }
496 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
497 & ifmt_addcfr_w
, { 0x1800 }
502 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
503 & ifmt_addcfr_w
, { 0x1600 }
508 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
509 & ifmt_addcfr_w
, { 0x1400 }
514 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
515 & ifmt_addcfr_w
, { 0x1200 }
520 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
521 & ifmt_addcfr_w
, { 0x1000 }
526 { { MNEM
, ' ', OP (FR
), 0 } },
527 & ifmt_addcfr_w
, { 0xe00 }
532 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
533 & ifmt_addcfr_w
, { 0xc00 }
538 { { MNEM
, ' ', OP (FR
), ',', 'W', 0 } },
539 & ifmt_addcfr_w
, { 0xa00 }
544 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
545 & ifmt_addcfr_w
, { 0x800 }
550 { { MNEM
, ' ', OP (FR
), 0 } },
551 & ifmt_addcfr_w
, { 0x600 }
556 { { MNEM
, ' ', 'W', ',', OP (FR
), 0 } },
557 & ifmt_addcfr_w
, { 0x400 }
562 { { MNEM
, ' ', '#', OP (LIT8
), 0 } },
563 & ifmt_speed
, { 0x100 }
569 & ifmt_ireadi
, { 0x1d }
575 & ifmt_ireadi
, { 0x1c }
581 & ifmt_ireadi
, { 0x1b }
587 & ifmt_ireadi
, { 0x1a }
593 & ifmt_ireadi
, { 0x19 }
599 & ifmt_ireadi
, { 0x18 }
604 { { MNEM
, ' ', OP (ADDR16P
), 0 } },
605 & ifmt_page
, { 0x10 }
611 & ifmt_ireadi
, { 0xff }
616 { { MNEM
, ' ', '#', OP (RETI3
), 0 } },
623 & ifmt_ireadi
, { 0x7 }
629 & ifmt_ireadi
, { 0x6 }
635 & ifmt_ireadi
, { 0x5 }
641 & ifmt_ireadi
, { 0x4 }
647 & ifmt_ireadi
, { 0x3 }
653 & ifmt_ireadi
, { 0x2 }
659 & ifmt_ireadi
, { 0x1 }
665 & ifmt_ireadi
, { 0x0 }
674 /* Formats for ALIAS macro-insns. */
676 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
677 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
679 #define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
681 static const CGEN_IFMT ifmt_sc ATTRIBUTE_UNUSED
= {
682 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
685 static const CGEN_IFMT ifmt_snc ATTRIBUTE_UNUSED
= {
686 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
689 static const CGEN_IFMT ifmt_sz ATTRIBUTE_UNUSED
= {
690 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
693 static const CGEN_IFMT ifmt_snz ATTRIBUTE_UNUSED
= {
694 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
697 static const CGEN_IFMT ifmt_skip ATTRIBUTE_UNUSED
= {
698 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
701 static const CGEN_IFMT ifmt_skipb ATTRIBUTE_UNUSED
= {
702 16, 16, 0xffff, { { F (F_OP4
) }, { F (F_BITNO
) }, { F (F_REG
) }, { 0 } }
707 /* Each non-simple macro entry points to an array of expansion possibilities. */
709 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
710 #define A(a) (1 << CGEN_INSN_##a)
712 #define A(a) (1 << CGEN_INSN_/**/a)
714 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
715 #define OPERAND(op) IP2K_OPERAND_##op
717 #define OPERAND(op) IP2K_OPERAND_/**/op
719 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
720 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
722 /* The macro instruction table. */
724 static const CGEN_IBASE ip2k_cgen_macro_insn_table
[] =
729 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
733 -1, "snc", "snc", 16,
734 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
739 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
743 -1, "snz", "snz", 16,
744 { 0|A(ALIAS
), { (1<<MACH_BASE
) } }
748 -1, "skip", "skip", 16,
749 { 0|A(SKIPA
)|A(ALIAS
), { (1<<MACH_BASE
) } }
753 -1, "skipb", "skip", 16,
754 { 0|A(SKIPA
)|A(ALIAS
), { (1<<MACH_BASE
) } }
758 /* The macro instruction opcode table. */
760 static const CGEN_OPCODE ip2k_cgen_macro_insn_opcode_table
[] =
766 & ifmt_sc
, { 0xb00b }
772 & ifmt_snc
, { 0xa00b }
778 & ifmt_sz
, { 0xb40b }
784 & ifmt_snz
, { 0xa40b }
790 & ifmt_skip
, { 0xa009 }
796 & ifmt_skipb
, { 0xb009 }
805 #ifndef CGEN_ASM_HASH_P
806 #define CGEN_ASM_HASH_P(insn) 1
809 #ifndef CGEN_DIS_HASH_P
810 #define CGEN_DIS_HASH_P(insn) 1
813 /* Return non-zero if INSN is to be added to the hash table.
814 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
817 asm_hash_insn_p (insn
)
818 const CGEN_INSN
*insn ATTRIBUTE_UNUSED
;
820 return CGEN_ASM_HASH_P (insn
);
824 dis_hash_insn_p (insn
)
825 const CGEN_INSN
*insn
;
827 /* If building the hash table and the NO-DIS attribute is present,
829 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
831 return CGEN_DIS_HASH_P (insn
);
834 #ifndef CGEN_ASM_HASH
835 #define CGEN_ASM_HASH_SIZE 127
836 #ifdef CGEN_MNEMONIC_OPERANDS
837 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
839 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
843 /* It doesn't make much sense to provide a default here,
844 but while this is under development we do.
845 BUFFER is a pointer to the bytes of the insn, target order.
846 VALUE is the first base_insn_bitsize bits as an int in host order. */
848 #ifndef CGEN_DIS_HASH
849 #define CGEN_DIS_HASH_SIZE 256
850 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
853 /* The result is the hash value of the insn.
854 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
860 return CGEN_ASM_HASH (mnem
);
863 /* BUF is a pointer to the bytes of the insn, target order.
864 VALUE is the first base_insn_bitsize bits as an int in host order. */
867 dis_hash_insn (buf
, value
)
868 const char * buf ATTRIBUTE_UNUSED
;
869 CGEN_INSN_INT value ATTRIBUTE_UNUSED
;
871 return CGEN_DIS_HASH (buf
, value
);
874 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
877 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
879 CGEN_FIELDS_BITSIZE (fields
) = size
;
882 /* Function to call before using the operand instance table.
883 This plugs the opcode entries and macro instructions into the cpu table. */
886 ip2k_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
889 int num_macros
= (sizeof (ip2k_cgen_macro_insn_table
) /
890 sizeof (ip2k_cgen_macro_insn_table
[0]));
891 const CGEN_IBASE
*ib
= & ip2k_cgen_macro_insn_table
[0];
892 const CGEN_OPCODE
*oc
= & ip2k_cgen_macro_insn_opcode_table
[0];
893 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
895 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
896 for (i
= 0; i
< num_macros
; ++i
)
898 insns
[i
].base
= &ib
[i
];
899 insns
[i
].opcode
= &oc
[i
];
900 ip2k_cgen_build_insn_regex (& insns
[i
]);
902 cd
->macro_insn_table
.init_entries
= insns
;
903 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
904 cd
->macro_insn_table
.num_init_entries
= num_macros
;
906 oc
= & ip2k_cgen_insn_opcode_table
[0];
907 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
908 for (i
= 0; i
< MAX_INSNS
; ++i
)
910 insns
[i
].opcode
= &oc
[i
];
911 ip2k_cgen_build_insn_regex (& insns
[i
]);
914 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
915 cd
->set_fields_bitsize
= set_fields_bitsize
;
917 cd
->asm_hash_p
= asm_hash_insn_p
;
918 cd
->asm_hash
= asm_hash_insn
;
919 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
921 cd
->dis_hash_p
= dis_hash_insn_p
;
922 cd
->dis_hash
= dis_hash_insn
;
923 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;