1 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
3 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
4 us4, us5 (respectively).
5 Remove unsupported 'popa' instruction.
6 Reverse operands order in store co-processor instructions.
8 2004-10-15 Alan Modra <amodra@bigpond.net.au>
10 * Makefile.am: Run "make dep-am"
11 * Makefile.in: Regenerate.
13 2004-10-12 Bob Wilson <bob.wilson@acm.org>
15 * xtensa-dis.c: Use ISO C90 formatting.
17 2004-10-09 Alan Modra <amodra@bigpond.net.au>
19 * ppc-opc.c: Revert 2004-09-09 change.
21 2004-10-07 Bob Wilson <bob.wilson@acm.org>
23 * xtensa-dis.c (state_names): Delete.
24 (fetch_data): Use xtensa_isa_maxlength.
25 (print_xtensa_operand): Replace operand parameter with opcode/operand
26 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
27 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
28 instruction bundles. Use xmalloc instead of malloc.
30 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
32 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
35 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
37 * crx-opc.c (crx_instruction): Support Co-processor insns.
38 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
39 (getregliststring): Change function to use the above enum.
40 (print_arg): Handle CO-Processor insns.
41 (crx_cinvs): Add 'b' option to invalidate the branch-target
44 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
46 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
47 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
48 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
49 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
50 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
52 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
54 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
57 2004-09-30 Paul Brook <paul@codesourcery.com>
59 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
60 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
62 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
64 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
65 (CONFIG_STATUS_DEPENDENCIES): New.
67 (config.status): Likewise.
68 * Makefile.in: Regenerated.
70 2004-09-17 Alan Modra <amodra@bigpond.net.au>
72 * Makefile.am: Run "make dep-am".
73 * Makefile.in: Regenerate.
74 * aclocal.m4: Regenerate.
75 * configure: Regenerate.
76 * po/POTFILES.in: Regenerate.
77 * po/opcodes.pot: Regenerate.
79 2004-09-11 Andreas Schwab <schwab@suse.de>
83 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
85 * ppc-opc.c (L): Make this field not optional.
87 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
89 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
90 Fix parameter to 'm[t|f]csr' insns.
92 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
94 * configure.in: Autoupdate to autoconf 2.59.
95 * aclocal.m4: Rebuild with aclocal 1.4p6.
96 * configure: Rebuild with autoconf 2.59.
97 * Makefile.in: Rebuild with automake 1.4p6 (picking up
98 bfd changes for autoconf 2.59 on the way).
99 * config.in: Rebuild with autoheader 2.59.
101 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
103 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
105 2004-07-30 Michal Ludvig <mludvig@suse.cz>
107 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
108 (GRPPADLCK2): New define.
109 (twobyte_has_modrm): True for 0xA6.
110 (grps): GRPPADLCK2 for opcode 0xA6.
112 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
114 Introduce SH2a support.
115 * sh-opc.h (arch_sh2a_base): Renumber.
116 (arch_sh2a_nofpu_base): Remove.
117 (arch_sh_base_mask): Adjust.
118 (arch_opann_mask): New.
119 (arch_sh2a, arch_sh2a_nofpu): Adjust.
120 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
121 (sh_table): Adjust whitespace.
122 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
123 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
124 instruction list throughout.
125 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
126 of arch_sh2a in instruction list throughout.
127 (arch_sh2e_up): Accomodate above changes.
128 (arch_sh2_up): Ditto.
129 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
130 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
131 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
132 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
133 * sh-opc.h (arch_sh2a_nofpu): New.
134 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
135 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
137 2004-01-20 DJ Delorie <dj@redhat.com>
138 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
139 2003-12-29 DJ Delorie <dj@redhat.com>
140 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
141 sh_opcode_info, sh_table): Add sh2a support.
142 (arch_op32): New, to tag 32-bit opcodes.
143 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
144 2003-12-02 Michael Snyder <msnyder@redhat.com>
145 * sh-opc.h (arch_sh2a): Add.
146 * sh-dis.c (arch_sh2a): Handle.
147 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
149 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
151 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
153 2004-07-22 Nick Clifton <nickc@redhat.com>
156 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
157 insns - this is done by objdump itself.
158 * h8500-dis.c (print_insn_h8500): Likewise.
160 2004-07-21 Jan Beulich <jbeulich@novell.com>
162 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
163 regardless of address size prefix in effect.
164 (ptr_reg): Size or address registers does not depend on rex64, but
165 on the presence of an address size override.
166 (OP_MMX): Use rex.x only for xmm registers.
167 (OP_EM): Use rex.z only for xmm registers.
169 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
171 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
172 move/branch operations to the bottom so that VR5400 multimedia
173 instructions take precedence in disassembly.
175 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
177 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
178 ISA-specific "break" encoding.
180 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
182 * arm-opc.h: Fix typo in comment.
184 2004-07-11 Andreas Schwab <schwab@suse.de>
186 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
188 2004-07-09 Andreas Schwab <schwab@suse.de>
190 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
192 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
194 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
195 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
196 (crx-dis.lo): New target.
197 (crx-opc.lo): Likewise.
198 * Makefile.in: Regenerate.
199 * configure.in: Handle bfd_crx_arch.
200 * configure: Regenerate.
201 * crx-dis.c: New file.
202 * crx-opc.c: New file.
203 * disassemble.c (ARCH_crx): Define.
204 (disassembler): Handle ARCH_crx.
206 2004-06-29 James E Wilson <wilson@specifixinc.com>
208 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
209 * ia64-asmtab.c: Regnerate.
211 2004-06-28 Alan Modra <amodra@bigpond.net.au>
213 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
214 (extract_fxm): Don't test dialect.
215 (XFXFXM_MASK): Include the power4 bit.
216 (XFXM): Add p4 param.
217 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
219 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
221 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
222 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
224 2004-06-26 Alan Modra <amodra@bigpond.net.au>
226 * ppc-opc.c (BH, XLBH_MASK): Define.
227 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
229 2004-06-24 Alan Modra <amodra@bigpond.net.au>
231 * i386-dis.c (x_mode): Comment.
232 (two_source_ops): File scope.
233 (float_mem): Correct fisttpll and fistpll.
234 (float_mem_mode): New table.
236 (OP_E): Correct intel mode PTR output.
237 (ptr_reg): Use open_char and close_char.
238 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
239 operands. Set two_source_ops.
241 2004-06-15 Alan Modra <amodra@bigpond.net.au>
243 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
244 instead of _raw_size.
246 2004-06-08 Jakub Jelinek <jakub@redhat.com>
248 * ia64-gen.c (in_iclass): Handle more postinc st
250 * ia64-asmtab.c: Rebuilt.
252 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
254 * s390-opc.txt: Correct architecture mask for some opcodes.
255 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
256 in the esa mode as well.
258 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
260 * sh-dis.c (target_arch): Make unsigned.
261 (print_insn_sh): Replace (most of) switch with a call to
262 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
263 * sh-opc.h: Redefine architecture flags values.
264 Add sh3-nommu architecture.
265 Reorganise <arch>_up macros so they make more visual sense.
266 (SH_MERGE_ARCH_SET): Define new macro.
267 (SH_VALID_BASE_ARCH_SET): Likewise.
268 (SH_VALID_MMU_ARCH_SET): Likewise.
269 (SH_VALID_CO_ARCH_SET): Likewise.
270 (SH_VALID_ARCH_SET): Likewise.
271 (SH_MERGE_ARCH_SET_VALID): Likewise.
272 (SH_ARCH_SET_HAS_FPU): Likewise.
273 (SH_ARCH_SET_HAS_DSP): Likewise.
274 (SH_ARCH_UNKNOWN_ARCH): Likewise.
275 (sh_get_arch_from_bfd_mach): Add prototype.
276 (sh_get_arch_up_from_bfd_mach): Likewise.
277 (sh_get_bfd_mach_from_arch_set): Likewise.
278 (sh_merge_bfd_arc): Likewise.
280 2004-05-24 Peter Barada <peter@the-baradas.com>
282 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
283 into new match_insn_m68k function. Loop over canidate
284 matches and select first that completely matches.
285 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
286 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
287 to verify addressing for MAC/EMAC.
288 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
289 reigster halves since 'fpu' and 'spl' look misleading.
290 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
291 * m68k-opc.c: Rearragne mac/emac cases to use longest for
292 first, tighten up match masks.
293 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
294 'size' from special case code in print_insn_m68k to
295 determine decode size of insns.
297 2004-05-19 Alan Modra <amodra@bigpond.net.au>
299 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
300 well as when -mpower4.
302 2004-05-13 Nick Clifton <nickc@redhat.com>
304 * po/fr.po: Updated French translation.
306 2004-05-05 Peter Barada <peter@the-baradas.com>
308 * m68k-dis.c(print_insn_m68k): Add new chips, use core
309 variants in arch_mask. Only set m68881/68851 for 68k chips.
310 * m68k-op.c: Switch from ColdFire chips to core variants.
312 2004-05-05 Alan Modra <amodra@bigpond.net.au>
315 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
317 2004-04-29 Ben Elliston <bje@au.ibm.com>
319 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
320 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
322 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
324 * sh-dis.c (print_insn_sh): Print the value in constant pool
325 as a symbol if it looks like a symbol.
327 2004-04-22 Peter Barada <peter@the-baradas.com>
329 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
330 appropriate ColdFire architectures.
331 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
333 Add EMAC instructions, fix MAC instructions. Remove
334 macmw/macml/msacmw/msacml instructions since mask addressing now
337 2004-04-20 Jakub Jelinek <jakub@redhat.com>
339 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
340 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
341 suffix. Use fmov*x macros, create all 3 fpsize variants in one
342 macro. Adjust all users.
344 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
346 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
349 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
351 * m32r-asm.c: Regenerate.
353 2004-03-29 Stan Shebs <shebs@apple.com>
355 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
358 2004-03-19 Alan Modra <amodra@bigpond.net.au>
360 * aclocal.m4: Regenerate.
361 * config.in: Regenerate.
362 * configure: Regenerate.
363 * po/POTFILES.in: Regenerate.
364 * po/opcodes.pot: Regenerate.
366 2004-03-16 Alan Modra <amodra@bigpond.net.au>
368 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
370 * ppc-opc.c (RA0): Define.
371 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
372 (RAOPT): Rename from RAO. Update all uses.
373 (powerpc_opcodes): Use RA0 as appropriate.
375 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
377 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
379 2004-03-15 Alan Modra <amodra@bigpond.net.au>
381 * sparc-dis.c (print_insn_sparc): Update getword prototype.
383 2004-03-12 Michal Ludvig <mludvig@suse.cz>
385 * i386-dis.c (GRPPLOCK): Delete.
386 (grps): Delete GRPPLOCK entry.
388 2004-03-12 Alan Modra <amodra@bigpond.net.au>
390 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
392 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
394 (dis386): Use NOP_Fixup on "nop".
395 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
396 (twobyte_has_modrm): Set for 0xa7.
397 (padlock_table): Delete. Move to..
398 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
400 (print_insn): Revert PADLOCK_SPECIAL code.
401 (OP_E): Delete sfence, lfence, mfence checks.
403 2004-03-12 Jakub Jelinek <jakub@redhat.com>
405 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
406 (INVLPG_Fixup): New function.
407 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
409 2004-03-12 Michal Ludvig <mludvig@suse.cz>
411 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
412 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
413 (padlock_table): New struct with PadLock instructions.
414 (print_insn): Handle PADLOCK_SPECIAL.
416 2004-03-12 Alan Modra <amodra@bigpond.net.au>
418 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
419 (OP_E): Twiddle clflush to sfence here.
421 2004-03-08 Nick Clifton <nickc@redhat.com>
423 * po/de.po: Updated German translation.
425 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
427 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
428 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
429 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
432 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
434 * frv-asm.c: Regenerate.
435 * frv-desc.c: Regenerate.
436 * frv-desc.h: Regenerate.
437 * frv-dis.c: Regenerate.
438 * frv-ibld.c: Regenerate.
439 * frv-opc.c: Regenerate.
440 * frv-opc.h: Regenerate.
442 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
444 * frv-desc.c, frv-opc.c: Regenerate.
446 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
448 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
450 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
452 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
453 Also correct mistake in the comment.
455 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
457 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
458 ensure that double registers have even numbers.
459 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
460 that reserved instruction 0xfffd does not decode the same
462 * sh-opc.h: Add REG_N_D nibble type and use it whereever
463 REG_N refers to a double register.
464 Add REG_N_B01 nibble type and use it instead of REG_NM
466 Adjust the bit patterns in a few comments.
468 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
470 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
472 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
474 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
476 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
478 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
480 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
482 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
483 mtivor32, mtivor33, mtivor34.
485 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
487 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
489 2004-02-10 Petko Manolov <petkan@nucleusys.com>
491 * arm-opc.h Maverick accumulator register opcode fixes.
493 2004-02-13 Ben Elliston <bje@wasabisystems.com>
495 * m32r-dis.c: Regenerate.
497 2004-01-27 Michael Snyder <msnyder@redhat.com>
499 * sh-opc.h (sh_table): "fsrra", not "fssra".
501 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
503 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
506 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
508 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
510 2004-01-19 Alan Modra <amodra@bigpond.net.au>
512 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
513 1. Don't print scale factor on AT&T mode when index missing.
515 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
517 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
518 when loaded into XR registers.
520 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
522 * frv-desc.h: Regenerate.
523 * frv-desc.c: Regenerate.
524 * frv-opc.c: Regenerate.
526 2004-01-13 Michael Snyder <msnyder@redhat.com>
528 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
530 2004-01-09 Paul Brook <paul@codesourcery.com>
532 * arm-opc.h (arm_opcodes): Move generic mcrr after known
535 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
537 * Makefile.am (libopcodes_la_DEPENDENCIES)
538 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
539 comment about the problem.
540 * Makefile.in: Regenerate.
542 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
544 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
545 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
546 cut&paste errors in shifting/truncating numerical operands.
547 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
548 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
549 (parse_uslo16): Likewise.
550 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
551 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
552 (parse_s12): Likewise.
553 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
554 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
555 (parse_uslo16): Likewise.
556 (parse_uhi16): Parse gothi and gotfuncdeschi.
557 (parse_d12): Parse got12 and gotfuncdesc12.
558 (parse_s12): Likewise.
560 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
562 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
563 instruction which looks similar to an 'rla' instruction.
565 For older changes see ChangeLog-0203
571 version-control: never