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2001-05-31 H.J. Lu <hjl@gnu.org>
[binutils.git] / include / opcode / hppa.h
blobf409ac94bb475eb0f74ee18ebcb5fa742e11f2e1
1 /* Table of opcodes for the PA-RISC.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
3 2001
4 Free Software Foundation, Inc.
5
6 Contributed by the Center for Software Science at the
7 University of Utah (pa-gdb-bugs@cs.utah.edu).
8
9 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
10
11 GAS/GDB is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 1, or (at your option)
14 any later version.
15
16 GAS/GDB is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with GAS or GDB; see the file COPYING. If not, write to
23 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25 #if !defined(__STDC__) && !defined(const)
26 #define const
27 #endif
28
29 /*
30 * Structure of an opcode table entry.
31 */
32
33 /* There are two kinds of delay slot nullification: normal which is
34 * controled by the nullification bit, and conditional, which depends
35 * on the direction of the branch and its success or failure.
36 *
37 * NONE is unfortunately #defined in the hiux system include files.
38 * #undef it away.
39 */
40 #undef NONE
41 struct pa_opcode
42 {
43 const char *name;
44 unsigned long int match; /* Bits that must be set... */
45 unsigned long int mask; /* ... in these bits. */
46 char *args;
47 enum pa_arch arch;
48 char flags;
49 };
50
51 /* Enable/disable strict syntax checking. Not currently used, but will
52 be necessary for PA2.0 support in the future. */
53 #define FLAG_STRICT 0x1
54
55 /*
56 All hppa opcodes are 32 bits.
57
58 The match component is a mask saying which bits must match a
59 particular opcode in order for an instruction to be an instance
60 of that opcode.
61
62 The args component is a string containing one character for each operand of
63 the instruction. Characters used as a prefix allow any second character to
64 be used without conflicting with the main operand characters.
65
66 Bit positions in this description follow HP usage of lsb = 31,
67 "at" is lsb of field.
68
69 In the args field, the following characters must match exactly:
70
71 '+,() '
72
73 In the args field, the following characters are unused:
74
75 ' " - / 34 6789:; '
76 '@ C M [\] '
77 '` e g } '
78
79 Here are all the characters:
80
81 ' !"#$%&'()*+-,./0123456789:;<=>?'
82 '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
83 '`abcdefghijklmnopqrstuvwxyz{|}~ '
84
85 Kinds of operands:
86 x integer register field at 15.
87 b integer register field at 10.
88 t integer register field at 31.
89 a integer register field at 10 and 15 (for PERMH)
90 5 5 bit immediate at 15.
91 s 2 bit space specifier at 17.
92 S 3 bit space specifier at 18.
93 V 5 bit immediate value at 31
94 i 11 bit immediate value at 31
95 j 14 bit immediate value at 31
96 k 21 bit immediate value at 31
97 l 16 bit immediate value at 31 (wide mode only, unusual encoding).
98 n nullification for branch instructions
99 N nullification for spop and copr instructions
100 w 12 bit branch displacement
101 W 17 bit branch displacement (PC relative)
102 X 22 bit branch displacement (PC relative)
103 z 17 bit branch displacement (just a number, not an address)
104
105 Also these:
106
107 . 2 bit shift amount at 25
108 * 4 bit shift amount at 25
109 p 5 bit shift count at 26 (to support the SHD instruction) encoded as
110 31-p
111 ~ 6 bit shift count at 20,22:26 encoded as 63-~.
112 P 5 bit bit position at 26
113 q 6 bit bit position at 20,22:26
114 T 5 bit field length at 31 (encoded as 32-T)
115 % 6 bit field length at 23,27:31 (variable extract/deposit)
116 | 6 bit field length at 19,27:31 (fixed extract/deposit)
117 A 13 bit immediate at 18 (to support the BREAK instruction)
118 ^ like b, but describes a control register
119 ! sar (cr11) register
120 D 26 bit immediate at 31 (to support the DIAG instruction)
121 $ 9 bit immediate at 28 (to support POPBTS)
122
123 v 3 bit Special Function Unit identifier at 25
124 O 20 bit Special Function Unit operation split between 15 bits at 20
125 and 5 bits at 31
126 o 15 bit Special Function Unit operation at 20
127 2 22 bit Special Function Unit operation split between 17 bits at 20
128 and 5 bits at 31
129 1 15 bit Special Function Unit operation split between 10 bits at 20
130 and 5 bits at 31
131 0 10 bit Special Function Unit operation split between 5 bits at 20
132 and 5 bits at 31
133 u 3 bit coprocessor unit identifier at 25
134 F Source Floating Point Operand Format Completer encoded 2 bits at 20
135 I Source Floating Point Operand Format Completer encoded 1 bits at 20
136 (for 0xe format FP instructions)
137 G Destination Floating Point Operand Format Completer encoded 2 bits at 18
138 H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
139 (very similar to 'F')
140
141 r 5 bit immediate value at 31 (for the break instruction)
142 (very similar to V above, except the value is unsigned instead of
143 low_sign_ext)
144 R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
145 (same as r above, except the value is in a different location)
146 U 10 bit immediate value at 15 (for SSM, RSM on pa2.0)
147 Q 5 bit immediate value at 10 (a bit position specified in
148 the bb instruction. It's the same as r above, except the
149 value is in a different location)
150 B 5 bit immediate value at 10 (a bit position specified in
151 the bb instruction. Similar to Q, but 64 bit handling is
152 different.
153 Z %r1 -- implicit target of addil instruction.
154 L ,%r2 completer for new syntax branch
155 { Source format completer for fcnv
156 _ Destination format completer for fcnv
157 h cbit for fcmp
158 = gfx tests for ftest
159 d 14 bit offset for single precision FP long load/store.
160 # 14 bit offset for double precision FP load long/store.
161 J Yet another 14 bit offset for load/store with ma,mb completers.
162 K Yet another 14 bit offset for load/store with ma,mb completers.
163 y 16 bit offset for word aligned load/store (PA2.0 wide).
164 & 16 bit offset for dword aligned load/store (PA2.0 wide).
165 < 16 bit offset for load/store with ma,mb completers (PA2.0 wide).
166 > 16 bit offset for load/store with ma,mb completers (PA2.0 wide).
167 Y %sr0,%r31 -- implicit target of be,l instruction.
168 @ implicit immediate value of 0
169
170 Completer operands all have 'c' as the prefix:
171
172 cx indexed load completer.
173 cm short load and store completer.
174 cq long load and store completer (like cm, but inserted into a
175 different location in the target instruction).
176 cs store bytes short completer.
177 ce long load/store completer for LDW/STW with a different encoding than the
178 others
179 cc load cache control hint
180 cd load and clear cache control hint
181 cC store cache control hint
182 co ordered access
183
184 cp branch link and push completer
185 cP branch pop completer
186 cl branch link completer
187 cg branch gate completer
188
189 cw read/write completer for PROBE
190 cW wide completer for MFCTL
191 cL local processor completer for cache control
192 cZ System Control Completer (to support LPA, LHA, etc.)
193
194 ci correction completer for DCOR
195 ca add completer
196 cy 32 bit add carry completer
197 cY 64 bit add carry completer
198 cv signed overflow trap completer
199 ct trap on condition completer for ADDI, SUB
200 cT trap on condition completer for UADDCM
201 cb 32 bit borrow completer for SUB
202 cB 64 bit borrow completer for SUB
203
204 ch left/right half completer
205 cH signed/unsigned saturation completer
206 cS signed/unsigned completer at 21
207 cz zero/sign extension completer.
208 c* permutation completer
209
210 Condition operands all have '?' as the prefix:
211
212 ?f Floating point compare conditions (encoded as 5 bits at 31)
213
214 ?a add conditions
215 ?A 64 bit add conditions
216 ?@ add branch conditions followed by nullify
217 ?d non-negated add branch conditions
218 ?D negated add branch conditions
219 ?w wide mode non-negated add branch conditions
220 ?W wide mode negated add branch conditions
221
222 ?s compare/subtract conditions
223 ?S 64 bit compare/subtract conditions
224 ?t non-negated compare and branch conditions
225 ?n 32 bit compare and branch conditions followed by nullify
226 ?N 64 bit compare and branch conditions followed by nullify
227 ?Q 64 bit compare and branch conditions for CMPIB instruction
228
229 ?l logical conditions
230 ?L 64 bit logical conditions
231
232 ?b branch on bit conditions
233 ?B 64 bit branch on bit conditions
234
235 ?x shift/extract/deposit conditions
236 ?X 64 bit shift/extract/deposit conditions
237 ?y shift/extract/deposit conditions followed by nullify for conditional
238 branches
239
240 ?u unit conditions
241 ?U 64 bit unit conditions
242
243 Floating point registers all have 'f' as a prefix:
244
245 ft target register at 31
246 fT target register with L/R halves at 31
247 fa operand 1 register at 10
248 fA operand 1 register with L/R halves at 10
249 fX Same as fA, except prints a space before register during disasm
250 fb operand 2 register at 15
251 fB operand 2 register with L/R halves at 15
252 fC operand 3 register with L/R halves at 16:18,21:23
253 fe Like fT, but encoding is different.
254 fE Same as fe, except prints a space before register during disasm.
255 fx target register at 15 (only for PA 2.0 long format FLDD/FSTD).
256
257 Float registers for fmpyadd and fmpysub:
258
259 fi mult operand 1 register at 10
260 fj mult operand 2 register at 15
261 fk mult target register at 20
262 fl add/sub operand register at 25
263 fm add/sub target register at 31
264
265 */
266
267
268 /* List of characters not to put a space after. Note that
269 "," is included, as the "spopN" operations use literal
270 commas in their completer sections. */
271 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
272
273 /* The order of the opcodes in this table is significant:
274
275 * The assembler requires that all instances of the same mnemonic must be
276 consecutive. If they aren't, the assembler will bomb at runtime.
277
278 * The disassembler should not care about the order of the opcodes. */
279
280 static const struct pa_opcode pa_opcodes[] =
281 {
282
283 /* Pseudo-instructions. */
284
285 { "ldi", 0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */
286 { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
287
288 { "call", 0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
289 { "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
290 { "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
291
292 { "cmpib", 0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
293 { "cmpib", 0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
294 { "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
295 /* This entry is for the disassembler only. It will never be used by
296 assembler. */
297 { "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
298 { "cmpb", 0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
299 { "cmpb", 0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
300 { "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
301 /* This entry is for the disassembler only. It will never be used by
302 assembler. */
303 { "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
304 { "addb", 0xa0000000, 0xf4000000, "?Wnx,b,w", pa20, FLAG_STRICT},
305 { "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
306 /* This entry is for the disassembler only. It will never be used by
307 assembler. */
308 { "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
309 { "addib", 0xa4000000, 0xf4000000, "?Wn5,b,w", pa20, FLAG_STRICT},
310 { "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
311 /* This entry is for the disassembler only. It will never be used by
312 assembler. */
313 { "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
314 { "nop", 0x08000240, 0xffffffff, "", pa10, 0}, /* or 0,0,0 */
315 { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10, 0}, /* or r,0,t */
316 { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
317
318 /* Loads and Stores for integer registers. */
319
320 { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
321 { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
322 { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
323 { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT},
324 { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
325 { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT},
326 { "ldd", 0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
327 { "ldd", 0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
328 { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
329 { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
330 { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
331 { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
332 { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
333 { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
334 { "ldw", 0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT},
335 { "ldw", 0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
336 { "ldw", 0x4c000000, 0xfc000000, "ceJ(b),x", pa10, FLAG_STRICT},
337 { "ldw", 0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT},
338 { "ldw", 0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
339 { "ldw", 0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT},
340 { "ldw", 0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
341 { "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
342 { "ldw", 0x48000000, 0xfc000000, "j(b),x", pa10, 0},
343 { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
344 { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
345 { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
346 { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
347 { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
348 { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
349 { "ldh", 0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
350 { "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
351 { "ldh", 0x44000000, 0xfc000000, "j(b),x", pa10, 0},
352 { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
353 { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
354 { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
355 { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
356 { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
357 { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
358 { "ldb", 0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
359 { "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
360 { "ldb", 0x40000000, 0xfc000000, "j(b),x", pa10, 0},
361 { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
362 { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
363 { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
364 { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
365 { "std", 0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT},
366 { "std", 0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
367 { "stw", 0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
368 { "stw", 0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT},
369 { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
370 { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
371 { "stw", 0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT},
372 { "stw", 0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
373 { "stw", 0x6c000000, 0xfc000000, "cex,J(b)", pa10, FLAG_STRICT},
374 { "stw", 0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT},
375 { "stw", 0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
376 { "stw", 0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT},
377 { "stw", 0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
378 { "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
379 { "stw", 0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
380 { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
381 { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
382 { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
383 { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
384 { "sth", 0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
385 { "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
386 { "sth", 0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
387 { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
388 { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
389 { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
390 { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
391 { "stb", 0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
392 { "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
393 { "stb", 0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
394 { "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
395 { "ldwm", 0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
396 { "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
397 { "stwm", 0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
398 { "ldwx", 0x0c000080, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
399 { "ldwx", 0x0c000080, 0xfc001fc0, "cxx(b),t", pa10, 0},
400 { "ldhx", 0x0c000040, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
401 { "ldhx", 0x0c000040, 0xfc001fc0, "cxx(b),t", pa10, 0},
402 { "ldbx", 0x0c000000, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
403 { "ldbx", 0x0c000000, 0xfc001fc0, "cxx(b),t", pa10, 0},
404 { "ldwa", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa10, FLAG_STRICT},
405 { "ldwa", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa10, FLAG_STRICT},
406 { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa10, FLAG_STRICT},
407 { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa10, FLAG_STRICT},
408 { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa10, FLAG_STRICT},
409 { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa10, FLAG_STRICT},
410 { "stwa", 0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
411 { "stwa", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
412 { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa10, FLAG_STRICT},
413 { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa10, FLAG_STRICT},
414 { "ldda", 0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
415 { "ldda", 0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
416 { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
417 { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT},
418 { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
419 { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT},
420 { "stda", 0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
421 { "stda", 0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
422 { "stda", 0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
423 { "stda", 0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
424 { "ldwax", 0x0c000180, 0xfc00dfc0, "cxx(b),t", pa10, 0},
425 { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cxx(s,b),t", pa10, 0},
426 { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cxx(b),t", pa10, 0},
427 { "ldws", 0x0c001080, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
428 { "ldws", 0x0c001080, 0xfc001fc0, "cm5(b),t", pa10, 0},
429 { "ldhs", 0x0c001040, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
430 { "ldhs", 0x0c001040, 0xfc001fc0, "cm5(b),t", pa10, 0},
431 { "ldbs", 0x0c001000, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
432 { "ldbs", 0x0c001000, 0xfc001fc0, "cm5(b),t", pa10, 0},
433 { "ldwas", 0x0c001180, 0xfc00dfc0, "cm5(b),t", pa10, 0},
434 { "ldcws", 0x0c0011c0, 0xfc001fc0, "cm5(s,b),t", pa10, 0},
435 { "ldcws", 0x0c0011c0, 0xfc001fc0, "cm5(b),t", pa10, 0},
436 { "stws", 0x0c001280, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
437 { "stws", 0x0c001280, 0xfc001fc0, "cmx,V(b)", pa10, 0},
438 { "sths", 0x0c001240, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
439 { "sths", 0x0c001240, 0xfc001fc0, "cmx,V(b)", pa10, 0},
440 { "stbs", 0x0c001200, 0xfc001fc0, "cmx,V(s,b)", pa10, 0},
441 { "stbs", 0x0c001200, 0xfc001fc0, "cmx,V(b)", pa10, 0},
442 { "stwas", 0x0c001380, 0xfc00dfc0, "cmx,V(b)", pa10, 0},
443 { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
444 { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT},
445 { "stbys", 0x0c001300, 0xfc001fc0, "csx,V(s,b)", pa10, 0},
446 { "stbys", 0x0c001300, 0xfc001fc0, "csx,V(b)", pa10, 0},
447
448 /* Immediate instructions. */
449 { "ldo", 0x34000000, 0xfc000000, "l(b),x", pa20w, 0},
450 { "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
451 { "ldil", 0x20000000, 0xfc000000, "k,b", pa10, 0},
452 { "addil", 0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
453 { "addil", 0x28000000, 0xfc000000, "k,b", pa10, 0},
454
455 /* Branching instructions. */
456 { "b", 0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
457 { "b", 0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
458 { "b", 0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
459 { "b", 0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
460 { "b", 0xe8000000, 0xffe0e000, "nW", pa10, 0}, /* b,l foo,r0 */
461 { "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
462 { "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
463 { "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
464 { "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
465 { "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
466 { "bve", 0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
467 { "bve", 0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
468 { "bve", 0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
469 { "bve", 0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
470 { "be", 0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
471 { "be", 0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
472 { "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
473 { "be", 0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
474 { "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
475 { "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
476 { "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
477 { "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
478 { "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
479 { "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
480 { "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
481 { "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
482 { "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
483 { "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
484 { "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
485 { "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
486 { "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
487 { "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
488 { "bb", 0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
489 { "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
490 { "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
491 { "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
492 { "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
493 { "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
494
495 /* Computation Instructions. */
496
497 { "cmpclr", 0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
498 { "cmpclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
499 { "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
500 { "or", 0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
501 { "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
502 { "xor", 0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
503 { "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
504 { "and", 0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
505 { "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
506 { "andcm", 0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
507 { "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
508 { "uxor", 0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
509 { "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
510 { "uaddcm", 0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
511 { "uaddcm", 0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
512 { "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
513 { "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
514 { "dcor", 0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
515 { "dcor", 0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
516 { "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10, 0},
517 { "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10, 0},
518 { "addi", 0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
519 { "addi", 0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
520 { "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
521 { "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
522 { "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
523 { "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
524 { "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
525 { "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
526 { "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
527 { "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
528 { "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
529 { "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
530 { "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
531 { "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
532 { "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
533 { "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
534 { "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
535 { "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
536 { "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
537 { "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
538 { "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
539 { "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
540 { "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
541 { "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
542 { "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
543 { "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
544 { "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
545 { "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
546 { "subi", 0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
547 { "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
548 { "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
549 { "cmpiclr", 0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
550 { "cmpiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
551 { "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
552 { "shladd", 0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
553 { "shladd", 0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
554 { "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
555 { "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
556 { "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
557 { "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
558 { "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
559 { "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
560 { "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
561 { "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
562 { "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
563
564 /* Subword Operation Instructions. */
565
566 { "hadd", 0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
567 { "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
568 { "hshl", 0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
569 { "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
570 { "hshr", 0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
571 { "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
572 { "hsub", 0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
573 { "mixh", 0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
574 { "mixw", 0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
575 { "permh", 0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
576
577
578 /* Extract and Deposit Instructions. */
579
580 { "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
581 { "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
582 { "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
583 { "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
584 { "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
585 { "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
586 { "extrd", 0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
587 { "extrd", 0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
588 { "extrw", 0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
589 { "extrw", 0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
590 { "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
591 { "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
592 { "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
593 { "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
594 { "depd", 0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
595 { "depd", 0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
596 { "depdi", 0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
597 { "depdi", 0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
598 { "depw", 0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
599 { "depw", 0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
600 { "depwi", 0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
601 { "depwi", 0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
602 { "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
603 { "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
604 { "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
605 { "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
606 { "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
607 { "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
608 { "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
609 { "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
610
611 /* System Control Instructions. */
612
613 { "break", 0x00000000, 0xfc001fe0, "r,A", pa10, 0},
614 { "rfi", 0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
615 { "rfi", 0x00000c00, 0xffffffff, "", pa10, 0},
616 { "rfir", 0x00000ca0, 0xffffffff, "", pa11, 0},
617 { "ssm", 0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
618 { "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
619 { "rsm", 0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
620 { "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
621 { "mtsm", 0x00001860, 0xffe0ffff, "x", pa10, 0},
622 { "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
623 { "ldsid", 0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
624 { "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10, 0},
625 { "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10, 0},
626 { "mtsarcm", 0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
627 { "mfia", 0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
628 { "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
629 { "mfctl", 0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
630 { "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
631 { "sync", 0x00000400, 0xffffffff, "", pa10, 0},
632 { "syncdma", 0x00100400, 0xffffffff, "", pa10, 0},
633 { "probe", 0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
634 { "probe", 0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
635 { "probei", 0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
636 { "probei", 0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
637 { "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
638 { "prober", 0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
639 { "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
640 { "proberi", 0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
641 { "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
642 { "probew", 0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
643 { "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
644 { "probewi", 0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
645 { "lpa", 0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
646 { "lpa", 0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
647 { "lha", 0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
648 { "lha", 0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
649 { "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
650 { "lci", 0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
651 { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
652 { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
653 { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
654 { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
655 { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
656 { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
657 { "pitlb", 0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
658 { "pitlb", 0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
659 { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
660 { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
661 { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
662 { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
663 { "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
664 { "idtlba", 0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
665 { "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
666 { "iitlba", 0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
667 { "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
668 { "idtlbp", 0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
669 { "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
670 { "iitlbp", 0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
671 { "pdc", 0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
672 { "pdc", 0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
673 { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
674 { "fdc", 0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
675 { "fic", 0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
676 { "fic", 0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
677 { "fdce", 0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
678 { "fdce", 0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
679 { "fice", 0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
680 { "fice", 0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
681 { "diag", 0x14000000, 0xfc000000, "D", pa10, 0},
682 { "idtlbt", 0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
683 { "iitlbt", 0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
684
685 /* These may be specific to certain versions of the PA. Joel claimed
686 they were 72000 (7200?) specific. However, I'm almost certain the
687 mtcpu/mfcpu were undocumented, but available in the older 700 machines. */
688 { "mtcpu", 0x14001600, 0xfc00ffff, "x,^", pa10, 0},
689 { "mfcpu", 0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
690 { "tocen", 0x14403600, 0xffffffff, "", pa10, 0},
691 { "tocdis", 0x14401620, 0xffffffff, "", pa10, 0},
692 { "shdwgr", 0x14402600, 0xffffffff, "", pa10, 0},
693 { "grshdw", 0x14400620, 0xffffffff, "", pa10, 0},
694
695 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
696 the Timex FPU or the Mustang ERS (not sure which) manual. */
697 { "gfw", 0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
698 { "gfw", 0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
699 { "gfr", 0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
700 { "gfr", 0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
701
702 /* Floating Point Coprocessor Instructions. */
703
704 { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
705 { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT},
706 { "fldw", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa10, FLAG_STRICT},
707 { "fldw", 0x24000000, 0xfc001380, "cxccx(b),fT", pa10, FLAG_STRICT},
708 { "fldw", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa10, FLAG_STRICT},
709 { "fldw", 0x24001000, 0xfc001380, "cmcc5(b),fT", pa10, FLAG_STRICT},
710 { "fldw", 0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
711 { "fldw", 0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT},
712 { "fldw", 0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
713 { "fldw", 0x58000000, 0xfc000000, "cJd(b),fe", pa20, FLAG_STRICT},
714 { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
715 { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT},
716 { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa10, FLAG_STRICT},
717 { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa10, FLAG_STRICT},
718 { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa10, FLAG_STRICT},
719 { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa10, FLAG_STRICT},
720 { "fldd", 0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
721 { "fldd", 0x50000002, 0xfc000002, "cq#(b),fx", pa20, FLAG_STRICT},
722 { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa10, FLAG_STRICT},
723 { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa10, FLAG_STRICT},
724 { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa10, FLAG_STRICT},
725 { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(b)", pa10, FLAG_STRICT},
726 { "fstw", 0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa10, FLAG_STRICT},
727 { "fstw", 0x24001200, 0xfc001380, "cmcCfT,5(b)", pa10, FLAG_STRICT},
728 { "fstw", 0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
729 { "fstw", 0x78000000, 0xfc000000, "cJfe,y(b)", pa20w, FLAG_STRICT},
730 { "fstw", 0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
731 { "fstw", 0x78000000, 0xfc000000, "cJfe,d(b)", pa20, FLAG_STRICT},
732 { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa10, FLAG_STRICT},
733 { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa10, FLAG_STRICT},
734 { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa10, FLAG_STRICT},
735 { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa10, FLAG_STRICT},
736 { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa10, FLAG_STRICT},
737 { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa10, FLAG_STRICT},
738 { "fstd", 0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
739 { "fstd", 0x70000002, 0xfc000002, "cqfx,#(b)", pa20, FLAG_STRICT},
740 { "fldwx", 0x24000000, 0xfc001f80, "cxx(s,b),fT", pa10, 0},
741 { "fldwx", 0x24000000, 0xfc001f80, "cxx(b),fT", pa10, 0},
742 { "flddx", 0x2c000000, 0xfc001fc0, "cxx(s,b),ft", pa10, 0},
743 { "flddx", 0x2c000000, 0xfc001fc0, "cxx(b),ft", pa10, 0},
744 { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
745 { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
746 { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
747 { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
748 { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
749 { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
750 { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
751 { "fldws", 0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
752 { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
753 { "fldds", 0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
754 { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
755 { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
756 { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
757 { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
758 { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
759 { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
760 { "fadd", 0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
761 { "fadd", 0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
762 { "fsub", 0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
763 { "fsub", 0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
764 { "fmpy", 0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
765 { "fmpy", 0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
766 { "fdiv", 0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
767 { "fdiv", 0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
768 { "fsqrt", 0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
769 { "fsqrt", 0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
770 { "fabs", 0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
771 { "fabs", 0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
772 { "frem", 0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
773 { "frem", 0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
774 { "frnd", 0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
775 { "frnd", 0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
776 { "fcpy", 0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
777 { "fcpy", 0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
778 { "fcnvff", 0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
779 { "fcnvff", 0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
780 { "fcnvxf", 0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
781 { "fcnvxf", 0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
782 { "fcnvfx", 0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
783 { "fcnvfx", 0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
784 { "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
785 { "fcnvfxt", 0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
786 { "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
787 { "fmpynfadd", 0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
788 { "fneg", 0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
789 { "fneg", 0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
790 { "fnegabs", 0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
791 { "fnegabs", 0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
792 { "fcnv", 0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
793 { "fcnv", 0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
794 { "fcmp", 0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
795 { "fcmp", 0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
796 { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
797 { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
798 { "xmpyu", 0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
799 { "fmpyadd", 0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
800 { "fmpysub", 0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
801 { "ftest", 0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
802 { "ftest", 0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
803 { "ftest", 0x30002420, 0xffffffff, "", pa10, 0},
804 { "fid", 0x30000000, 0xffffffff, "", pa11, 0},
805
806 /* Performance Monitor Instructions. */
807
808 { "pmdis", 0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
809 { "pmenb", 0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
810
811 /* Assist Instructions. */
812
813 { "spop0", 0x10000000, 0xfc000600, "v,ON", pa10, 0},
814 { "spop1", 0x10000200, 0xfc000600, "v,oNt", pa10, 0},
815 { "spop2", 0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
816 { "spop3", 0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
817 { "copr", 0x30000000, 0xfc000000, "u,2N", pa10, 0},
818 { "cldwx", 0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
819 { "cldwx", 0x24000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
820 { "clddx", 0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, 0},
821 { "clddx", 0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, 0},
822 { "cstwx", 0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
823 { "cstwx", 0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
824 { "cstdx", 0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, 0},
825 { "cstdx", 0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, 0},
826 { "cldws", 0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
827 { "cldws", 0x24001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
828 { "cldds", 0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, 0},
829 { "cldds", 0x2c001000, 0xfc001e00, "ucm5(b),t", pa10, 0},
830 { "cstws", 0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
831 { "cstws", 0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
832 { "cstds", 0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, 0},
833 { "cstds", 0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, 0},
834 { "cldw", 0x24000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
835 { "cldw", 0x24000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
836 { "cldw", 0x24001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
837 { "cldw", 0x24001000, 0xfc001e00, "ucm5(b),t", pa10, FLAG_STRICT},
838 { "cldd", 0x2c000000, 0xfc001e00, "ucxx(s,b),t", pa10, FLAG_STRICT},
839 { "cldd", 0x2c000000, 0xfc001e00, "ucxx(b),t", pa10, FLAG_STRICT},
840 { "cldd", 0x2c001000, 0xfc001e00, "ucm5(s,b),t", pa10, FLAG_STRICT},
841 { "cldd", 0x2c001000, 0xfc001e00, "ucm5(b),t", pa20, FLAG_STRICT},
842 { "cstw", 0x24000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
843 { "cstw", 0x24000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
844 { "cstw", 0x24001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
845 { "cstw", 0x24001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
846 { "cstd", 0x2c000200, 0xfc001e00, "ucxt,x(s,b)", pa10, FLAG_STRICT},
847 { "cstd", 0x2c000200, 0xfc001e00, "ucxt,x(b)", pa10, FLAG_STRICT},
848 { "cstd", 0x2c001200, 0xfc001e00, "ucmt,5(s,b)", pa10, FLAG_STRICT},
849 { "cstd", 0x2c001200, 0xfc001e00, "ucmt,5(b)", pa10, FLAG_STRICT},
850 };
851
852 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
853
854 /* SKV 12/18/92. Added some denotations for various operands. */
855
856 #define PA_IMM11_AT_31 'i'
857 #define PA_IMM14_AT_31 'j'
858 #define PA_IMM21_AT_31 'k'
859 #define PA_DISP12 'w'
860 #define PA_DISP17 'W'
861
862 #define N_HPPA_OPERAND_FORMATS 5
git-cvsimport of binutils cvsroot