1 2006-10-30 Paul Brook <paul@codesourcery.com>
3 * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
4 (get_sym_code_type): New function.
5 (print_insn): Search for mapping symbols.
7 2006-10-31 Mei Ligang <ligang@sunnorth.com.cn>
9 * score-dis.c (print_insn): Correct the error code to print
10 correct PCE instruction disassembly.
12 2006-10-26 Ben Elliston <bje@au.ibm.com>
13 Anton Blanchard <anton@samba.org>
14 Peter Bergner <bergner@vnet.ibm.com>
16 * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
17 AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
19 (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
20 "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
21 Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
22 "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
23 "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
24 "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
25 "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
26 "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
27 "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
28 "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
29 "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
30 "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
31 "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
32 "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
33 "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
34 "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
35 "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
36 "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
37 "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
38 "diexq" and "diexq." opcodes.
40 2006-10-26 Daniel Jacobowitz <dan@codesourcery.com>
42 * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
44 2006-10-25 Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
45 Yukishige Shibata <shibata@rd.scei.sony.co.jp>
46 Nobuhisa Fujinami <fnami@rd.scei.sony.co.jp>
47 Takeaki Fukuoka <fukuoka@rd.scei.sony.co.jp>
48 Alan Modra <amodra@bigpond.net.au>
50 * spu-dis.c: New file.
51 * spu-opc.c: New file.
52 * configure.in: Add SPU support.
53 * disassemble.c: Likewise.
54 * Makefile.am: Likewise. Run "make dep-am".
55 * Makefile.in: Regenerate.
56 * configure: Regenerate.
57 * po/POTFILES.in: Regenerate.
59 2006-10-24 Andrew Pinski <andrew_pinski@playstation.sony.com>
61 * ppc-opc.c (CELL): New define.
62 (powerpc_opcodes): Enable hrfid for Cell. Add ldbrx and stdbrx,
63 cell specific instructions. Add {st,l}x{r,l}{,l} cell specific
65 * ppc-dis.c (powerpc_dialect): Handle cell.
67 2006-10-23 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
69 * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
70 amdfam10 architecture.
72 (print_insn): Disallow REP prefix for POPCNT.
74 2006-10-20 Andrew Stubbs <andrew.stubbs@st.com>
76 * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
79 2006-10-18 Dave Brolley <brolley@redhat.com>
81 * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
82 * configure: Regenerated.
84 2006-09-29 Alan Modra <amodra@bigpond.net.au>
86 * po/POTFILES.in: Regenerate.
88 2006-09-26 Mark Shinwell <shinwell@codesourcery.com>
89 Joseph Myers <joseph@codesourcery.com>
90 Ian Lance Taylor <ian@wasabisystems.com>
91 Ben Elliston <bje@wasabisystems.com>
93 * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
94 only be used with the default multiply-add operation, so if N is
95 set, don't bother printing X. Add new iwmmxt instructions.
96 (IWMMXT_INSN_COUNT): Update.
97 (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
99 (print_insn_coprocessor): Check for iWMMXt2. Handle format
102 2006-09-24 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
105 * i386-dis.c (prefix_user_table): Fix the second operand of
106 maskmovdqu instruction to allow only %xmm register instead of
107 both %xmm register and memory.
109 2006-09-23 H.J. Lu <hongjiu.lu@intel.com>
112 * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
115 2006-09-17 Mei Ligang <ligang@sunnorth.com.cn>
117 * score-dis.c: New file.
118 * score-opc.h: New file.
119 * Makefile.am: Add Score files.
120 * Makefile.in: Regenerate.
121 * configure.in: Add support for Score target.
122 * configure: Regenerate.
123 * disassemble.c: Add support for Score target.
125 2006-09-16 Nick Clifton <nickc@redhat.com>
126 Pedro Alves <pedro_alves@portugalmail.pt>
128 * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
129 macros defined in bfd.h.
130 * cris-dis.c: Likewise.
131 * h8300-dis.c: Likewise.
132 * i386-dis.c: Likewise.
133 * ia64-gen.c: Likewise.
134 * mips-dis: Likewise.
136 2006-09-04 Paul Brook <paul@codesourcery.com>
138 * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
140 2006-08-23 H.J. Lu <hongjiu.lu@intel.com>
142 * i386-dis.c (three_byte_table): Expand to 256 elements.
144 2006-08-04 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
147 * i386-dis.c (MXC,EMC): Define.
148 (OP_MXC): New function to handle cvt* (convert instructions) between
149 %xmm and %mm register correctly.
151 (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
152 instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
155 2006-07-29 Richard Sandiford <richard@codesourcery.com>
157 * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
160 2006-07-19 Paul Brook <paul@codesourcery.com>
162 * armd-dis.c (arm_opcodes): Fix rbit opcode.
164 2006-07-18 H.J. Lu <hongjiu.lu@intel.com>
166 * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
167 "sldt", "str" and "smsw".
169 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
172 * i386-dis.c (GRP11_C6): NEW.
173 (GRP11_C7): Likewise.
180 (GRPPADLCK1): Likewise.
181 (GRPPADLCK2): Likewise.
182 (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
184 (grps): Add entries for GRP11_C6 and GRP11_C7.
186 2006-07-10 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
187 Michael Meissner <michael.meissner@amd.com>
189 * i386-dis.c (dis386): Add support for 4 operand instructions. Add
190 support for amdfam10 SSE4a/ABM instructions. Modify all
191 initializer macros to have additional arguments. Disallow REP
192 prefix for non-string instructions.
195 2006-07-05 Julian Brown <julian@codesourcery.com>
197 * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
199 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
201 * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
202 (twobyte_has_modrm): Set 1 for 0x1f.
204 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
206 * i386-dis.c (NOP_Fixup): Removed.
208 (NOP_Fixup2): Likewise.
209 (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
211 2006-06-12 Julian Brown <julian@codesourcery.com>
213 * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
216 2006-06-10 H.J. Lu <hongjiu.lu@intel.com>
218 * i386.c (GRP10): Renamed to ...
220 (GRP11): Renamed to ...
222 (GRP12): Renamed to ...
224 (GRP13): Renamed to ...
226 (GRP14): Renamed to ...
228 (dis386_twobyte): Updated.
231 2006-06-09 Nick Clifton <nickc@redhat.com>
233 * po/fi.po: Updated Finnish translation.
235 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
237 * po/Make-in (pdf, ps): New dummy targets.
239 2006-06-06 Paul Brook <paul@codesourcery.com>
241 * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
243 (neon_opcodes): Add conditional execution specifiers.
244 (thumb_opcodes): Ditto.
245 (thumb32_opcodes): Ditto.
246 (arm_conditional): Change 0xe to "al" and add "" to end.
247 (ifthen_state, ifthen_next_state, ifthen_address): New.
248 (IFTHEN_COND): Define.
249 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
250 (print_insn_arm): Change %c to use new values of arm_conditional.
251 (print_insn_thumb16): Print thumb conditions. Add %I.
252 (print_insn_thumb32): Print thumb conditions.
253 (find_ifthen_state): New function.
254 (print_insn): Track IT block state.
256 2006-06-06 Ben Elliston <bje@au.ibm.com>
257 Anton Blanchard <anton@samba.org>
258 Peter Bergner <bergner@vnet.ibm.com>
260 * ppc-dis.c (powerpc_dialect): Handle power6 option.
261 (print_ppc_disassembler_options): Mention power6.
263 2006-06-06 Thiemo Seufer <ths@mips.com>
264 Chao-ying Fu <fu@mips.com>
266 * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
267 * mips-opc.c: Add DSP64 instructions.
269 2006-06-06 Alan Modra <amodra@bigpond.net.au>
271 * m68hc11-dis.c (print_insn): Warning fix.
273 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
275 * po/Make-in (top_builddir): Define.
277 2006-06-05 Alan Modra <amodra@bigpond.net.au>
279 * Makefile.am: Run "make dep-am".
280 * Makefile.in: Regenerate.
281 * config.in: Regenerate.
283 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
285 * Makefile.am (INCLUDES): Use @INCINTL@.
286 * acinclude.m4: Include new gettext macros.
287 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
288 Remove local code for po/Makefile.
289 * Makefile.in, aclocal.m4, configure: Regenerated.
291 2006-05-30 Nick Clifton <nickc@redhat.com>
293 * po/es.po: Updated Spanish translation.
295 2006-05-25 Richard Sandiford <richard@codesourcery.com>
297 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
298 and fmovem entries. Put register list entries before immediate
299 mask entries. Use "l" rather than "L" in the fmovem entries.
300 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
302 (m68k_scan_mask): New function, split out from...
303 (print_insn_m68k): ...here. If no architecture has been set,
304 first try printing an m680x0 instruction, then try a Coldfire one.
306 2006-05-24 Nick Clifton <nickc@redhat.com>
308 * po/ga.po: Updated Irish translation.
310 2006-05-22 Nick Clifton <nickc@redhat.com>
312 * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
314 2006-05-22 Nick Clifton <nickc@redhat.com>
316 * po/nl.po: Updated translation.
318 2006-05-18 Alan Modra <amodra@bigpond.net.au>
320 * avr-dis.c: Formatting fix.
322 2006-05-14 Thiemo Seufer <ths@mips.com>
324 * mips16-opc.c (I1, I32, I64): New shortcut defines.
325 (mips16_opcodes): Change membership of instructions to their
328 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
330 * i386-dis.c (grps): Update sgdt/sidt for 64bit.
332 2006-05-05 Julian Brown <julian@codesourcery.com>
334 * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
337 2006-05-05 Thiemo Seufer <ths@mips.com>
338 David Ung <davidu@mips.com>
340 * mips-opc.c: Add macro for cache instruction.
342 2006-05-04 Thiemo Seufer <ths@mips.com>
343 Nigel Stephens <nigel@mips.com>
344 David Ung <davidu@mips.com>
346 * mips-dis.c (mips_arch_choices): Add smartmips instruction
347 decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
348 2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
350 * mips-opc.c: fix random typos in comments.
351 (INSN_SMARTMIPS): New defines.
352 (mips_builtin_opcodes): Add paired single support for MIPS32R2.
353 Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
354 flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
355 FP_S and FP_D flags to denote single and double register
356 accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
357 Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
358 for MIPS32R2. Add SmartMIPS instructions. Add two-argument
359 variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
361 * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
363 2006-05-03 Thiemo Seufer <ths@mips.com>
365 * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
367 2006-05-02 Thiemo Seufer <ths@mips.com>
368 Nigel Stephens <nigel@mips.com>
369 David Ung <davidu@mips.com>
371 * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
372 (print_mips16_insn_arg): Force mips16 to odd addresses.
374 2006-04-30 Thiemo Seufer <ths@mips.com>
375 David Ung <davidu@mips.com>
377 * mips-opc.c (mips_builtin_opcodes): Add udi instructions
379 * mips-dis.c (print_insn_args): Adds udi argument handling.
381 2006-04-28 James E Wilson <wilson@specifix.com>
383 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
386 2006-04-28 Thiemo Seufer <ths@mips.com>
387 David Ung <davidu@mips.com>
388 Nigel Stephens <nigel@mips.com>
390 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
393 2006-04-28 Thiemo Seufer <ths@mips.com>
394 Nigel Stephens <nigel@mips.com>
395 David Ung <davidu@mips.com>
397 * mips-dis.c (print_insn_args): Add mips_opcode argument.
398 (print_insn_mips): Adjust print_insn_args call.
400 2006-04-28 Thiemo Seufer <ths@mips.com>
401 Nigel Stephens <nigel@mips.com>
403 * mips-dis.c (print_insn_args): Print $fcc only for FP
404 instructions, use $cc elsewise.
406 2006-04-28 Thiemo Seufer <ths@mips.com>
407 Nigel Stephens <nigel@mips.com>
409 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
410 Map MIPS16 registers to O32 names.
411 (print_mips16_insn_arg): Use mips16_reg_names.
413 2006-04-26 Julian Brown <julian@codesourcery.com>
415 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
418 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
419 Julian Brown <julian@codesourcery.com>
421 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
422 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
423 Add unified load/store instruction names.
424 (neon_opcode_table): New.
425 (arm_opcodes): Expand meaning of %<bitfield>['`?].
426 (arm_decode_bitfield): New.
427 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
428 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
429 (print_insn_neon): New.
430 (print_insn_arm): Adjust print_insn_coprocessor call. Call
431 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
432 (print_insn_thumb32): Likewise.
434 2006-04-19 Alan Modra <amodra@bigpond.net.au>
436 * Makefile.am: Run "make dep-am".
437 * Makefile.in: Regenerate.
439 2006-04-19 Alan Modra <amodra@bigpond.net.au>
441 * avr-dis.c (avr_operand): Warning fix.
443 * configure: Regenerate.
445 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
447 * po/POTFILES.in: Regenerated.
449 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
452 * avr-dis.c (avr_operand): Arrange for a comment to appear before
453 the symolic form of an address, so that the output of objdump -d
456 2006-04-10 DJ Delorie <dj@redhat.com>
458 * m32c-asm.c: Regenerate.
460 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
462 * Makefile.am: Add install-html target.
463 * Makefile.in: Regenerate.
465 2006-04-06 Nick Clifton <nickc@redhat.com>
467 * po/vi/po: Updated Vietnamese translation.
469 2006-03-31 Paul Koning <ni1d@arrl.net>
471 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
473 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
475 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
476 logic to identify halfword shifts.
478 2006-03-16 Paul Brook <paul@codesourcery.com>
480 * arm-dis.c (arm_opcodes): Rename swi to svc.
481 (thumb_opcodes): Ditto.
483 2006-03-13 DJ Delorie <dj@redhat.com>
485 * m32c-asm.c: Regenerate.
486 * m32c-desc.c: Likewise.
487 * m32c-desc.h: Likewise.
488 * m32c-dis.c: Likewise.
489 * m32c-ibld.c: Likewise.
490 * m32c-opc.c: Likewise.
491 * m32c-opc.h: Likewise.
493 2006-03-10 DJ Delorie <dj@redhat.com>
495 * m32c-desc.c: Regenerate with mul.l, mulu.l.
496 * m32c-opc.c: Likewise.
497 * m32c-opc.h: Likewise.
500 2006-03-09 Nick Clifton <nickc@redhat.com>
502 * po/sv.po: Updated Swedish translation.
504 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
507 * i386-dis.c (REP_Fixup): New function.
508 (AL): Remove duplicate.
513 (indirDXr): Likewise.
516 (dis386): Updated entries of ins, outs, movs, lods and stos.
518 2006-03-05 Nick Clifton <nickc@redhat.com>
520 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
521 signed 32-bit value into an unsigned 32-bit field when the host is
523 * fr30-ibld.c: Regenerate.
524 * frv-ibld.c: Regenerate.
525 * ip2k-ibld.c: Regenerate.
526 * iq2000-asm.c: Regenerate.
527 * iq2000-ibld.c: Regenerate.
528 * m32c-ibld.c: Regenerate.
529 * m32r-ibld.c: Regenerate.
530 * openrisc-ibld.c: Regenerate.
531 * xc16x-ibld.c: Regenerate.
532 * xstormy16-ibld.c: Regenerate.
534 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
536 * xc16x-asm.c: Regenerate.
537 * xc16x-dis.c: Regenerate.
539 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
541 * po/Make-in: Add html target.
543 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
545 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
546 Intel Merom New Instructions.
547 (THREE_BYTE_0): Likewise.
548 (THREE_BYTE_1): Likewise.
549 (three_byte_table): Likewise.
550 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
551 THREE_BYTE_1 for entry 0x3a.
552 (twobyte_has_modrm): Updated.
553 (twobyte_uses_SSE_prefix): Likewise.
554 (print_insn): Handle 3-byte opcodes used by Intel Merom New
557 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
559 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
560 (v9_hpriv_reg_names): New table.
561 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
562 New cases '$' and '%' for read/write hyperprivileged register.
563 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
564 window handling and rdhpr/wrhpr instructions.
566 2006-02-24 DJ Delorie <dj@redhat.com>
568 * m32c-desc.c: Regenerate with linker relaxation attributes.
569 * m32c-desc.h: Likewise.
570 * m32c-dis.c: Likewise.
571 * m32c-opc.c: Likewise.
573 2006-02-24 Paul Brook <paul@codesourcery.com>
575 * arm-dis.c (arm_opcodes): Add V7 instructions.
576 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
577 (print_arm_address): New function.
578 (print_insn_arm): Use it. Add 'P' and 'U' cases.
579 (psr_name): New function.
580 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
582 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
584 * ia64-opc-i.c (bXc): New.
586 (OpX2TaTbYaXcC): Likewise.
589 (ia64_opcodes_i): Add instructions for tf.
591 * ia64-opc.h (IMMU5b): New.
593 * ia64-asmtab.c: Regenerated.
595 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
597 * ia64-gen.c: Update copyright years.
598 * ia64-opc-b.c: Likewise.
600 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
602 * ia64-gen.c (lookup_regindex): Handle ".vm".
603 (print_dependency_table): Handle '\"'.
605 * ia64-ic.tbl: Updated from SDM 2.2.
606 * ia64-raw.tbl: Likewise.
607 * ia64-waw.tbl: Likewise.
608 * ia64-asmtab.c: Regenerated.
610 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
612 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
613 Anil Paranjape <anilp1@kpitcummins.com>
614 Shilin Shakti <shilins@kpitcummins.com>
616 * xc16x-desc.h: New file
617 * xc16x-desc.c: New file
618 * xc16x-opc.h: New file
619 * xc16x-opc.c: New file
620 * xc16x-ibld.c: New file
621 * xc16x-asm.c: New file
622 * xc16x-dis.c: New file
623 * Makefile.am: Entries for xc16x
624 * Makefile.in: Regenerate
625 * cofigure.in: Add xc16x target information.
626 * configure: Regenerate.
627 * disassemble.c: Add xc16x target information.
629 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
631 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
634 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
636 * i386-dis.c ('Z'): Add a new macro.
637 (dis386_twobyte): Use "movZ" for control register moves.
639 2006-02-10 Nick Clifton <nickc@redhat.com>
641 * iq2000-asm.c: Regenerate.
643 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
645 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
647 2006-01-26 David Ung <davidu@mips.com>
649 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
650 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
651 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
652 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
653 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
655 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
657 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
658 ld_d_r, pref_xd_cb): Use signed char to hold data to be
660 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
661 buffer overflows when disassembling instructions like
663 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
664 operand, if the offset is negative.
666 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
668 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
669 unsigned char to hold data to be disassembled.
671 2006-01-17 Andreas Schwab <schwab@suse.de>
674 * disassemble.c (disassemble_init_for_target): Set
675 disassembler_needs_relocs for bfd_arch_arm.
677 2006-01-16 Paul Brook <paul@codesourcery.com>
679 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
680 f?add?, and f?sub? instructions.
682 2006-01-16 Nick Clifton <nickc@redhat.com>
684 * po/zh_CN.po: New Chinese (simplified) translation.
685 * configure.in (ALL_LINGUAS): Add "zh_CH".
686 * configure: Regenerate.
688 2006-01-05 Paul Brook <paul@codesourcery.com>
690 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
692 2006-01-06 DJ Delorie <dj@redhat.com>
694 * m32c-desc.c: Regenerate.
695 * m32c-opc.c: Regenerate.
696 * m32c-opc.h: Regenerate.
698 2006-01-03 DJ Delorie <dj@redhat.com>
700 * cgen-ibld.in (extract_normal): Avoid memory range errors.
701 * m32c-ibld.c: Regenerated.
703 For older changes see ChangeLog-2005
709 version-control: never