?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Update copyright to 2011.
[binutils.git] / bfd / elf32-rx.c
blobac587efcaa4238b240247b6b74aa788bd870d4f2
1 /* Renesas RX specific support for 32-bit ELF.
2 Copyright (C) 2008, 2009, 2010
3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21 #include "sysdep.h"
22 #include "bfd.h"
23 #include "libbfd.h"
24 #include "elf-bfd.h"
25 #include "elf/rx.h"
26 #include "libiberty.h"
27
28 #define RX_OPCODE_BIG_ENDIAN 0
29
30 #ifdef DEBUG
31 char * rx_get_reloc (long);
32 void rx_dump_symtab (bfd *, void *, void *);
33 #endif
34
35 #define RXREL(n,sz,bit,shift,complain,pcrel) \
36 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
37 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
38
39 /* Note that the relocations around 0x7f are internal to this file;
40 feel free to move them as needed to avoid conflicts with published
41 relocation numbers. */
42
43 static reloc_howto_type rx_elf_howto_table [] =
44 {
45 RXREL (NONE, 0, 0, 0, dont, FALSE),
46 RXREL (DIR32, 2, 32, 0, signed, FALSE),
47 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
48 RXREL (DIR16, 1, 16, 0, dont, FALSE),
49 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
50 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
51 RXREL (DIR8, 0, 8, 0, dont, FALSE),
52 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
53 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
54 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
55 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
56 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
57 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
58 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
59 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
60 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
61 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
62 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
63 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
64
65 EMPTY_HOWTO (0x13),
66 EMPTY_HOWTO (0x14),
67 EMPTY_HOWTO (0x15),
68 EMPTY_HOWTO (0x16),
69 EMPTY_HOWTO (0x17),
70 EMPTY_HOWTO (0x18),
71 EMPTY_HOWTO (0x19),
72 EMPTY_HOWTO (0x1a),
73 EMPTY_HOWTO (0x1b),
74 EMPTY_HOWTO (0x1c),
75 EMPTY_HOWTO (0x1d),
76 EMPTY_HOWTO (0x1e),
77 EMPTY_HOWTO (0x1f),
78
79 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
80 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
81 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
82 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
83 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
84 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
85 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
86 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
87 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
88 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
89 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
90 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
91 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
92 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
93
94 EMPTY_HOWTO (0x2e),
95 EMPTY_HOWTO (0x2f),
96 EMPTY_HOWTO (0x30),
97 EMPTY_HOWTO (0x31),
98 EMPTY_HOWTO (0x32),
99 EMPTY_HOWTO (0x33),
100 EMPTY_HOWTO (0x34),
101 EMPTY_HOWTO (0x35),
102 EMPTY_HOWTO (0x36),
103 EMPTY_HOWTO (0x37),
104 EMPTY_HOWTO (0x38),
105 EMPTY_HOWTO (0x39),
106 EMPTY_HOWTO (0x3a),
107 EMPTY_HOWTO (0x3b),
108 EMPTY_HOWTO (0x3c),
109 EMPTY_HOWTO (0x3d),
110 EMPTY_HOWTO (0x3e),
111 EMPTY_HOWTO (0x3f),
112 EMPTY_HOWTO (0x40),
113
114 RXREL (ABS32, 2, 32, 0, dont, FALSE),
115 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
116 RXREL (ABS16, 1, 16, 0, dont, FALSE),
117 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
118 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
119 RXREL (ABS8, 0, 8, 0, dont, FALSE),
120 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
121 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
122 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
123 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
124 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
125 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
126 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
127 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
129 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
130 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
131
132 #define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
133
134 EMPTY_HOWTO (0x52),
135 EMPTY_HOWTO (0x53),
136 EMPTY_HOWTO (0x54),
137 EMPTY_HOWTO (0x55),
138 EMPTY_HOWTO (0x56),
139 EMPTY_HOWTO (0x57),
140 EMPTY_HOWTO (0x58),
141 EMPTY_HOWTO (0x59),
142 EMPTY_HOWTO (0x5a),
143 EMPTY_HOWTO (0x5b),
144 EMPTY_HOWTO (0x5c),
145 EMPTY_HOWTO (0x5d),
146 EMPTY_HOWTO (0x5e),
147 EMPTY_HOWTO (0x5f),
148 EMPTY_HOWTO (0x60),
149 EMPTY_HOWTO (0x61),
150 EMPTY_HOWTO (0x62),
151 EMPTY_HOWTO (0x63),
152 EMPTY_HOWTO (0x64),
153 EMPTY_HOWTO (0x65),
154 EMPTY_HOWTO (0x66),
155 EMPTY_HOWTO (0x67),
156 EMPTY_HOWTO (0x68),
157 EMPTY_HOWTO (0x69),
158 EMPTY_HOWTO (0x6a),
159 EMPTY_HOWTO (0x6b),
160 EMPTY_HOWTO (0x6c),
161 EMPTY_HOWTO (0x6d),
162 EMPTY_HOWTO (0x6e),
163 EMPTY_HOWTO (0x6f),
164 EMPTY_HOWTO (0x70),
165 EMPTY_HOWTO (0x71),
166 EMPTY_HOWTO (0x72),
167 EMPTY_HOWTO (0x73),
168 EMPTY_HOWTO (0x74),
169 EMPTY_HOWTO (0x75),
170 EMPTY_HOWTO (0x76),
171 EMPTY_HOWTO (0x77),
172
173 /* These are internal. */
174 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
175 /* ---- ---- 4--- 3210. */
176 #define R_RX_RH_ABS5p8B 0x78
177 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
178 #define R_RX_RH_ABS5p8W 0x79
179 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
180 #define R_RX_RH_ABS5p8L 0x7a
181 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
182 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
183 /* ---- -432 1--- 0---. */
184 #define R_RX_RH_ABS5p5B 0x7b
185 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
186 #define R_RX_RH_ABS5p5W 0x7c
187 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
188 #define R_RX_RH_ABS5p5L 0x7d
189 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
190 /* A 4-bit unsigned immediate at bit position 8. */
191 #define R_RX_RH_UIMM4p8 0x7e
192 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
193 /* A 4-bit negative unsigned immediate at bit position 8. */
194 #define R_RX_RH_UNEG4p8 0x7f
195 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
196 /* End of internal relocs. */
197
198 RXREL (SYM, 2, 32, 0, dont, FALSE),
199 RXREL (OPneg, 2, 32, 0, dont, FALSE),
200 RXREL (OPadd, 2, 32, 0, dont, FALSE),
201 RXREL (OPsub, 2, 32, 0, dont, FALSE),
202 RXREL (OPmul, 2, 32, 0, dont, FALSE),
203 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
204 RXREL (OPshla, 2, 32, 0, dont, FALSE),
205 RXREL (OPshra, 2, 32, 0, dont, FALSE),
206 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
207 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
208 RXREL (OPand, 2, 32, 0, dont, FALSE),
209 RXREL (OPor, 2, 32, 0, dont, FALSE),
210 RXREL (OPxor, 2, 32, 0, dont, FALSE),
211 RXREL (OPnot, 2, 32, 0, dont, FALSE),
212 RXREL (OPmod, 2, 32, 0, dont, FALSE),
213 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
214 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
215 };
216 \f
217 /* Map BFD reloc types to RX ELF reloc types. */
218
219 struct rx_reloc_map
220 {
221 bfd_reloc_code_real_type bfd_reloc_val;
222 unsigned int rx_reloc_val;
223 };
224
225 static const struct rx_reloc_map rx_reloc_map [] =
226 {
227 { BFD_RELOC_NONE, R_RX_NONE },
228 { BFD_RELOC_8, R_RX_DIR8S },
229 { BFD_RELOC_16, R_RX_DIR16S },
230 { BFD_RELOC_24, R_RX_DIR24S },
231 { BFD_RELOC_32, R_RX_DIR32 },
232 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
233 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
234 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
235 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
236 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
237 { BFD_RELOC_RX_8U, R_RX_DIR8U },
238 { BFD_RELOC_RX_16U, R_RX_DIR16U },
239 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
240 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
241 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
242 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
243 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
244 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
245 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
246 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
247 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
248 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
249 { BFD_RELOC_RX_SYM, R_RX_SYM },
250 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
251 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
252 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
253 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
254 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
255 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
256 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
257 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
258 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
259 };
260
261 #define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
262
263 static reloc_howto_type *
264 rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
265 bfd_reloc_code_real_type code)
266 {
267 unsigned int i;
268
269 if (code == BFD_RELOC_RX_32_OP)
270 return rx_elf_howto_table + R_RX_DIR32;
271
272 for (i = ARRAY_SIZE (rx_reloc_map); --i;)
273 if (rx_reloc_map [i].bfd_reloc_val == code)
274 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
275
276 return NULL;
277 }
278
279 static reloc_howto_type *
280 rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
281 {
282 unsigned int i;
283
284 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
285 if (rx_elf_howto_table[i].name != NULL
286 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
287 return rx_elf_howto_table + i;
288
289 return NULL;
290 }
291
292 /* Set the howto pointer for an RX ELF reloc. */
293
294 static void
295 rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
296 arelent * cache_ptr,
297 Elf_Internal_Rela * dst)
298 {
299 unsigned int r_type;
300
301 r_type = ELF32_R_TYPE (dst->r_info);
302 BFD_ASSERT (r_type < (unsigned int) R_RX_max);
303 cache_ptr->howto = rx_elf_howto_table + r_type;
304 }
305 \f
306 static bfd_vma
307 get_symbol_value (const char * name,
308 bfd_reloc_status_type * status,
309 struct bfd_link_info * info,
310 bfd * input_bfd,
311 asection * input_section,
312 int offset)
313 {
314 bfd_vma value = 0;
315 struct bfd_link_hash_entry * h;
316
317 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
318
319 if (h == NULL
320 || (h->type != bfd_link_hash_defined
321 && h->type != bfd_link_hash_defweak))
322 * status = info->callbacks->undefined_symbol
323 (info, name, input_bfd, input_section, offset, TRUE);
324 else
325 value = (h->u.def.value
326 + h->u.def.section->output_section->vma
327 + h->u.def.section->output_offset);
328
329 return value;
330 }
331
332 static bfd_vma
333 get_gp (bfd_reloc_status_type * status,
334 struct bfd_link_info * info,
335 bfd * abfd,
336 asection * sec,
337 int offset)
338 {
339 static bfd_boolean cached = FALSE;
340 static bfd_vma cached_value = 0;
341
342 if (!cached)
343 {
344 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
345 cached = TRUE;
346 }
347 return cached_value;
348 }
349
350 static bfd_vma
351 get_romstart (bfd_reloc_status_type * status,
352 struct bfd_link_info * info,
353 bfd * abfd,
354 asection * sec,
355 int offset)
356 {
357 static bfd_boolean cached = FALSE;
358 static bfd_vma cached_value = 0;
359
360 if (!cached)
361 {
362 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
363 cached = TRUE;
364 }
365 return cached_value;
366 }
367
368 static bfd_vma
369 get_ramstart (bfd_reloc_status_type * status,
370 struct bfd_link_info * info,
371 bfd * abfd,
372 asection * sec,
373 int offset)
374 {
375 static bfd_boolean cached = FALSE;
376 static bfd_vma cached_value = 0;
377
378 if (!cached)
379 {
380 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
381 cached = TRUE;
382 }
383 return cached_value;
384 }
385
386 #define NUM_STACK_ENTRIES 16
387 static int32_t rx_stack [ NUM_STACK_ENTRIES ];
388 static unsigned int rx_stack_top;
389
390 #define RX_STACK_PUSH(val) \
391 do \
392 { \
393 if (rx_stack_top < NUM_STACK_ENTRIES) \
394 rx_stack [rx_stack_top ++] = (val); \
395 else \
396 r = bfd_reloc_dangerous; \
397 } \
398 while (0)
399
400 #define RX_STACK_POP(dest) \
401 do \
402 { \
403 if (rx_stack_top > 0) \
404 (dest) = rx_stack [-- rx_stack_top]; \
405 else \
406 (dest) = 0, r = bfd_reloc_dangerous; \
407 } \
408 while (0)
409
410 /* Relocate an RX ELF section.
411 There is some attempt to make this function usable for many architectures,
412 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
413 if only to serve as a learning tool.
414
415 The RELOCATE_SECTION function is called by the new ELF backend linker
416 to handle the relocations for a section.
417
418 The relocs are always passed as Rela structures; if the section
419 actually uses Rel structures, the r_addend field will always be
420 zero.
421
422 This function is responsible for adjusting the section contents as
423 necessary, and (if using Rela relocs and generating a relocatable
424 output file) adjusting the reloc addend as necessary.
425
426 This function does not have to worry about setting the reloc
427 address or the reloc symbol index.
428
429 LOCAL_SYMS is a pointer to the swapped in local symbols.
430
431 LOCAL_SECTIONS is an array giving the section in the input file
432 corresponding to the st_shndx field of each local symbol.
433
434 The global hash table entry for the global symbols can be found
435 via elf_sym_hashes (input_bfd).
436
437 When generating relocatable output, this function must handle
438 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
439 going to be the section symbol corresponding to the output
440 section, which means that the addend must be adjusted
441 accordingly. */
442
443 static bfd_boolean
444 rx_elf_relocate_section
445 (bfd * output_bfd,
446 struct bfd_link_info * info,
447 bfd * input_bfd,
448 asection * input_section,
449 bfd_byte * contents,
450 Elf_Internal_Rela * relocs,
451 Elf_Internal_Sym * local_syms,
452 asection ** local_sections)
453 {
454 Elf_Internal_Shdr * symtab_hdr;
455 struct elf_link_hash_entry ** sym_hashes;
456 Elf_Internal_Rela * rel;
457 Elf_Internal_Rela * relend;
458
459 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
460 sym_hashes = elf_sym_hashes (input_bfd);
461 relend = relocs + input_section->reloc_count;
462 for (rel = relocs; rel < relend; rel ++)
463 {
464 reloc_howto_type * howto;
465 unsigned long r_symndx;
466 Elf_Internal_Sym * sym;
467 asection * sec;
468 struct elf_link_hash_entry * h;
469 bfd_vma relocation;
470 bfd_reloc_status_type r;
471 const char * name = NULL;
472 bfd_boolean unresolved_reloc = TRUE;
473 int r_type;
474
475 r_type = ELF32_R_TYPE (rel->r_info);
476 r_symndx = ELF32_R_SYM (rel->r_info);
477
478 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
479 h = NULL;
480 sym = NULL;
481 sec = NULL;
482 relocation = 0;
483
484 if (r_symndx < symtab_hdr->sh_info)
485 {
486 sym = local_syms + r_symndx;
487 sec = local_sections [r_symndx];
488 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
489
490 name = bfd_elf_string_from_elf_section
491 (input_bfd, symtab_hdr->sh_link, sym->st_name);
492 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
493 }
494 else
495 {
496 bfd_boolean warned;
497
498 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
499 r_symndx, symtab_hdr, sym_hashes, h,
500 sec, relocation, unresolved_reloc,
501 warned);
502
503 name = h->root.root.string;
504 }
505
506 if (sec != NULL && elf_discarded_section (sec))
507 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
508 rel, relend, howto, contents);
509
510 if (info->relocatable)
511 {
512 /* This is a relocatable link. We don't have to change
513 anything, unless the reloc is against a section symbol,
514 in which case we have to adjust according to where the
515 section symbol winds up in the output section. */
516 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
517 rel->r_addend += sec->output_offset;
518 continue;
519 }
520
521 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
522 /* If the symbol is undefined and weak
523 then the relocation resolves to zero. */
524 relocation = 0;
525 else
526 {
527 if (howto->pc_relative)
528 {
529 relocation -= (input_section->output_section->vma
530 + input_section->output_offset
531 + rel->r_offset);
532 if (r_type != R_RX_RH_3_PCREL
533 && r_type != R_RX_DIR3U_PCREL)
534 relocation ++;
535 }
536
537 relocation += rel->r_addend;
538 }
539
540 r = bfd_reloc_ok;
541
542 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
543 #define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
544 #define OP(i) (contents[rel->r_offset + (i)])
545 #define WARN_REDHAT(type) \
546 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
547 input_bfd, input_section, name)
548
549 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
550 switch (r_type)
551 {
552 case R_RX_NONE:
553 break;
554
555 case R_RX_RH_RELAX:
556 break;
557
558 case R_RX_RH_3_PCREL:
559 WARN_REDHAT ("RX_RH_3_PCREL");
560 RANGE (3, 10);
561 OP (0) &= 0xf8;
562 OP (0) |= relocation & 0x07;
563 break;
564
565 case R_RX_RH_8_NEG:
566 WARN_REDHAT ("RX_RH_8_NEG");
567 relocation = - relocation;
568 case R_RX_DIR8S_PCREL:
569 RANGE (-128, 127);
570 OP (0) = relocation;
571 break;
572
573 case R_RX_DIR8S:
574 RANGE (-128, 255);
575 OP (0) = relocation;
576 break;
577
578 case R_RX_DIR8U:
579 RANGE (0, 255);
580 OP (0) = relocation;
581 break;
582
583 case R_RX_RH_16_NEG:
584 WARN_REDHAT ("RX_RH_16_NEG");
585 relocation = - relocation;
586 case R_RX_DIR16S_PCREL:
587 RANGE (-32768, 32767);
588 #if RX_OPCODE_BIG_ENDIAN
589 #else
590 OP (0) = relocation;
591 OP (1) = relocation >> 8;
592 #endif
593 break;
594
595 case R_RX_RH_16_OP:
596 WARN_REDHAT ("RX_RH_16_OP");
597 RANGE (-32768, 32767);
598 #if RX_OPCODE_BIG_ENDIAN
599 OP (1) = relocation;
600 OP (0) = relocation >> 8;
601 #else
602 OP (0) = relocation;
603 OP (1) = relocation >> 8;
604 #endif
605 break;
606
607 case R_RX_DIR16S:
608 RANGE (-32768, 65535);
609 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
610 {
611 OP (1) = relocation;
612 OP (0) = relocation >> 8;
613 }
614 else
615 {
616 OP (0) = relocation;
617 OP (1) = relocation >> 8;
618 }
619 break;
620
621 case R_RX_DIR16U:
622 RANGE (0, 65536);
623 #if RX_OPCODE_BIG_ENDIAN
624 OP (1) = relocation;
625 OP (0) = relocation >> 8;
626 #else
627 OP (0) = relocation;
628 OP (1) = relocation >> 8;
629 #endif
630 break;
631
632 case R_RX_DIR16:
633 RANGE (-32768, 65536);
634 #if RX_OPCODE_BIG_ENDIAN
635 OP (1) = relocation;
636 OP (0) = relocation >> 8;
637 #else
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 #endif
641 break;
642
643 case R_RX_DIR16_REV:
644 RANGE (-32768, 65536);
645 #if RX_OPCODE_BIG_ENDIAN
646 OP (0) = relocation;
647 OP (1) = relocation >> 8;
648 #else
649 OP (1) = relocation;
650 OP (0) = relocation >> 8;
651 #endif
652 break;
653
654 case R_RX_DIR3U_PCREL:
655 RANGE (3, 10);
656 OP (0) &= 0xf8;
657 OP (0) |= relocation & 0x07;
658 break;
659
660 case R_RX_RH_24_NEG:
661 WARN_REDHAT ("RX_RH_24_NEG");
662 relocation = - relocation;
663 case R_RX_DIR24S_PCREL:
664 RANGE (-0x800000, 0x7fffff);
665 #if RX_OPCODE_BIG_ENDIAN
666 OP (2) = relocation;
667 OP (1) = relocation >> 8;
668 OP (0) = relocation >> 16;
669 #else
670 OP (0) = relocation;
671 OP (1) = relocation >> 8;
672 OP (2) = relocation >> 16;
673 #endif
674 break;
675
676 case R_RX_RH_24_OP:
677 WARN_REDHAT ("RX_RH_24_OP");
678 RANGE (-0x800000, 0x7fffff);
679 #if RX_OPCODE_BIG_ENDIAN
680 OP (2) = relocation;
681 OP (1) = relocation >> 8;
682 OP (0) = relocation >> 16;
683 #else
684 OP (0) = relocation;
685 OP (1) = relocation >> 8;
686 OP (2) = relocation >> 16;
687 #endif
688 break;
689
690 case R_RX_DIR24S:
691 RANGE (-0x800000, 0x7fffff);
692 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
693 {
694 OP (2) = relocation;
695 OP (1) = relocation >> 8;
696 OP (0) = relocation >> 16;
697 }
698 else
699 {
700 OP (0) = relocation;
701 OP (1) = relocation >> 8;
702 OP (2) = relocation >> 16;
703 }
704 break;
705
706 case R_RX_RH_24_UNS:
707 WARN_REDHAT ("RX_RH_24_UNS");
708 RANGE (0, 0xffffff);
709 #if RX_OPCODE_BIG_ENDIAN
710 OP (2) = relocation;
711 OP (1) = relocation >> 8;
712 OP (0) = relocation >> 16;
713 #else
714 OP (0) = relocation;
715 OP (1) = relocation >> 8;
716 OP (2) = relocation >> 16;
717 #endif
718 break;
719
720 case R_RX_RH_32_NEG:
721 WARN_REDHAT ("RX_RH_32_NEG");
722 relocation = - relocation;
723 #if RX_OPCODE_BIG_ENDIAN
724 OP (3) = relocation;
725 OP (2) = relocation >> 8;
726 OP (1) = relocation >> 16;
727 OP (0) = relocation >> 24;
728 #else
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 OP (2) = relocation >> 16;
732 OP (3) = relocation >> 24;
733 #endif
734 break;
735
736 case R_RX_RH_32_OP:
737 WARN_REDHAT ("RX_RH_32_OP");
738 #if RX_OPCODE_BIG_ENDIAN
739 OP (3) = relocation;
740 OP (2) = relocation >> 8;
741 OP (1) = relocation >> 16;
742 OP (0) = relocation >> 24;
743 #else
744 OP (0) = relocation;
745 OP (1) = relocation >> 8;
746 OP (2) = relocation >> 16;
747 OP (3) = relocation >> 24;
748 #endif
749 break;
750
751 case R_RX_DIR32:
752 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
753 {
754 OP (3) = relocation;
755 OP (2) = relocation >> 8;
756 OP (1) = relocation >> 16;
757 OP (0) = relocation >> 24;
758 }
759 else
760 {
761 OP (0) = relocation;
762 OP (1) = relocation >> 8;
763 OP (2) = relocation >> 16;
764 OP (3) = relocation >> 24;
765 }
766 break;
767
768 case R_RX_DIR32_REV:
769 if (BIGE (output_bfd))
770 {
771 OP (0) = relocation;
772 OP (1) = relocation >> 8;
773 OP (2) = relocation >> 16;
774 OP (3) = relocation >> 24;
775 }
776 else
777 {
778 OP (3) = relocation;
779 OP (2) = relocation >> 8;
780 OP (1) = relocation >> 16;
781 OP (0) = relocation >> 24;
782 }
783 break;
784
785 case R_RX_RH_DIFF:
786 {
787 bfd_vma val;
788 WARN_REDHAT ("RX_RH_DIFF");
789 val = bfd_get_32 (output_bfd, & OP (0));
790 val -= relocation;
791 bfd_put_32 (output_bfd, val, & OP (0));
792 }
793 break;
794
795 case R_RX_RH_GPRELB:
796 WARN_REDHAT ("RX_RH_GPRELB");
797 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
798 RANGE (0, 65535);
799 #if RX_OPCODE_BIG_ENDIAN
800 OP (1) = relocation;
801 OP (0) = relocation >> 8;
802 #else
803 OP (0) = relocation;
804 OP (1) = relocation >> 8;
805 #endif
806 break;
807
808 case R_RX_RH_GPRELW:
809 WARN_REDHAT ("RX_RH_GPRELW");
810 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
811 ALIGN (1);
812 relocation >>= 1;
813 RANGE (0, 65535);
814 #if RX_OPCODE_BIG_ENDIAN
815 OP (1) = relocation;
816 OP (0) = relocation >> 8;
817 #else
818 OP (0) = relocation;
819 OP (1) = relocation >> 8;
820 #endif
821 break;
822
823 case R_RX_RH_GPRELL:
824 WARN_REDHAT ("RX_RH_GPRELL");
825 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
826 ALIGN (3);
827 relocation >>= 2;
828 RANGE (0, 65535);
829 #if RX_OPCODE_BIG_ENDIAN
830 OP (1) = relocation;
831 OP (0) = relocation >> 8;
832 #else
833 OP (0) = relocation;
834 OP (1) = relocation >> 8;
835 #endif
836 break;
837
838 /* Internal relocations just for relaxation: */
839 case R_RX_RH_ABS5p5B:
840 RX_STACK_POP (relocation);
841 RANGE (0, 31);
842 OP (0) &= 0xf8;
843 OP (0) |= relocation >> 2;
844 OP (1) &= 0x77;
845 OP (1) |= (relocation << 6) & 0x80;
846 OP (1) |= (relocation << 3) & 0x08;
847 break;
848
849 case R_RX_RH_ABS5p5W:
850 RX_STACK_POP (relocation);
851 RANGE (0, 62);
852 ALIGN (1);
853 relocation >>= 1;
854 OP (0) &= 0xf8;
855 OP (0) |= relocation >> 2;
856 OP (1) &= 0x77;
857 OP (1) |= (relocation << 6) & 0x80;
858 OP (1) |= (relocation << 3) & 0x08;
859 break;
860
861 case R_RX_RH_ABS5p5L:
862 RX_STACK_POP (relocation);
863 RANGE (0, 124);
864 ALIGN (3);
865 relocation >>= 2;
866 OP (0) &= 0xf8;
867 OP (0) |= relocation >> 2;
868 OP (1) &= 0x77;
869 OP (1) |= (relocation << 6) & 0x80;
870 OP (1) |= (relocation << 3) & 0x08;
871 break;
872
873 case R_RX_RH_ABS5p8B:
874 RX_STACK_POP (relocation);
875 RANGE (0, 31);
876 OP (0) &= 0x70;
877 OP (0) |= (relocation << 3) & 0x80;
878 OP (0) |= relocation & 0x0f;
879 break;
880
881 case R_RX_RH_ABS5p8W:
882 RX_STACK_POP (relocation);
883 RANGE (0, 62);
884 ALIGN (1);
885 relocation >>= 1;
886 OP (0) &= 0x70;
887 OP (0) |= (relocation << 3) & 0x80;
888 OP (0) |= relocation & 0x0f;
889 break;
890
891 case R_RX_RH_ABS5p8L:
892 RX_STACK_POP (relocation);
893 RANGE (0, 124);
894 ALIGN (3);
895 relocation >>= 2;
896 OP (0) &= 0x70;
897 OP (0) |= (relocation << 3) & 0x80;
898 OP (0) |= relocation & 0x0f;
899 break;
900
901 case R_RX_RH_UIMM4p8:
902 RANGE (0, 15);
903 OP (0) &= 0x0f;
904 OP (0) |= relocation << 4;
905 break;
906
907 case R_RX_RH_UNEG4p8:
908 RANGE (-15, 0);
909 OP (0) &= 0x0f;
910 OP (0) |= (-relocation) << 4;
911 break;
912
913 /* Complex reloc handling: */
914
915 case R_RX_ABS32:
916 RX_STACK_POP (relocation);
917 #if RX_OPCODE_BIG_ENDIAN
918 OP (3) = relocation;
919 OP (2) = relocation >> 8;
920 OP (1) = relocation >> 16;
921 OP (0) = relocation >> 24;
922 #else
923 OP (0) = relocation;
924 OP (1) = relocation >> 8;
925 OP (2) = relocation >> 16;
926 OP (3) = relocation >> 24;
927 #endif
928 break;
929
930 case R_RX_ABS32_REV:
931 RX_STACK_POP (relocation);
932 #if RX_OPCODE_BIG_ENDIAN
933 OP (0) = relocation;
934 OP (1) = relocation >> 8;
935 OP (2) = relocation >> 16;
936 OP (3) = relocation >> 24;
937 #else
938 OP (3) = relocation;
939 OP (2) = relocation >> 8;
940 OP (1) = relocation >> 16;
941 OP (0) = relocation >> 24;
942 #endif
943 break;
944
945 case R_RX_ABS24S_PCREL:
946 case R_RX_ABS24S:
947 RX_STACK_POP (relocation);
948 RANGE (-0x800000, 0x7fffff);
949 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
950 {
951 OP (2) = relocation;
952 OP (1) = relocation >> 8;
953 OP (0) = relocation >> 16;
954 }
955 else
956 {
957 OP (0) = relocation;
958 OP (1) = relocation >> 8;
959 OP (2) = relocation >> 16;
960 }
961 break;
962
963 case R_RX_ABS16:
964 RX_STACK_POP (relocation);
965 RANGE (-32768, 65535);
966 #if RX_OPCODE_BIG_ENDIAN
967 OP (1) = relocation;
968 OP (0) = relocation >> 8;
969 #else
970 OP (0) = relocation;
971 OP (1) = relocation >> 8;
972 #endif
973 break;
974
975 case R_RX_ABS16_REV:
976 RX_STACK_POP (relocation);
977 RANGE (-32768, 65535);
978 #if RX_OPCODE_BIG_ENDIAN
979 OP (0) = relocation;
980 OP (1) = relocation >> 8;
981 #else
982 OP (1) = relocation;
983 OP (0) = relocation >> 8;
984 #endif
985 break;
986
987 case R_RX_ABS16S_PCREL:
988 case R_RX_ABS16S:
989 RX_STACK_POP (relocation);
990 RANGE (-32768, 32767);
991 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
992 {
993 OP (1) = relocation;
994 OP (0) = relocation >> 8;
995 }
996 else
997 {
998 OP (0) = relocation;
999 OP (1) = relocation >> 8;
1000 }
1001 break;
1002
1003 case R_RX_ABS16U:
1004 RX_STACK_POP (relocation);
1005 RANGE (0, 65536);
1006 #if RX_OPCODE_BIG_ENDIAN
1007 OP (1) = relocation;
1008 OP (0) = relocation >> 8;
1009 #else
1010 OP (0) = relocation;
1011 OP (1) = relocation >> 8;
1012 #endif
1013 break;
1014
1015 case R_RX_ABS16UL:
1016 RX_STACK_POP (relocation);
1017 relocation >>= 2;
1018 RANGE (0, 65536);
1019 #if RX_OPCODE_BIG_ENDIAN
1020 OP (1) = relocation;
1021 OP (0) = relocation >> 8;
1022 #else
1023 OP (0) = relocation;
1024 OP (1) = relocation >> 8;
1025 #endif
1026 break;
1027
1028 case R_RX_ABS16UW:
1029 RX_STACK_POP (relocation);
1030 relocation >>= 1;
1031 RANGE (0, 65536);
1032 #if RX_OPCODE_BIG_ENDIAN
1033 OP (1) = relocation;
1034 OP (0) = relocation >> 8;
1035 #else
1036 OP (0) = relocation;
1037 OP (1) = relocation >> 8;
1038 #endif
1039 break;
1040
1041 case R_RX_ABS8:
1042 RX_STACK_POP (relocation);
1043 RANGE (-128, 255);
1044 OP (0) = relocation;
1045 break;
1046
1047 case R_RX_ABS8U:
1048 RX_STACK_POP (relocation);
1049 RANGE (0, 255);
1050 OP (0) = relocation;
1051 break;
1052
1053 case R_RX_ABS8UL:
1054 RX_STACK_POP (relocation);
1055 relocation >>= 2;
1056 RANGE (0, 255);
1057 OP (0) = relocation;
1058 break;
1059
1060 case R_RX_ABS8UW:
1061 RX_STACK_POP (relocation);
1062 relocation >>= 1;
1063 RANGE (0, 255);
1064 OP (0) = relocation;
1065 break;
1066
1067 case R_RX_ABS8S_PCREL:
1068 case R_RX_ABS8S:
1069 RX_STACK_POP (relocation);
1070 RANGE (-128, 127);
1071 OP (0) = relocation;
1072 break;
1073
1074 case R_RX_SYM:
1075 if (r_symndx < symtab_hdr->sh_info)
1076 RX_STACK_PUSH (sec->output_section->vma
1077 + sec->output_offset
1078 + sym->st_value);
1079 else
1080 {
1081 if (h != NULL
1082 && (h->root.type == bfd_link_hash_defined
1083 || h->root.type == bfd_link_hash_defweak))
1084 RX_STACK_PUSH (h->root.u.def.value
1085 + sec->output_section->vma
1086 + sec->output_offset);
1087 else
1088 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1089 }
1090 break;
1091
1092 case R_RX_OPneg:
1093 {
1094 int32_t tmp;
1095
1096 RX_STACK_POP (tmp);
1097 tmp = - tmp;
1098 RX_STACK_PUSH (tmp);
1099 }
1100 break;
1101
1102 case R_RX_OPadd:
1103 {
1104 int32_t tmp1, tmp2;
1105
1106 RX_STACK_POP (tmp1);
1107 RX_STACK_POP (tmp2);
1108 tmp1 += tmp2;
1109 RX_STACK_PUSH (tmp1);
1110 }
1111 break;
1112
1113 case R_RX_OPsub:
1114 {
1115 int32_t tmp1, tmp2;
1116
1117 RX_STACK_POP (tmp1);
1118 RX_STACK_POP (tmp2);
1119 tmp2 -= tmp1;
1120 RX_STACK_PUSH (tmp2);
1121 }
1122 break;
1123
1124 case R_RX_OPmul:
1125 {
1126 int32_t tmp1, tmp2;
1127
1128 RX_STACK_POP (tmp1);
1129 RX_STACK_POP (tmp2);
1130 tmp1 *= tmp2;
1131 RX_STACK_PUSH (tmp1);
1132 }
1133 break;
1134
1135 case R_RX_OPdiv:
1136 {
1137 int32_t tmp1, tmp2;
1138
1139 RX_STACK_POP (tmp1);
1140 RX_STACK_POP (tmp2);
1141 tmp1 /= tmp2;
1142 RX_STACK_PUSH (tmp1);
1143 }
1144 break;
1145
1146 case R_RX_OPshla:
1147 {
1148 int32_t tmp1, tmp2;
1149
1150 RX_STACK_POP (tmp1);
1151 RX_STACK_POP (tmp2);
1152 tmp1 <<= tmp2;
1153 RX_STACK_PUSH (tmp1);
1154 }
1155 break;
1156
1157 case R_RX_OPshra:
1158 {
1159 int32_t tmp1, tmp2;
1160
1161 RX_STACK_POP (tmp1);
1162 RX_STACK_POP (tmp2);
1163 tmp1 >>= tmp2;
1164 RX_STACK_PUSH (tmp1);
1165 }
1166 break;
1167
1168 case R_RX_OPsctsize:
1169 RX_STACK_PUSH (input_section->size);
1170 break;
1171
1172 case R_RX_OPscttop:
1173 RX_STACK_PUSH (input_section->output_section->vma);
1174 break;
1175
1176 case R_RX_OPand:
1177 {
1178 int32_t tmp1, tmp2;
1179
1180 RX_STACK_POP (tmp1);
1181 RX_STACK_POP (tmp2);
1182 tmp1 &= tmp2;
1183 RX_STACK_PUSH (tmp1);
1184 }
1185 break;
1186
1187 case R_RX_OPor:
1188 {
1189 int32_t tmp1, tmp2;
1190
1191 RX_STACK_POP (tmp1);
1192 RX_STACK_POP (tmp2);
1193 tmp1 |= tmp2;
1194 RX_STACK_PUSH (tmp1);
1195 }
1196 break;
1197
1198 case R_RX_OPxor:
1199 {
1200 int32_t tmp1, tmp2;
1201
1202 RX_STACK_POP (tmp1);
1203 RX_STACK_POP (tmp2);
1204 tmp1 ^= tmp2;
1205 RX_STACK_PUSH (tmp1);
1206 }
1207 break;
1208
1209 case R_RX_OPnot:
1210 {
1211 int32_t tmp;
1212
1213 RX_STACK_POP (tmp);
1214 tmp = ~ tmp;
1215 RX_STACK_PUSH (tmp);
1216 }
1217 break;
1218
1219 case R_RX_OPmod:
1220 {
1221 int32_t tmp1, tmp2;
1222
1223 RX_STACK_POP (tmp1);
1224 RX_STACK_POP (tmp2);
1225 tmp1 %= tmp2;
1226 RX_STACK_PUSH (tmp1);
1227 }
1228 break;
1229
1230 case R_RX_OPromtop:
1231 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1232 break;
1233
1234 case R_RX_OPramtop:
1235 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1236 break;
1237
1238 default:
1239 r = bfd_reloc_notsupported;
1240 break;
1241 }
1242
1243 if (r != bfd_reloc_ok)
1244 {
1245 const char * msg = NULL;
1246
1247 switch (r)
1248 {
1249 case bfd_reloc_overflow:
1250 /* Catch the case of a missing function declaration
1251 and emit a more helpful error message. */
1252 if (r_type == R_RX_DIR24S_PCREL)
1253 msg = _("%B(%A): error: call to undefined function '%s'");
1254 else
1255 r = info->callbacks->reloc_overflow
1256 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1257 input_bfd, input_section, rel->r_offset);
1258 break;
1259
1260 case bfd_reloc_undefined:
1261 r = info->callbacks->undefined_symbol
1262 (info, name, input_bfd, input_section, rel->r_offset,
1263 TRUE);
1264 break;
1265
1266 case bfd_reloc_other:
1267 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1268 break;
1269
1270 case bfd_reloc_outofrange:
1271 msg = _("%B(%A): internal error: out of range error");
1272 break;
1273
1274 case bfd_reloc_notsupported:
1275 msg = _("%B(%A): internal error: unsupported relocation error");
1276 break;
1277
1278 case bfd_reloc_dangerous:
1279 msg = _("%B(%A): internal error: dangerous relocation");
1280 break;
1281
1282 default:
1283 msg = _("%B(%A): internal error: unknown error");
1284 break;
1285 }
1286
1287 if (msg)
1288 _bfd_error_handler (msg, input_bfd, input_section, name);
1289
1290 if (! r)
1291 return FALSE;
1292 }
1293 }
1294
1295 return TRUE;
1296 }
1297 \f
1298 /* Relaxation Support. */
1299
1300 /* Progression of relocations from largest operand size to smallest
1301 operand size. */
1302
1303 static int
1304 next_smaller_reloc (int r)
1305 {
1306 switch (r)
1307 {
1308 case R_RX_DIR32: return R_RX_DIR24S;
1309 case R_RX_DIR24S: return R_RX_DIR16S;
1310 case R_RX_DIR16S: return R_RX_DIR8S;
1311 case R_RX_DIR8S: return R_RX_NONE;
1312
1313 case R_RX_DIR16: return R_RX_DIR8;
1314 case R_RX_DIR8: return R_RX_NONE;
1315
1316 case R_RX_DIR16U: return R_RX_DIR8U;
1317 case R_RX_DIR8U: return R_RX_NONE;
1318
1319 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1320 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1321 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1322
1323 case R_RX_DIR16UL: return R_RX_DIR8UL;
1324 case R_RX_DIR8UL: return R_RX_NONE;
1325 case R_RX_DIR16UW: return R_RX_DIR8UW;
1326 case R_RX_DIR8UW: return R_RX_NONE;
1327
1328 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1329 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1330 case R_RX_RH_16_OP: return R_RX_DIR8;
1331
1332 case R_RX_ABS32: return R_RX_ABS24S;
1333 case R_RX_ABS24S: return R_RX_ABS16S;
1334 case R_RX_ABS16: return R_RX_ABS8;
1335 case R_RX_ABS16U: return R_RX_ABS8U;
1336 case R_RX_ABS16S: return R_RX_ABS8S;
1337 case R_RX_ABS8: return R_RX_NONE;
1338 case R_RX_ABS8U: return R_RX_NONE;
1339 case R_RX_ABS8S: return R_RX_NONE;
1340 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1341 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1342 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1343 case R_RX_ABS16UL: return R_RX_ABS8UL;
1344 case R_RX_ABS16UW: return R_RX_ABS8UW;
1345 case R_RX_ABS8UL: return R_RX_NONE;
1346 case R_RX_ABS8UW: return R_RX_NONE;
1347 }
1348 return r;
1349 };
1350
1351 /* Delete some bytes from a section while relaxing. */
1352
1353 static bfd_boolean
1354 elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1355 Elf_Internal_Rela *alignment_rel, int force_snip)
1356 {
1357 Elf_Internal_Shdr * symtab_hdr;
1358 unsigned int sec_shndx;
1359 bfd_byte * contents;
1360 Elf_Internal_Rela * irel;
1361 Elf_Internal_Rela * irelend;
1362 Elf_Internal_Sym * isym;
1363 Elf_Internal_Sym * isymend;
1364 bfd_vma toaddr;
1365 unsigned int symcount;
1366 struct elf_link_hash_entry ** sym_hashes;
1367 struct elf_link_hash_entry ** end_hashes;
1368
1369 if (!alignment_rel)
1370 force_snip = 1;
1371
1372 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1373
1374 contents = elf_section_data (sec)->this_hdr.contents;
1375
1376 /* The deletion must stop at the next alignment boundary, if
1377 ALIGNMENT_REL is non-NULL. */
1378 toaddr = sec->size;
1379 if (alignment_rel)
1380 toaddr = alignment_rel->r_offset;
1381
1382 irel = elf_section_data (sec)->relocs;
1383 irelend = irel + sec->reloc_count;
1384
1385 /* Actually delete the bytes. */
1386 memmove (contents + addr, contents + addr + count,
1387 (size_t) (toaddr - addr - count));
1388
1389 /* If we don't have an alignment marker to worry about, we can just
1390 shrink the section. Otherwise, we have to fill in the newly
1391 created gap with NOP insns (0x03). */
1392 if (force_snip)
1393 sec->size -= count;
1394 else
1395 memset (contents + toaddr - count, 0x03, count);
1396
1397 /* Adjust all the relocs. */
1398 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1399 {
1400 /* Get the new reloc address. */
1401 if (irel->r_offset > addr
1402 && (irel->r_offset < toaddr
1403 || (force_snip && irel->r_offset == toaddr)))
1404 irel->r_offset -= count;
1405
1406 /* If we see an ALIGN marker at the end of the gap, we move it
1407 to the beginning of the gap, since marking these gaps is what
1408 they're for. */
1409 if (irel->r_offset == toaddr
1410 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1411 && irel->r_addend & RX_RELAXA_ALIGN)
1412 irel->r_offset -= count;
1413 }
1414
1415 /* Adjust the local symbols defined in this section. */
1416 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1417 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1418 isymend = isym + symtab_hdr->sh_info;
1419
1420 for (; isym < isymend; isym++)
1421 {
1422 /* If the symbol is in the range of memory we just moved, we
1423 have to adjust its value. */
1424 if (isym->st_shndx == sec_shndx
1425 && isym->st_value > addr
1426 && isym->st_value < toaddr)
1427 isym->st_value -= count;
1428
1429 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1430 *end* is in the moved bytes but it's *start* isn't), then we
1431 must adjust its size. */
1432 if (isym->st_shndx == sec_shndx
1433 && isym->st_value < addr
1434 && isym->st_value + isym->st_size > addr
1435 && isym->st_value + isym->st_size < toaddr)
1436 isym->st_size -= count;
1437 }
1438
1439 /* Now adjust the global symbols defined in this section. */
1440 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1441 - symtab_hdr->sh_info);
1442 sym_hashes = elf_sym_hashes (abfd);
1443 end_hashes = sym_hashes + symcount;
1444
1445 for (; sym_hashes < end_hashes; sym_hashes++)
1446 {
1447 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1448
1449 if ((sym_hash->root.type == bfd_link_hash_defined
1450 || sym_hash->root.type == bfd_link_hash_defweak)
1451 && sym_hash->root.u.def.section == sec)
1452 {
1453 /* As above, adjust the value if needed. */
1454 if (sym_hash->root.u.def.value > addr
1455 && sym_hash->root.u.def.value < toaddr)
1456 sym_hash->root.u.def.value -= count;
1457
1458 /* As above, adjust the size if needed. */
1459 if (sym_hash->root.u.def.value < addr
1460 && sym_hash->root.u.def.value + sym_hash->size > addr
1461 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1462 sym_hash->size -= count;
1463 }
1464 }
1465
1466 return TRUE;
1467 }
1468
1469 /* Used to sort relocs by address. If relocs have the same address,
1470 we maintain their relative order, except that R_RX_RH_RELAX
1471 alignment relocs must be the first reloc for any given address. */
1472
1473 static void
1474 reloc_bubblesort (Elf_Internal_Rela * r, int count)
1475 {
1476 int i;
1477 bfd_boolean again;
1478 bfd_boolean swappit;
1479
1480 /* This is almost a classic bubblesort. It's the slowest sort, but
1481 we're taking advantage of the fact that the relocations are
1482 mostly in order already (the assembler emits them that way) and
1483 we need relocs with the same address to remain in the same
1484 relative order. */
1485 again = TRUE;
1486 while (again)
1487 {
1488 again = FALSE;
1489 for (i = 0; i < count - 1; i ++)
1490 {
1491 if (r[i].r_offset > r[i + 1].r_offset)
1492 swappit = TRUE;
1493 else if (r[i].r_offset < r[i + 1].r_offset)
1494 swappit = FALSE;
1495 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1496 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1497 swappit = TRUE;
1498 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1499 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1500 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1501 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1502 swappit = TRUE;
1503 else
1504 swappit = FALSE;
1505
1506 if (swappit)
1507 {
1508 Elf_Internal_Rela tmp;
1509
1510 tmp = r[i];
1511 r[i] = r[i + 1];
1512 r[i + 1] = tmp;
1513 /* If we do move a reloc back, re-scan to see if it
1514 needs to be moved even further back. This avoids
1515 most of the O(n^2) behavior for our cases. */
1516 if (i > 0)
1517 i -= 2;
1518 again = TRUE;
1519 }
1520 }
1521 }
1522 }
1523
1524
1525 #define OFFSET_FOR_RELOC(rel, lrel, scale) \
1526 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1527 lrel, abfd, sec, link_info, scale)
1528
1529 static bfd_vma
1530 rx_offset_for_reloc (bfd * abfd,
1531 Elf_Internal_Rela * rel,
1532 Elf_Internal_Shdr * symtab_hdr,
1533 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1534 Elf_Internal_Sym * intsyms,
1535 Elf_Internal_Rela ** lrel,
1536 bfd * input_bfd,
1537 asection * input_section,
1538 struct bfd_link_info * info,
1539 int * scale)
1540 {
1541 bfd_vma symval;
1542 bfd_reloc_status_type r;
1543
1544 *scale = 1;
1545
1546 /* REL is the first of 1..N relocations. We compute the symbol
1547 value for each relocation, then combine them if needed. LREL
1548 gets a pointer to the last relocation used. */
1549 while (1)
1550 {
1551 int32_t tmp1, tmp2;
1552
1553 /* Get the value of the symbol referred to by the reloc. */
1554 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1555 {
1556 /* A local symbol. */
1557 Elf_Internal_Sym *isym;
1558 asection *ssec;
1559
1560 isym = intsyms + ELF32_R_SYM (rel->r_info);
1561
1562 if (isym->st_shndx == SHN_UNDEF)
1563 ssec = bfd_und_section_ptr;
1564 else if (isym->st_shndx == SHN_ABS)
1565 ssec = bfd_abs_section_ptr;
1566 else if (isym->st_shndx == SHN_COMMON)
1567 ssec = bfd_com_section_ptr;
1568 else
1569 ssec = bfd_section_from_elf_index (abfd,
1570 isym->st_shndx);
1571
1572 /* Initial symbol value. */
1573 symval = isym->st_value;
1574
1575 /* GAS may have made this symbol relative to a section, in
1576 which case, we have to add the addend to find the
1577 symbol. */
1578 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1579 symval += rel->r_addend;
1580
1581 if (ssec)
1582 {
1583 if ((ssec->flags & SEC_MERGE)
1584 && ssec->sec_info_type == ELF_INFO_TYPE_MERGE)
1585 symval = _bfd_merged_section_offset (abfd, & ssec,
1586 elf_section_data (ssec)->sec_info,
1587 symval);
1588 }
1589
1590 /* Now make the offset relative to where the linker is putting it. */
1591 if (ssec)
1592 symval +=
1593 ssec->output_section->vma + ssec->output_offset;
1594
1595 symval += rel->r_addend;
1596 }
1597 else
1598 {
1599 unsigned long indx;
1600 struct elf_link_hash_entry * h;
1601
1602 /* An external symbol. */
1603 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1604 h = elf_sym_hashes (abfd)[indx];
1605 BFD_ASSERT (h != NULL);
1606
1607 if (h->root.type != bfd_link_hash_defined
1608 && h->root.type != bfd_link_hash_defweak)
1609 {
1610 /* This appears to be a reference to an undefined
1611 symbol. Just ignore it--it will be caught by the
1612 regular reloc processing. */
1613 if (lrel)
1614 *lrel = rel;
1615 return 0;
1616 }
1617
1618 symval = (h->root.u.def.value
1619 + h->root.u.def.section->output_section->vma
1620 + h->root.u.def.section->output_offset);
1621
1622 symval += rel->r_addend;
1623 }
1624
1625 switch (ELF32_R_TYPE (rel->r_info))
1626 {
1627 case R_RX_SYM:
1628 RX_STACK_PUSH (symval);
1629 break;
1630
1631 case R_RX_OPneg:
1632 RX_STACK_POP (tmp1);
1633 tmp1 = - tmp1;
1634 RX_STACK_PUSH (tmp1);
1635 break;
1636
1637 case R_RX_OPadd:
1638 RX_STACK_POP (tmp1);
1639 RX_STACK_POP (tmp2);
1640 tmp1 += tmp2;
1641 RX_STACK_PUSH (tmp1);
1642 break;
1643
1644 case R_RX_OPsub:
1645 RX_STACK_POP (tmp1);
1646 RX_STACK_POP (tmp2);
1647 tmp2 -= tmp1;
1648 RX_STACK_PUSH (tmp2);
1649 break;
1650
1651 case R_RX_OPmul:
1652 RX_STACK_POP (tmp1);
1653 RX_STACK_POP (tmp2);
1654 tmp1 *= tmp2;
1655 RX_STACK_PUSH (tmp1);
1656 break;
1657
1658 case R_RX_OPdiv:
1659 RX_STACK_POP (tmp1);
1660 RX_STACK_POP (tmp2);
1661 tmp1 /= tmp2;
1662 RX_STACK_PUSH (tmp1);
1663 break;
1664
1665 case R_RX_OPshla:
1666 RX_STACK_POP (tmp1);
1667 RX_STACK_POP (tmp2);
1668 tmp1 <<= tmp2;
1669 RX_STACK_PUSH (tmp1);
1670 break;
1671
1672 case R_RX_OPshra:
1673 RX_STACK_POP (tmp1);
1674 RX_STACK_POP (tmp2);
1675 tmp1 >>= tmp2;
1676 RX_STACK_PUSH (tmp1);
1677 break;
1678
1679 case R_RX_OPsctsize:
1680 RX_STACK_PUSH (input_section->size);
1681 break;
1682
1683 case R_RX_OPscttop:
1684 RX_STACK_PUSH (input_section->output_section->vma);
1685 break;
1686
1687 case R_RX_OPand:
1688 RX_STACK_POP (tmp1);
1689 RX_STACK_POP (tmp2);
1690 tmp1 &= tmp2;
1691 RX_STACK_PUSH (tmp1);
1692 break;
1693
1694 case R_RX_OPor:
1695 RX_STACK_POP (tmp1);
1696 RX_STACK_POP (tmp2);
1697 tmp1 |= tmp2;
1698 RX_STACK_PUSH (tmp1);
1699 break;
1700
1701 case R_RX_OPxor:
1702 RX_STACK_POP (tmp1);
1703 RX_STACK_POP (tmp2);
1704 tmp1 ^= tmp2;
1705 RX_STACK_PUSH (tmp1);
1706 break;
1707
1708 case R_RX_OPnot:
1709 RX_STACK_POP (tmp1);
1710 tmp1 = ~ tmp1;
1711 RX_STACK_PUSH (tmp1);
1712 break;
1713
1714 case R_RX_OPmod:
1715 RX_STACK_POP (tmp1);
1716 RX_STACK_POP (tmp2);
1717 tmp1 %= tmp2;
1718 RX_STACK_PUSH (tmp1);
1719 break;
1720
1721 case R_RX_OPromtop:
1722 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1723 break;
1724
1725 case R_RX_OPramtop:
1726 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1727 break;
1728
1729 case R_RX_DIR16UL:
1730 case R_RX_DIR8UL:
1731 case R_RX_ABS16UL:
1732 case R_RX_ABS8UL:
1733 if (rx_stack_top)
1734 RX_STACK_POP (symval);
1735 if (lrel)
1736 *lrel = rel;
1737 *scale = 4;
1738 return symval;
1739
1740 case R_RX_DIR16UW:
1741 case R_RX_DIR8UW:
1742 case R_RX_ABS16UW:
1743 case R_RX_ABS8UW:
1744 if (rx_stack_top)
1745 RX_STACK_POP (symval);
1746 if (lrel)
1747 *lrel = rel;
1748 *scale = 2;
1749 return symval;
1750
1751 default:
1752 if (rx_stack_top)
1753 RX_STACK_POP (symval);
1754 if (lrel)
1755 *lrel = rel;
1756 return symval;
1757 }
1758
1759 rel ++;
1760 }
1761 }
1762
1763 static void
1764 move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1765 {
1766 bfd_vma old_offset = srel->r_offset;
1767
1768 irel ++;
1769 while (irel <= srel)
1770 {
1771 if (irel->r_offset == old_offset)
1772 irel->r_offset += delta;
1773 irel ++;
1774 }
1775 }
1776
1777 /* Relax one section. */
1778
1779 static bfd_boolean
1780 elf32_rx_relax_section (bfd * abfd,
1781 asection * sec,
1782 struct bfd_link_info * link_info,
1783 bfd_boolean * again,
1784 bfd_boolean allow_pcrel3)
1785 {
1786 Elf_Internal_Shdr * symtab_hdr;
1787 Elf_Internal_Shdr * shndx_hdr;
1788 Elf_Internal_Rela * internal_relocs;
1789 Elf_Internal_Rela * free_relocs = NULL;
1790 Elf_Internal_Rela * irel;
1791 Elf_Internal_Rela * srel;
1792 Elf_Internal_Rela * irelend;
1793 Elf_Internal_Rela * next_alignment;
1794 Elf_Internal_Rela * prev_alignment;
1795 bfd_byte * contents = NULL;
1796 bfd_byte * free_contents = NULL;
1797 Elf_Internal_Sym * intsyms = NULL;
1798 Elf_Internal_Sym * free_intsyms = NULL;
1799 Elf_External_Sym_Shndx * shndx_buf = NULL;
1800 bfd_vma pc;
1801 bfd_vma sec_start;
1802 bfd_vma symval = 0;
1803 int pcrel = 0;
1804 int code = 0;
1805 int section_alignment_glue;
1806 /* how much to scale the relocation by - 1, 2, or 4. */
1807 int scale;
1808
1809 /* Assume nothing changes. */
1810 *again = FALSE;
1811
1812 /* We don't have to do anything for a relocatable link, if
1813 this section does not have relocs, or if this is not a
1814 code section. */
1815 if (link_info->relocatable
1816 || (sec->flags & SEC_RELOC) == 0
1817 || sec->reloc_count == 0
1818 || (sec->flags & SEC_CODE) == 0)
1819 return TRUE;
1820
1821 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1822 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
1823
1824 sec_start = sec->output_section->vma + sec->output_offset;
1825
1826 /* Get the section contents. */
1827 if (elf_section_data (sec)->this_hdr.contents != NULL)
1828 contents = elf_section_data (sec)->this_hdr.contents;
1829 /* Go get them off disk. */
1830 else
1831 {
1832 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
1833 goto error_return;
1834 elf_section_data (sec)->this_hdr.contents = contents;
1835 }
1836
1837 /* Read this BFD's symbols. */
1838 /* Get cached copy if it exists. */
1839 if (symtab_hdr->contents != NULL)
1840 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
1841 else
1842 {
1843 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
1844 symtab_hdr->contents = (bfd_byte *) intsyms;
1845 }
1846
1847 if (shndx_hdr->sh_size != 0)
1848 {
1849 bfd_size_type amt;
1850
1851 amt = symtab_hdr->sh_info;
1852 amt *= sizeof (Elf_External_Sym_Shndx);
1853 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
1854 if (shndx_buf == NULL)
1855 goto error_return;
1856 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
1857 || bfd_bread ((PTR) shndx_buf, amt, abfd) != amt)
1858 goto error_return;
1859 shndx_hdr->contents = (bfd_byte *) shndx_buf;
1860 }
1861
1862 /* Get a copy of the native relocations. */
1863 internal_relocs = (_bfd_elf_link_read_relocs
1864 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
1865 link_info->keep_memory));
1866 if (internal_relocs == NULL)
1867 goto error_return;
1868 if (! link_info->keep_memory)
1869 free_relocs = internal_relocs;
1870
1871 /* The RL_ relocs must be just before the operand relocs they go
1872 with, so we must sort them to guarantee this. We use bubblesort
1873 instead of qsort so we can guarantee that relocs with the same
1874 address remain in the same relative order. */
1875 reloc_bubblesort (internal_relocs, sec->reloc_count);
1876
1877 /* Walk through them looking for relaxing opportunities. */
1878 irelend = internal_relocs + sec->reloc_count;
1879
1880 /* This will either be NULL or a pointer to the next alignment
1881 relocation. */
1882 next_alignment = internal_relocs;
1883 /* This will be the previous alignment, although at first it points
1884 to the first real relocation. */
1885 prev_alignment = internal_relocs;
1886
1887 /* We calculate worst case shrinkage caused by alignment directives.
1888 No fool-proof, but better than either ignoring the problem or
1889 doing heavy duty analysis of all the alignment markers in all
1890 input sections. */
1891 section_alignment_glue = 0;
1892 for (irel = internal_relocs; irel < irelend; irel++)
1893 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1894 && irel->r_addend & RX_RELAXA_ALIGN)
1895 {
1896 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1897
1898 if (section_alignment_glue < this_glue)
1899 section_alignment_glue = this_glue;
1900 }
1901 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
1902 shrinkage. */
1903 section_alignment_glue *= 2;
1904
1905 for (irel = internal_relocs; irel < irelend; irel++)
1906 {
1907 unsigned char *insn;
1908 int nrelocs;
1909
1910 /* The insns we care about are all marked with one of these. */
1911 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
1912 continue;
1913
1914 if (irel->r_addend & RX_RELAXA_ALIGN
1915 || next_alignment == internal_relocs)
1916 {
1917 /* When we delete bytes, we need to maintain all the alignments
1918 indicated. In addition, we need to be careful about relaxing
1919 jumps across alignment boundaries - these displacements
1920 *grow* when we delete bytes. For now, don't shrink
1921 displacements across an alignment boundary, just in case.
1922 Note that this only affects relocations to the same
1923 section. */
1924 prev_alignment = next_alignment;
1925 next_alignment += 2;
1926 while (next_alignment < irelend
1927 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
1928 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
1929 next_alignment ++;
1930 if (next_alignment >= irelend || next_alignment->r_offset == 0)
1931 next_alignment = NULL;
1932 }
1933
1934 /* When we hit alignment markers, see if we've shrunk enough
1935 before them to reduce the gap without violating the alignment
1936 requirements. */
1937 if (irel->r_addend & RX_RELAXA_ALIGN)
1938 {
1939 /* At this point, the next relocation *should* be the ELIGN
1940 end marker. */
1941 Elf_Internal_Rela *erel = irel + 1;
1942 unsigned int alignment, nbytes;
1943
1944 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
1945 continue;
1946 if (!(erel->r_addend & RX_RELAXA_ELIGN))
1947 continue;
1948
1949 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
1950
1951 if (erel->r_offset - irel->r_offset < alignment)
1952 continue;
1953
1954 nbytes = erel->r_offset - irel->r_offset;
1955 nbytes /= alignment;
1956 nbytes *= alignment;
1957
1958 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
1959 erel->r_offset == sec->size);
1960 *again = TRUE;
1961
1962 continue;
1963 }
1964
1965 if (irel->r_addend & RX_RELAXA_ELIGN)
1966 continue;
1967
1968 insn = contents + irel->r_offset;
1969
1970 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
1971
1972 /* At this point, we have an insn that is a candidate for linker
1973 relaxation. There are NRELOCS relocs following that may be
1974 relaxed, although each reloc may be made of more than one
1975 reloc entry (such as gp-rel symbols). */
1976
1977 /* Get the value of the symbol referred to by the reloc. Just
1978 in case this is the last reloc in the list, use the RL's
1979 addend to choose between this reloc (no addend) or the next
1980 (yes addend, which means at least one following reloc). */
1981
1982 /* srel points to the "current" reloction for this insn -
1983 actually the last reloc for a given operand, which is the one
1984 we need to update. We check the relaxations in the same
1985 order that the relocations happen, so we'll just push it
1986 along as we go. */
1987 srel = irel;
1988
1989 pc = sec->output_section->vma + sec->output_offset
1990 + srel->r_offset;
1991
1992 #define GET_RELOC \
1993 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
1994 pcrel = symval - pc + srel->r_addend; \
1995 nrelocs --;
1996
1997 #define SNIPNR(offset, nbytes) \
1998 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
1999 #define SNIP(offset, nbytes, newtype) \
2000 SNIPNR (offset, nbytes); \
2001 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2002
2003 /* The order of these bit tests must match the order that the
2004 relocs appear in. Since we sorted those by offset, we can
2005 predict them. */
2006
2007 /* Note that the numbers in, say, DSP6 are the bit offsets of
2008 the code fields that describe the operand. Bits number 0 for
2009 the MSB of insn[0]. */
2010
2011 /* DSP* codes:
2012 0 00 [reg]
2013 1 01 dsp:8[reg]
2014 2 10 dsp:16[reg]
2015 3 11 reg */
2016 if (irel->r_addend & RX_RELAXA_DSP6)
2017 {
2018 GET_RELOC;
2019
2020 code = insn[0] & 3;
2021 if (code == 2 && symval/scale <= 255)
2022 {
2023 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2024 insn[0] &= 0xfc;
2025 insn[0] |= 0x01;
2026 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2027 if (newrel != ELF32_R_TYPE (srel->r_info))
2028 {
2029 SNIP (3, 1, newrel);
2030 *again = TRUE;
2031 }
2032 }
2033
2034 else if (code == 1 && symval == 0)
2035 {
2036 insn[0] &= 0xfc;
2037 SNIP (2, 1, R_RX_NONE);
2038 *again = TRUE;
2039 }
2040
2041 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2042 else if (code == 1 && symval/scale <= 31
2043 /* Decodable bits. */
2044 && (insn[0] & 0xcc) == 0xcc
2045 /* Width. */
2046 && (insn[0] & 0x30) != 3
2047 /* Register MSBs. */
2048 && (insn[1] & 0x88) == 0x00)
2049 {
2050 int newrel = 0;
2051
2052 insn[0] = 0x88 | (insn[0] & 0x30);
2053 /* The register fields are in the right place already. */
2054
2055 /* We can't relax this new opcode. */
2056 irel->r_addend = 0;
2057
2058 switch ((insn[0] & 0x30) >> 4)
2059 {
2060 case 0:
2061 newrel = R_RX_RH_ABS5p5B;
2062 break;
2063 case 1:
2064 newrel = R_RX_RH_ABS5p5W;
2065 break;
2066 case 2:
2067 newrel = R_RX_RH_ABS5p5L;
2068 break;
2069 }
2070
2071 move_reloc (irel, srel, -2);
2072 SNIP (2, 1, newrel);
2073 }
2074
2075 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2076 else if (code == 1 && symval/scale <= 31
2077 /* Decodable bits. */
2078 && (insn[0] & 0xf8) == 0x58
2079 /* Register MSBs. */
2080 && (insn[1] & 0x88) == 0x00)
2081 {
2082 int newrel = 0;
2083
2084 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2085 /* The register fields are in the right place already. */
2086
2087 /* We can't relax this new opcode. */
2088 irel->r_addend = 0;
2089
2090 switch ((insn[0] & 0x08) >> 3)
2091 {
2092 case 0:
2093 newrel = R_RX_RH_ABS5p5B;
2094 break;
2095 case 1:
2096 newrel = R_RX_RH_ABS5p5W;
2097 break;
2098 }
2099
2100 move_reloc (irel, srel, -2);
2101 SNIP (2, 1, newrel);
2102 }
2103 }
2104
2105 /* A DSP4 operand always follows a DSP6 operand, even if there's
2106 no relocation for it. We have to read the code out of the
2107 opcode to calculate the offset of the operand. */
2108 if (irel->r_addend & RX_RELAXA_DSP4)
2109 {
2110 int code6, offset = 0;
2111
2112 GET_RELOC;
2113
2114 code6 = insn[0] & 0x03;
2115 switch (code6)
2116 {
2117 case 0: offset = 2; break;
2118 case 1: offset = 3; break;
2119 case 2: offset = 4; break;
2120 case 3: offset = 2; break;
2121 }
2122
2123 code = (insn[0] & 0x0c) >> 2;
2124
2125 if (code == 2 && symval / scale <= 255)
2126 {
2127 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2128
2129 insn[0] &= 0xf3;
2130 insn[0] |= 0x04;
2131 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2132 if (newrel != ELF32_R_TYPE (srel->r_info))
2133 {
2134 SNIP (offset+1, 1, newrel);
2135 *again = TRUE;
2136 }
2137 }
2138
2139 else if (code == 1 && symval == 0)
2140 {
2141 insn[0] &= 0xf3;
2142 SNIP (offset, 1, R_RX_NONE);
2143 *again = TRUE;
2144 }
2145 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2146 else if (code == 1 && symval/scale <= 31
2147 /* Decodable bits. */
2148 && (insn[0] & 0xc3) == 0xc3
2149 /* Width. */
2150 && (insn[0] & 0x30) != 3
2151 /* Register MSBs. */
2152 && (insn[1] & 0x88) == 0x00)
2153 {
2154 int newrel = 0;
2155
2156 insn[0] = 0x80 | (insn[0] & 0x30);
2157 /* The register fields are in the right place already. */
2158
2159 /* We can't relax this new opcode. */
2160 irel->r_addend = 0;
2161
2162 switch ((insn[0] & 0x30) >> 4)
2163 {
2164 case 0:
2165 newrel = R_RX_RH_ABS5p5B;
2166 break;
2167 case 1:
2168 newrel = R_RX_RH_ABS5p5W;
2169 break;
2170 case 2:
2171 newrel = R_RX_RH_ABS5p5L;
2172 break;
2173 }
2174
2175 move_reloc (irel, srel, -2);
2176 SNIP (2, 1, newrel);
2177 }
2178 }
2179
2180 /* These always occur alone, but the offset depends on whether
2181 it's a MEMEX opcode (0x06) or not. */
2182 if (irel->r_addend & RX_RELAXA_DSP14)
2183 {
2184 int offset;
2185 GET_RELOC;
2186
2187 if (insn[0] == 0x06)
2188 offset = 3;
2189 else
2190 offset = 4;
2191
2192 code = insn[1] & 3;
2193
2194 if (code == 2 && symval / scale <= 255)
2195 {
2196 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2197
2198 insn[1] &= 0xfc;
2199 insn[1] |= 0x01;
2200 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2201 if (newrel != ELF32_R_TYPE (srel->r_info))
2202 {
2203 SNIP (offset, 1, newrel);
2204 *again = TRUE;
2205 }
2206 }
2207 else if (code == 1 && symval == 0)
2208 {
2209 insn[1] &= 0xfc;
2210 SNIP (offset, 1, R_RX_NONE);
2211 *again = TRUE;
2212 }
2213 }
2214
2215 /* IMM* codes:
2216 0 00 imm:32
2217 1 01 simm:8
2218 2 10 simm:16
2219 3 11 simm:24. */
2220
2221 /* These always occur alone. */
2222 if (irel->r_addend & RX_RELAXA_IMM6)
2223 {
2224 long ssymval;
2225
2226 GET_RELOC;
2227
2228 /* These relocations sign-extend, so we must do signed compares. */
2229 ssymval = (long) symval;
2230
2231 code = insn[0] & 0x03;
2232
2233 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2234 {
2235 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2236
2237 insn[0] &= 0xfc;
2238 insn[0] |= 0x03;
2239 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2240 if (newrel != ELF32_R_TYPE (srel->r_info))
2241 {
2242 SNIP (2, 1, newrel);
2243 *again = TRUE;
2244 }
2245 }
2246
2247 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2248 {
2249 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2250
2251 insn[0] &= 0xfc;
2252 insn[0] |= 0x02;
2253 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2254 if (newrel != ELF32_R_TYPE (srel->r_info))
2255 {
2256 SNIP (2, 1, newrel);
2257 *again = TRUE;
2258 }
2259 }
2260
2261 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2262 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2263 /* Decodable bits. */
2264 && (insn[0] & 0xfc) == 0x74
2265 /* Decodable bits. */
2266 && ((insn[1] & 0xf0) == 0x00))
2267 {
2268 int newrel;
2269
2270 insn[0] = 0x75;
2271 insn[1] = 0x50 | (insn[1] & 0x0f);
2272
2273 /* We can't relax this new opcode. */
2274 irel->r_addend = 0;
2275
2276 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2277 newrel = R_RX_ABS8U;
2278 else
2279 newrel = R_RX_DIR8U;
2280
2281 SNIP (2, 1, newrel);
2282 *again = TRUE;
2283 }
2284
2285 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2286 {
2287 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2288
2289 insn[0] &= 0xfc;
2290 insn[0] |= 0x01;
2291 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2292 if (newrel != ELF32_R_TYPE (srel->r_info))
2293 {
2294 SNIP (2, 1, newrel);
2295 *again = TRUE;
2296 }
2297 }
2298
2299 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2300 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2301 /* Decodable bits and immediate type. */
2302 && insn[0] == 0x75
2303 /* Decodable bits. */
2304 && (insn[1] & 0xc0) == 0x00)
2305 {
2306 static const int newop[4] = { 1, 3, 4, 5 };
2307
2308 insn[0] = 0x60 | newop[insn[1] >> 4];
2309 /* The register number doesn't move. */
2310
2311 /* We can't relax this new opcode. */
2312 irel->r_addend = 0;
2313
2314 move_reloc (irel, srel, -1);
2315
2316 SNIP (2, 1, R_RX_RH_UIMM4p8);
2317 *again = TRUE;
2318 }
2319
2320 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2321 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2322 /* Decodable bits and immediate type. */
2323 && insn[0] == 0x71
2324 /* Same register for source and destination. */
2325 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2326 {
2327 int newrel;
2328
2329 /* Note that we can't turn "add $0,Rs" into a NOP
2330 because the flags need to be set right. */
2331
2332 if (ssymval < 0)
2333 {
2334 insn[0] = 0x60; /* Subtract. */
2335 newrel = R_RX_RH_UNEG4p8;
2336 }
2337 else
2338 {
2339 insn[0] = 0x62; /* Add. */
2340 newrel = R_RX_RH_UIMM4p8;
2341 }
2342
2343 /* The register number is in the right place. */
2344
2345 /* We can't relax this new opcode. */
2346 irel->r_addend = 0;
2347
2348 move_reloc (irel, srel, -1);
2349
2350 SNIP (2, 1, newrel);
2351 *again = TRUE;
2352 }
2353 }
2354
2355 /* These are either matched with a DSP6 (2-byte base) or an id24
2356 (3-byte base). */
2357 if (irel->r_addend & RX_RELAXA_IMM12)
2358 {
2359 int dspcode, offset = 0;
2360 long ssymval;
2361
2362 GET_RELOC;
2363
2364 if ((insn[0] & 0xfc) == 0xfc)
2365 dspcode = 1; /* Just something with one byte operand. */
2366 else
2367 dspcode = insn[0] & 3;
2368 switch (dspcode)
2369 {
2370 case 0: offset = 2; break;
2371 case 1: offset = 3; break;
2372 case 2: offset = 4; break;
2373 case 3: offset = 2; break;
2374 }
2375
2376 /* These relocations sign-extend, so we must do signed compares. */
2377 ssymval = (long) symval;
2378
2379 code = (insn[1] >> 2) & 3;
2380 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2381 {
2382 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2383
2384 insn[1] &= 0xf3;
2385 insn[1] |= 0x0c;
2386 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2387 if (newrel != ELF32_R_TYPE (srel->r_info))
2388 {
2389 SNIP (offset, 1, newrel);
2390 *again = TRUE;
2391 }
2392 }
2393
2394 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2395 {
2396 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2397
2398 insn[1] &= 0xf3;
2399 insn[1] |= 0x08;
2400 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2401 if (newrel != ELF32_R_TYPE (srel->r_info))
2402 {
2403 SNIP (offset, 1, newrel);
2404 *again = TRUE;
2405 }
2406 }
2407
2408 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2409 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2410 /* Decodable bits. */
2411 && insn[0] == 0xfb
2412 /* Decodable bits. */
2413 && ((insn[1] & 0x03) == 0x02))
2414 {
2415 int newrel;
2416
2417 insn[0] = 0x75;
2418 insn[1] = 0x40 | (insn[1] >> 4);
2419
2420 /* We can't relax this new opcode. */
2421 irel->r_addend = 0;
2422
2423 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2424 newrel = R_RX_ABS8U;
2425 else
2426 newrel = R_RX_DIR8U;
2427
2428 SNIP (2, 1, newrel);
2429 *again = TRUE;
2430 }
2431
2432 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2433 {
2434 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2435
2436 insn[1] &= 0xf3;
2437 insn[1] |= 0x04;
2438 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2439 if (newrel != ELF32_R_TYPE(srel->r_info))
2440 {
2441 SNIP (offset, 1, newrel);
2442 *again = TRUE;
2443 }
2444 }
2445
2446 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2447 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2448 /* Decodable bits. */
2449 && insn[0] == 0xfb
2450 /* Decodable bits. */
2451 && ((insn[1] & 0x03) == 0x02))
2452 {
2453 insn[0] = 0x66;
2454 insn[1] = insn[1] >> 4;
2455
2456 /* We can't relax this new opcode. */
2457 irel->r_addend = 0;
2458
2459 move_reloc (irel, srel, -1);
2460
2461 SNIP (2, 1, R_RX_RH_UIMM4p8);
2462 *again = TRUE;
2463 }
2464 }
2465
2466 if (irel->r_addend & RX_RELAXA_BRA)
2467 {
2468 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2469 int max_pcrel3 = 4;
2470 int alignment_glue = 0;
2471
2472 GET_RELOC;
2473
2474 /* Branches over alignment chunks are problematic, as
2475 deleting bytes here makes the branch *further* away. We
2476 can be agressive with branches within this alignment
2477 block, but not branches outside it. */
2478 if ((prev_alignment == NULL
2479 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2480 && (next_alignment == NULL
2481 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2482 alignment_glue = section_alignment_glue;
2483
2484 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2485 && srel[1].r_addend & RX_RELAXA_BRA
2486 && srel[1].r_offset < irel->r_offset + pcrel)
2487 max_pcrel3 ++;
2488
2489 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2490
2491 /* The values we compare PCREL with are not what you'd
2492 expect; they're off by a little to compensate for (1)
2493 where the reloc is relative to the insn, and (2) how much
2494 the insn is going to change when we relax it. */
2495
2496 /* These we have to decode. */
2497 switch (insn[0])
2498 {
2499 case 0x04: /* BRA pcdsp:24 */
2500 if (-32768 + alignment_glue <= pcrel
2501 && pcrel <= 32765 - alignment_glue)
2502 {
2503 insn[0] = 0x38;
2504 SNIP (3, 1, newrel);
2505 *again = TRUE;
2506 }
2507 break;
2508
2509 case 0x38: /* BRA pcdsp:16 */
2510 if (-128 + alignment_glue <= pcrel
2511 && pcrel <= 127 - alignment_glue)
2512 {
2513 insn[0] = 0x2e;
2514 SNIP (2, 1, newrel);
2515 *again = TRUE;
2516 }
2517 break;
2518
2519 case 0x2e: /* BRA pcdsp:8 */
2520 /* Note that there's a risk here of shortening things so
2521 much that we no longer fit this reloc; it *should*
2522 only happen when you branch across a branch, and that
2523 branch also devolves into BRA.S. "Real" code should
2524 be OK. */
2525 if (max_pcrel3 + alignment_glue <= pcrel
2526 && pcrel <= 10 - alignment_glue
2527 && allow_pcrel3)
2528 {
2529 insn[0] = 0x08;
2530 SNIP (1, 1, newrel);
2531 move_reloc (irel, srel, -1);
2532 *again = TRUE;
2533 }
2534 break;
2535
2536 case 0x05: /* BSR pcdsp:24 */
2537 if (-32768 + alignment_glue <= pcrel
2538 && pcrel <= 32765 - alignment_glue)
2539 {
2540 insn[0] = 0x39;
2541 SNIP (1, 1, newrel);
2542 *again = TRUE;
2543 }
2544 break;
2545
2546 case 0x3a: /* BEQ.W pcdsp:16 */
2547 case 0x3b: /* BNE.W pcdsp:16 */
2548 if (-128 + alignment_glue <= pcrel
2549 && pcrel <= 127 - alignment_glue)
2550 {
2551 insn[0] = 0x20 | (insn[0] & 1);
2552 SNIP (1, 1, newrel);
2553 *again = TRUE;
2554 }
2555 break;
2556
2557 case 0x20: /* BEQ.B pcdsp:8 */
2558 case 0x21: /* BNE.B pcdsp:8 */
2559 if (max_pcrel3 + alignment_glue <= pcrel
2560 && pcrel - alignment_glue <= 10
2561 && allow_pcrel3)
2562 {
2563 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2564 SNIP (1, 1, newrel);
2565 move_reloc (irel, srel, -1);
2566 *again = TRUE;
2567 }
2568 break;
2569
2570 case 0x16: /* synthetic BNE dsp24 */
2571 case 0x1e: /* synthetic BEQ dsp24 */
2572 if (-32767 + alignment_glue <= pcrel
2573 && pcrel <= 32766 - alignment_glue
2574 && insn[1] == 0x04)
2575 {
2576 if (insn[0] == 0x16)
2577 insn[0] = 0x3b;
2578 else
2579 insn[0] = 0x3a;
2580 /* We snip out the bytes at the end else the reloc
2581 will get moved too, and too much. */
2582 SNIP (3, 2, newrel);
2583 move_reloc (irel, srel, -1);
2584 *again = TRUE;
2585 }
2586 break;
2587 }
2588
2589 /* Special case - synthetic conditional branches, pcrel24.
2590 Note that EQ and NE have been handled above. */
2591 if ((insn[0] & 0xf0) == 0x20
2592 && insn[1] == 0x06
2593 && insn[2] == 0x04
2594 && srel->r_offset != irel->r_offset + 1
2595 && -32767 + alignment_glue <= pcrel
2596 && pcrel <= 32766 - alignment_glue)
2597 {
2598 insn[1] = 0x05;
2599 insn[2] = 0x38;
2600 SNIP (5, 1, newrel);
2601 *again = TRUE;
2602 }
2603
2604 /* Special case - synthetic conditional branches, pcrel16 */
2605 if ((insn[0] & 0xf0) == 0x20
2606 && insn[1] == 0x05
2607 && insn[2] == 0x38
2608 && srel->r_offset != irel->r_offset + 1
2609 && -127 + alignment_glue <= pcrel
2610 && pcrel <= 126 - alignment_glue)
2611 {
2612 int cond = (insn[0] & 0x0f) ^ 0x01;
2613
2614 insn[0] = 0x20 | cond;
2615 /* By moving the reloc first, we avoid having
2616 delete_bytes move it also. */
2617 move_reloc (irel, srel, -2);
2618 SNIP (2, 3, newrel);
2619 *again = TRUE;
2620 }
2621 }
2622
2623 BFD_ASSERT (nrelocs == 0);
2624
2625 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2626 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2627 because it may have one or two relocations. */
2628 if ((insn[0] & 0xfc) == 0xf8
2629 && (insn[1] & 0x80) == 0x00
2630 && (insn[0] & 0x03) != 0x03)
2631 {
2632 int dcode, icode, reg, ioff, dscale, ilen;
2633 bfd_vma disp_val = 0;
2634 long imm_val = 0;
2635 Elf_Internal_Rela * disp_rel = 0;
2636 Elf_Internal_Rela * imm_rel = 0;
2637
2638 /* Reset this. */
2639 srel = irel;
2640
2641 dcode = insn[0] & 0x03;
2642 icode = (insn[1] >> 2) & 0x03;
2643 reg = (insn[1] >> 4) & 0x0f;
2644
2645 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2646
2647 /* Figure out what the dispacement is. */
2648 if (dcode == 1 || dcode == 2)
2649 {
2650 /* There's a displacement. See if there's a reloc for it. */
2651 if (srel[1].r_offset == irel->r_offset + 2)
2652 {
2653 GET_RELOC;
2654 disp_val = symval;
2655 disp_rel = srel;
2656 }
2657 else
2658 {
2659 if (dcode == 1)
2660 disp_val = insn[2];
2661 else
2662 {
2663 #if RX_OPCODE_BIG_ENDIAN
2664 disp_val = insn[2] * 256 + insn[3];
2665 #else
2666 disp_val = insn[2] + insn[3] * 256;
2667 #endif
2668 }
2669 switch (insn[1] & 3)
2670 {
2671 case 1:
2672 disp_val *= 2;
2673 scale = 2;
2674 break;
2675 case 2:
2676 disp_val *= 4;
2677 scale = 4;
2678 break;
2679 }
2680 }
2681 }
2682
2683 dscale = scale;
2684
2685 /* Figure out what the immediate is. */
2686 if (srel[1].r_offset == irel->r_offset + ioff)
2687 {
2688 GET_RELOC;
2689 imm_val = (long) symval;
2690 imm_rel = srel;
2691 }
2692 else
2693 {
2694 unsigned char * ip = insn + ioff;
2695
2696 switch (icode)
2697 {
2698 case 1:
2699 /* For byte writes, we don't sign extend. Makes the math easier later. */
2700 if (scale == 1)
2701 imm_val = ip[0];
2702 else
2703 imm_val = (char) ip[0];
2704 break;
2705 case 2:
2706 #if RX_OPCODE_BIG_ENDIAN
2707 imm_val = ((char) ip[0] << 8) | ip[1];
2708 #else
2709 imm_val = ((char) ip[1] << 8) | ip[0];
2710 #endif
2711 break;
2712 case 3:
2713 #if RX_OPCODE_BIG_ENDIAN
2714 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2715 #else
2716 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2717 #endif
2718 break;
2719 case 0:
2720 #if RX_OPCODE_BIG_ENDIAN
2721 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2722 #else
2723 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2724 #endif
2725 break;
2726 }
2727 }
2728
2729 ilen = 2;
2730
2731 switch (dcode)
2732 {
2733 case 1:
2734 ilen += 1;
2735 break;
2736 case 2:
2737 ilen += 2;
2738 break;
2739 }
2740
2741 switch (icode)
2742 {
2743 case 1:
2744 ilen += 1;
2745 break;
2746 case 2:
2747 ilen += 2;
2748 break;
2749 case 3:
2750 ilen += 3;
2751 break;
2752 case 4:
2753 ilen += 4;
2754 break;
2755 }
2756
2757 /* The shortcut happens when the immediate is 0..255,
2758 register r0 to r7, and displacement (scaled) 0..31. */
2759
2760 if (0 <= imm_val && imm_val <= 255
2761 && 0 <= reg && reg <= 7
2762 && disp_val / dscale <= 31)
2763 {
2764 insn[0] = 0x3c | (insn[1] & 0x03);
2765 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2766 insn[2] = imm_val;
2767
2768 if (disp_rel)
2769 {
2770 int newrel = R_RX_NONE;
2771
2772 switch (dscale)
2773 {
2774 case 1:
2775 newrel = R_RX_RH_ABS5p8B;
2776 break;
2777 case 2:
2778 newrel = R_RX_RH_ABS5p8W;
2779 break;
2780 case 4:
2781 newrel = R_RX_RH_ABS5p8L;
2782 break;
2783 }
2784 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2785 move_reloc (irel, disp_rel, -1);
2786 }
2787 if (imm_rel)
2788 {
2789 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2790 move_reloc (disp_rel ? disp_rel : irel,
2791 imm_rel,
2792 irel->r_offset - imm_rel->r_offset + 2);
2793 }
2794
2795 SNIPNR (3, ilen - 3);
2796 *again = TRUE;
2797
2798 /* We can't relax this new opcode. */
2799 irel->r_addend = 0;
2800 }
2801 }
2802 }
2803
2804 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2805 whatever they're branching over won't shrink any more. If we're
2806 basically done here, do one more pass just for branches - but
2807 don't request a pass after that one! */
2808 if (!*again && !allow_pcrel3)
2809 {
2810 bfd_boolean ignored;
2811
2812 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
2813 }
2814
2815 return TRUE;
2816
2817 error_return:
2818 if (free_relocs != NULL)
2819 free (free_relocs);
2820
2821 if (free_contents != NULL)
2822 free (free_contents);
2823
2824 if (shndx_buf != NULL)
2825 {
2826 shndx_hdr->contents = NULL;
2827 free (shndx_buf);
2828 }
2829
2830 if (free_intsyms != NULL)
2831 free (free_intsyms);
2832
2833 return FALSE;
2834 }
2835
2836 static bfd_boolean
2837 elf32_rx_relax_section_wrapper (bfd * abfd,
2838 asection * sec,
2839 struct bfd_link_info * link_info,
2840 bfd_boolean * again)
2841 {
2842 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
2843 }
2844 \f
2845 /* Function to set the ELF flag bits. */
2846
2847 static bfd_boolean
2848 rx_elf_set_private_flags (bfd * abfd, flagword flags)
2849 {
2850 elf_elfheader (abfd)->e_flags = flags;
2851 elf_flags_init (abfd) = TRUE;
2852 return TRUE;
2853 }
2854
2855 static bfd_boolean no_warn_mismatch = FALSE;
2856
2857 void bfd_elf32_rx_set_target_flags (bfd_boolean);
2858
2859 void
2860 bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch)
2861 {
2862 no_warn_mismatch = user_no_warn_mismatch;
2863 }
2864
2865 /* Merge backend specific data from an object file to the output
2866 object file when linking. */
2867
2868 static bfd_boolean
2869 rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
2870 {
2871 flagword old_flags;
2872 flagword new_flags;
2873 bfd_boolean error = FALSE;
2874
2875 new_flags = elf_elfheader (ibfd)->e_flags;
2876 old_flags = elf_elfheader (obfd)->e_flags;
2877
2878 if (!elf_flags_init (obfd))
2879 {
2880 /* First call, no flags set. */
2881 elf_flags_init (obfd) = TRUE;
2882 elf_elfheader (obfd)->e_flags = new_flags;
2883 }
2884 else if (old_flags != new_flags)
2885 {
2886 flagword known_flags = E_FLAG_RX_64BIT_DOUBLES | E_FLAG_RX_DSP;
2887
2888 if ((old_flags ^ new_flags) & known_flags)
2889 {
2890 /* Only complain if flag bits we care about do not match.
2891 Other bits may be set, since older binaries did use some
2892 deprecated flags. */
2893 if (no_warn_mismatch)
2894 {
2895 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
2896 }
2897 else
2898 {
2899 (*_bfd_error_handler)
2900 ("ELF header flags mismatch: old_flags = 0x%.8lx, new_flags = 0x%.8lx, filename = %s",
2901 old_flags, new_flags, bfd_get_filename (ibfd));
2902 error = TRUE;
2903 }
2904 }
2905 else
2906 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
2907 }
2908
2909 if (error)
2910 bfd_set_error (bfd_error_bad_value);
2911
2912 return !error;
2913 }
2914 \f
2915 static bfd_boolean
2916 rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
2917 {
2918 FILE * file = (FILE *) ptr;
2919 flagword flags;
2920
2921 BFD_ASSERT (abfd != NULL && ptr != NULL);
2922
2923 /* Print normal ELF private data. */
2924 _bfd_elf_print_private_bfd_data (abfd, ptr);
2925
2926 flags = elf_elfheader (abfd)->e_flags;
2927 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
2928
2929 if (flags & E_FLAG_RX_64BIT_DOUBLES)
2930 fprintf (file, _(" [64-bit doubles]"));
2931 if (flags & E_FLAG_RX_DSP)
2932 fprintf (file, _(" [dsp]"));
2933
2934 fputc ('\n', file);
2935 return TRUE;
2936 }
2937
2938 /* Return the MACH for an e_flags value. */
2939
2940 static int
2941 elf32_rx_machine (bfd * abfd)
2942 {
2943 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
2944 return bfd_mach_rx;
2945
2946 return 0;
2947 }
2948
2949 static bfd_boolean
2950 rx_elf_object_p (bfd * abfd)
2951 {
2952 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
2953 elf32_rx_machine (abfd));
2954 return TRUE;
2955 }
2956 \f
2957
2958 #ifdef DEBUG
2959 void
2960 rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
2961 {
2962 size_t locsymcount;
2963 Elf_Internal_Sym * isymbuf;
2964 Elf_Internal_Sym * isymend;
2965 Elf_Internal_Sym * isym;
2966 Elf_Internal_Shdr * symtab_hdr;
2967 bfd_boolean free_internal = FALSE, free_external = FALSE;
2968 char * st_info_str;
2969 char * st_info_stb_str;
2970 char * st_other_str;
2971 char * st_shndx_str;
2972
2973 if (! internal_syms)
2974 {
2975 internal_syms = bfd_malloc (1000);
2976 free_internal = 1;
2977 }
2978 if (! external_syms)
2979 {
2980 external_syms = bfd_malloc (1000);
2981 free_external = 1;
2982 }
2983
2984 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2985 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
2986 if (free_internal)
2987 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2988 symtab_hdr->sh_info, 0,
2989 internal_syms, external_syms, NULL);
2990 else
2991 isymbuf = internal_syms;
2992 isymend = isymbuf + locsymcount;
2993
2994 for (isym = isymbuf ; isym < isymend ; isym++)
2995 {
2996 switch (ELF_ST_TYPE (isym->st_info))
2997 {
2998 case STT_FUNC: st_info_str = "STT_FUNC";
2999 case STT_SECTION: st_info_str = "STT_SECTION";
3000 case STT_FILE: st_info_str = "STT_FILE";
3001 case STT_OBJECT: st_info_str = "STT_OBJECT";
3002 case STT_TLS: st_info_str = "STT_TLS";
3003 default: st_info_str = "";
3004 }
3005 switch (ELF_ST_BIND (isym->st_info))
3006 {
3007 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
3008 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
3009 default: st_info_stb_str = "";
3010 }
3011 switch (ELF_ST_VISIBILITY (isym->st_other))
3012 {
3013 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
3014 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
3015 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
3016 default: st_other_str = "";
3017 }
3018 switch (isym->st_shndx)
3019 {
3020 case SHN_ABS: st_shndx_str = "SHN_ABS";
3021 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
3022 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
3023 default: st_shndx_str = "";
3024 }
3025
3026 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3027 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3028 isym,
3029 (unsigned long) isym->st_value,
3030 (unsigned long) isym->st_size,
3031 isym->st_name,
3032 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3033 isym->st_name),
3034 isym->st_info, st_info_str, st_info_stb_str,
3035 isym->st_other, st_other_str,
3036 isym->st_shndx, st_shndx_str);
3037 }
3038 if (free_internal)
3039 free (internal_syms);
3040 if (free_external)
3041 free (external_syms);
3042 }
3043
3044 char *
3045 rx_get_reloc (long reloc)
3046 {
3047 if (0 <= reloc && reloc < R_RX_max)
3048 return rx_elf_howto_table[reloc].name;
3049 return "";
3050 }
3051 #endif /* DEBUG */
3052
3053 \f
3054 /* We must take care to keep the on-disk copy of any code sections
3055 that are fully linked swapped if the target is big endian, to match
3056 the Renesas tools. */
3057
3058 /* The rule is: big endian object that are final-link executables,
3059 have code sections stored with 32-bit words swapped relative to
3060 what you'd get by default. */
3061
3062 static bfd_boolean
3063 rx_get_section_contents (bfd * abfd,
3064 sec_ptr section,
3065 void * location,
3066 file_ptr offset,
3067 bfd_size_type count)
3068 {
3069 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3070 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3071 bfd_boolean rv;
3072
3073 #ifdef DJDEBUG
3074 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3075 (long) offset, (long) count, section->name,
3076 bfd_big_endian(abfd) ? "be" : "le",
3077 exec, s_code, (long unsigned) section->filepos,
3078 (long unsigned) offset);
3079 #endif
3080
3081 if (exec && s_code && bfd_big_endian (abfd))
3082 {
3083 char * cloc = (char *) location;
3084 bfd_size_type cnt, end_cnt;
3085
3086 rv = TRUE;
3087
3088 /* Fetch and swap unaligned bytes at the beginning. */
3089 if (offset % 4)
3090 {
3091 char buf[4];
3092
3093 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3094 (offset & -4), 4);
3095 if (!rv)
3096 return FALSE;
3097
3098 bfd_putb32 (bfd_getl32 (buf), buf);
3099
3100 cnt = 4 - (offset % 4);
3101 if (cnt > count)
3102 cnt = count;
3103
3104 memcpy (location, buf + (offset % 4), cnt);
3105
3106 count -= cnt;
3107 offset += cnt;
3108 cloc += count;
3109 }
3110
3111 end_cnt = count % 4;
3112
3113 /* Fetch and swap the middle bytes. */
3114 if (count >= 4)
3115 {
3116 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3117 count - end_cnt);
3118 if (!rv)
3119 return FALSE;
3120
3121 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3122 bfd_putb32 (bfd_getl32 (cloc), cloc);
3123 }
3124
3125 /* Fetch and swap the end bytes. */
3126 if (end_cnt > 0)
3127 {
3128 char buf[4];
3129
3130 /* Fetch the end bytes. */
3131 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3132 offset + count - end_cnt, 4);
3133 if (!rv)
3134 return FALSE;
3135
3136 bfd_putb32 (bfd_getl32 (buf), buf);
3137 memcpy (cloc, buf, end_cnt);
3138 }
3139 }
3140 else
3141 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3142
3143 return rv;
3144 }
3145
3146 #ifdef DJDEBUG
3147 static bfd_boolean
3148 rx2_set_section_contents (bfd * abfd,
3149 sec_ptr section,
3150 const void * location,
3151 file_ptr offset,
3152 bfd_size_type count)
3153 {
3154 bfd_size_type i;
3155
3156 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3157 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3158 for (i = 0; i < count; i++)
3159 {
3160 if (i % 16 == 0 && i > 0)
3161 fprintf (stderr, "\n");
3162
3163 if (i % 16 && i % 4 == 0)
3164 fprintf (stderr, " ");
3165
3166 if (i % 16 == 0)
3167 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3168
3169 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3170 }
3171 fprintf (stderr, "\n");
3172
3173 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3174 }
3175 #define _bfd_elf_set_section_contents rx2_set_section_contents
3176 #endif
3177
3178 static bfd_boolean
3179 rx_set_section_contents (bfd * abfd,
3180 sec_ptr section,
3181 const void * location,
3182 file_ptr offset,
3183 bfd_size_type count)
3184 {
3185 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3186 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3187 bfd_boolean rv;
3188 char * swapped_data = NULL;
3189 bfd_size_type i;
3190 bfd_vma caddr = section->vma + offset;
3191 file_ptr faddr = 0;
3192 bfd_size_type scount;
3193
3194 #ifdef DJDEBUG
3195 bfd_size_type i;
3196
3197 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3198 (long) offset, (long) count, section->name,
3199 bfd_big_endian (abfd) ? "be" : "le",
3200 exec, s_code);
3201
3202 for (i = 0; i < count; i++)
3203 {
3204 int a = section->vma + offset + i;
3205
3206 if (a % 16 == 0 && a > 0)
3207 fprintf (stderr, "\n");
3208
3209 if (a % 16 && a % 4 == 0)
3210 fprintf (stderr, " ");
3211
3212 if (a % 16 == 0 || i == 0)
3213 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3214
3215 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3216 }
3217
3218 fprintf (stderr, "\n");
3219 #endif
3220
3221 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3222 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3223
3224 while (count > 0 && caddr > 0 && caddr % 4)
3225 {
3226 switch (caddr % 4)
3227 {
3228 case 0: faddr = offset + 3; break;
3229 case 1: faddr = offset + 1; break;
3230 case 2: faddr = offset - 1; break;
3231 case 3: faddr = offset - 3; break;
3232 }
3233
3234 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3235 if (! rv)
3236 return rv;
3237
3238 location ++;
3239 offset ++;
3240 count --;
3241 caddr ++;
3242 }
3243
3244 scount = (int)(count / 4) * 4;
3245 if (scount > 0)
3246 {
3247 char * cloc = (char *) location;
3248
3249 swapped_data = (char *) bfd_alloc (abfd, count);
3250
3251 for (i = 0; i < count; i += 4)
3252 {
3253 bfd_vma v = bfd_getl32 (cloc + i);
3254 bfd_putb32 (v, swapped_data + i);
3255 }
3256
3257 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3258
3259 if (!rv)
3260 return rv;
3261 }
3262
3263 count -= scount;
3264 location += scount;
3265 offset += scount;
3266
3267 if (count > 0)
3268 {
3269 caddr = section->vma + offset;
3270 while (count > 0)
3271 {
3272 switch (caddr % 4)
3273 {
3274 case 0: faddr = offset + 3; break;
3275 case 1: faddr = offset + 1; break;
3276 case 2: faddr = offset - 1; break;
3277 case 3: faddr = offset - 3; break;
3278 }
3279 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3280 if (! rv)
3281 return rv;
3282
3283 location ++;
3284 offset ++;
3285 count --;
3286 caddr ++;
3287 }
3288 }
3289
3290 return TRUE;
3291 }
3292
3293 static bfd_boolean
3294 rx_final_link (bfd * abfd, struct bfd_link_info * info)
3295 {
3296 asection * o;
3297
3298 for (o = abfd->sections; o != NULL; o = o->next)
3299 {
3300 #ifdef DJDEBUG
3301 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3302 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3303 #endif
3304 if (o->flags & SEC_CODE
3305 && bfd_big_endian (abfd)
3306 && (o->size % 4 || o->rawsize % 4))
3307 {
3308 #ifdef DJDEBUG
3309 fprintf (stderr, "adjusting...\n");
3310 #endif
3311 o->size += 4 - (o->size % 4);
3312 o->rawsize += 4 - (o->rawsize % 4);
3313 }
3314 }
3315
3316 return bfd_elf_final_link (abfd, info);
3317 }
3318
3319 static bfd_boolean
3320 elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3321 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3322 {
3323 const struct elf_backend_data * bed;
3324 struct elf_obj_tdata * tdata;
3325 Elf_Internal_Phdr * phdr;
3326 unsigned int count;
3327 unsigned int i;
3328
3329 bed = get_elf_backend_data (abfd);
3330 tdata = elf_tdata (abfd);
3331 phdr = tdata->phdr;
3332 count = tdata->program_header_size / bed->s->sizeof_phdr;
3333
3334 for (i = count; i-- != 0; )
3335 if (phdr[i].p_type == PT_LOAD)
3336 {
3337 /* The Renesas tools expect p_paddr to be zero. However,
3338 there is no other way to store the writable data in ROM for
3339 startup initialization. So, we let the linker *think*
3340 we're using paddr and vaddr the "usual" way, but at the
3341 last minute we move the paddr into the vaddr (which is what
3342 the simulator uses) and zero out paddr. Note that this
3343 does not affect the section headers, just the program
3344 headers. We hope. */
3345 phdr[i].p_vaddr = phdr[i].p_paddr;
3346 /* If we zero out p_paddr, then the LMA in the section table
3347 becomes wrong. */
3348 /*phdr[i].p_paddr = 0;*/
3349 }
3350
3351 return TRUE;
3352 }
3353 \f
3354 #define ELF_ARCH bfd_arch_rx
3355 #define ELF_MACHINE_CODE EM_RX
3356 #define ELF_MAXPAGESIZE 0x1000
3357
3358 #define TARGET_BIG_SYM bfd_elf32_rx_be_vec
3359 #define TARGET_BIG_NAME "elf32-rx-be"
3360
3361 #define TARGET_LITTLE_SYM bfd_elf32_rx_le_vec
3362 #define TARGET_LITTLE_NAME "elf32-rx-le"
3363
3364 #define elf_info_to_howto_rel NULL
3365 #define elf_info_to_howto rx_info_to_howto_rela
3366 #define elf_backend_object_p rx_elf_object_p
3367 #define elf_backend_relocate_section rx_elf_relocate_section
3368 #define elf_symbol_leading_char ('_')
3369 #define elf_backend_can_gc_sections 1
3370 #define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3371
3372 #define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3373 #define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3374 #define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3375 #define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3376 #define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3377 #define bfd_elf32_get_section_contents rx_get_section_contents
3378 #define bfd_elf32_set_section_contents rx_set_section_contents
3379 #define bfd_elf32_bfd_final_link rx_final_link
3380 #define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
3381
3382 #include "elf32-target.h"
git-cvsimport of binutils cvsroot