include/xtensa-isa.h

   1 /* Interface definition for configurable Xtensa ISA support.
   2    Copyright 2003, 2004 Free Software Foundation, Inc.
   3
   4    This file is part of BFD, the Binary File Descriptor library.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  19
  20 #ifndef XTENSA_LIBISA_H
  21 #define XTENSA_LIBISA_H
  22
  23 #ifdef __cplusplus
  24 extern "C" {
  25 #endif
  26
  27 /* Use the statically-linked version for the GNU tools.  */
  28 #define STATIC_LIBISA 1
  29
  30 /* Version number: This is intended to help support code that works with
  31    versions of this library from multiple Xtensa releases.  */
  32
  33 #define XTENSA_ISA_VERSION 7000
  34
  35 #ifndef uint32
  36 #define uint32 unsigned int
  37 #endif
  38
  39 /* This file defines the interface to the Xtensa ISA library.  This
  40    library contains most of the ISA-specific information for a
  41    particular Xtensa processor.  For example, the set of valid
  42    instructions, their opcode encodings and operand fields are all
  43    included here.
  44
  45    This interface basically defines a number of abstract data types.
  46
  47    . an instruction buffer - for holding the raw instruction bits
  48    . ISA info - information about the ISA as a whole
  49    . instruction formats - instruction size and slot structure
  50    . opcodes - information about individual instructions
  51    . operands - information about register and immediate instruction operands
  52    . stateOperands - information about processor state instruction operands
  53    . interfaceOperands - information about interface instruction operands
  54    . register files - register file information
  55    . processor states - internal processor state information
  56    . system registers - "special registers" and "user registers"
  57    . interfaces - TIE interfaces that are external to the processor
  58    . functional units - TIE shared functions
  59
  60    The interface defines a set of functions to access each data type.
  61    With the exception of the instruction buffer, the internal
  62    representations of the data structures are hidden.  All accesses must
  63    be made through the functions defined here.  */
  64
  65 typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa;
  66
  67
  68 /* Opcodes, formats, regfiles, states, sysregs, ctypes, and protos are
  69    represented here using sequential integers beginning with 0.  The
  70    specific values are only fixed for a particular instantiation of an
  71    xtensa_isa structure, so these values should only be used
  72    internally.  */
  73
  74 typedef int xtensa_opcode;
  75 typedef int xtensa_format;
  76 typedef int xtensa_regfile;
  77 typedef int xtensa_state;
  78 typedef int xtensa_sysreg;
  79 typedef int xtensa_interface;
  80 typedef int xtensa_funcUnit;
  81
  82
  83 /* Define a unique value for undefined items.  */
  84
  85 #define XTENSA_UNDEFINED -1
  86
  87
  88 /* Overview of using this interface to decode/encode instructions:
  89
  90    Each Xtensa instruction is associated with a particular instruction
  91    format, where the format defines a fixed number of slots for
  92    operations.  The formats for the core Xtensa ISA have only one slot,
  93    but FLIX instructions may have multiple slots.  Within each slot,
  94    there is a single opcode and some number of associated operands.
  95
  96    The encoding and decoding functions operate on instruction buffers,
  97    not on the raw bytes of the instructions.  The same instruction
  98    buffer data structure is used for both entire instructions and
  99    individual slots in those instructions -- the contents of a slot need
 100    to be extracted from or inserted into the buffer for the instruction
 101    as a whole.
 102
 103    Decoding an instruction involves first finding the format, which
 104    identifies the number of slots, and then decoding each slot
 105    separately.  A slot is decoded by finding the opcode and then using
 106    the opcode to determine how many operands there are.  For example:
 107
 108    xtensa_insnbuf_from_chars
 109    xtensa_format_decode
 110    for each slot {
 111      xtensa_format_get_slot
 112      xtensa_opcode_decode
 113      for each operand {
 114        xtensa_operand_get_field
 115        xtensa_operand_decode
 116      }
 117    }
 118
 119    Encoding an instruction is roughly the same procedure in reverse:
 120
 121    xtensa_format_encode
 122    for each slot {
 123      xtensa_opcode_encode
 124      for each operand {
 125        xtensa_operand_encode
 126        xtensa_operand_set_field
 127      }
 128      xtensa_format_set_slot
 129    }
 130    xtensa_insnbuf_to_chars
 131 */
 132
 133 \f
 134 /* Error handling.  */
 135
 136 /* Error codes.  The code for the most recent error condition can be
 137    retrieved with the "errno" function.  For any result other than
 138    xtensa_isa_ok, an error message containing additional information
 139    about the problem can be retrieved using the "error_msg" function.
 140    The error messages are stored in an internal buffer, which should not
 141    should be freed and may be overwritten by subsequent operations.  */
 142
 143 typedef enum xtensa_isa_status_enum
 144 {
 145   xtensa_isa_ok = 0,
 146   xtensa_isa_bad_format,
 147   xtensa_isa_bad_slot,
 148   xtensa_isa_bad_opcode,
 149   xtensa_isa_bad_operand,
 150   xtensa_isa_bad_field,
 151   xtensa_isa_bad_iclass,
 152   xtensa_isa_bad_regfile,
 153   xtensa_isa_bad_sysreg,
 154   xtensa_isa_bad_state,
 155   xtensa_isa_bad_interface,
 156   xtensa_isa_bad_funcUnit,
 157   xtensa_isa_wrong_slot,
 158   xtensa_isa_no_field,
 159   xtensa_isa_out_of_memory,
 160   xtensa_isa_buffer_overflow,
 161   xtensa_isa_internal_error,
 162   xtensa_isa_bad_value
 163 } xtensa_isa_status;
 164
 165 extern xtensa_isa_status
 166 xtensa_isa_errno (xtensa_isa isa);
 167
 168 extern char *
 169 xtensa_isa_error_msg (xtensa_isa isa);
 170
 171 \f
 172 /* Instruction buffers.  */
 173
 174 typedef uint32 xtensa_insnbuf_word;
 175 typedef xtensa_insnbuf_word *xtensa_insnbuf;
 176
 177
 178 /* Get the size in "insnbuf_words" of the xtensa_insnbuf array.  */
 179
 180 extern int
 181 xtensa_insnbuf_size (xtensa_isa isa);
 182
 183
 184 /* Allocate an xtensa_insnbuf of the right size.  */
 185
 186 extern xtensa_insnbuf
 187 xtensa_insnbuf_alloc (xtensa_isa isa);
 188
 189
 190 /* Release an xtensa_insnbuf.  */
 191
 192 extern void
 193 xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf);
 194
 195
 196 /* Conversion between raw memory (char arrays) and our internal
 197    instruction representation.  This is complicated by the Xtensa ISA's
 198    variable instruction lengths.  When converting to chars, the buffer
 199    must contain a valid instruction so we know how many bytes to copy;
 200    thus, the "to_chars" function returns the number of bytes copied or
 201    XTENSA_UNDEFINED on error.  The "from_chars" function first reads the
 202    minimal number of bytes required to decode the instruction length and
 203    then proceeds to copy the entire instruction into the buffer; if the
 204    memory does not contain a valid instruction, it copies the maximum
 205    number of bytes required for the longest Xtensa instruction.  The
 206    "num_chars" argument may be used to limit the number of bytes that
 207    can be read or written.  Otherwise, if "num_chars" is zero, the
 208    functions may read or write past the end of the code.  */
 209
 210 extern int
 211 xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn,
 212                          char *cp, int num_chars);
 213
 214 extern void
 215 xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn,
 216                            const char *cp, int num_chars);
 217
 218 \f
 219 /* ISA information.  */
 220
 221 /* Initialize the ISA information.  */
 222
 223 extern xtensa_isa
 224 xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p);
 225
 226
 227 /* Deallocate an xtensa_isa structure.  */
 228
 229 extern void
 230 xtensa_isa_free (xtensa_isa isa);
 231
 232
 233 /* Get the maximum instruction size in bytes.  */
 234
 235 extern int
 236 xtensa_isa_maxlength (xtensa_isa isa);
 237
 238
 239 /* Decode the length in bytes of an instruction in raw memory (not an
 240    insnbuf).  This function reads only the minimal number of bytes
 241    required to decode the instruction length.  Returns
 242    XTENSA_UNDEFINED on error.  */
 243
 244 extern int
 245 xtensa_isa_length_from_chars (xtensa_isa isa, const char *cp);
 246
 247
 248 /* Get the number of stages in the processor's pipeline.  The pipeline
 249    stage values returned by other functions in this library will range
 250    from 0 to N-1, where N is the value returned by this function.
 251    Note that the stage numbers used here may not correspond to the
 252    actual processor hardware, e.g., the hardware may have additional
 253    stages before stage 0.  Returns XTENSA_UNDEFINED on error.  */
 254
 255 extern int
 256 xtensa_isa_num_pipe_stages (xtensa_isa isa);
 257
 258
 259 /* Get the number of various entities that are defined for this processor.  */
 260
 261 extern int
 262 xtensa_isa_num_formats (xtensa_isa isa);
 263
 264 extern int
 265 xtensa_isa_num_opcodes (xtensa_isa isa);
 266
 267 extern int
 268 xtensa_isa_num_regfiles (xtensa_isa isa);
 269
 270 extern int
 271 xtensa_isa_num_states (xtensa_isa isa);
 272
 273 extern int
 274 xtensa_isa_num_sysregs (xtensa_isa isa);
 275
 276 extern int
 277 xtensa_isa_num_interfaces (xtensa_isa isa);
 278
 279 extern int
 280 xtensa_isa_num_funcUnits (xtensa_isa isa);
 281
 282 \f
 283 /* Instruction formats.  */
 284
 285 /* Get the name of a format.  Returns null on error.  */
 286
 287 extern const char *
 288 xtensa_format_name (xtensa_isa isa, xtensa_format fmt);
 289
 290
 291 /* Given a format name, return the format number.  Returns
 292    XTENSA_UNDEFINED if the name is not a valid format.  */
 293
 294 extern xtensa_format
 295 xtensa_format_lookup (xtensa_isa isa, const char *fmtname);
 296
 297
 298 /* Decode the instruction format from a binary instruction buffer.
 299    Returns XTENSA_UNDEFINED if the format is not recognized.  */
 300
 301 extern xtensa_format
 302 xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn);
 303
 304
 305 /* Set the instruction format field(s) in a binary instruction buffer.
 306    All the other fields are set to zero.  Returns non-zero on error.  */
 307
 308 extern int
 309 xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn);
 310
 311
 312 /* Find the length (in bytes) of an instruction.  Returns
 313    XTENSA_UNDEFINED on error.  */
 314
 315 extern int
 316 xtensa_format_length (xtensa_isa isa, xtensa_format fmt);
 317
 318
 319 /* Get the number of slots in an instruction.  Returns XTENSA_UNDEFINED
 320    on error.  */
 321
 322 extern int
 323 xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt);
 324
 325
 326 /* Get the opcode for a no-op in a particular slot.
 327    Returns XTENSA_UNDEFINED on error.  */
 328
 329 extern xtensa_opcode
 330 xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
 331
 332
 333 /* Get the bits for a specified slot out of an insnbuf for the
 334    instruction as a whole and put them into an insnbuf for that one
 335    slot, and do the opposite to set a slot.  Return non-zero on error.  */
 336
 337 extern int
 338 xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
 339                         const xtensa_insnbuf insn, xtensa_insnbuf slotbuf);
 340
 341 extern int
 342 xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
 343                         xtensa_insnbuf insn, const xtensa_insnbuf slotbuf);
 344
 345 \f
 346 /* Opcode information.  */
 347
 348 /* Translate a mnemonic name to an opcode.  Returns XTENSA_UNDEFINED if
 349    the name is not a valid opcode mnemonic.  */
 350
 351 extern xtensa_opcode
 352 xtensa_opcode_lookup (xtensa_isa isa, const char *opname);
 353
 354
 355 /* Decode the opcode for one instruction slot from a binary instruction
 356    buffer.  Returns the opcode or XTENSA_UNDEFINED if the opcode is
 357    illegal.  */
 358
 359 extern xtensa_opcode
 360 xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
 361                       const xtensa_insnbuf slotbuf);
 362
 363
 364 /* Set the opcode field(s) for an instruction slot.  All other fields
 365    in the slot are set to zero.  Returns non-zero if the opcode cannot
 366    be encoded.  */
 367
 368 extern int
 369 xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
 370                       xtensa_insnbuf slotbuf, xtensa_opcode opc);
 371
 372
 373 /* Get the mnemonic name for an opcode.  Returns null on error.  */
 374
 375 extern const char *
 376 xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc);
 377
 378
 379 /* Check various properties of opcodes.  These functions return 0 if
 380    the condition is false, 1 if the condition is true, and
 381    XTENSA_UNDEFINED on error.  The instructions are classified as
 382    follows:
 383
 384    branch: conditional branch; may fall through to next instruction (B*)
 385    jump: unconditional branch (J, JX, RET*, RF*)
 386    loop: zero-overhead loop (LOOP*)
 387    call: unconditional call; control returns to next instruction (CALL*)
 388
 389    For the opcodes that affect control flow in some way, the branch
 390    target may be specified by an immediate operand or it may be an
 391    address stored in a register.  You can distinguish these by
 392    checking if the instruction has a PC-relative immediate
 393    operand.  */
 394
 395 extern int
 396 xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc);
 397
 398 extern int
 399 xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc);
 400
 401 extern int
 402 xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc);
 403
 404 extern int
 405 xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc);
 406
 407
 408 /* Find the number of ordinary operands, state operands, and interface
 409    operands for an instruction.  These return XTENSA_UNDEFINED on
 410    error.  */
 411
 412 extern int
 413 xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc);
 414
 415
 416 extern int
 417 xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc);
 418
 419 extern int
 420 xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc);
 421
 422
 423 /* Get functional unit usage requirements for an opcode.  Each "use"
 424    is identified by a <functional unit, pipeline stage> pair.  The
 425    "num_funcUnit_uses" function returns the number of these "uses" or
 426    XTENSA_UNDEFINED on error.  The "funcUnit_use" function returns
 427    a pointer to a "use" pair or null on error.  */
 428
 429 typedef struct xtensa_funcUnit_use_struct
 430 {
 431   xtensa_funcUnit unit;
 432   int stage;
 433 } xtensa_funcUnit_use;
 434
 435 extern int
 436 xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc);
 437
 438 extern xtensa_funcUnit_use *
 439 xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u);
 440
 441 \f
 442 /* Operand information.  */
 443
 444 /* Get the name of an operand.  Returns null on error.  */
 445
 446 extern const char *
 447 xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd);
 448
 449
 450 /* Some operands are "invisible", i.e., not explicitly specified in
 451    assembly language.  When assembling an instruction, you need not set
 452    the values of invisible operands, since they are either hardwired or
 453    derived from other field values.  The values of invisible operands
 454    can be examined in the same way as other operands, but remember that
 455    an invisible operand may get its value from another visible one, so
 456    the entire instruction must be available before examining the
 457    invisible operand values.  This function returns 1 if an operand is
 458    visible, 0 if it is invisible, or XTENSA_UNDEFINED on error.  Note
 459    that whether an operand is visible is orthogonal to whether it is
 460    "implicit", i.e., whether it is encoded in a field in the
 461    instruction.  */
 462
 463 extern int
 464 xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd);
 465
 466
 467 /* Check if an operand is an input ('i'), output ('o'), or inout ('m')
 468    operand.  Note: The output operand of a conditional assignment
 469    (e.g., movnez) appears here as an inout ('m') even if it is declared
 470    in the TIE code as an output ('o'); this allows the compiler to
 471    properly handle register allocation for conditional assignments.
 472    Returns 0 on error.  */
 473
 474 extern char
 475 xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd);
 476
 477
 478 /* Get and set the raw (encoded) value of the field for the specified
 479    operand.  The "set" function does not check if the value fits in the
 480    field; that is done by the "encode" function below.  Both of these
 481    functions return non-zero on error, e.g., if the field is not defined
 482    for the specified slot.  */
 483
 484 extern int
 485 xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
 486                           xtensa_format fmt, int slot,
 487                           const xtensa_insnbuf slotbuf, uint32 *valp);
 488
 489 extern int
 490 xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd,
 491                           xtensa_format fmt, int slot,
 492                           xtensa_insnbuf slotbuf, uint32 val);
 493
 494
 495 /* Encode and decode operands.  The raw bits in the operand field may
 496    be encoded in a variety of different ways.  These functions hide
 497    the details of that encoding.  The result values are returned through
 498    the argument pointer.  The return value is non-zero on error.  */
 499
 500 extern int
 501 xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd,
 502                        uint32 *valp);
 503
 504 extern int
 505 xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd,
 506                        uint32 *valp);
 507
 508
 509 /* An operand may be either a register operand or an immediate of some
 510    sort (e.g., PC-relative or not).  The "is_register" function returns
 511    0 if the operand is an immediate, 1 if it is a register, and
 512    XTENSA_UNDEFINED on error.  The "regfile" function returns the
 513    regfile for a register operand, or XTENSA_UNDEFINED on error.  */
 514
 515 extern int
 516 xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd);
 517
 518 extern xtensa_regfile
 519 xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd);
 520
 521
 522 /* Register operands may span multiple consecutive registers, e.g., a
 523    64-bit data type may occupy two 32-bit registers.  Only the first
 524    register is encoded in the operand field.  This function specifies
 525    the number of consecutive registers occupied by this operand.  For
 526    non-register operands, the return value is undefined.  Returns
 527    XTENSA_UNDEFINED on error.  */
 528
 529 extern int
 530 xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd);
 531
 532
 533 /* Some register operands do not completely identify the register being
 534    accessed.  For example, the operand value may be added to an internal
 535    state value.  By definition, this implies that the corresponding
 536    regfile is not allocatable.  Unknown registers should generally be
 537    treated with worst-case assumptions.  The function returns 0 if the
 538    register value is unknown, 1 if known, and XTENSA_UNDEFINED on
 539    error.  */
 540
 541 extern int
 542 xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd);
 543
 544
 545 /* Check if an immediate operand is PC-relative.  Returns 0 for register
 546    operands and non-PC-relative immediates, 1 for PC-relative
 547    immediates, and XTENSA_UNDEFINED on error.  */
 548
 549 extern int
 550 xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd);
 551
 552
 553 /* For PC-relative offset operands, the interpretation of the offset may
 554    vary between opcodes, e.g., is it relative to the current PC or that
 555    of the next instruction?  The following functions are defined to
 556    perform PC-relative relocations and to undo them (as in the
 557    disassembler).  The "do_reloc" function takes the desired address
 558    value and the PC of the current instruction and sets the value to the
 559    corresponding PC-relative offset (which can then be encoded and
 560    stored into the operand field).  The "undo_reloc" function takes the
 561    unencoded offset value and the current PC and sets the value to the
 562    appropriate address.  The return values are non-zero on error.  Note
 563    that these functions do not replace the encode/decode functions; the
 564    operands must be encoded/decoded separately and the encode functions
 565    are responsible for detecting invalid operand values.  */
 566
 567 extern int
 568 xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
 569                          uint32 *valp, uint32 pc);
 570
 571 extern int
 572 xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd,
 573                            uint32 *valp, uint32 pc);
 574
 575 \f
 576 /* State Operands.  */
 577
 578 /* Get the state accessed by a state operand.  Returns XTENSA_UNDEFINED
 579    on error.  */
 580
 581 extern xtensa_state
 582 xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp);
 583
 584
 585 /* Check if a state operand is an input ('i'), output ('o'), or inout
 586    ('m') operand.  Returns 0 on error.  */
 587
 588 extern char
 589 xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp);
 590
 591 \f
 592 /* Interface Operands.  */
 593
 594 /* Get the external interface accessed by an interface operand.
 595    Returns XTENSA_UNDEFINED on error.  */
 596
 597 extern xtensa_interface
 598 xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc,
 599                                    int ifOp);
 600
 601 \f
 602 /* Register Files.  */
 603
 604 /* Regfiles include both "real" regfiles and "views", where a view
 605    allows a group of adjacent registers in a real "parent" regfile to be
 606    viewed as a single register.  A regfile view has all the same
 607    properties as its parent except for its (long) name, bit width, number
 608    of entries, and default ctype.  You can use the parent function to
 609    distinguish these two classes.  */
 610
 611 /* Look up a regfile by either its name or its abbreviated "short name".
 612    Returns XTENSA_UNDEFINED on error.  The "lookup_shortname" function
 613    ignores "view" regfiles since they always have the same shortname as
 614    their parents.  */
 615
 616 extern xtensa_regfile
 617 xtensa_regfile_lookup (xtensa_isa isa, const char *name);
 618
 619 extern xtensa_regfile
 620 xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname);
 621
 622
 623 /* Get the name or abbreviated "short name" of a regfile.
 624    Returns null on error.  */
 625
 626 extern const char *
 627 xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf);
 628
 629 extern const char *
 630 xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf);
 631
 632
 633 /* Get the parent regfile of a "view" regfile.  If the regfile is not a
 634    view, the result is the same as the input parameter.  Returns
 635    XTENSA_UNDEFINED on error.  */
 636
 637 extern xtensa_regfile
 638 xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf);
 639
 640
 641 /* Get the bit width of a regfile or regfile view.
 642    Returns XTENSA_UNDEFINED on error.  */
 643
 644 extern int
 645 xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf);
 646
 647
 648 /* Get the number of regfile entries.  Returns XTENSA_UNDEFINED on
 649    error.  */
 650
 651 extern int
 652 xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf);
 653
 654 \f
 655 /* Processor States.  */
 656
 657 /* Look up a state by name.  Returns XTENSA_UNDEFINED on error.  */
 658
 659 extern xtensa_state
 660 xtensa_state_lookup (xtensa_isa isa, const char *name);
 661
 662
 663 /* Get the name for a processor state.  Returns null on error.  */
 664
 665 extern const char *
 666 xtensa_state_name (xtensa_isa isa, xtensa_state st);
 667
 668
 669 /* Get the bit width for a processor state.
 670    Returns XTENSA_UNDEFINED on error.  */
 671
 672 extern int
 673 xtensa_state_num_bits (xtensa_isa isa, xtensa_state st);
 674
 675
 676 /* Check if a state is exported from the processor core.  Returns 0 if
 677    the condition is false, 1 if the condition is true, and
 678    XTENSA_UNDEFINED on error.  */
 679
 680 extern int
 681 xtensa_state_is_exported (xtensa_isa isa, xtensa_state st);
 682
 683 \f
 684 /* Sysregs ("special registers" and "user registers").  */
 685
 686 /* Look up a register by its number and whether it is a "user register"
 687    or a "special register".  Returns XTENSA_UNDEFINED if the sysreg does
 688    not exist.  */
 689
 690 extern xtensa_sysreg
 691 xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user);
 692
 693
 694 /* Check if there exists a sysreg with a given name.
 695    If not, this function returns XTENSA_UNDEFINED.  */
 696
 697 extern xtensa_sysreg
 698 xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name);
 699
 700
 701 /* Get the name of a sysreg.  Returns null on error.  */
 702
 703 extern const char *
 704 xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg);
 705
 706
 707 /* Get the register number.  Returns XTENSA_UNDEFINED on error.  */
 708
 709 extern int
 710 xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg);
 711
 712
 713 /* Check if a sysreg is a "special register" or a "user register".
 714    Returns 0 for special registers, 1 for user registers and
 715    XTENSA_UNDEFINED on error.  */
 716
 717 extern int
 718 xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg);
 719
 720 \f
 721 /* Interfaces.  */
 722
 723 /* Find an interface by name.  The return value is XTENSA_UNDEFINED if
 724    the specified interface is not found.  */
 725
 726 extern xtensa_interface
 727 xtensa_interface_lookup (xtensa_isa isa, const char *ifname);
 728
 729
 730 /* Get the name of an interface.  Returns null on error.  */
 731
 732 extern const char *
 733 xtensa_interface_name (xtensa_isa isa, xtensa_interface intf);
 734
 735
 736 /* Get the bit width for an interface.
 737    Returns XTENSA_UNDEFINED on error.  */
 738
 739 extern int
 740 xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf);
 741
 742
 743 /* Check if an interface is an input ('i') or output ('o') with respect
 744    to the Xtensa processor core.  Returns 0 on error.  */
 745
 746 extern char
 747 xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf);
 748
 749
 750 /* Check if accessing an interface has potential side effects.
 751    Currently "data" interfaces have side effects and "control"
 752    interfaces do not.  Returns 1 if there are side effects, 0 if not,
 753    and XTENSA_UNDEFINED on error.  */
 754
 755 extern int
 756 xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf);
 757
 758
 759 /* Some interfaces may be related such that accessing one interface
 760    has side effects on a set of related interfaces.  The interfaces
 761    are partitioned into equivalence classes of related interfaces, and
 762    each class is assigned a unique identifier number.  This function
 763    returns the class identifier for an interface, or XTENSA_UNDEFINED
 764    on error.  These identifiers can be compared to determine if two
 765    interfaces are related; the specific values of the identifiers have
 766    no particular meaning otherwise.  */
 767
 768 extern int
 769 xtensa_interface_class_id (xtensa_isa isa, xtensa_interface intf);
 770
 771 \f
 772 /* Functional Units.  */
 773
 774 /* Find a functional unit by name.  The return value is XTENSA_UNDEFINED if
 775    the specified unit is not found.  */
 776
 777 extern xtensa_funcUnit
 778 xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname);
 779
 780
 781 /* Get the name of a functional unit.  Returns null on error.  */
 782
 783 extern const char *
 784 xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun);
 785
 786
 787 /* Functional units may be replicated.  See how many instances of a
 788    particular function unit exist.  Returns XTENSA_UNDEFINED on error.  */
 789
 790 extern int
 791 xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun);
 792
 793
 794 #ifdef __cplusplus
 795 }
 796 #endif
 797 #endif /* XTENSA_LIBISA_H */