1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS
= 0,
75 SPECIAL_SECTION_SDATA
,
76 SPECIAL_SECTION_RODATA
,
77 SPECIAL_SECTION_COMMENT
,
78 SPECIAL_SECTION_UNWIND
,
79 SPECIAL_SECTION_UNWIND_INFO
,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY
,
82 SPECIAL_SECTION_FINI_ARRAY
,
99 FUNC_LT_FPTR_RELATIVE
,
101 FUNC_LT_DTP_RELATIVE
,
109 REG_FR
= (REG_GR
+ 128),
110 REG_AR
= (REG_FR
+ 128),
111 REG_CR
= (REG_AR
+ 128),
112 REG_P
= (REG_CR
+ 128),
113 REG_BR
= (REG_P
+ 64),
114 REG_IP
= (REG_BR
+ 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR
= 0, /* dynamic general purpose register */
142 DYNREG_FR
, /* dynamic floating point register */
143 DYNREG_PR
, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE
,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix
*next
;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian
;
167 /* This is the default endianness. */
168 static int default_big_endian
= TARGET_BYTES_BIG_ENDIAN
;
170 void (*ia64_number_to_chars
) PARAMS ((char *, valueT
, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE
*, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE
*, int));
176 static void (*ia64_float_to_chars
)
177 PARAMS ((char *, LITTLENUM_TYPE
*, int));
179 static struct hash_control
*alias_hash
;
180 static struct hash_control
*alias_name_hash
;
181 static struct hash_control
*secalias_hash
;
182 static struct hash_control
*secalias_name_hash
;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars
[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars
[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars
[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars
[] = ";";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS
[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS
[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts
= "m:N:x::";
210 struct option md_longopts
[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument
, NULL
, OPTION_MCONSTANT_GP
},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument
, NULL
, OPTION_MAUTO_PIC
}
218 size_t md_longopts_size
= sizeof (md_longopts
);
222 struct hash_control
*pseudo_hash
; /* pseudo opcode hash table */
223 struct hash_control
*reg_hash
; /* register name hash table */
224 struct hash_control
*dynreg_hash
; /* dynamic register hash table */
225 struct hash_control
*const_hash
; /* constant hash table */
226 struct hash_control
*entry_hash
; /* code entry hint hash table */
228 symbolS
*regsym
[REG_NUM
];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode
: 1, /* which mode we're in */
255 default_explicit_mode
: 1, /* which mode is the default */
256 mode_explicitly_set
: 1, /* was the current mode explicitly set? */
258 keep_pending_output
: 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning
,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use
;
275 end_of_insn_group
: 1,
276 manual_bundling_on
: 1,
277 manual_bundling_off
: 1,
278 loc_directive_seen
: 1;
279 signed char user_template
; /* user-selected template, if any */
280 unsigned char qp_regno
; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code
;
288 enum ia64_opnd opnd
; /* type of operand in need of fix */
289 unsigned int is_pcrel
: 1; /* is operand pc-relative? */
290 expressionS expr
; /* the value to be inserted */
292 fixup
[2]; /* at most two fixups per insn */
293 struct ia64_opcode
*idesc
;
294 struct label_fix
*label_fixups
;
295 struct label_fix
*tag_fixups
;
296 struct unw_rec_list
*unwind_record
; /* Unwind directive. */
299 unsigned int src_line
;
300 struct dwarf2_line_info debug_line
;
308 struct dynreg
*next
; /* next dynamic register */
310 unsigned short base
; /* the base register number */
311 unsigned short num_regs
; /* # of registers in this set */
313 *dynreg
[DYNREG_NUM_TYPES
], in
, loc
, out
, rot
;
315 flagword flags
; /* ELF-header flags */
318 unsigned hint
:1; /* is this hint currently valid? */
319 bfd_vma offset
; /* mem.offset offset */
320 bfd_vma base
; /* mem.offset base */
323 int path
; /* number of alt. entry points seen */
324 const char **entry_labels
; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths
; /* size currently allocated for
329 int pointer_size
; /* size in bytes of a pointer */
330 int pointer_size_shift
; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop
[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop
[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT
) 1) << 1},
454 {"psr.up", ((valueT
) 1) << 2},
455 {"psr.ac", ((valueT
) 1) << 3},
456 {"psr.mfl", ((valueT
) 1) << 4},
457 {"psr.mfh", ((valueT
) 1) << 5},
459 {"psr.ic", ((valueT
) 1) << 13},
460 {"psr.i", ((valueT
) 1) << 14},
461 {"psr.pk", ((valueT
) 1) << 15},
463 {"psr.dt", ((valueT
) 1) << 17},
464 {"psr.dfl", ((valueT
) 1) << 18},
465 {"psr.dfh", ((valueT
) 1) << 19},
466 {"psr.sp", ((valueT
) 1) << 20},
467 {"psr.pp", ((valueT
) 1) << 21},
468 {"psr.di", ((valueT
) 1) << 22},
469 {"psr.si", ((valueT
) 1) << 23},
470 {"psr.db", ((valueT
) 1) << 24},
471 {"psr.lp", ((valueT
) 1) << 25},
472 {"psr.tb", ((valueT
) 1) << 26},
473 {"psr.rt", ((valueT
) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT
) 1) << 34},
477 {"psr.mc", ((valueT
) 1) << 35},
478 {"psr.it", ((valueT
) 1) << 36},
479 {"psr.id", ((valueT
) 1) << 37},
480 {"psr.da", ((valueT
) 1) << 38},
481 {"psr.dd", ((valueT
) 1) << 39},
482 {"psr.ss", ((valueT
) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT
) 1) << 43},
485 {"psr.bn", ((valueT
) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID
},
498 { "cpuid", IND_CPUID
},
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC
, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC
, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC
, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC
, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC
, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC
, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC
, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC
, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC
, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC
, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC
, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC
, { 0 } },
546 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL
, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC
, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST
, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST
, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST
, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST
, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST
, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST
, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST
, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST
, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST
, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST
, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST
, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST
, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST
, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST
, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST
, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST
, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST
, { ELFOSABI_NONE
} },
577 { "hpux", PSEUDO_FUNC_CONST
, { ELFOSABI_HPUX
} },
578 { "nt", PSEUDO_FUNC_CONST
, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST
, { ELFOSABI_LINUX
} },
580 { "freebsd", PSEUDO_FUNC_CONST
, { ELFOSABI_FREEBSD
} },
581 { "openvms", PSEUDO_FUNC_CONST
, { ELFOSABI_OPENVMS
} },
582 { "nsk", PSEUDO_FUNC_CONST
, { ELFOSABI_NSK
} },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG
, { REG_PRIUNAT
} }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop
[IA64_NUM_UNITS
] =
591 0x0000000000LL
, /* NIL => break 0 */
592 0x0008000000LL
, /* I-unit nop */
593 0x0008000000LL
, /* M-unit nop */
594 0x4000000000LL
, /* B-unit nop */
595 0x0008000000LL
, /* F-unit nop */
596 0x0008000000LL
, /* L-"unit" nop */
597 0x0008000000LL
, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name
[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template
[N
][N
][N
];
615 /* Resource dependencies currently in effect */
617 int depind
; /* dependency index */
618 const struct ia64_dependency
*dependency
; /* actual dependency */
619 unsigned specific
:1, /* is this a specific bit/regno? */
620 link_to_qp_branch
:1; /* will a branch on the same QP clear it?*/
621 int index
; /* specific regno/bit within dependency */
622 int note
; /* optional qualifying note (0 if none) */
626 int insn_srlz
; /* current insn serialization state */
627 int data_srlz
; /* current data serialization state */
628 int qp_regno
; /* qualifying predicate for this usage */
629 char *file
; /* what file marked this dependency */
630 unsigned int line
; /* what line marked this dependency */
631 struct mem_offset mem_offset
; /* optional memory offset hint */
632 enum { CMP_NONE
, CMP_OR
, CMP_AND
} cmp_type
; /* OR or AND compare? */
633 int path
; /* corresponding code entry index */
635 static int regdepslen
= 0;
636 static int regdepstotlen
= 0;
637 static const char *dv_mode
[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem
[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type
[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex
{
646 } *qp_mutexes
= NULL
; /* QP mutex bitmasks */
647 static int qp_mutexeslen
= 0;
648 static int qp_mutexestotlen
= 0;
649 static valueT qp_safe_across_calls
= 0;
651 /* Current state of PR implications */
652 static struct qp_imply
{
655 unsigned p2_branched
:1;
657 } *qp_implies
= NULL
;
658 static int qp_implieslen
= 0;
659 static int qp_impliestotlen
= 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values
->path
) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS
*align_frag
;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list
{
696 unsigned long slot_number
;
698 struct unw_rec_list
*next
;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count
*next
;
708 unsigned long label_number
;
709 unsigned int prologue_count
;
710 } label_prologue_count
;
714 /* Maintain a list of unwind entries for the current function. */
718 /* Any unwind entires that should be attached to the current slot
719 that an insn is being constructed for. */
720 unw_rec_list
*current_entry
;
722 /* These are used to create the unwind table entry for this function. */
724 symbolS
*info
; /* pointer to unwind info */
725 symbolS
*personality_routine
;
727 subsegT saved_text_subseg
;
728 unsigned int force_unwind_entry
: 1; /* force generation of unwind entry? */
730 /* TRUE if processing unwind directives in a prologue region. */
731 unsigned int prologue
: 1;
732 unsigned int prologue_mask
: 4;
733 unsigned int body
: 1;
734 unsigned int insn
: 1;
735 unsigned int prologue_count
; /* number of .prologues seen so far */
736 /* Prologue counts at previous .label_state directives. */
737 struct label_prologue_count
* saved_prologue_counts
;
740 /* The input value is a negated offset from psp, and specifies an address
741 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
742 must add 16 and divide by 4 to get the encoded value. */
744 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
746 typedef void (*vbyte_func
) PARAMS ((int, char *, char *));
748 /* Forward declarations: */
749 static void set_section
PARAMS ((char *name
));
750 static unsigned int set_regstack
PARAMS ((unsigned int, unsigned int,
751 unsigned int, unsigned int));
752 static void dot_align (int);
753 static void dot_radix
PARAMS ((int));
754 static void dot_special_section
PARAMS ((int));
755 static void dot_proc
PARAMS ((int));
756 static void dot_fframe
PARAMS ((int));
757 static void dot_vframe
PARAMS ((int));
758 static void dot_vframesp
PARAMS ((int));
759 static void dot_vframepsp
PARAMS ((int));
760 static void dot_save
PARAMS ((int));
761 static void dot_restore
PARAMS ((int));
762 static void dot_restorereg
PARAMS ((int));
763 static void dot_restorereg_p
PARAMS ((int));
764 static void dot_handlerdata
PARAMS ((int));
765 static void dot_unwentry
PARAMS ((int));
766 static void dot_altrp
PARAMS ((int));
767 static void dot_savemem
PARAMS ((int));
768 static void dot_saveg
PARAMS ((int));
769 static void dot_savef
PARAMS ((int));
770 static void dot_saveb
PARAMS ((int));
771 static void dot_savegf
PARAMS ((int));
772 static void dot_spill
PARAMS ((int));
773 static void dot_spillreg
PARAMS ((int));
774 static void dot_spillmem
PARAMS ((int));
775 static void dot_spillreg_p
PARAMS ((int));
776 static void dot_spillmem_p
PARAMS ((int));
777 static void dot_label_state
PARAMS ((int));
778 static void dot_copy_state
PARAMS ((int));
779 static void dot_unwabi
PARAMS ((int));
780 static void dot_personality
PARAMS ((int));
781 static void dot_body
PARAMS ((int));
782 static void dot_prologue
PARAMS ((int));
783 static void dot_endp
PARAMS ((int));
784 static void dot_template
PARAMS ((int));
785 static void dot_regstk
PARAMS ((int));
786 static void dot_rot
PARAMS ((int));
787 static void dot_byteorder
PARAMS ((int));
788 static void dot_psr
PARAMS ((int));
789 static void dot_alias
PARAMS ((int));
790 static void dot_ln
PARAMS ((int));
791 static void cross_section
PARAMS ((int ref
, void (*cons
) PARAMS((int)), int ua
));
792 static void dot_xdata
PARAMS ((int));
793 static void stmt_float_cons
PARAMS ((int));
794 static void stmt_cons_ua
PARAMS ((int));
795 static void dot_xfloat_cons
PARAMS ((int));
796 static void dot_xstringer
PARAMS ((int));
797 static void dot_xdata_ua
PARAMS ((int));
798 static void dot_xfloat_cons_ua
PARAMS ((int));
799 static void print_prmask
PARAMS ((valueT mask
));
800 static void dot_pred_rel
PARAMS ((int));
801 static void dot_reg_val
PARAMS ((int));
802 static void dot_serialize
PARAMS ((int));
803 static void dot_dv_mode
PARAMS ((int));
804 static void dot_entry
PARAMS ((int));
805 static void dot_mem_offset
PARAMS ((int));
806 static void add_unwind_entry
PARAMS((unw_rec_list
*ptr
));
807 static symbolS
*declare_register
PARAMS ((const char *name
, int regnum
));
808 static void declare_register_set
PARAMS ((const char *, int, int));
809 static unsigned int operand_width
PARAMS ((enum ia64_opnd
));
810 static enum operand_match_result operand_match
PARAMS ((const struct ia64_opcode
*idesc
,
813 static int parse_operand
PARAMS ((expressionS
*e
));
814 static struct ia64_opcode
* parse_operands
PARAMS ((struct ia64_opcode
*));
815 static void build_insn
PARAMS ((struct slot
*, bfd_vma
*));
816 static void emit_one_bundle
PARAMS ((void));
817 static void fix_insn
PARAMS ((fixS
*, const struct ia64_operand
*, valueT
));
818 static bfd_reloc_code_real_type ia64_gen_real_reloc_type
PARAMS ((struct symbol
*sym
,
819 bfd_reloc_code_real_type r_type
));
820 static void insn_group_break
PARAMS ((int, int, int));
821 static void mark_resource
PARAMS ((struct ia64_opcode
*, const struct ia64_dependency
*,
822 struct rsrc
*, int depind
, int path
));
823 static void add_qp_mutex
PARAMS((valueT mask
));
824 static void add_qp_imply
PARAMS((int p1
, int p2
));
825 static void clear_qp_branch_flag
PARAMS((valueT mask
));
826 static void clear_qp_mutex
PARAMS((valueT mask
));
827 static void clear_qp_implies
PARAMS((valueT p1_mask
, valueT p2_mask
));
828 static int has_suffix_p
PARAMS((const char *, const char *));
829 static void clear_register_values
PARAMS ((void));
830 static void print_dependency
PARAMS ((const char *action
, int depind
));
831 static void instruction_serialization
PARAMS ((void));
832 static void data_serialization
PARAMS ((void));
833 static void remove_marked_resource
PARAMS ((struct rsrc
*));
834 static int is_conditional_branch
PARAMS ((struct ia64_opcode
*));
835 static int is_taken_branch
PARAMS ((struct ia64_opcode
*));
836 static int is_interruption_or_rfi
PARAMS ((struct ia64_opcode
*));
837 static int depends_on
PARAMS ((int, struct ia64_opcode
*));
838 static int specify_resource
PARAMS ((const struct ia64_dependency
*,
839 struct ia64_opcode
*, int, struct rsrc
[], int, int));
840 static int check_dv
PARAMS((struct ia64_opcode
*idesc
));
841 static void check_dependencies
PARAMS((struct ia64_opcode
*));
842 static void mark_resources
PARAMS((struct ia64_opcode
*));
843 static void update_dependencies
PARAMS((struct ia64_opcode
*));
844 static void note_register_values
PARAMS((struct ia64_opcode
*));
845 static int qp_mutex
PARAMS ((int, int, int));
846 static int resources_match
PARAMS ((struct rsrc
*, struct ia64_opcode
*, int, int, int));
847 static void output_vbyte_mem
PARAMS ((int, char *, char *));
848 static void count_output
PARAMS ((int, char *, char *));
849 static void output_R1_format
PARAMS ((vbyte_func
, unw_record_type
, int));
850 static void output_R2_format
PARAMS ((vbyte_func
, int, int, unsigned long));
851 static void output_R3_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
852 static void output_P1_format
PARAMS ((vbyte_func
, int));
853 static void output_P2_format
PARAMS ((vbyte_func
, int, int));
854 static void output_P3_format
PARAMS ((vbyte_func
, unw_record_type
, int));
855 static void output_P4_format
PARAMS ((vbyte_func
, unsigned char *, unsigned long));
856 static void output_P5_format
PARAMS ((vbyte_func
, int, unsigned long));
857 static void output_P6_format
PARAMS ((vbyte_func
, unw_record_type
, int));
858 static void output_P7_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long, unsigned long));
859 static void output_P8_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
860 static void output_P9_format
PARAMS ((vbyte_func
, int, int));
861 static void output_P10_format
PARAMS ((vbyte_func
, int, int));
862 static void output_B1_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
863 static void output_B2_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
864 static void output_B3_format
PARAMS ((vbyte_func
, unsigned long, unsigned long));
865 static void output_B4_format
PARAMS ((vbyte_func
, unw_record_type
, unsigned long));
866 static char format_ab_reg
PARAMS ((int, int));
867 static void output_X1_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, unsigned long,
869 static void output_X2_format
PARAMS ((vbyte_func
, int, int, int, int, int, unsigned long));
870 static void output_X3_format
PARAMS ((vbyte_func
, unw_record_type
, int, int, int, unsigned long,
872 static void output_X4_format
PARAMS ((vbyte_func
, int, int, int, int, int, int, unsigned long));
873 static unw_rec_list
*output_endp
PARAMS ((void));
874 static unw_rec_list
*output_prologue
PARAMS ((void));
875 static unw_rec_list
*output_prologue_gr
PARAMS ((unsigned int, unsigned int));
876 static unw_rec_list
*output_body
PARAMS ((void));
877 static unw_rec_list
*output_mem_stack_f
PARAMS ((unsigned int));
878 static unw_rec_list
*output_mem_stack_v
PARAMS ((void));
879 static unw_rec_list
*output_psp_gr
PARAMS ((unsigned int));
880 static unw_rec_list
*output_psp_sprel
PARAMS ((unsigned int));
881 static unw_rec_list
*output_rp_when
PARAMS ((void));
882 static unw_rec_list
*output_rp_gr
PARAMS ((unsigned int));
883 static unw_rec_list
*output_rp_br
PARAMS ((unsigned int));
884 static unw_rec_list
*output_rp_psprel
PARAMS ((unsigned int));
885 static unw_rec_list
*output_rp_sprel
PARAMS ((unsigned int));
886 static unw_rec_list
*output_pfs_when
PARAMS ((void));
887 static unw_rec_list
*output_pfs_gr
PARAMS ((unsigned int));
888 static unw_rec_list
*output_pfs_psprel
PARAMS ((unsigned int));
889 static unw_rec_list
*output_pfs_sprel
PARAMS ((unsigned int));
890 static unw_rec_list
*output_preds_when
PARAMS ((void));
891 static unw_rec_list
*output_preds_gr
PARAMS ((unsigned int));
892 static unw_rec_list
*output_preds_psprel
PARAMS ((unsigned int));
893 static unw_rec_list
*output_preds_sprel
PARAMS ((unsigned int));
894 static unw_rec_list
*output_fr_mem
PARAMS ((unsigned int));
895 static unw_rec_list
*output_frgr_mem
PARAMS ((unsigned int, unsigned int));
896 static unw_rec_list
*output_gr_gr
PARAMS ((unsigned int, unsigned int));
897 static unw_rec_list
*output_gr_mem
PARAMS ((unsigned int));
898 static unw_rec_list
*output_br_mem
PARAMS ((unsigned int));
899 static unw_rec_list
*output_br_gr
PARAMS ((unsigned int, unsigned int));
900 static unw_rec_list
*output_spill_base
PARAMS ((unsigned int));
901 static unw_rec_list
*output_unat_when
PARAMS ((void));
902 static unw_rec_list
*output_unat_gr
PARAMS ((unsigned int));
903 static unw_rec_list
*output_unat_psprel
PARAMS ((unsigned int));
904 static unw_rec_list
*output_unat_sprel
PARAMS ((unsigned int));
905 static unw_rec_list
*output_lc_when
PARAMS ((void));
906 static unw_rec_list
*output_lc_gr
PARAMS ((unsigned int));
907 static unw_rec_list
*output_lc_psprel
PARAMS ((unsigned int));
908 static unw_rec_list
*output_lc_sprel
PARAMS ((unsigned int));
909 static unw_rec_list
*output_fpsr_when
PARAMS ((void));
910 static unw_rec_list
*output_fpsr_gr
PARAMS ((unsigned int));
911 static unw_rec_list
*output_fpsr_psprel
PARAMS ((unsigned int));
912 static unw_rec_list
*output_fpsr_sprel
PARAMS ((unsigned int));
913 static unw_rec_list
*output_priunat_when_gr
PARAMS ((void));
914 static unw_rec_list
*output_priunat_when_mem
PARAMS ((void));
915 static unw_rec_list
*output_priunat_gr
PARAMS ((unsigned int));
916 static unw_rec_list
*output_priunat_psprel
PARAMS ((unsigned int));
917 static unw_rec_list
*output_priunat_sprel
PARAMS ((unsigned int));
918 static unw_rec_list
*output_bsp_when
PARAMS ((void));
919 static unw_rec_list
*output_bsp_gr
PARAMS ((unsigned int));
920 static unw_rec_list
*output_bsp_psprel
PARAMS ((unsigned int));
921 static unw_rec_list
*output_bsp_sprel
PARAMS ((unsigned int));
922 static unw_rec_list
*output_bspstore_when
PARAMS ((void));
923 static unw_rec_list
*output_bspstore_gr
PARAMS ((unsigned int));
924 static unw_rec_list
*output_bspstore_psprel
PARAMS ((unsigned int));
925 static unw_rec_list
*output_bspstore_sprel
PARAMS ((unsigned int));
926 static unw_rec_list
*output_rnat_when
PARAMS ((void));
927 static unw_rec_list
*output_rnat_gr
PARAMS ((unsigned int));
928 static unw_rec_list
*output_rnat_psprel
PARAMS ((unsigned int));
929 static unw_rec_list
*output_rnat_sprel
PARAMS ((unsigned int));
930 static unw_rec_list
*output_unwabi
PARAMS ((unsigned long, unsigned long));
931 static unw_rec_list
*output_epilogue
PARAMS ((unsigned long));
932 static unw_rec_list
*output_label_state
PARAMS ((unsigned long));
933 static unw_rec_list
*output_copy_state
PARAMS ((unsigned long));
934 static unw_rec_list
*output_spill_psprel
PARAMS ((unsigned int, unsigned int, unsigned int));
935 static unw_rec_list
*output_spill_sprel
PARAMS ((unsigned int, unsigned int, unsigned int));
936 static unw_rec_list
*output_spill_psprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
938 static unw_rec_list
*output_spill_sprel_p
PARAMS ((unsigned int, unsigned int, unsigned int,
940 static unw_rec_list
*output_spill_reg
PARAMS ((unsigned int, unsigned int, unsigned int,
942 static unw_rec_list
*output_spill_reg_p
PARAMS ((unsigned int, unsigned int, unsigned int,
943 unsigned int, unsigned int));
944 static void process_one_record
PARAMS ((unw_rec_list
*, vbyte_func
));
945 static void process_unw_records
PARAMS ((unw_rec_list
*, vbyte_func
));
946 static int calc_record_size
PARAMS ((unw_rec_list
*));
947 static void set_imask
PARAMS ((unw_rec_list
*, unsigned long, unsigned long, unsigned int));
948 static unsigned long slot_index
PARAMS ((unsigned long, fragS
*,
949 unsigned long, fragS
*,
951 static unw_rec_list
*optimize_unw_records
PARAMS ((unw_rec_list
*));
952 static void fixup_unw_records
PARAMS ((unw_rec_list
*, int));
953 static int convert_expr_to_ab_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
954 static int convert_expr_to_xy_reg
PARAMS ((expressionS
*, unsigned int *, unsigned int *));
955 static unsigned int get_saved_prologue_count
PARAMS ((unsigned long));
956 static void save_prologue_count
PARAMS ((unsigned long, unsigned int));
957 static void free_saved_prologue_counts
PARAMS ((void));
959 /* Determine if application register REGNUM resides only in the integer
960 unit (as opposed to the memory unit). */
962 ar_is_only_in_integer_unit (int reg
)
965 return reg
>= 64 && reg
<= 111;
968 /* Determine if application register REGNUM resides only in the memory
969 unit (as opposed to the integer unit). */
971 ar_is_only_in_memory_unit (int reg
)
974 return reg
>= 0 && reg
<= 47;
977 /* Switch to section NAME and create section if necessary. It's
978 rather ugly that we have to manipulate input_line_pointer but I
979 don't see any other way to accomplish the same thing without
980 changing obj-elf.c (which may be the Right Thing, in the end). */
985 char *saved_input_line_pointer
;
987 saved_input_line_pointer
= input_line_pointer
;
988 input_line_pointer
= name
;
990 input_line_pointer
= saved_input_line_pointer
;
993 /* Map 's' to SHF_IA_64_SHORT. */
996 ia64_elf_section_letter (letter
, ptr_msg
)
1001 return SHF_IA_64_SHORT
;
1002 else if (letter
== 'o')
1003 return SHF_LINK_ORDER
;
1005 *ptr_msg
= _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1009 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1012 ia64_elf_section_flags (flags
, attr
, type
)
1014 int attr
, type ATTRIBUTE_UNUSED
;
1016 if (attr
& SHF_IA_64_SHORT
)
1017 flags
|= SEC_SMALL_DATA
;
1022 ia64_elf_section_type (str
, len
)
1026 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1028 if (STREQ (ELF_STRING_ia64_unwind_info
))
1029 return SHT_PROGBITS
;
1031 if (STREQ (ELF_STRING_ia64_unwind_info_once
))
1032 return SHT_PROGBITS
;
1034 if (STREQ (ELF_STRING_ia64_unwind
))
1035 return SHT_IA_64_UNWIND
;
1037 if (STREQ (ELF_STRING_ia64_unwind_once
))
1038 return SHT_IA_64_UNWIND
;
1040 if (STREQ ("unwind"))
1041 return SHT_IA_64_UNWIND
;
1048 set_regstack (ins
, locs
, outs
, rots
)
1049 unsigned int ins
, locs
, outs
, rots
;
1051 /* Size of frame. */
1054 sof
= ins
+ locs
+ outs
;
1057 as_bad ("Size of frame exceeds maximum of 96 registers");
1062 as_warn ("Size of rotating registers exceeds frame size");
1065 md
.in
.base
= REG_GR
+ 32;
1066 md
.loc
.base
= md
.in
.base
+ ins
;
1067 md
.out
.base
= md
.loc
.base
+ locs
;
1069 md
.in
.num_regs
= ins
;
1070 md
.loc
.num_regs
= locs
;
1071 md
.out
.num_regs
= outs
;
1072 md
.rot
.num_regs
= rots
;
1079 struct label_fix
*lfix
;
1081 subsegT saved_subseg
;
1084 if (!md
.last_text_seg
)
1087 saved_seg
= now_seg
;
1088 saved_subseg
= now_subseg
;
1090 subseg_set (md
.last_text_seg
, 0);
1092 while (md
.num_slots_in_use
> 0)
1093 emit_one_bundle (); /* force out queued instructions */
1095 /* In case there are labels following the last instruction, resolve
1097 for (lfix
= CURR_SLOT
.label_fixups
; lfix
; lfix
= lfix
->next
)
1099 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1100 symbol_set_frag (lfix
->sym
, frag_now
);
1102 CURR_SLOT
.label_fixups
= 0;
1103 for (lfix
= CURR_SLOT
.tag_fixups
; lfix
; lfix
= lfix
->next
)
1105 S_SET_VALUE (lfix
->sym
, frag_now_fix ());
1106 symbol_set_frag (lfix
->sym
, frag_now
);
1108 CURR_SLOT
.tag_fixups
= 0;
1110 /* In case there are unwind directives following the last instruction,
1111 resolve those now. We only handle prologue, body, and endp directives
1112 here. Give an error for others. */
1113 for (ptr
= unwind
.current_entry
; ptr
; ptr
= ptr
->next
)
1115 switch (ptr
->r
.type
)
1121 ptr
->slot_number
= (unsigned long) frag_more (0);
1122 ptr
->slot_frag
= frag_now
;
1125 /* Allow any record which doesn't have a "t" field (i.e.,
1126 doesn't relate to a particular instruction). */
1142 as_bad (_("Unwind directive not followed by an instruction."));
1146 unwind
.current_entry
= NULL
;
1148 subseg_set (saved_seg
, saved_subseg
);
1150 if (md
.qp
.X_op
== O_register
)
1151 as_bad ("qualifying predicate not followed by instruction");
1155 ia64_do_align (int nbytes
)
1157 char *saved_input_line_pointer
= input_line_pointer
;
1159 input_line_pointer
= "";
1160 s_align_bytes (nbytes
);
1161 input_line_pointer
= saved_input_line_pointer
;
1165 ia64_cons_align (nbytes
)
1170 char *saved_input_line_pointer
= input_line_pointer
;
1171 input_line_pointer
= "";
1172 s_align_bytes (nbytes
);
1173 input_line_pointer
= saved_input_line_pointer
;
1177 /* Output COUNT bytes to a memory location. */
1178 static char *vbyte_mem_ptr
= NULL
;
1181 output_vbyte_mem (count
, ptr
, comment
)
1184 char *comment ATTRIBUTE_UNUSED
;
1187 if (vbyte_mem_ptr
== NULL
)
1192 for (x
= 0; x
< count
; x
++)
1193 *(vbyte_mem_ptr
++) = ptr
[x
];
1196 /* Count the number of bytes required for records. */
1197 static int vbyte_count
= 0;
1199 count_output (count
, ptr
, comment
)
1201 char *ptr ATTRIBUTE_UNUSED
;
1202 char *comment ATTRIBUTE_UNUSED
;
1204 vbyte_count
+= count
;
1208 output_R1_format (f
, rtype
, rlen
)
1210 unw_record_type rtype
;
1217 output_R3_format (f
, rtype
, rlen
);
1223 else if (rtype
!= prologue
)
1224 as_bad ("record type is not valid");
1226 byte
= UNW_R1
| (r
<< 5) | (rlen
& 0x1f);
1227 (*f
) (1, &byte
, NULL
);
1231 output_R2_format (f
, mask
, grsave
, rlen
)
1238 mask
= (mask
& 0x0f);
1239 grsave
= (grsave
& 0x7f);
1241 bytes
[0] = (UNW_R2
| (mask
>> 1));
1242 bytes
[1] = (((mask
& 0x01) << 7) | grsave
);
1243 count
+= output_leb128 (bytes
+ 2, rlen
, 0);
1244 (*f
) (count
, bytes
, NULL
);
1248 output_R3_format (f
, rtype
, rlen
)
1250 unw_record_type rtype
;
1257 output_R1_format (f
, rtype
, rlen
);
1263 else if (rtype
!= prologue
)
1264 as_bad ("record type is not valid");
1265 bytes
[0] = (UNW_R3
| r
);
1266 count
= output_leb128 (bytes
+ 1, rlen
, 0);
1267 (*f
) (count
+ 1, bytes
, NULL
);
1271 output_P1_format (f
, brmask
)
1276 byte
= UNW_P1
| (brmask
& 0x1f);
1277 (*f
) (1, &byte
, NULL
);
1281 output_P2_format (f
, brmask
, gr
)
1287 brmask
= (brmask
& 0x1f);
1288 bytes
[0] = UNW_P2
| (brmask
>> 1);
1289 bytes
[1] = (((brmask
& 1) << 7) | gr
);
1290 (*f
) (2, bytes
, NULL
);
1294 output_P3_format (f
, rtype
, reg
)
1296 unw_record_type rtype
;
1341 as_bad ("Invalid record type for P3 format.");
1343 bytes
[0] = (UNW_P3
| (r
>> 1));
1344 bytes
[1] = (((r
& 1) << 7) | reg
);
1345 (*f
) (2, bytes
, NULL
);
1349 output_P4_format (f
, imask
, imask_size
)
1351 unsigned char *imask
;
1352 unsigned long imask_size
;
1355 (*f
) (imask_size
, (char *) imask
, NULL
);
1359 output_P5_format (f
, grmask
, frmask
)
1362 unsigned long frmask
;
1365 grmask
= (grmask
& 0x0f);
1368 bytes
[1] = ((grmask
<< 4) | ((frmask
& 0x000f0000) >> 16));
1369 bytes
[2] = ((frmask
& 0x0000ff00) >> 8);
1370 bytes
[3] = (frmask
& 0x000000ff);
1371 (*f
) (4, bytes
, NULL
);
1375 output_P6_format (f
, rtype
, rmask
)
1377 unw_record_type rtype
;
1383 if (rtype
== gr_mem
)
1385 else if (rtype
!= fr_mem
)
1386 as_bad ("Invalid record type for format P6");
1387 byte
= (UNW_P6
| (r
<< 4) | (rmask
& 0x0f));
1388 (*f
) (1, &byte
, NULL
);
1392 output_P7_format (f
, rtype
, w1
, w2
)
1394 unw_record_type rtype
;
1401 count
+= output_leb128 (bytes
+ 1, w1
, 0);
1406 count
+= output_leb128 (bytes
+ count
, w2
>> 4, 0);
1456 bytes
[0] = (UNW_P7
| r
);
1457 (*f
) (count
, bytes
, NULL
);
1461 output_P8_format (f
, rtype
, t
)
1463 unw_record_type rtype
;
1502 case bspstore_psprel
:
1505 case bspstore_sprel
:
1517 case priunat_when_gr
:
1520 case priunat_psprel
:
1526 case priunat_when_mem
:
1533 count
+= output_leb128 (bytes
+ 2, t
, 0);
1534 (*f
) (count
, bytes
, NULL
);
1538 output_P9_format (f
, grmask
, gr
)
1545 bytes
[1] = (grmask
& 0x0f);
1546 bytes
[2] = (gr
& 0x7f);
1547 (*f
) (3, bytes
, NULL
);
1551 output_P10_format (f
, abi
, context
)
1558 bytes
[1] = (abi
& 0xff);
1559 bytes
[2] = (context
& 0xff);
1560 (*f
) (3, bytes
, NULL
);
1564 output_B1_format (f
, rtype
, label
)
1566 unw_record_type rtype
;
1567 unsigned long label
;
1573 output_B4_format (f
, rtype
, label
);
1576 if (rtype
== copy_state
)
1578 else if (rtype
!= label_state
)
1579 as_bad ("Invalid record type for format B1");
1581 byte
= (UNW_B1
| (r
<< 5) | (label
& 0x1f));
1582 (*f
) (1, &byte
, NULL
);
1586 output_B2_format (f
, ecount
, t
)
1588 unsigned long ecount
;
1595 output_B3_format (f
, ecount
, t
);
1598 bytes
[0] = (UNW_B2
| (ecount
& 0x1f));
1599 count
+= output_leb128 (bytes
+ 1, t
, 0);
1600 (*f
) (count
, bytes
, NULL
);
1604 output_B3_format (f
, ecount
, t
)
1606 unsigned long ecount
;
1613 output_B2_format (f
, ecount
, t
);
1617 count
+= output_leb128 (bytes
+ 1, t
, 0);
1618 count
+= output_leb128 (bytes
+ count
, ecount
, 0);
1619 (*f
) (count
, bytes
, NULL
);
1623 output_B4_format (f
, rtype
, label
)
1625 unw_record_type rtype
;
1626 unsigned long label
;
1633 output_B1_format (f
, rtype
, label
);
1637 if (rtype
== copy_state
)
1639 else if (rtype
!= label_state
)
1640 as_bad ("Invalid record type for format B1");
1642 bytes
[0] = (UNW_B4
| (r
<< 3));
1643 count
+= output_leb128 (bytes
+ 1, label
, 0);
1644 (*f
) (count
, bytes
, NULL
);
1648 format_ab_reg (ab
, reg
)
1655 ret
= (ab
<< 5) | reg
;
1660 output_X1_format (f
, rtype
, ab
, reg
, t
, w1
)
1662 unw_record_type rtype
;
1672 if (rtype
== spill_sprel
)
1674 else if (rtype
!= spill_psprel
)
1675 as_bad ("Invalid record type for format X1");
1676 bytes
[1] = ((r
<< 7) | format_ab_reg (ab
, reg
));
1677 count
+= output_leb128 (bytes
+ 2, t
, 0);
1678 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1679 (*f
) (count
, bytes
, NULL
);
1683 output_X2_format (f
, ab
, reg
, x
, y
, treg
, t
)
1692 bytes
[1] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1693 bytes
[2] = (((y
& 1) << 7) | (treg
& 0x7f));
1694 count
+= output_leb128 (bytes
+ 3, t
, 0);
1695 (*f
) (count
, bytes
, NULL
);
1699 output_X3_format (f
, rtype
, qp
, ab
, reg
, t
, w1
)
1701 unw_record_type rtype
;
1712 if (rtype
== spill_sprel_p
)
1714 else if (rtype
!= spill_psprel_p
)
1715 as_bad ("Invalid record type for format X3");
1716 bytes
[1] = ((r
<< 7) | (qp
& 0x3f));
1717 bytes
[2] = format_ab_reg (ab
, reg
);
1718 count
+= output_leb128 (bytes
+ 3, t
, 0);
1719 count
+= output_leb128 (bytes
+ count
, w1
, 0);
1720 (*f
) (count
, bytes
, NULL
);
1724 output_X4_format (f
, qp
, ab
, reg
, x
, y
, treg
, t
)
1734 bytes
[1] = (qp
& 0x3f);
1735 bytes
[2] = (((x
& 1) << 7) | format_ab_reg (ab
, reg
));
1736 bytes
[3] = (((y
& 1) << 7) | (treg
& 0x7f));
1737 count
+= output_leb128 (bytes
+ 4, t
, 0);
1738 (*f
) (count
, bytes
, NULL
);
1741 /* This function allocates a record list structure, and initializes fields. */
1743 static unw_rec_list
*
1744 alloc_record (unw_record_type t
)
1747 ptr
= xmalloc (sizeof (*ptr
));
1749 ptr
->slot_number
= SLOT_NUM_NOT_SET
;
1754 /* Dummy unwind record used for calculating the length of the last prologue or
1757 static unw_rec_list
*
1760 unw_rec_list
*ptr
= alloc_record (endp
);
1764 static unw_rec_list
*
1767 unw_rec_list
*ptr
= alloc_record (prologue
);
1768 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1772 static unw_rec_list
*
1773 output_prologue_gr (saved_mask
, reg
)
1774 unsigned int saved_mask
;
1777 unw_rec_list
*ptr
= alloc_record (prologue_gr
);
1778 memset (&ptr
->r
.record
.r
.mask
, 0, sizeof (ptr
->r
.record
.r
.mask
));
1779 ptr
->r
.record
.r
.grmask
= saved_mask
;
1780 ptr
->r
.record
.r
.grsave
= reg
;
1784 static unw_rec_list
*
1787 unw_rec_list
*ptr
= alloc_record (body
);
1791 static unw_rec_list
*
1792 output_mem_stack_f (size
)
1795 unw_rec_list
*ptr
= alloc_record (mem_stack_f
);
1796 ptr
->r
.record
.p
.size
= size
;
1800 static unw_rec_list
*
1801 output_mem_stack_v ()
1803 unw_rec_list
*ptr
= alloc_record (mem_stack_v
);
1807 static unw_rec_list
*
1811 unw_rec_list
*ptr
= alloc_record (psp_gr
);
1812 ptr
->r
.record
.p
.gr
= gr
;
1816 static unw_rec_list
*
1817 output_psp_sprel (offset
)
1818 unsigned int offset
;
1820 unw_rec_list
*ptr
= alloc_record (psp_sprel
);
1821 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1825 static unw_rec_list
*
1828 unw_rec_list
*ptr
= alloc_record (rp_when
);
1832 static unw_rec_list
*
1836 unw_rec_list
*ptr
= alloc_record (rp_gr
);
1837 ptr
->r
.record
.p
.gr
= gr
;
1841 static unw_rec_list
*
1845 unw_rec_list
*ptr
= alloc_record (rp_br
);
1846 ptr
->r
.record
.p
.br
= br
;
1850 static unw_rec_list
*
1851 output_rp_psprel (offset
)
1852 unsigned int offset
;
1854 unw_rec_list
*ptr
= alloc_record (rp_psprel
);
1855 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1859 static unw_rec_list
*
1860 output_rp_sprel (offset
)
1861 unsigned int offset
;
1863 unw_rec_list
*ptr
= alloc_record (rp_sprel
);
1864 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1868 static unw_rec_list
*
1871 unw_rec_list
*ptr
= alloc_record (pfs_when
);
1875 static unw_rec_list
*
1879 unw_rec_list
*ptr
= alloc_record (pfs_gr
);
1880 ptr
->r
.record
.p
.gr
= gr
;
1884 static unw_rec_list
*
1885 output_pfs_psprel (offset
)
1886 unsigned int offset
;
1888 unw_rec_list
*ptr
= alloc_record (pfs_psprel
);
1889 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1893 static unw_rec_list
*
1894 output_pfs_sprel (offset
)
1895 unsigned int offset
;
1897 unw_rec_list
*ptr
= alloc_record (pfs_sprel
);
1898 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1902 static unw_rec_list
*
1903 output_preds_when ()
1905 unw_rec_list
*ptr
= alloc_record (preds_when
);
1909 static unw_rec_list
*
1910 output_preds_gr (gr
)
1913 unw_rec_list
*ptr
= alloc_record (preds_gr
);
1914 ptr
->r
.record
.p
.gr
= gr
;
1918 static unw_rec_list
*
1919 output_preds_psprel (offset
)
1920 unsigned int offset
;
1922 unw_rec_list
*ptr
= alloc_record (preds_psprel
);
1923 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
1927 static unw_rec_list
*
1928 output_preds_sprel (offset
)
1929 unsigned int offset
;
1931 unw_rec_list
*ptr
= alloc_record (preds_sprel
);
1932 ptr
->r
.record
.p
.spoff
= offset
/ 4;
1936 static unw_rec_list
*
1937 output_fr_mem (mask
)
1940 unw_rec_list
*ptr
= alloc_record (fr_mem
);
1941 ptr
->r
.record
.p
.rmask
= mask
;
1945 static unw_rec_list
*
1946 output_frgr_mem (gr_mask
, fr_mask
)
1947 unsigned int gr_mask
;
1948 unsigned int fr_mask
;
1950 unw_rec_list
*ptr
= alloc_record (frgr_mem
);
1951 ptr
->r
.record
.p
.grmask
= gr_mask
;
1952 ptr
->r
.record
.p
.frmask
= fr_mask
;
1956 static unw_rec_list
*
1957 output_gr_gr (mask
, reg
)
1961 unw_rec_list
*ptr
= alloc_record (gr_gr
);
1962 ptr
->r
.record
.p
.grmask
= mask
;
1963 ptr
->r
.record
.p
.gr
= reg
;
1967 static unw_rec_list
*
1968 output_gr_mem (mask
)
1971 unw_rec_list
*ptr
= alloc_record (gr_mem
);
1972 ptr
->r
.record
.p
.rmask
= mask
;
1976 static unw_rec_list
*
1977 output_br_mem (unsigned int mask
)
1979 unw_rec_list
*ptr
= alloc_record (br_mem
);
1980 ptr
->r
.record
.p
.brmask
= mask
;
1984 static unw_rec_list
*
1985 output_br_gr (save_mask
, reg
)
1986 unsigned int save_mask
;
1989 unw_rec_list
*ptr
= alloc_record (br_gr
);
1990 ptr
->r
.record
.p
.brmask
= save_mask
;
1991 ptr
->r
.record
.p
.gr
= reg
;
1995 static unw_rec_list
*
1996 output_spill_base (offset
)
1997 unsigned int offset
;
1999 unw_rec_list
*ptr
= alloc_record (spill_base
);
2000 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2004 static unw_rec_list
*
2007 unw_rec_list
*ptr
= alloc_record (unat_when
);
2011 static unw_rec_list
*
2015 unw_rec_list
*ptr
= alloc_record (unat_gr
);
2016 ptr
->r
.record
.p
.gr
= gr
;
2020 static unw_rec_list
*
2021 output_unat_psprel (offset
)
2022 unsigned int offset
;
2024 unw_rec_list
*ptr
= alloc_record (unat_psprel
);
2025 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2029 static unw_rec_list
*
2030 output_unat_sprel (offset
)
2031 unsigned int offset
;
2033 unw_rec_list
*ptr
= alloc_record (unat_sprel
);
2034 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2038 static unw_rec_list
*
2041 unw_rec_list
*ptr
= alloc_record (lc_when
);
2045 static unw_rec_list
*
2049 unw_rec_list
*ptr
= alloc_record (lc_gr
);
2050 ptr
->r
.record
.p
.gr
= gr
;
2054 static unw_rec_list
*
2055 output_lc_psprel (offset
)
2056 unsigned int offset
;
2058 unw_rec_list
*ptr
= alloc_record (lc_psprel
);
2059 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2063 static unw_rec_list
*
2064 output_lc_sprel (offset
)
2065 unsigned int offset
;
2067 unw_rec_list
*ptr
= alloc_record (lc_sprel
);
2068 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2072 static unw_rec_list
*
2075 unw_rec_list
*ptr
= alloc_record (fpsr_when
);
2079 static unw_rec_list
*
2083 unw_rec_list
*ptr
= alloc_record (fpsr_gr
);
2084 ptr
->r
.record
.p
.gr
= gr
;
2088 static unw_rec_list
*
2089 output_fpsr_psprel (offset
)
2090 unsigned int offset
;
2092 unw_rec_list
*ptr
= alloc_record (fpsr_psprel
);
2093 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2097 static unw_rec_list
*
2098 output_fpsr_sprel (offset
)
2099 unsigned int offset
;
2101 unw_rec_list
*ptr
= alloc_record (fpsr_sprel
);
2102 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2106 static unw_rec_list
*
2107 output_priunat_when_gr ()
2109 unw_rec_list
*ptr
= alloc_record (priunat_when_gr
);
2113 static unw_rec_list
*
2114 output_priunat_when_mem ()
2116 unw_rec_list
*ptr
= alloc_record (priunat_when_mem
);
2120 static unw_rec_list
*
2121 output_priunat_gr (gr
)
2124 unw_rec_list
*ptr
= alloc_record (priunat_gr
);
2125 ptr
->r
.record
.p
.gr
= gr
;
2129 static unw_rec_list
*
2130 output_priunat_psprel (offset
)
2131 unsigned int offset
;
2133 unw_rec_list
*ptr
= alloc_record (priunat_psprel
);
2134 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2138 static unw_rec_list
*
2139 output_priunat_sprel (offset
)
2140 unsigned int offset
;
2142 unw_rec_list
*ptr
= alloc_record (priunat_sprel
);
2143 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2147 static unw_rec_list
*
2150 unw_rec_list
*ptr
= alloc_record (bsp_when
);
2154 static unw_rec_list
*
2158 unw_rec_list
*ptr
= alloc_record (bsp_gr
);
2159 ptr
->r
.record
.p
.gr
= gr
;
2163 static unw_rec_list
*
2164 output_bsp_psprel (offset
)
2165 unsigned int offset
;
2167 unw_rec_list
*ptr
= alloc_record (bsp_psprel
);
2168 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2172 static unw_rec_list
*
2173 output_bsp_sprel (offset
)
2174 unsigned int offset
;
2176 unw_rec_list
*ptr
= alloc_record (bsp_sprel
);
2177 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2181 static unw_rec_list
*
2182 output_bspstore_when ()
2184 unw_rec_list
*ptr
= alloc_record (bspstore_when
);
2188 static unw_rec_list
*
2189 output_bspstore_gr (gr
)
2192 unw_rec_list
*ptr
= alloc_record (bspstore_gr
);
2193 ptr
->r
.record
.p
.gr
= gr
;
2197 static unw_rec_list
*
2198 output_bspstore_psprel (offset
)
2199 unsigned int offset
;
2201 unw_rec_list
*ptr
= alloc_record (bspstore_psprel
);
2202 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2206 static unw_rec_list
*
2207 output_bspstore_sprel (offset
)
2208 unsigned int offset
;
2210 unw_rec_list
*ptr
= alloc_record (bspstore_sprel
);
2211 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2215 static unw_rec_list
*
2218 unw_rec_list
*ptr
= alloc_record (rnat_when
);
2222 static unw_rec_list
*
2226 unw_rec_list
*ptr
= alloc_record (rnat_gr
);
2227 ptr
->r
.record
.p
.gr
= gr
;
2231 static unw_rec_list
*
2232 output_rnat_psprel (offset
)
2233 unsigned int offset
;
2235 unw_rec_list
*ptr
= alloc_record (rnat_psprel
);
2236 ptr
->r
.record
.p
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2240 static unw_rec_list
*
2241 output_rnat_sprel (offset
)
2242 unsigned int offset
;
2244 unw_rec_list
*ptr
= alloc_record (rnat_sprel
);
2245 ptr
->r
.record
.p
.spoff
= offset
/ 4;
2249 static unw_rec_list
*
2250 output_unwabi (abi
, context
)
2252 unsigned long context
;
2254 unw_rec_list
*ptr
= alloc_record (unwabi
);
2255 ptr
->r
.record
.p
.abi
= abi
;
2256 ptr
->r
.record
.p
.context
= context
;
2260 static unw_rec_list
*
2261 output_epilogue (unsigned long ecount
)
2263 unw_rec_list
*ptr
= alloc_record (epilogue
);
2264 ptr
->r
.record
.b
.ecount
= ecount
;
2268 static unw_rec_list
*
2269 output_label_state (unsigned long label
)
2271 unw_rec_list
*ptr
= alloc_record (label_state
);
2272 ptr
->r
.record
.b
.label
= label
;
2276 static unw_rec_list
*
2277 output_copy_state (unsigned long label
)
2279 unw_rec_list
*ptr
= alloc_record (copy_state
);
2280 ptr
->r
.record
.b
.label
= label
;
2284 static unw_rec_list
*
2285 output_spill_psprel (ab
, reg
, offset
)
2288 unsigned int offset
;
2290 unw_rec_list
*ptr
= alloc_record (spill_psprel
);
2291 ptr
->r
.record
.x
.ab
= ab
;
2292 ptr
->r
.record
.x
.reg
= reg
;
2293 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2297 static unw_rec_list
*
2298 output_spill_sprel (ab
, reg
, offset
)
2301 unsigned int offset
;
2303 unw_rec_list
*ptr
= alloc_record (spill_sprel
);
2304 ptr
->r
.record
.x
.ab
= ab
;
2305 ptr
->r
.record
.x
.reg
= reg
;
2306 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2310 static unw_rec_list
*
2311 output_spill_psprel_p (ab
, reg
, offset
, predicate
)
2314 unsigned int offset
;
2315 unsigned int predicate
;
2317 unw_rec_list
*ptr
= alloc_record (spill_psprel_p
);
2318 ptr
->r
.record
.x
.ab
= ab
;
2319 ptr
->r
.record
.x
.reg
= reg
;
2320 ptr
->r
.record
.x
.pspoff
= ENCODED_PSP_OFFSET (offset
);
2321 ptr
->r
.record
.x
.qp
= predicate
;
2325 static unw_rec_list
*
2326 output_spill_sprel_p (ab
, reg
, offset
, predicate
)
2329 unsigned int offset
;
2330 unsigned int predicate
;
2332 unw_rec_list
*ptr
= alloc_record (spill_sprel_p
);
2333 ptr
->r
.record
.x
.ab
= ab
;
2334 ptr
->r
.record
.x
.reg
= reg
;
2335 ptr
->r
.record
.x
.spoff
= offset
/ 4;
2336 ptr
->r
.record
.x
.qp
= predicate
;
2340 static unw_rec_list
*
2341 output_spill_reg (ab
, reg
, targ_reg
, xy
)
2344 unsigned int targ_reg
;
2347 unw_rec_list
*ptr
= alloc_record (spill_reg
);
2348 ptr
->r
.record
.x
.ab
= ab
;
2349 ptr
->r
.record
.x
.reg
= reg
;
2350 ptr
->r
.record
.x
.treg
= targ_reg
;
2351 ptr
->r
.record
.x
.xy
= xy
;
2355 static unw_rec_list
*
2356 output_spill_reg_p (ab
, reg
, targ_reg
, xy
, predicate
)
2359 unsigned int targ_reg
;
2361 unsigned int predicate
;
2363 unw_rec_list
*ptr
= alloc_record (spill_reg_p
);
2364 ptr
->r
.record
.x
.ab
= ab
;
2365 ptr
->r
.record
.x
.reg
= reg
;
2366 ptr
->r
.record
.x
.treg
= targ_reg
;
2367 ptr
->r
.record
.x
.xy
= xy
;
2368 ptr
->r
.record
.x
.qp
= predicate
;
2372 /* Given a unw_rec_list process the correct format with the
2373 specified function. */
2376 process_one_record (ptr
, f
)
2380 unsigned long fr_mask
, gr_mask
;
2382 switch (ptr
->r
.type
)
2384 /* This is a dummy record that takes up no space in the output. */
2392 /* These are taken care of by prologue/prologue_gr. */
2397 if (ptr
->r
.type
== prologue_gr
)
2398 output_R2_format (f
, ptr
->r
.record
.r
.grmask
,
2399 ptr
->r
.record
.r
.grsave
, ptr
->r
.record
.r
.rlen
);
2401 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2403 /* Output descriptor(s) for union of register spills (if any). */
2404 gr_mask
= ptr
->r
.record
.r
.mask
.gr_mem
;
2405 fr_mask
= ptr
->r
.record
.r
.mask
.fr_mem
;
2408 if ((fr_mask
& ~0xfUL
) == 0)
2409 output_P6_format (f
, fr_mem
, fr_mask
);
2412 output_P5_format (f
, gr_mask
, fr_mask
);
2417 output_P6_format (f
, gr_mem
, gr_mask
);
2418 if (ptr
->r
.record
.r
.mask
.br_mem
)
2419 output_P1_format (f
, ptr
->r
.record
.r
.mask
.br_mem
);
2421 /* output imask descriptor if necessary: */
2422 if (ptr
->r
.record
.r
.mask
.i
)
2423 output_P4_format (f
, ptr
->r
.record
.r
.mask
.i
,
2424 ptr
->r
.record
.r
.imask_size
);
2428 output_R1_format (f
, ptr
->r
.type
, ptr
->r
.record
.r
.rlen
);
2432 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
,
2433 ptr
->r
.record
.p
.size
);
2446 output_P3_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.gr
);
2449 output_P3_format (f
, rp_br
, ptr
->r
.record
.p
.br
);
2452 output_P7_format (f
, psp_sprel
, ptr
->r
.record
.p
.spoff
, 0);
2460 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
, 0);
2469 output_P7_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
, 0);
2479 case bspstore_sprel
:
2481 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.spoff
);
2484 output_P9_format (f
, ptr
->r
.record
.p
.grmask
, ptr
->r
.record
.p
.gr
);
2487 output_P2_format (f
, ptr
->r
.record
.p
.brmask
, ptr
->r
.record
.p
.gr
);
2490 as_bad ("spill_mask record unimplemented.");
2492 case priunat_when_gr
:
2493 case priunat_when_mem
:
2497 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.t
);
2499 case priunat_psprel
:
2501 case bspstore_psprel
:
2503 output_P8_format (f
, ptr
->r
.type
, ptr
->r
.record
.p
.pspoff
);
2506 output_P10_format (f
, ptr
->r
.record
.p
.abi
, ptr
->r
.record
.p
.context
);
2509 output_B3_format (f
, ptr
->r
.record
.b
.ecount
, ptr
->r
.record
.b
.t
);
2513 output_B4_format (f
, ptr
->r
.type
, ptr
->r
.record
.b
.label
);
2516 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2517 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2518 ptr
->r
.record
.x
.pspoff
);
2521 output_X1_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.ab
,
2522 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.t
,
2523 ptr
->r
.record
.x
.spoff
);
2526 output_X2_format (f
, ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2527 ptr
->r
.record
.x
.xy
>> 1, ptr
->r
.record
.x
.xy
,
2528 ptr
->r
.record
.x
.treg
, ptr
->r
.record
.x
.t
);
2530 case spill_psprel_p
:
2531 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2532 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2533 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.pspoff
);
2536 output_X3_format (f
, ptr
->r
.type
, ptr
->r
.record
.x
.qp
,
2537 ptr
->r
.record
.x
.ab
, ptr
->r
.record
.x
.reg
,
2538 ptr
->r
.record
.x
.t
, ptr
->r
.record
.x
.spoff
);
2541 output_X4_format (f
, ptr
->r
.record
.x
.qp
, ptr
->r
.record
.x
.ab
,
2542 ptr
->r
.record
.x
.reg
, ptr
->r
.record
.x
.xy
>> 1,
2543 ptr
->r
.record
.x
.xy
, ptr
->r
.record
.x
.treg
,
2547 as_bad ("record_type_not_valid");
2552 /* Given a unw_rec_list list, process all the records with
2553 the specified function. */
2555 process_unw_records (list
, f
)
2560 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2561 process_one_record (ptr
, f
);
2564 /* Determine the size of a record list in bytes. */
2566 calc_record_size (list
)
2570 process_unw_records (list
, count_output
);
2574 /* Update IMASK bitmask to reflect the fact that one or more registers
2575 of type TYPE are saved starting at instruction with index T. If N
2576 bits are set in REGMASK, it is assumed that instructions T through
2577 T+N-1 save these registers.
2581 1: instruction saves next fp reg
2582 2: instruction saves next general reg
2583 3: instruction saves next branch reg */
2585 set_imask (region
, regmask
, t
, type
)
2586 unw_rec_list
*region
;
2587 unsigned long regmask
;
2591 unsigned char *imask
;
2592 unsigned long imask_size
;
2596 imask
= region
->r
.record
.r
.mask
.i
;
2597 imask_size
= region
->r
.record
.r
.imask_size
;
2600 imask_size
= (region
->r
.record
.r
.rlen
* 2 + 7) / 8 + 1;
2601 imask
= xmalloc (imask_size
);
2602 memset (imask
, 0, imask_size
);
2604 region
->r
.record
.r
.imask_size
= imask_size
;
2605 region
->r
.record
.r
.mask
.i
= imask
;
2609 pos
= 2 * (3 - t
% 4);
2612 if (i
>= imask_size
)
2614 as_bad ("Ignoring attempt to spill beyond end of region");
2618 imask
[i
] |= (type
& 0x3) << pos
;
2620 regmask
&= (regmask
- 1);
2630 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2631 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2632 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2636 slot_index (slot_addr
, slot_frag
, first_addr
, first_frag
, before_relax
)
2637 unsigned long slot_addr
;
2639 unsigned long first_addr
;
2643 unsigned long index
= 0;
2645 /* First time we are called, the initial address and frag are invalid. */
2646 if (first_addr
== 0)
2649 /* If the two addresses are in different frags, then we need to add in
2650 the remaining size of this frag, and then the entire size of intermediate
2652 while (slot_frag
!= first_frag
)
2654 unsigned long start_addr
= (unsigned long) &first_frag
->fr_literal
;
2658 /* We can get the final addresses only during and after
2660 if (first_frag
->fr_next
&& first_frag
->fr_next
->fr_address
)
2661 index
+= 3 * ((first_frag
->fr_next
->fr_address
2662 - first_frag
->fr_address
2663 - first_frag
->fr_fix
) >> 4);
2666 /* We don't know what the final addresses will be. We try our
2667 best to estimate. */
2668 switch (first_frag
->fr_type
)
2674 as_fatal ("only constant space allocation is supported");
2680 /* Take alignment into account. Assume the worst case
2681 before relaxation. */
2682 index
+= 3 * ((1 << first_frag
->fr_offset
) >> 4);
2686 if (first_frag
->fr_symbol
)
2688 as_fatal ("only constant offsets are supported");
2692 index
+= 3 * (first_frag
->fr_offset
>> 4);
2696 /* Add in the full size of the frag converted to instruction slots. */
2697 index
+= 3 * (first_frag
->fr_fix
>> 4);
2698 /* Subtract away the initial part before first_addr. */
2699 index
-= (3 * ((first_addr
>> 4) - (start_addr
>> 4))
2700 + ((first_addr
& 0x3) - (start_addr
& 0x3)));
2702 /* Move to the beginning of the next frag. */
2703 first_frag
= first_frag
->fr_next
;
2704 first_addr
= (unsigned long) &first_frag
->fr_literal
;
2707 /* Add in the used part of the last frag. */
2708 index
+= (3 * ((slot_addr
>> 4) - (first_addr
>> 4))
2709 + ((slot_addr
& 0x3) - (first_addr
& 0x3)));
2713 /* Optimize unwind record directives. */
2715 static unw_rec_list
*
2716 optimize_unw_records (list
)
2722 /* If the only unwind record is ".prologue" or ".prologue" followed
2723 by ".body", then we can optimize the unwind directives away. */
2724 if (list
->r
.type
== prologue
2725 && (list
->next
->r
.type
== endp
2726 || (list
->next
->r
.type
== body
&& list
->next
->next
->r
.type
== endp
)))
2732 /* Given a complete record list, process any records which have
2733 unresolved fields, (ie length counts for a prologue). After
2734 this has been run, all necessary information should be available
2735 within each record to generate an image. */
2738 fixup_unw_records (list
, before_relax
)
2742 unw_rec_list
*ptr
, *region
= 0;
2743 unsigned long first_addr
= 0, rlen
= 0, t
;
2744 fragS
*first_frag
= 0;
2746 for (ptr
= list
; ptr
; ptr
= ptr
->next
)
2748 if (ptr
->slot_number
== SLOT_NUM_NOT_SET
)
2749 as_bad (" Insn slot not set in unwind record.");
2750 t
= slot_index (ptr
->slot_number
, ptr
->slot_frag
,
2751 first_addr
, first_frag
, before_relax
);
2752 switch (ptr
->r
.type
)
2760 unsigned long last_addr
= 0;
2761 fragS
*last_frag
= NULL
;
2763 first_addr
= ptr
->slot_number
;
2764 first_frag
= ptr
->slot_frag
;
2765 /* Find either the next body/prologue start, or the end of
2766 the function, and determine the size of the region. */
2767 for (last
= ptr
->next
; last
!= NULL
; last
= last
->next
)
2768 if (last
->r
.type
== prologue
|| last
->r
.type
== prologue_gr
2769 || last
->r
.type
== body
|| last
->r
.type
== endp
)
2771 last_addr
= last
->slot_number
;
2772 last_frag
= last
->slot_frag
;
2775 size
= slot_index (last_addr
, last_frag
, first_addr
, first_frag
,
2777 rlen
= ptr
->r
.record
.r
.rlen
= size
;
2778 if (ptr
->r
.type
== body
)
2779 /* End of region. */
2787 ptr
->r
.record
.b
.t
= rlen
- 1 - t
;
2789 /* This happens when a memory-stack-less procedure uses a
2790 ".restore sp" directive at the end of a region to pop
2792 ptr
->r
.record
.b
.t
= 0;
2803 case priunat_when_gr
:
2804 case priunat_when_mem
:
2808 ptr
->r
.record
.p
.t
= t
;
2816 case spill_psprel_p
:
2817 ptr
->r
.record
.x
.t
= t
;
2823 as_bad ("frgr_mem record before region record!");
2826 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.frmask
;
2827 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.grmask
;
2828 set_imask (region
, ptr
->r
.record
.p
.frmask
, t
, 1);
2829 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2834 as_bad ("fr_mem record before region record!");
2837 region
->r
.record
.r
.mask
.fr_mem
|= ptr
->r
.record
.p
.rmask
;
2838 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 1);
2843 as_bad ("gr_mem record before region record!");
2846 region
->r
.record
.r
.mask
.gr_mem
|= ptr
->r
.record
.p
.rmask
;
2847 set_imask (region
, ptr
->r
.record
.p
.rmask
, t
, 2);
2852 as_bad ("br_mem record before region record!");
2855 region
->r
.record
.r
.mask
.br_mem
|= ptr
->r
.record
.p
.brmask
;
2856 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2862 as_bad ("gr_gr record before region record!");
2865 set_imask (region
, ptr
->r
.record
.p
.grmask
, t
, 2);
2870 as_bad ("br_gr record before region record!");
2873 set_imask (region
, ptr
->r
.record
.p
.brmask
, t
, 3);
2882 /* Estimate the size of a frag before relaxing. We only have one type of frag
2883 to handle here, which is the unwind info frag. */
2886 ia64_estimate_size_before_relax (fragS
*frag
,
2887 asection
*segtype ATTRIBUTE_UNUSED
)
2892 /* ??? This code is identical to the first part of ia64_convert_frag. */
2893 list
= (unw_rec_list
*) frag
->fr_opcode
;
2894 fixup_unw_records (list
, 0);
2896 len
= calc_record_size (list
);
2897 /* pad to pointer-size boundary. */
2898 pad
= len
% md
.pointer_size
;
2900 len
+= md
.pointer_size
- pad
;
2901 /* Add 8 for the header. */
2903 /* Add a pointer for the personality offset. */
2904 if (frag
->fr_offset
)
2905 size
+= md
.pointer_size
;
2907 /* fr_var carries the max_chars that we created the fragment with.
2908 We must, of course, have allocated enough memory earlier. */
2909 assert (frag
->fr_var
>= size
);
2911 return frag
->fr_fix
+ size
;
2914 /* This function converts a rs_machine_dependent variant frag into a
2915 normal fill frag with the unwind image from the the record list. */
2917 ia64_convert_frag (fragS
*frag
)
2923 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2924 list
= (unw_rec_list
*) frag
->fr_opcode
;
2925 fixup_unw_records (list
, 0);
2927 len
= calc_record_size (list
);
2928 /* pad to pointer-size boundary. */
2929 pad
= len
% md
.pointer_size
;
2931 len
+= md
.pointer_size
- pad
;
2932 /* Add 8 for the header. */
2934 /* Add a pointer for the personality offset. */
2935 if (frag
->fr_offset
)
2936 size
+= md
.pointer_size
;
2938 /* fr_var carries the max_chars that we created the fragment with.
2939 We must, of course, have allocated enough memory earlier. */
2940 assert (frag
->fr_var
>= size
);
2942 /* Initialize the header area. fr_offset is initialized with
2943 unwind.personality_routine. */
2944 if (frag
->fr_offset
)
2946 if (md
.flags
& EF_IA_64_ABI64
)
2947 flag_value
= (bfd_vma
) 3 << 32;
2949 /* 32-bit unwind info block. */
2950 flag_value
= (bfd_vma
) 0x1003 << 32;
2955 md_number_to_chars (frag
->fr_literal
,
2956 (((bfd_vma
) 1 << 48) /* Version. */
2957 | flag_value
/* U & E handler flags. */
2958 | (len
/ md
.pointer_size
)), /* Length. */
2961 /* Skip the header. */
2962 vbyte_mem_ptr
= frag
->fr_literal
+ 8;
2963 process_unw_records (list
, output_vbyte_mem
);
2965 /* Fill the padding bytes with zeros. */
2967 md_number_to_chars (frag
->fr_literal
+ len
+ 8 - md
.pointer_size
+ pad
, 0,
2968 md
.pointer_size
- pad
);
2970 frag
->fr_fix
+= size
;
2971 frag
->fr_type
= rs_fill
;
2973 frag
->fr_offset
= 0;
2977 convert_expr_to_ab_reg (e
, ab
, regp
)
2984 if (e
->X_op
!= O_register
)
2987 reg
= e
->X_add_number
;
2988 if (reg
>= (REG_GR
+ 4) && reg
<= (REG_GR
+ 7))
2991 *regp
= reg
- REG_GR
;
2993 else if ((reg
>= (REG_FR
+ 2) && reg
<= (REG_FR
+ 5))
2994 || (reg
>= (REG_FR
+ 16) && reg
<= (REG_FR
+ 31)))
2997 *regp
= reg
- REG_FR
;
2999 else if (reg
>= (REG_BR
+ 1) && reg
<= (REG_BR
+ 5))
3002 *regp
= reg
- REG_BR
;
3009 case REG_PR
: *regp
= 0; break;
3010 case REG_PSP
: *regp
= 1; break;
3011 case REG_PRIUNAT
: *regp
= 2; break;
3012 case REG_BR
+ 0: *regp
= 3; break;
3013 case REG_AR
+ AR_BSP
: *regp
= 4; break;
3014 case REG_AR
+ AR_BSPSTORE
: *regp
= 5; break;
3015 case REG_AR
+ AR_RNAT
: *regp
= 6; break;
3016 case REG_AR
+ AR_UNAT
: *regp
= 7; break;
3017 case REG_AR
+ AR_FPSR
: *regp
= 8; break;
3018 case REG_AR
+ AR_PFS
: *regp
= 9; break;
3019 case REG_AR
+ AR_LC
: *regp
= 10; break;
3029 convert_expr_to_xy_reg (e
, xy
, regp
)
3036 if (e
->X_op
!= O_register
)
3039 reg
= e
->X_add_number
;
3041 if (/* reg >= REG_GR && */ reg
<= (REG_GR
+ 127))
3044 *regp
= reg
- REG_GR
;
3046 else if (reg
>= REG_FR
&& reg
<= (REG_FR
+ 127))
3049 *regp
= reg
- REG_FR
;
3051 else if (reg
>= REG_BR
&& reg
<= (REG_BR
+ 7))
3054 *regp
= reg
- REG_BR
;
3064 /* The current frag is an alignment frag. */
3065 align_frag
= frag_now
;
3066 s_align_bytes (arg
);
3071 int dummy ATTRIBUTE_UNUSED
;
3078 if (is_it_end_of_statement ())
3080 radix
= input_line_pointer
;
3081 ch
= get_symbol_end ();
3082 ia64_canonicalize_symbol_name (radix
);
3083 if (strcasecmp (radix
, "C"))
3084 as_bad ("Radix `%s' unsupported or invalid", radix
);
3085 *input_line_pointer
= ch
;
3086 demand_empty_rest_of_line ();
3089 /* Helper function for .loc directives. If the assembler is not generating
3090 line number info, then we need to remember which instructions have a .loc
3091 directive, and only call dwarf2_gen_line_info for those instructions. */
3096 CURR_SLOT
.loc_directive_seen
= 1;
3097 dwarf2_directive_loc (x
);
3100 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3102 dot_special_section (which
)
3105 set_section ((char *) special_section_name
[which
]);
3108 /* Return -1 for warning and 0 for error. */
3111 unwind_diagnostic (const char * region
, const char *directive
)
3113 if (md
.unwind_check
== unwind_check_warning
)
3115 as_warn (".%s outside of %s", directive
, region
);
3120 as_bad (".%s outside of %s", directive
, region
);
3121 ignore_rest_of_line ();
3126 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3127 a procedure but the unwind directive check is set to warning, 0 if
3128 a directive isn't in a procedure and the unwind directive check is set
3132 in_procedure (const char *directive
)
3134 if (unwind
.proc_start
3135 && (!unwind
.saved_text_seg
|| strcmp (directive
, "endp") == 0))
3137 return unwind_diagnostic ("procedure", directive
);
3140 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3141 a prologue but the unwind directive check is set to warning, 0 if
3142 a directive isn't in a prologue and the unwind directive check is set
3146 in_prologue (const char *directive
)
3148 int in
= in_procedure (directive
);
3151 /* We are in a procedure. Check if we are in a prologue. */
3152 if (unwind
.prologue
)
3154 /* We only want to issue one message. */
3156 return unwind_diagnostic ("prologue", directive
);
3163 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3164 a body but the unwind directive check is set to warning, 0 if
3165 a directive isn't in a body and the unwind directive check is set
3169 in_body (const char *directive
)
3171 int in
= in_procedure (directive
);
3174 /* We are in a procedure. Check if we are in a body. */
3177 /* We only want to issue one message. */
3179 return unwind_diagnostic ("body region", directive
);
3187 add_unwind_entry (ptr
)
3191 unwind
.tail
->next
= ptr
;
3196 /* The current entry can in fact be a chain of unwind entries. */
3197 if (unwind
.current_entry
== NULL
)
3198 unwind
.current_entry
= ptr
;
3203 int dummy ATTRIBUTE_UNUSED
;
3207 if (!in_prologue ("fframe"))
3212 if (e
.X_op
!= O_constant
)
3213 as_bad ("Operand to .fframe must be a constant");
3215 add_unwind_entry (output_mem_stack_f (e
.X_add_number
));
3220 int dummy ATTRIBUTE_UNUSED
;
3225 if (!in_prologue ("vframe"))
3229 reg
= e
.X_add_number
- REG_GR
;
3230 if (e
.X_op
== O_register
&& reg
< 128)
3232 add_unwind_entry (output_mem_stack_v ());
3233 if (! (unwind
.prologue_mask
& 2))
3234 add_unwind_entry (output_psp_gr (reg
));
3237 as_bad ("First operand to .vframe must be a general register");
3241 dot_vframesp (dummy
)
3242 int dummy ATTRIBUTE_UNUSED
;
3246 if (!in_prologue ("vframesp"))
3250 if (e
.X_op
== O_constant
)
3252 add_unwind_entry (output_mem_stack_v ());
3253 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3256 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3260 dot_vframepsp (dummy
)
3261 int dummy ATTRIBUTE_UNUSED
;
3265 if (!in_prologue ("vframepsp"))
3269 if (e
.X_op
== O_constant
)
3271 add_unwind_entry (output_mem_stack_v ());
3272 add_unwind_entry (output_psp_sprel (e
.X_add_number
));
3275 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3280 int dummy ATTRIBUTE_UNUSED
;
3286 if (!in_prologue ("save"))
3289 sep
= parse_operand (&e1
);
3291 as_bad ("No second operand to .save");
3292 sep
= parse_operand (&e2
);
3294 reg1
= e1
.X_add_number
;
3295 reg2
= e2
.X_add_number
- REG_GR
;
3297 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3298 if (e1
.X_op
== O_register
)
3300 if (e2
.X_op
== O_register
&& reg2
>= 0 && reg2
< 128)
3304 case REG_AR
+ AR_BSP
:
3305 add_unwind_entry (output_bsp_when ());
3306 add_unwind_entry (output_bsp_gr (reg2
));
3308 case REG_AR
+ AR_BSPSTORE
:
3309 add_unwind_entry (output_bspstore_when ());
3310 add_unwind_entry (output_bspstore_gr (reg2
));
3312 case REG_AR
+ AR_RNAT
:
3313 add_unwind_entry (output_rnat_when ());
3314 add_unwind_entry (output_rnat_gr (reg2
));
3316 case REG_AR
+ AR_UNAT
:
3317 add_unwind_entry (output_unat_when ());
3318 add_unwind_entry (output_unat_gr (reg2
));
3320 case REG_AR
+ AR_FPSR
:
3321 add_unwind_entry (output_fpsr_when ());
3322 add_unwind_entry (output_fpsr_gr (reg2
));
3324 case REG_AR
+ AR_PFS
:
3325 add_unwind_entry (output_pfs_when ());
3326 if (! (unwind
.prologue_mask
& 4))
3327 add_unwind_entry (output_pfs_gr (reg2
));
3329 case REG_AR
+ AR_LC
:
3330 add_unwind_entry (output_lc_when ());
3331 add_unwind_entry (output_lc_gr (reg2
));
3334 add_unwind_entry (output_rp_when ());
3335 if (! (unwind
.prologue_mask
& 8))
3336 add_unwind_entry (output_rp_gr (reg2
));
3339 add_unwind_entry (output_preds_when ());
3340 if (! (unwind
.prologue_mask
& 1))
3341 add_unwind_entry (output_preds_gr (reg2
));
3344 add_unwind_entry (output_priunat_when_gr ());
3345 add_unwind_entry (output_priunat_gr (reg2
));
3348 as_bad ("First operand not a valid register");
3352 as_bad (" Second operand not a valid register");
3355 as_bad ("First operand not a register");
3360 int dummy ATTRIBUTE_UNUSED
;
3363 unsigned long ecount
; /* # of _additional_ regions to pop */
3366 if (!in_body ("restore"))
3369 sep
= parse_operand (&e1
);
3370 if (e1
.X_op
!= O_register
|| e1
.X_add_number
!= REG_GR
+ 12)
3372 as_bad ("First operand to .restore must be stack pointer (sp)");
3378 parse_operand (&e2
);
3379 if (e2
.X_op
!= O_constant
|| e2
.X_add_number
< 0)
3381 as_bad ("Second operand to .restore must be a constant >= 0");
3384 ecount
= e2
.X_add_number
;
3387 ecount
= unwind
.prologue_count
- 1;
3389 if (ecount
>= unwind
.prologue_count
)
3391 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3392 ecount
+ 1, unwind
.prologue_count
);
3396 add_unwind_entry (output_epilogue (ecount
));
3398 if (ecount
< unwind
.prologue_count
)
3399 unwind
.prologue_count
-= ecount
+ 1;
3401 unwind
.prologue_count
= 0;
3405 dot_restorereg (dummy
)
3406 int dummy ATTRIBUTE_UNUSED
;
3408 unsigned int ab
, reg
;
3411 if (!in_procedure ("restorereg"))
3416 if (!convert_expr_to_ab_reg (&e
, &ab
, ®
))
3418 as_bad ("First operand to .restorereg must be a preserved register");
3421 add_unwind_entry (output_spill_reg (ab
, reg
, 0, 0));
3425 dot_restorereg_p (dummy
)
3426 int dummy ATTRIBUTE_UNUSED
;
3428 unsigned int qp
, ab
, reg
;
3432 if (!in_procedure ("restorereg.p"))
3435 sep
= parse_operand (&e1
);
3438 as_bad ("No second operand to .restorereg.p");
3442 parse_operand (&e2
);
3444 qp
= e1
.X_add_number
- REG_P
;
3445 if (e1
.X_op
!= O_register
|| qp
> 63)
3447 as_bad ("First operand to .restorereg.p must be a predicate");
3451 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
3453 as_bad ("Second operand to .restorereg.p must be a preserved register");
3456 add_unwind_entry (output_spill_reg_p (ab
, reg
, 0, 0, qp
));
3459 static char *special_linkonce_name
[] =
3461 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3465 start_unwind_section (const segT text_seg
, int sec_index
)
3468 Use a slightly ugly scheme to derive the unwind section names from
3469 the text section name:
3471 text sect. unwind table sect.
3472 name: name: comments:
3473 ---------- ----------------- --------------------------------
3475 .text.foo .IA_64.unwind.text.foo
3476 .foo .IA_64.unwind.foo
3478 .gnu.linkonce.ia64unw.foo
3479 _info .IA_64.unwind_info gas issues error message (ditto)
3480 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3482 This mapping is done so that:
3484 (a) An object file with unwind info only in .text will use
3485 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3486 This follows the letter of the ABI and also ensures backwards
3487 compatibility with older toolchains.
3489 (b) An object file with unwind info in multiple text sections
3490 will use separate unwind sections for each text section.
3491 This allows us to properly set the "sh_info" and "sh_link"
3492 fields in SHT_IA_64_UNWIND as required by the ABI and also
3493 lets GNU ld support programs with multiple segments
3494 containing unwind info (as might be the case for certain
3495 embedded applications).
3497 (c) An error is issued if there would be a name clash.
3500 const char *text_name
, *sec_text_name
;
3502 const char *prefix
= special_section_name
[sec_index
];
3504 size_t prefix_len
, suffix_len
, sec_name_len
;
3506 sec_text_name
= segment_name (text_seg
);
3507 text_name
= sec_text_name
;
3508 if (strncmp (text_name
, "_info", 5) == 0)
3510 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3512 ignore_rest_of_line ();
3515 if (strcmp (text_name
, ".text") == 0)
3518 /* Build the unwind section name by appending the (possibly stripped)
3519 text section name to the unwind prefix. */
3521 if (strncmp (text_name
, ".gnu.linkonce.t.",
3522 sizeof (".gnu.linkonce.t.") - 1) == 0)
3524 prefix
= special_linkonce_name
[sec_index
- SPECIAL_SECTION_UNWIND
];
3525 suffix
+= sizeof (".gnu.linkonce.t.") - 1;
3528 prefix_len
= strlen (prefix
);
3529 suffix_len
= strlen (suffix
);
3530 sec_name_len
= prefix_len
+ suffix_len
;
3531 sec_name
= alloca (sec_name_len
+ 1);
3532 memcpy (sec_name
, prefix
, prefix_len
);
3533 memcpy (sec_name
+ prefix_len
, suffix
, suffix_len
);
3534 sec_name
[sec_name_len
] = '\0';
3536 /* Handle COMDAT group. */
3537 if ((text_seg
->flags
& SEC_LINK_ONCE
) != 0
3538 && (elf_section_flags (text_seg
) & SHF_GROUP
) != 0)
3541 size_t len
, group_name_len
;
3542 const char *group_name
= elf_group_name (text_seg
);
3544 if (group_name
== NULL
)
3546 as_bad ("Group section `%s' has no group signature",
3548 ignore_rest_of_line ();
3551 /* We have to construct a fake section directive. */
3552 group_name_len
= strlen (group_name
);
3554 + 16 /* ,"aG",@progbits, */
3555 + group_name_len
/* ,group_name */
3558 section
= alloca (len
+ 1);
3559 memcpy (section
, sec_name
, sec_name_len
);
3560 memcpy (section
+ sec_name_len
, ",\"aG\",@progbits,", 16);
3561 memcpy (section
+ sec_name_len
+ 16, group_name
, group_name_len
);
3562 memcpy (section
+ len
- 7, ",comdat", 7);
3563 section
[len
] = '\0';
3564 set_section (section
);
3568 set_section (sec_name
);
3569 bfd_set_section_flags (stdoutput
, now_seg
,
3570 SEC_LOAD
| SEC_ALLOC
| SEC_READONLY
);
3573 elf_linked_to_section (now_seg
) = text_seg
;
3577 generate_unwind_image (const segT text_seg
)
3582 /* Mark the end of the unwind info, so that we can compute the size of the
3583 last unwind region. */
3584 add_unwind_entry (output_endp ());
3586 /* Force out pending instructions, to make sure all unwind records have
3587 a valid slot_number field. */
3588 ia64_flush_insns ();
3590 /* Generate the unwind record. */
3591 list
= optimize_unw_records (unwind
.list
);
3592 fixup_unw_records (list
, 1);
3593 size
= calc_record_size (list
);
3595 if (size
> 0 || unwind
.force_unwind_entry
)
3597 unwind
.force_unwind_entry
= 0;
3598 /* pad to pointer-size boundary. */
3599 pad
= size
% md
.pointer_size
;
3601 size
+= md
.pointer_size
- pad
;
3602 /* Add 8 for the header. */
3604 /* Add a pointer for the personality offset. */
3605 if (unwind
.personality_routine
)
3606 size
+= md
.pointer_size
;
3609 /* If there are unwind records, switch sections, and output the info. */
3613 bfd_reloc_code_real_type reloc
;
3615 start_unwind_section (text_seg
, SPECIAL_SECTION_UNWIND_INFO
);
3617 /* Make sure the section has 4 byte alignment for ILP32 and
3618 8 byte alignment for LP64. */
3619 frag_align (md
.pointer_size_shift
, 0, 0);
3620 record_alignment (now_seg
, md
.pointer_size_shift
);
3622 /* Set expression which points to start of unwind descriptor area. */
3623 unwind
.info
= expr_build_dot ();
3625 frag_var (rs_machine_dependent
, size
, size
, 0, 0,
3626 (offsetT
) (long) unwind
.personality_routine
,
3629 /* Add the personality address to the image. */
3630 if (unwind
.personality_routine
!= 0)
3632 exp
.X_op
= O_symbol
;
3633 exp
.X_add_symbol
= unwind
.personality_routine
;
3634 exp
.X_add_number
= 0;
3636 if (md
.flags
& EF_IA_64_BE
)
3638 if (md
.flags
& EF_IA_64_ABI64
)
3639 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64MSB
;
3641 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32MSB
;
3645 if (md
.flags
& EF_IA_64_ABI64
)
3646 reloc
= BFD_RELOC_IA64_LTOFF_FPTR64LSB
;
3648 reloc
= BFD_RELOC_IA64_LTOFF_FPTR32LSB
;
3651 fix_new_exp (frag_now
, frag_now_fix () - md
.pointer_size
,
3652 md
.pointer_size
, &exp
, 0, reloc
);
3653 unwind
.personality_routine
= 0;
3657 free_saved_prologue_counts ();
3658 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
3662 dot_handlerdata (dummy
)
3663 int dummy ATTRIBUTE_UNUSED
;
3665 if (!in_procedure ("handlerdata"))
3667 unwind
.force_unwind_entry
= 1;
3669 /* Remember which segment we're in so we can switch back after .endp */
3670 unwind
.saved_text_seg
= now_seg
;
3671 unwind
.saved_text_subseg
= now_subseg
;
3673 /* Generate unwind info into unwind-info section and then leave that
3674 section as the currently active one so dataXX directives go into
3675 the language specific data area of the unwind info block. */
3676 generate_unwind_image (now_seg
);
3677 demand_empty_rest_of_line ();
3681 dot_unwentry (dummy
)
3682 int dummy ATTRIBUTE_UNUSED
;
3684 if (!in_procedure ("unwentry"))
3686 unwind
.force_unwind_entry
= 1;
3687 demand_empty_rest_of_line ();
3692 int dummy ATTRIBUTE_UNUSED
;
3697 if (!in_prologue ("altrp"))
3701 reg
= e
.X_add_number
- REG_BR
;
3702 if (e
.X_op
== O_register
&& reg
< 8)
3703 add_unwind_entry (output_rp_br (reg
));
3705 as_bad ("First operand not a valid branch register");
3709 dot_savemem (psprel
)
3716 if (!in_prologue (psprel
? "savepsp" : "savesp"))
3719 sep
= parse_operand (&e1
);
3721 as_bad ("No second operand to .save%ssp", psprel
? "p" : "");
3722 sep
= parse_operand (&e2
);
3724 reg1
= e1
.X_add_number
;
3725 val
= e2
.X_add_number
;
3727 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3728 if (e1
.X_op
== O_register
)
3730 if (e2
.X_op
== O_constant
)
3734 case REG_AR
+ AR_BSP
:
3735 add_unwind_entry (output_bsp_when ());
3736 add_unwind_entry ((psprel
3738 : output_bsp_sprel
) (val
));
3740 case REG_AR
+ AR_BSPSTORE
:
3741 add_unwind_entry (output_bspstore_when ());
3742 add_unwind_entry ((psprel
3743 ? output_bspstore_psprel
3744 : output_bspstore_sprel
) (val
));
3746 case REG_AR
+ AR_RNAT
:
3747 add_unwind_entry (output_rnat_when ());
3748 add_unwind_entry ((psprel
3749 ? output_rnat_psprel
3750 : output_rnat_sprel
) (val
));
3752 case REG_AR
+ AR_UNAT
:
3753 add_unwind_entry (output_unat_when ());
3754 add_unwind_entry ((psprel
3755 ? output_unat_psprel
3756 : output_unat_sprel
) (val
));
3758 case REG_AR
+ AR_FPSR
:
3759 add_unwind_entry (output_fpsr_when ());
3760 add_unwind_entry ((psprel
3761 ? output_fpsr_psprel
3762 : output_fpsr_sprel
) (val
));
3764 case REG_AR
+ AR_PFS
:
3765 add_unwind_entry (output_pfs_when ());
3766 add_unwind_entry ((psprel
3768 : output_pfs_sprel
) (val
));
3770 case REG_AR
+ AR_LC
:
3771 add_unwind_entry (output_lc_when ());
3772 add_unwind_entry ((psprel
3774 : output_lc_sprel
) (val
));
3777 add_unwind_entry (output_rp_when ());
3778 add_unwind_entry ((psprel
3780 : output_rp_sprel
) (val
));
3783 add_unwind_entry (output_preds_when ());
3784 add_unwind_entry ((psprel
3785 ? output_preds_psprel
3786 : output_preds_sprel
) (val
));
3789 add_unwind_entry (output_priunat_when_mem ());
3790 add_unwind_entry ((psprel
3791 ? output_priunat_psprel
3792 : output_priunat_sprel
) (val
));
3795 as_bad ("First operand not a valid register");
3799 as_bad (" Second operand not a valid constant");
3802 as_bad ("First operand not a register");
3807 int dummy ATTRIBUTE_UNUSED
;
3812 if (!in_prologue ("save.g"))
3815 sep
= parse_operand (&e1
);
3817 parse_operand (&e2
);
3819 if (e1
.X_op
!= O_constant
)
3820 as_bad ("First operand to .save.g must be a constant.");
3823 int grmask
= e1
.X_add_number
;
3825 add_unwind_entry (output_gr_mem (grmask
));
3828 int reg
= e2
.X_add_number
- REG_GR
;
3829 if (e2
.X_op
== O_register
&& reg
>= 0 && reg
< 128)
3830 add_unwind_entry (output_gr_gr (grmask
, reg
));
3832 as_bad ("Second operand is an invalid register.");
3839 int dummy ATTRIBUTE_UNUSED
;
3844 if (!in_prologue ("save.f"))
3847 sep
= parse_operand (&e1
);
3849 if (e1
.X_op
!= O_constant
)
3850 as_bad ("Operand to .save.f must be a constant.");
3852 add_unwind_entry (output_fr_mem (e1
.X_add_number
));
3857 int dummy ATTRIBUTE_UNUSED
;
3864 if (!in_prologue ("save.b"))
3867 sep
= parse_operand (&e1
);
3868 if (e1
.X_op
!= O_constant
)
3870 as_bad ("First operand to .save.b must be a constant.");
3873 brmask
= e1
.X_add_number
;
3877 sep
= parse_operand (&e2
);
3878 reg
= e2
.X_add_number
- REG_GR
;
3879 if (e2
.X_op
!= O_register
|| reg
> 127)
3881 as_bad ("Second operand to .save.b must be a general register.");
3884 add_unwind_entry (output_br_gr (brmask
, e2
.X_add_number
));
3887 add_unwind_entry (output_br_mem (brmask
));
3889 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3890 demand_empty_rest_of_line ();
3895 int dummy ATTRIBUTE_UNUSED
;
3900 if (!in_prologue ("save.gf"))
3903 sep
= parse_operand (&e1
);
3905 parse_operand (&e2
);
3907 if (e1
.X_op
!= O_constant
|| sep
!= ',' || e2
.X_op
!= O_constant
)
3908 as_bad ("Both operands of .save.gf must be constants.");
3911 int grmask
= e1
.X_add_number
;
3912 int frmask
= e2
.X_add_number
;
3913 add_unwind_entry (output_frgr_mem (grmask
, frmask
));
3919 int dummy ATTRIBUTE_UNUSED
;
3924 if (!in_prologue ("spill"))
3927 sep
= parse_operand (&e
);
3928 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
3929 demand_empty_rest_of_line ();
3931 if (e
.X_op
!= O_constant
)
3932 as_bad ("Operand to .spill must be a constant");
3934 add_unwind_entry (output_spill_base (e
.X_add_number
));
3938 dot_spillreg (dummy
)
3939 int dummy ATTRIBUTE_UNUSED
;
3942 unsigned int ab
, xy
, reg
, treg
;
3945 if (!in_procedure ("spillreg"))
3948 sep
= parse_operand (&e1
);
3951 as_bad ("No second operand to .spillreg");
3955 parse_operand (&e2
);
3957 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3959 as_bad ("First operand to .spillreg must be a preserved register");
3963 if (!convert_expr_to_xy_reg (&e2
, &xy
, &treg
))
3965 as_bad ("Second operand to .spillreg must be a register");
3969 add_unwind_entry (output_spill_reg (ab
, reg
, treg
, xy
));
3973 dot_spillmem (psprel
)
3978 unsigned int ab
, reg
;
3980 if (!in_procedure ("spillmem"))
3983 sep
= parse_operand (&e1
);
3986 as_bad ("Second operand missing");
3990 parse_operand (&e2
);
3992 if (!convert_expr_to_ab_reg (&e1
, &ab
, ®
))
3994 as_bad ("First operand to .spill%s must be a preserved register",
3995 psprel
? "psp" : "sp");
3999 if (e2
.X_op
!= O_constant
)
4001 as_bad ("Second operand to .spill%s must be a constant",
4002 psprel
? "psp" : "sp");
4007 add_unwind_entry (output_spill_psprel (ab
, reg
, e2
.X_add_number
));
4009 add_unwind_entry (output_spill_sprel (ab
, reg
, e2
.X_add_number
));
4013 dot_spillreg_p (dummy
)
4014 int dummy ATTRIBUTE_UNUSED
;
4017 unsigned int ab
, xy
, reg
, treg
;
4018 expressionS e1
, e2
, e3
;
4021 if (!in_procedure ("spillreg.p"))
4024 sep
= parse_operand (&e1
);
4027 as_bad ("No second and third operand to .spillreg.p");
4031 sep
= parse_operand (&e2
);
4034 as_bad ("No third operand to .spillreg.p");
4038 parse_operand (&e3
);
4040 qp
= e1
.X_add_number
- REG_P
;
4042 if (e1
.X_op
!= O_register
|| qp
> 63)
4044 as_bad ("First operand to .spillreg.p must be a predicate");
4048 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4050 as_bad ("Second operand to .spillreg.p must be a preserved register");
4054 if (!convert_expr_to_xy_reg (&e3
, &xy
, &treg
))
4056 as_bad ("Third operand to .spillreg.p must be a register");
4060 add_unwind_entry (output_spill_reg_p (ab
, reg
, treg
, xy
, qp
));
4064 dot_spillmem_p (psprel
)
4067 expressionS e1
, e2
, e3
;
4069 unsigned int ab
, reg
;
4072 if (!in_procedure ("spillmem.p"))
4075 sep
= parse_operand (&e1
);
4078 as_bad ("Second operand missing");
4082 parse_operand (&e2
);
4085 as_bad ("Second operand missing");
4089 parse_operand (&e3
);
4091 qp
= e1
.X_add_number
- REG_P
;
4092 if (e1
.X_op
!= O_register
|| qp
> 63)
4094 as_bad ("First operand to .spill%s_p must be a predicate",
4095 psprel
? "psp" : "sp");
4099 if (!convert_expr_to_ab_reg (&e2
, &ab
, ®
))
4101 as_bad ("Second operand to .spill%s_p must be a preserved register",
4102 psprel
? "psp" : "sp");
4106 if (e3
.X_op
!= O_constant
)
4108 as_bad ("Third operand to .spill%s_p must be a constant",
4109 psprel
? "psp" : "sp");
4114 add_unwind_entry (output_spill_psprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4116 add_unwind_entry (output_spill_sprel_p (ab
, reg
, e3
.X_add_number
, qp
));
4120 get_saved_prologue_count (lbl
)
4123 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4125 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4129 return lpc
->prologue_count
;
4131 as_bad ("Missing .label_state %ld", lbl
);
4136 save_prologue_count (lbl
, count
)
4140 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4142 while (lpc
!= NULL
&& lpc
->label_number
!= lbl
)
4146 lpc
->prologue_count
= count
;
4149 label_prologue_count
*new_lpc
= xmalloc (sizeof (* new_lpc
));
4151 new_lpc
->next
= unwind
.saved_prologue_counts
;
4152 new_lpc
->label_number
= lbl
;
4153 new_lpc
->prologue_count
= count
;
4154 unwind
.saved_prologue_counts
= new_lpc
;
4159 free_saved_prologue_counts ()
4161 label_prologue_count
*lpc
= unwind
.saved_prologue_counts
;
4162 label_prologue_count
*next
;
4171 unwind
.saved_prologue_counts
= NULL
;
4175 dot_label_state (dummy
)
4176 int dummy ATTRIBUTE_UNUSED
;
4180 if (!in_body ("label_state"))
4184 if (e
.X_op
!= O_constant
)
4186 as_bad ("Operand to .label_state must be a constant");
4189 add_unwind_entry (output_label_state (e
.X_add_number
));
4190 save_prologue_count (e
.X_add_number
, unwind
.prologue_count
);
4194 dot_copy_state (dummy
)
4195 int dummy ATTRIBUTE_UNUSED
;
4199 if (!in_body ("copy_state"))
4203 if (e
.X_op
!= O_constant
)
4205 as_bad ("Operand to .copy_state must be a constant");
4208 add_unwind_entry (output_copy_state (e
.X_add_number
));
4209 unwind
.prologue_count
= get_saved_prologue_count (e
.X_add_number
);
4214 int dummy ATTRIBUTE_UNUSED
;
4219 if (!in_procedure ("unwabi"))
4222 sep
= parse_operand (&e1
);
4225 as_bad ("Second operand to .unwabi missing");
4228 sep
= parse_operand (&e2
);
4229 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4230 demand_empty_rest_of_line ();
4232 if (e1
.X_op
!= O_constant
)
4234 as_bad ("First operand to .unwabi must be a constant");
4238 if (e2
.X_op
!= O_constant
)
4240 as_bad ("Second operand to .unwabi must be a constant");
4244 add_unwind_entry (output_unwabi (e1
.X_add_number
, e2
.X_add_number
));
4248 dot_personality (dummy
)
4249 int dummy ATTRIBUTE_UNUSED
;
4252 if (!in_procedure ("personality"))
4255 name
= input_line_pointer
;
4256 c
= get_symbol_end ();
4257 p
= input_line_pointer
;
4258 unwind
.personality_routine
= symbol_find_or_make (name
);
4259 unwind
.force_unwind_entry
= 1;
4262 demand_empty_rest_of_line ();
4267 int dummy ATTRIBUTE_UNUSED
;
4272 unwind
.proc_start
= 0;
4273 /* Parse names of main and alternate entry points and mark them as
4274 function symbols: */
4278 name
= input_line_pointer
;
4279 c
= get_symbol_end ();
4280 p
= input_line_pointer
;
4282 as_bad ("Empty argument of .proc");
4285 sym
= symbol_find_or_make (name
);
4286 if (S_IS_DEFINED (sym
))
4287 as_bad ("`%s' was already defined", name
);
4288 else if (unwind
.proc_start
== 0)
4290 unwind
.proc_start
= sym
;
4292 symbol_get_bfdsym (sym
)->flags
|= BSF_FUNCTION
;
4296 if (*input_line_pointer
!= ',')
4298 ++input_line_pointer
;
4300 if (unwind
.proc_start
== 0)
4301 unwind
.proc_start
= expr_build_dot ();
4302 demand_empty_rest_of_line ();
4305 unwind
.prologue
= 0;
4306 unwind
.prologue_count
= 0;
4309 unwind
.list
= unwind
.tail
= unwind
.current_entry
= NULL
;
4310 unwind
.personality_routine
= 0;
4315 int dummy ATTRIBUTE_UNUSED
;
4317 if (!in_procedure ("body"))
4319 if (!unwind
.prologue
&& !unwind
.body
&& unwind
.insn
)
4320 as_warn ("Initial .body should precede any instructions");
4322 unwind
.prologue
= 0;
4323 unwind
.prologue_mask
= 0;
4326 add_unwind_entry (output_body ());
4327 demand_empty_rest_of_line ();
4331 dot_prologue (dummy
)
4332 int dummy ATTRIBUTE_UNUSED
;
4335 int mask
= 0, grsave
= 0;
4337 if (!in_procedure ("prologue"))
4339 if (unwind
.prologue
)
4341 as_bad (".prologue within prologue");
4342 ignore_rest_of_line ();
4345 if (!unwind
.body
&& unwind
.insn
)
4346 as_warn ("Initial .prologue should precede any instructions");
4348 if (!is_it_end_of_statement ())
4351 sep
= parse_operand (&e1
);
4353 as_bad ("No second operand to .prologue");
4354 sep
= parse_operand (&e2
);
4355 if (!is_end_of_line
[sep
] && !is_it_end_of_statement ())
4356 demand_empty_rest_of_line ();
4358 if (e1
.X_op
== O_constant
)
4360 mask
= e1
.X_add_number
;
4362 if (e2
.X_op
== O_constant
)
4363 grsave
= e2
.X_add_number
;
4364 else if (e2
.X_op
== O_register
4365 && (grsave
= e2
.X_add_number
- REG_GR
) < 128)
4368 as_bad ("Second operand not a constant or general register");
4370 add_unwind_entry (output_prologue_gr (mask
, grsave
));
4373 as_bad ("First operand not a constant");
4376 add_unwind_entry (output_prologue ());
4378 unwind
.prologue
= 1;
4379 unwind
.prologue_mask
= mask
;
4381 ++unwind
.prologue_count
;
4386 int dummy ATTRIBUTE_UNUSED
;
4389 int bytes_per_address
;
4392 subsegT saved_subseg
;
4393 char *name
, *default_name
, *p
, c
;
4395 int unwind_check
= md
.unwind_check
;
4397 md
.unwind_check
= unwind_check_error
;
4398 if (!in_procedure ("endp"))
4400 md
.unwind_check
= unwind_check
;
4402 if (unwind
.saved_text_seg
)
4404 saved_seg
= unwind
.saved_text_seg
;
4405 saved_subseg
= unwind
.saved_text_subseg
;
4406 unwind
.saved_text_seg
= NULL
;
4410 saved_seg
= now_seg
;
4411 saved_subseg
= now_subseg
;
4414 insn_group_break (1, 0, 0);
4416 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4418 generate_unwind_image (saved_seg
);
4420 if (unwind
.info
|| unwind
.force_unwind_entry
)
4424 subseg_set (md
.last_text_seg
, 0);
4425 proc_end
= expr_build_dot ();
4427 start_unwind_section (saved_seg
, SPECIAL_SECTION_UNWIND
);
4429 /* Make sure that section has 4 byte alignment for ILP32 and
4430 8 byte alignment for LP64. */
4431 record_alignment (now_seg
, md
.pointer_size_shift
);
4433 /* Need space for 3 pointers for procedure start, procedure end,
4435 memset (frag_more (3 * md
.pointer_size
), 0, 3 * md
.pointer_size
);
4436 where
= frag_now_fix () - (3 * md
.pointer_size
);
4437 bytes_per_address
= bfd_arch_bits_per_address (stdoutput
) / 8;
4439 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4440 e
.X_op
= O_pseudo_fixup
;
4441 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4443 if (!S_IS_LOCAL (unwind
.proc_start
)
4444 && S_IS_DEFINED (unwind
.proc_start
))
4445 e
.X_add_symbol
= symbol_temp_new (S_GET_SEGMENT (unwind
.proc_start
),
4446 S_GET_VALUE (unwind
.proc_start
),
4447 symbol_get_frag (unwind
.proc_start
));
4449 e
.X_add_symbol
= unwind
.proc_start
;
4450 ia64_cons_fix_new (frag_now
, where
, bytes_per_address
, &e
);
4452 e
.X_op
= O_pseudo_fixup
;
4453 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4455 e
.X_add_symbol
= proc_end
;
4456 ia64_cons_fix_new (frag_now
, where
+ bytes_per_address
,
4457 bytes_per_address
, &e
);
4461 e
.X_op
= O_pseudo_fixup
;
4462 e
.X_op_symbol
= pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
;
4464 e
.X_add_symbol
= unwind
.info
;
4465 ia64_cons_fix_new (frag_now
, where
+ (bytes_per_address
* 2),
4466 bytes_per_address
, &e
);
4469 subseg_set (saved_seg
, saved_subseg
);
4471 if (unwind
.proc_start
)
4472 default_name
= (char *) S_GET_NAME (unwind
.proc_start
);
4474 default_name
= NULL
;
4476 /* Parse names of main and alternate entry points and set symbol sizes. */
4480 name
= input_line_pointer
;
4481 c
= get_symbol_end ();
4482 p
= input_line_pointer
;
4485 if (md
.unwind_check
== unwind_check_warning
)
4489 as_warn ("Empty argument of .endp. Use the default name `%s'",
4491 name
= default_name
;
4494 as_warn ("Empty argument of .endp");
4497 as_bad ("Empty argument of .endp");
4501 sym
= symbol_find (name
);
4503 && md
.unwind_check
== unwind_check_warning
4505 && default_name
!= name
)
4507 /* We have a bad name. Try the default one if needed. */
4508 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4509 name
, default_name
);
4510 name
= default_name
;
4511 sym
= symbol_find (name
);
4513 if (!sym
|| !S_IS_DEFINED (sym
))
4514 as_bad ("`%s' was not defined within procedure", name
);
4515 else if (unwind
.proc_start
4516 && (symbol_get_bfdsym (sym
)->flags
& BSF_FUNCTION
)
4517 && S_GET_SIZE (sym
) == 0 && symbol_get_obj (sym
)->size
== NULL
)
4519 fragS
*fr
= symbol_get_frag (unwind
.proc_start
);
4520 fragS
*frag
= symbol_get_frag (sym
);
4522 /* Check whether the function label is at or beyond last
4524 while (fr
&& fr
!= frag
)
4528 if (frag
== frag_now
&& SEG_NORMAL (now_seg
))
4529 S_SET_SIZE (sym
, frag_now_fix () - S_GET_VALUE (sym
));
4532 symbol_get_obj (sym
)->size
=
4533 (expressionS
*) xmalloc (sizeof (expressionS
));
4534 symbol_get_obj (sym
)->size
->X_op
= O_subtract
;
4535 symbol_get_obj (sym
)->size
->X_add_symbol
4536 = symbol_new (FAKE_LABEL_NAME
, now_seg
,
4537 frag_now_fix (), frag_now
);
4538 symbol_get_obj (sym
)->size
->X_op_symbol
= sym
;
4539 symbol_get_obj (sym
)->size
->X_add_number
= 0;
4546 if (*input_line_pointer
!= ',')
4548 ++input_line_pointer
;
4550 demand_empty_rest_of_line ();
4551 unwind
.proc_start
= unwind
.info
= 0;
4555 dot_template (template)
4558 CURR_SLOT
.user_template
= template;
4563 int dummy ATTRIBUTE_UNUSED
;
4565 int ins
, locs
, outs
, rots
;
4567 if (is_it_end_of_statement ())
4568 ins
= locs
= outs
= rots
= 0;
4571 ins
= get_absolute_expression ();
4572 if (*input_line_pointer
++ != ',')
4574 locs
= get_absolute_expression ();
4575 if (*input_line_pointer
++ != ',')
4577 outs
= get_absolute_expression ();
4578 if (*input_line_pointer
++ != ',')
4580 rots
= get_absolute_expression ();
4582 set_regstack (ins
, locs
, outs
, rots
);
4586 as_bad ("Comma expected");
4587 ignore_rest_of_line ();
4594 unsigned num_regs
, num_alloced
= 0;
4595 struct dynreg
**drpp
, *dr
;
4596 int ch
, base_reg
= 0;
4602 case DYNREG_GR
: base_reg
= REG_GR
+ 32; break;
4603 case DYNREG_FR
: base_reg
= REG_FR
+ 32; break;
4604 case DYNREG_PR
: base_reg
= REG_P
+ 16; break;
4608 /* First, remove existing names from hash table. */
4609 for (dr
= md
.dynreg
[type
]; dr
&& dr
->num_regs
; dr
= dr
->next
)
4611 hash_delete (md
.dynreg_hash
, dr
->name
);
4612 /* FIXME: Free dr->name. */
4616 drpp
= &md
.dynreg
[type
];
4619 start
= input_line_pointer
;
4620 ch
= get_symbol_end ();
4621 len
= strlen (ia64_canonicalize_symbol_name (start
));
4622 *input_line_pointer
= ch
;
4625 if (*input_line_pointer
!= '[')
4627 as_bad ("Expected '['");
4630 ++input_line_pointer
; /* skip '[' */
4632 num_regs
= get_absolute_expression ();
4634 if (*input_line_pointer
++ != ']')
4636 as_bad ("Expected ']'");
4641 num_alloced
+= num_regs
;
4645 if (num_alloced
> md
.rot
.num_regs
)
4647 as_bad ("Used more than the declared %d rotating registers",
4653 if (num_alloced
> 96)
4655 as_bad ("Used more than the available 96 rotating registers");
4660 if (num_alloced
> 48)
4662 as_bad ("Used more than the available 48 rotating registers");
4673 *drpp
= obstack_alloc (¬es
, sizeof (*dr
));
4674 memset (*drpp
, 0, sizeof (*dr
));
4677 name
= obstack_alloc (¬es
, len
+ 1);
4678 memcpy (name
, start
, len
);
4683 dr
->num_regs
= num_regs
;
4684 dr
->base
= base_reg
;
4686 base_reg
+= num_regs
;
4688 if (hash_insert (md
.dynreg_hash
, name
, dr
))
4690 as_bad ("Attempt to redefine register set `%s'", name
);
4691 obstack_free (¬es
, name
);
4695 if (*input_line_pointer
!= ',')
4697 ++input_line_pointer
; /* skip comma */
4700 demand_empty_rest_of_line ();
4704 ignore_rest_of_line ();
4708 dot_byteorder (byteorder
)
4711 segment_info_type
*seginfo
= seg_info (now_seg
);
4713 if (byteorder
== -1)
4715 if (seginfo
->tc_segment_info_data
.endian
== 0)
4716 seginfo
->tc_segment_info_data
.endian
= default_big_endian
? 1 : 2;
4717 byteorder
= seginfo
->tc_segment_info_data
.endian
== 1;
4720 seginfo
->tc_segment_info_data
.endian
= byteorder
? 1 : 2;
4722 if (target_big_endian
!= byteorder
)
4724 target_big_endian
= byteorder
;
4725 if (target_big_endian
)
4727 ia64_number_to_chars
= number_to_chars_bigendian
;
4728 ia64_float_to_chars
= ia64_float_to_chars_bigendian
;
4732 ia64_number_to_chars
= number_to_chars_littleendian
;
4733 ia64_float_to_chars
= ia64_float_to_chars_littleendian
;
4740 int dummy ATTRIBUTE_UNUSED
;
4747 option
= input_line_pointer
;
4748 ch
= get_symbol_end ();
4749 if (strcmp (option
, "lsb") == 0)
4750 md
.flags
&= ~EF_IA_64_BE
;
4751 else if (strcmp (option
, "msb") == 0)
4752 md
.flags
|= EF_IA_64_BE
;
4753 else if (strcmp (option
, "abi32") == 0)
4754 md
.flags
&= ~EF_IA_64_ABI64
;
4755 else if (strcmp (option
, "abi64") == 0)
4756 md
.flags
|= EF_IA_64_ABI64
;
4758 as_bad ("Unknown psr option `%s'", option
);
4759 *input_line_pointer
= ch
;
4762 if (*input_line_pointer
!= ',')
4765 ++input_line_pointer
;
4768 demand_empty_rest_of_line ();
4773 int dummy ATTRIBUTE_UNUSED
;
4775 new_logical_line (0, get_absolute_expression ());
4776 demand_empty_rest_of_line ();
4780 cross_section (ref
, cons
, ua
)
4782 void (*cons
) PARAMS((int));
4786 int saved_auto_align
;
4787 unsigned int section_count
;
4790 start
= input_line_pointer
;
4796 name
= demand_copy_C_string (&len
);
4797 obstack_free(¬es
, name
);
4800 ignore_rest_of_line ();
4806 char c
= get_symbol_end ();
4808 if (input_line_pointer
== start
)
4810 as_bad ("Missing section name");
4811 ignore_rest_of_line ();
4814 *input_line_pointer
= c
;
4816 end
= input_line_pointer
;
4818 if (*input_line_pointer
!= ',')
4820 as_bad ("Comma expected after section name");
4821 ignore_rest_of_line ();
4825 end
= input_line_pointer
+ 1; /* skip comma */
4826 input_line_pointer
= start
;
4827 md
.keep_pending_output
= 1;
4828 section_count
= bfd_count_sections(stdoutput
);
4829 obj_elf_section (0);
4830 if (section_count
!= bfd_count_sections(stdoutput
))
4831 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4832 input_line_pointer
= end
;
4833 saved_auto_align
= md
.auto_align
;
4838 md
.auto_align
= saved_auto_align
;
4839 obj_elf_previous (0);
4840 md
.keep_pending_output
= 0;
4847 cross_section (size
, cons
, 0);
4850 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4853 stmt_float_cons (kind
)
4874 ia64_do_align (alignment
);
4882 int saved_auto_align
= md
.auto_align
;
4886 md
.auto_align
= saved_auto_align
;
4890 dot_xfloat_cons (kind
)
4893 cross_section (kind
, stmt_float_cons
, 0);
4897 dot_xstringer (zero
)
4900 cross_section (zero
, stringer
, 0);
4907 cross_section (size
, cons
, 1);
4911 dot_xfloat_cons_ua (kind
)
4914 cross_section (kind
, float_cons
, 1);
4917 /* .reg.val <regname>,value */
4921 int dummy ATTRIBUTE_UNUSED
;
4926 if (reg
.X_op
!= O_register
)
4928 as_bad (_("Register name expected"));
4929 ignore_rest_of_line ();
4931 else if (*input_line_pointer
++ != ',')
4933 as_bad (_("Comma expected"));
4934 ignore_rest_of_line ();
4938 valueT value
= get_absolute_expression ();
4939 int regno
= reg
.X_add_number
;
4940 if (regno
<= REG_GR
|| regno
> REG_GR
+ 127)
4941 as_warn (_("Register value annotation ignored"));
4944 gr_values
[regno
- REG_GR
].known
= 1;
4945 gr_values
[regno
- REG_GR
].value
= value
;
4946 gr_values
[regno
- REG_GR
].path
= md
.path
;
4949 demand_empty_rest_of_line ();
4954 .serialize.instruction
4957 dot_serialize (type
)
4960 insn_group_break (0, 0, 0);
4962 instruction_serialization ();
4964 data_serialization ();
4965 insn_group_break (0, 0, 0);
4966 demand_empty_rest_of_line ();
4969 /* select dv checking mode
4974 A stop is inserted when changing modes
4981 if (md
.manual_bundling
)
4982 as_warn (_("Directive invalid within a bundle"));
4984 if (type
== 'E' || type
== 'A')
4985 md
.mode_explicitly_set
= 0;
4987 md
.mode_explicitly_set
= 1;
4994 if (md
.explicit_mode
)
4995 insn_group_break (1, 0, 0);
4996 md
.explicit_mode
= 0;
5000 if (!md
.explicit_mode
)
5001 insn_group_break (1, 0, 0);
5002 md
.explicit_mode
= 1;
5006 if (md
.explicit_mode
!= md
.default_explicit_mode
)
5007 insn_group_break (1, 0, 0);
5008 md
.explicit_mode
= md
.default_explicit_mode
;
5009 md
.mode_explicitly_set
= 0;
5020 for (regno
= 0; regno
< 64; regno
++)
5022 if (mask
& ((valueT
) 1 << regno
))
5024 fprintf (stderr
, "%s p%d", comma
, regno
);
5031 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5032 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5033 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5034 .pred.safe_across_calls p1 [, p2 [,...]]
5043 int p1
= -1, p2
= -1;
5047 if (*input_line_pointer
== '"')
5050 char *form
= demand_copy_C_string (&len
);
5052 if (strcmp (form
, "mutex") == 0)
5054 else if (strcmp (form
, "clear") == 0)
5056 else if (strcmp (form
, "imply") == 0)
5058 obstack_free (¬es
, form
);
5060 else if (*input_line_pointer
== '@')
5062 char *form
= ++input_line_pointer
;
5063 char c
= get_symbol_end();
5065 if (strcmp (form
, "mutex") == 0)
5067 else if (strcmp (form
, "clear") == 0)
5069 else if (strcmp (form
, "imply") == 0)
5071 *input_line_pointer
= c
;
5075 as_bad (_("Missing predicate relation type"));
5076 ignore_rest_of_line ();
5081 as_bad (_("Unrecognized predicate relation type"));
5082 ignore_rest_of_line ();
5085 if (*input_line_pointer
== ',')
5086 ++input_line_pointer
;
5095 expressionS pr
, *pr1
, *pr2
;
5098 if (pr
.X_op
== O_register
5099 && pr
.X_add_number
>= REG_P
5100 && pr
.X_add_number
<= REG_P
+ 63)
5102 regno
= pr
.X_add_number
- REG_P
;
5110 else if (type
!= 'i'
5111 && pr
.X_op
== O_subtract
5112 && (pr1
= symbol_get_value_expression (pr
.X_add_symbol
))
5113 && pr1
->X_op
== O_register
5114 && pr1
->X_add_number
>= REG_P
5115 && pr1
->X_add_number
<= REG_P
+ 63
5116 && (pr2
= symbol_get_value_expression (pr
.X_op_symbol
))
5117 && pr2
->X_op
== O_register
5118 && pr2
->X_add_number
>= REG_P
5119 && pr2
->X_add_number
<= REG_P
+ 63)
5124 regno
= pr1
->X_add_number
- REG_P
;
5125 stop
= pr2
->X_add_number
- REG_P
;
5128 as_bad (_("Bad register range"));
5129 ignore_rest_of_line ();
5132 bits
= ((bits
<< stop
) << 1) - (bits
<< regno
);
5133 count
+= stop
- regno
+ 1;
5137 as_bad (_("Predicate register expected"));
5138 ignore_rest_of_line ();
5142 as_warn (_("Duplicate predicate register ignored"));
5144 if (*input_line_pointer
!= ',')
5146 ++input_line_pointer
;
5155 clear_qp_mutex (mask
);
5156 clear_qp_implies (mask
, (valueT
) 0);
5159 if (count
!= 2 || p1
== -1 || p2
== -1)
5160 as_bad (_("Predicate source and target required"));
5161 else if (p1
== 0 || p2
== 0)
5162 as_bad (_("Use of p0 is not valid in this context"));
5164 add_qp_imply (p1
, p2
);
5169 as_bad (_("At least two PR arguments expected"));
5174 as_bad (_("Use of p0 is not valid in this context"));
5177 add_qp_mutex (mask
);
5180 /* note that we don't override any existing relations */
5183 as_bad (_("At least one PR argument expected"));
5188 fprintf (stderr
, "Safe across calls: ");
5189 print_prmask (mask
);
5190 fprintf (stderr
, "\n");
5192 qp_safe_across_calls
= mask
;
5195 demand_empty_rest_of_line ();
5198 /* .entry label [, label [, ...]]
5199 Hint to DV code that the given labels are to be considered entry points.
5200 Otherwise, only global labels are considered entry points. */
5204 int dummy ATTRIBUTE_UNUSED
;
5213 name
= input_line_pointer
;
5214 c
= get_symbol_end ();
5215 symbolP
= symbol_find_or_make (name
);
5217 err
= hash_insert (md
.entry_hash
, S_GET_NAME (symbolP
), (PTR
) symbolP
);
5219 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5222 *input_line_pointer
= c
;
5224 c
= *input_line_pointer
;
5227 input_line_pointer
++;
5229 if (*input_line_pointer
== '\n')
5235 demand_empty_rest_of_line ();
5238 /* .mem.offset offset, base
5239 "base" is used to distinguish between offsets from a different base. */
5242 dot_mem_offset (dummy
)
5243 int dummy ATTRIBUTE_UNUSED
;
5245 md
.mem_offset
.hint
= 1;
5246 md
.mem_offset
.offset
= get_absolute_expression ();
5247 if (*input_line_pointer
!= ',')
5249 as_bad (_("Comma expected"));
5250 ignore_rest_of_line ();
5253 ++input_line_pointer
;
5254 md
.mem_offset
.base
= get_absolute_expression ();
5255 demand_empty_rest_of_line ();
5258 /* ia64-specific pseudo-ops: */
5259 const pseudo_typeS md_pseudo_table
[] =
5261 { "radix", dot_radix
, 0 },
5262 { "lcomm", s_lcomm_bytes
, 1 },
5263 { "loc", dot_loc
, 0 },
5264 { "bss", dot_special_section
, SPECIAL_SECTION_BSS
},
5265 { "sbss", dot_special_section
, SPECIAL_SECTION_SBSS
},
5266 { "sdata", dot_special_section
, SPECIAL_SECTION_SDATA
},
5267 { "rodata", dot_special_section
, SPECIAL_SECTION_RODATA
},
5268 { "comment", dot_special_section
, SPECIAL_SECTION_COMMENT
},
5269 { "ia_64.unwind", dot_special_section
, SPECIAL_SECTION_UNWIND
},
5270 { "ia_64.unwind_info", dot_special_section
, SPECIAL_SECTION_UNWIND_INFO
},
5271 { "init_array", dot_special_section
, SPECIAL_SECTION_INIT_ARRAY
},
5272 { "fini_array", dot_special_section
, SPECIAL_SECTION_FINI_ARRAY
},
5273 { "proc", dot_proc
, 0 },
5274 { "body", dot_body
, 0 },
5275 { "prologue", dot_prologue
, 0 },
5276 { "endp", dot_endp
, 0 },
5278 { "fframe", dot_fframe
, 0 },
5279 { "vframe", dot_vframe
, 0 },
5280 { "vframesp", dot_vframesp
, 0 },
5281 { "vframepsp", dot_vframepsp
, 0 },
5282 { "save", dot_save
, 0 },
5283 { "restore", dot_restore
, 0 },
5284 { "restorereg", dot_restorereg
, 0 },
5285 { "restorereg.p", dot_restorereg_p
, 0 },
5286 { "handlerdata", dot_handlerdata
, 0 },
5287 { "unwentry", dot_unwentry
, 0 },
5288 { "altrp", dot_altrp
, 0 },
5289 { "savesp", dot_savemem
, 0 },
5290 { "savepsp", dot_savemem
, 1 },
5291 { "save.g", dot_saveg
, 0 },
5292 { "save.f", dot_savef
, 0 },
5293 { "save.b", dot_saveb
, 0 },
5294 { "save.gf", dot_savegf
, 0 },
5295 { "spill", dot_spill
, 0 },
5296 { "spillreg", dot_spillreg
, 0 },
5297 { "spillsp", dot_spillmem
, 0 },
5298 { "spillpsp", dot_spillmem
, 1 },
5299 { "spillreg.p", dot_spillreg_p
, 0 },
5300 { "spillsp.p", dot_spillmem_p
, 0 },
5301 { "spillpsp.p", dot_spillmem_p
, 1 },
5302 { "label_state", dot_label_state
, 0 },
5303 { "copy_state", dot_copy_state
, 0 },
5304 { "unwabi", dot_unwabi
, 0 },
5305 { "personality", dot_personality
, 0 },
5306 { "mii", dot_template
, 0x0 },
5307 { "mli", dot_template
, 0x2 }, /* old format, for compatibility */
5308 { "mlx", dot_template
, 0x2 },
5309 { "mmi", dot_template
, 0x4 },
5310 { "mfi", dot_template
, 0x6 },
5311 { "mmf", dot_template
, 0x7 },
5312 { "mib", dot_template
, 0x8 },
5313 { "mbb", dot_template
, 0x9 },
5314 { "bbb", dot_template
, 0xb },
5315 { "mmb", dot_template
, 0xc },
5316 { "mfb", dot_template
, 0xe },
5317 { "align", dot_align
, 0 },
5318 { "regstk", dot_regstk
, 0 },
5319 { "rotr", dot_rot
, DYNREG_GR
},
5320 { "rotf", dot_rot
, DYNREG_FR
},
5321 { "rotp", dot_rot
, DYNREG_PR
},
5322 { "lsb", dot_byteorder
, 0 },
5323 { "msb", dot_byteorder
, 1 },
5324 { "psr", dot_psr
, 0 },
5325 { "alias", dot_alias
, 0 },
5326 { "secalias", dot_alias
, 1 },
5327 { "ln", dot_ln
, 0 }, /* source line info (for debugging) */
5329 { "xdata1", dot_xdata
, 1 },
5330 { "xdata2", dot_xdata
, 2 },
5331 { "xdata4", dot_xdata
, 4 },
5332 { "xdata8", dot_xdata
, 8 },
5333 { "xdata16", dot_xdata
, 16 },
5334 { "xreal4", dot_xfloat_cons
, 'f' },
5335 { "xreal8", dot_xfloat_cons
, 'd' },
5336 { "xreal10", dot_xfloat_cons
, 'x' },
5337 { "xreal16", dot_xfloat_cons
, 'X' },
5338 { "xstring", dot_xstringer
, 0 },
5339 { "xstringz", dot_xstringer
, 1 },
5341 /* unaligned versions: */
5342 { "xdata2.ua", dot_xdata_ua
, 2 },
5343 { "xdata4.ua", dot_xdata_ua
, 4 },
5344 { "xdata8.ua", dot_xdata_ua
, 8 },
5345 { "xdata16.ua", dot_xdata_ua
, 16 },
5346 { "xreal4.ua", dot_xfloat_cons_ua
, 'f' },
5347 { "xreal8.ua", dot_xfloat_cons_ua
, 'd' },
5348 { "xreal10.ua", dot_xfloat_cons_ua
, 'x' },
5349 { "xreal16.ua", dot_xfloat_cons_ua
, 'X' },
5351 /* annotations/DV checking support */
5352 { "entry", dot_entry
, 0 },
5353 { "mem.offset", dot_mem_offset
, 0 },
5354 { "pred.rel", dot_pred_rel
, 0 },
5355 { "pred.rel.clear", dot_pred_rel
, 'c' },
5356 { "pred.rel.imply", dot_pred_rel
, 'i' },
5357 { "pred.rel.mutex", dot_pred_rel
, 'm' },
5358 { "pred.safe_across_calls", dot_pred_rel
, 's' },
5359 { "reg.val", dot_reg_val
, 0 },
5360 { "serialize.data", dot_serialize
, 0 },
5361 { "serialize.instruction", dot_serialize
, 1 },
5362 { "auto", dot_dv_mode
, 'a' },
5363 { "explicit", dot_dv_mode
, 'e' },
5364 { "default", dot_dv_mode
, 'd' },
5366 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5367 IA-64 aligns data allocation pseudo-ops by default, so we have to
5368 tell it that these ones are supposed to be unaligned. Long term,
5369 should rewrite so that only IA-64 specific data allocation pseudo-ops
5370 are aligned by default. */
5371 {"2byte", stmt_cons_ua
, 2},
5372 {"4byte", stmt_cons_ua
, 4},
5373 {"8byte", stmt_cons_ua
, 8},
5378 static const struct pseudo_opcode
5381 void (*handler
) (int);
5386 /* these are more like pseudo-ops, but don't start with a dot */
5387 { "data1", cons
, 1 },
5388 { "data2", cons
, 2 },
5389 { "data4", cons
, 4 },
5390 { "data8", cons
, 8 },
5391 { "data16", cons
, 16 },
5392 { "real4", stmt_float_cons
, 'f' },
5393 { "real8", stmt_float_cons
, 'd' },
5394 { "real10", stmt_float_cons
, 'x' },
5395 { "real16", stmt_float_cons
, 'X' },
5396 { "string", stringer
, 0 },
5397 { "stringz", stringer
, 1 },
5399 /* unaligned versions: */
5400 { "data2.ua", stmt_cons_ua
, 2 },
5401 { "data4.ua", stmt_cons_ua
, 4 },
5402 { "data8.ua", stmt_cons_ua
, 8 },
5403 { "data16.ua", stmt_cons_ua
, 16 },
5404 { "real4.ua", float_cons
, 'f' },
5405 { "real8.ua", float_cons
, 'd' },
5406 { "real10.ua", float_cons
, 'x' },
5407 { "real16.ua", float_cons
, 'X' },
5410 /* Declare a register by creating a symbol for it and entering it in
5411 the symbol table. */
5414 declare_register (name
, regnum
)
5421 sym
= symbol_new (name
, reg_section
, regnum
, &zero_address_frag
);
5423 err
= hash_insert (md
.reg_hash
, S_GET_NAME (sym
), (PTR
) sym
);
5425 as_fatal ("Inserting \"%s\" into register table failed: %s",
5432 declare_register_set (prefix
, num_regs
, base_regnum
)
5440 for (i
= 0; i
< num_regs
; ++i
)
5442 sprintf (name
, "%s%u", prefix
, i
);
5443 declare_register (name
, base_regnum
+ i
);
5448 operand_width (opnd
)
5449 enum ia64_opnd opnd
;
5451 const struct ia64_operand
*odesc
= &elf64_ia64_operands
[opnd
];
5452 unsigned int bits
= 0;
5456 for (i
= 0; i
< NELEMS (odesc
->field
) && odesc
->field
[i
].bits
; ++i
)
5457 bits
+= odesc
->field
[i
].bits
;
5462 static enum operand_match_result
5463 operand_match (idesc
, index
, e
)
5464 const struct ia64_opcode
*idesc
;
5468 enum ia64_opnd opnd
= idesc
->operands
[index
];
5469 int bits
, relocatable
= 0;
5470 struct insn_fix
*fix
;
5477 case IA64_OPND_AR_CCV
:
5478 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 32)
5479 return OPERAND_MATCH
;
5482 case IA64_OPND_AR_CSD
:
5483 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 25)
5484 return OPERAND_MATCH
;
5487 case IA64_OPND_AR_PFS
:
5488 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_AR
+ 64)
5489 return OPERAND_MATCH
;
5493 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_GR
+ 0)
5494 return OPERAND_MATCH
;
5498 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_IP
)
5499 return OPERAND_MATCH
;
5503 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR
)
5504 return OPERAND_MATCH
;
5507 case IA64_OPND_PR_ROT
:
5508 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PR_ROT
)
5509 return OPERAND_MATCH
;
5513 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR
)
5514 return OPERAND_MATCH
;
5517 case IA64_OPND_PSR_L
:
5518 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_L
)
5519 return OPERAND_MATCH
;
5522 case IA64_OPND_PSR_UM
:
5523 if (e
->X_op
== O_register
&& e
->X_add_number
== REG_PSR_UM
)
5524 return OPERAND_MATCH
;
5528 if (e
->X_op
== O_constant
)
5530 if (e
->X_add_number
== 1)
5531 return OPERAND_MATCH
;
5533 return OPERAND_OUT_OF_RANGE
;
5538 if (e
->X_op
== O_constant
)
5540 if (e
->X_add_number
== 8)
5541 return OPERAND_MATCH
;
5543 return OPERAND_OUT_OF_RANGE
;
5548 if (e
->X_op
== O_constant
)
5550 if (e
->X_add_number
== 16)
5551 return OPERAND_MATCH
;
5553 return OPERAND_OUT_OF_RANGE
;
5557 /* register operands: */
5560 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_AR
5561 && e
->X_add_number
< REG_AR
+ 128)
5562 return OPERAND_MATCH
;
5567 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_BR
5568 && e
->X_add_number
< REG_BR
+ 8)
5569 return OPERAND_MATCH
;
5573 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_CR
5574 && e
->X_add_number
< REG_CR
+ 128)
5575 return OPERAND_MATCH
;
5582 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_FR
5583 && e
->X_add_number
< REG_FR
+ 128)
5584 return OPERAND_MATCH
;
5589 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_P
5590 && e
->X_add_number
< REG_P
+ 64)
5591 return OPERAND_MATCH
;
5597 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
5598 && e
->X_add_number
< REG_GR
+ 128)
5599 return OPERAND_MATCH
;
5602 case IA64_OPND_R3_2
:
5603 if (e
->X_op
== O_register
&& e
->X_add_number
>= REG_GR
)
5605 if (e
->X_add_number
< REG_GR
+ 4)
5606 return OPERAND_MATCH
;
5607 else if (e
->X_add_number
< REG_GR
+ 128)
5608 return OPERAND_OUT_OF_RANGE
;
5612 /* indirect operands: */
5613 case IA64_OPND_CPUID_R3
:
5614 case IA64_OPND_DBR_R3
:
5615 case IA64_OPND_DTR_R3
:
5616 case IA64_OPND_ITR_R3
:
5617 case IA64_OPND_IBR_R3
:
5618 case IA64_OPND_MSR_R3
:
5619 case IA64_OPND_PKR_R3
:
5620 case IA64_OPND_PMC_R3
:
5621 case IA64_OPND_PMD_R3
:
5622 case IA64_OPND_RR_R3
:
5623 if (e
->X_op
== O_index
&& e
->X_op_symbol
5624 && (S_GET_VALUE (e
->X_op_symbol
) - IND_CPUID
5625 == opnd
- IA64_OPND_CPUID_R3
))
5626 return OPERAND_MATCH
;
5630 if (e
->X_op
== O_index
&& !e
->X_op_symbol
)
5631 return OPERAND_MATCH
;
5634 /* immediate operands: */
5635 case IA64_OPND_CNT2a
:
5636 case IA64_OPND_LEN4
:
5637 case IA64_OPND_LEN6
:
5638 bits
= operand_width (idesc
->operands
[index
]);
5639 if (e
->X_op
== O_constant
)
5641 if ((bfd_vma
) (e
->X_add_number
- 1) < ((bfd_vma
) 1 << bits
))
5642 return OPERAND_MATCH
;
5644 return OPERAND_OUT_OF_RANGE
;
5648 case IA64_OPND_CNT2b
:
5649 if (e
->X_op
== O_constant
)
5651 if ((bfd_vma
) (e
->X_add_number
- 1) < 3)
5652 return OPERAND_MATCH
;
5654 return OPERAND_OUT_OF_RANGE
;
5658 case IA64_OPND_CNT2c
:
5659 val
= e
->X_add_number
;
5660 if (e
->X_op
== O_constant
)
5662 if ((val
== 0 || val
== 7 || val
== 15 || val
== 16))
5663 return OPERAND_MATCH
;
5665 return OPERAND_OUT_OF_RANGE
;
5670 /* SOR must be an integer multiple of 8 */
5671 if (e
->X_op
== O_constant
&& e
->X_add_number
& 0x7)
5672 return OPERAND_OUT_OF_RANGE
;
5675 if (e
->X_op
== O_constant
)
5677 if ((bfd_vma
) e
->X_add_number
<= 96)
5678 return OPERAND_MATCH
;
5680 return OPERAND_OUT_OF_RANGE
;
5684 case IA64_OPND_IMMU62
:
5685 if (e
->X_op
== O_constant
)
5687 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 62))
5688 return OPERAND_MATCH
;
5690 return OPERAND_OUT_OF_RANGE
;
5694 /* FIXME -- need 62-bit relocation type */
5695 as_bad (_("62-bit relocation not yet implemented"));
5699 case IA64_OPND_IMMU64
:
5700 if (e
->X_op
== O_symbol
|| e
->X_op
== O_pseudo_fixup
5701 || e
->X_op
== O_subtract
)
5703 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5704 fix
->code
= BFD_RELOC_IA64_IMM64
;
5705 if (e
->X_op
!= O_subtract
)
5707 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5708 if (e
->X_op
== O_pseudo_fixup
)
5712 fix
->opnd
= idesc
->operands
[index
];
5715 ++CURR_SLOT
.num_fixups
;
5716 return OPERAND_MATCH
;
5718 else if (e
->X_op
== O_constant
)
5719 return OPERAND_MATCH
;
5722 case IA64_OPND_CCNT5
:
5723 case IA64_OPND_CNT5
:
5724 case IA64_OPND_CNT6
:
5725 case IA64_OPND_CPOS6a
:
5726 case IA64_OPND_CPOS6b
:
5727 case IA64_OPND_CPOS6c
:
5728 case IA64_OPND_IMMU2
:
5729 case IA64_OPND_IMMU7a
:
5730 case IA64_OPND_IMMU7b
:
5731 case IA64_OPND_IMMU21
:
5732 case IA64_OPND_IMMU24
:
5733 case IA64_OPND_MBTYPE4
:
5734 case IA64_OPND_MHTYPE8
:
5735 case IA64_OPND_POS6
:
5736 bits
= operand_width (idesc
->operands
[index
]);
5737 if (e
->X_op
== O_constant
)
5739 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5740 return OPERAND_MATCH
;
5742 return OPERAND_OUT_OF_RANGE
;
5746 case IA64_OPND_IMMU9
:
5747 bits
= operand_width (idesc
->operands
[index
]);
5748 if (e
->X_op
== O_constant
)
5750 if ((bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << bits
))
5752 int lobits
= e
->X_add_number
& 0x3;
5753 if (((bfd_vma
) e
->X_add_number
& 0x3C) != 0 && lobits
== 0)
5754 e
->X_add_number
|= (bfd_vma
) 0x3;
5755 return OPERAND_MATCH
;
5758 return OPERAND_OUT_OF_RANGE
;
5762 case IA64_OPND_IMM44
:
5763 /* least 16 bits must be zero */
5764 if ((e
->X_add_number
& 0xffff) != 0)
5765 /* XXX technically, this is wrong: we should not be issuing warning
5766 messages until we're sure this instruction pattern is going to
5768 as_warn (_("lower 16 bits of mask ignored"));
5770 if (e
->X_op
== O_constant
)
5772 if (((e
->X_add_number
>= 0
5773 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 44))
5774 || (e
->X_add_number
< 0
5775 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 44))))
5778 if (e
->X_add_number
>= 0
5779 && (e
->X_add_number
& ((bfd_vma
) 1 << 43)) != 0)
5781 e
->X_add_number
|= ~(((bfd_vma
) 1 << 44) - 1);
5783 return OPERAND_MATCH
;
5786 return OPERAND_OUT_OF_RANGE
;
5790 case IA64_OPND_IMM17
:
5791 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5792 if (e
->X_op
== O_constant
)
5794 if (((e
->X_add_number
>= 0
5795 && (bfd_vma
) e
->X_add_number
< ((bfd_vma
) 1 << 17))
5796 || (e
->X_add_number
< 0
5797 && (bfd_vma
) -e
->X_add_number
<= ((bfd_vma
) 1 << 17))))
5800 if (e
->X_add_number
>= 0
5801 && (e
->X_add_number
& ((bfd_vma
) 1 << 16)) != 0)
5803 e
->X_add_number
|= ~(((bfd_vma
) 1 << 17) - 1);
5805 return OPERAND_MATCH
;
5808 return OPERAND_OUT_OF_RANGE
;
5812 case IA64_OPND_IMM14
:
5813 case IA64_OPND_IMM22
:
5815 case IA64_OPND_IMM1
:
5816 case IA64_OPND_IMM8
:
5817 case IA64_OPND_IMM8U4
:
5818 case IA64_OPND_IMM8M1
:
5819 case IA64_OPND_IMM8M1U4
:
5820 case IA64_OPND_IMM8M1U8
:
5821 case IA64_OPND_IMM9a
:
5822 case IA64_OPND_IMM9b
:
5823 bits
= operand_width (idesc
->operands
[index
]);
5824 if (relocatable
&& (e
->X_op
== O_symbol
5825 || e
->X_op
== O_subtract
5826 || e
->X_op
== O_pseudo_fixup
))
5828 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5830 if (idesc
->operands
[index
] == IA64_OPND_IMM14
)
5831 fix
->code
= BFD_RELOC_IA64_IMM14
;
5833 fix
->code
= BFD_RELOC_IA64_IMM22
;
5835 if (e
->X_op
!= O_subtract
)
5837 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5838 if (e
->X_op
== O_pseudo_fixup
)
5842 fix
->opnd
= idesc
->operands
[index
];
5845 ++CURR_SLOT
.num_fixups
;
5846 return OPERAND_MATCH
;
5848 else if (e
->X_op
!= O_constant
5849 && ! (e
->X_op
== O_big
&& opnd
== IA64_OPND_IMM8M1U8
))
5850 return OPERAND_MISMATCH
;
5852 if (opnd
== IA64_OPND_IMM8M1U4
)
5854 /* Zero is not valid for unsigned compares that take an adjusted
5855 constant immediate range. */
5856 if (e
->X_add_number
== 0)
5857 return OPERAND_OUT_OF_RANGE
;
5859 /* Sign-extend 32-bit unsigned numbers, so that the following range
5860 checks will work. */
5861 val
= e
->X_add_number
;
5862 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5863 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5864 val
= ((val
<< 32) >> 32);
5866 /* Check for 0x100000000. This is valid because
5867 0x100000000-1 is the same as ((uint32_t) -1). */
5868 if (val
== ((bfd_signed_vma
) 1 << 32))
5869 return OPERAND_MATCH
;
5873 else if (opnd
== IA64_OPND_IMM8M1U8
)
5875 /* Zero is not valid for unsigned compares that take an adjusted
5876 constant immediate range. */
5877 if (e
->X_add_number
== 0)
5878 return OPERAND_OUT_OF_RANGE
;
5880 /* Check for 0x10000000000000000. */
5881 if (e
->X_op
== O_big
)
5883 if (generic_bignum
[0] == 0
5884 && generic_bignum
[1] == 0
5885 && generic_bignum
[2] == 0
5886 && generic_bignum
[3] == 0
5887 && generic_bignum
[4] == 1)
5888 return OPERAND_MATCH
;
5890 return OPERAND_OUT_OF_RANGE
;
5893 val
= e
->X_add_number
- 1;
5895 else if (opnd
== IA64_OPND_IMM8M1
)
5896 val
= e
->X_add_number
- 1;
5897 else if (opnd
== IA64_OPND_IMM8U4
)
5899 /* Sign-extend 32-bit unsigned numbers, so that the following range
5900 checks will work. */
5901 val
= e
->X_add_number
;
5902 if (((val
& (~(bfd_vma
) 0 << 32)) == 0)
5903 && ((val
& ((bfd_vma
) 1 << 31)) != 0))
5904 val
= ((val
<< 32) >> 32);
5907 val
= e
->X_add_number
;
5909 if ((val
>= 0 && (bfd_vma
) val
< ((bfd_vma
) 1 << (bits
- 1)))
5910 || (val
< 0 && (bfd_vma
) -val
<= ((bfd_vma
) 1 << (bits
- 1))))
5911 return OPERAND_MATCH
;
5913 return OPERAND_OUT_OF_RANGE
;
5915 case IA64_OPND_INC3
:
5916 /* +/- 1, 4, 8, 16 */
5917 val
= e
->X_add_number
;
5920 if (e
->X_op
== O_constant
)
5922 if ((val
== 1 || val
== 4 || val
== 8 || val
== 16))
5923 return OPERAND_MATCH
;
5925 return OPERAND_OUT_OF_RANGE
;
5929 case IA64_OPND_TGT25
:
5930 case IA64_OPND_TGT25b
:
5931 case IA64_OPND_TGT25c
:
5932 case IA64_OPND_TGT64
:
5933 if (e
->X_op
== O_symbol
)
5935 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5936 if (opnd
== IA64_OPND_TGT25
)
5937 fix
->code
= BFD_RELOC_IA64_PCREL21F
;
5938 else if (opnd
== IA64_OPND_TGT25b
)
5939 fix
->code
= BFD_RELOC_IA64_PCREL21M
;
5940 else if (opnd
== IA64_OPND_TGT25c
)
5941 fix
->code
= BFD_RELOC_IA64_PCREL21B
;
5942 else if (opnd
== IA64_OPND_TGT64
)
5943 fix
->code
= BFD_RELOC_IA64_PCREL60B
;
5947 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5948 fix
->opnd
= idesc
->operands
[index
];
5951 ++CURR_SLOT
.num_fixups
;
5952 return OPERAND_MATCH
;
5954 case IA64_OPND_TAG13
:
5955 case IA64_OPND_TAG13b
:
5959 return OPERAND_MATCH
;
5962 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5963 /* There are no external relocs for TAG13/TAG13b fields, so we
5964 create a dummy reloc. This will not live past md_apply_fix3. */
5965 fix
->code
= BFD_RELOC_UNUSED
;
5966 fix
->code
= ia64_gen_real_reloc_type (e
->X_op_symbol
, fix
->code
);
5967 fix
->opnd
= idesc
->operands
[index
];
5970 ++CURR_SLOT
.num_fixups
;
5971 return OPERAND_MATCH
;
5978 case IA64_OPND_LDXMOV
:
5979 fix
= CURR_SLOT
.fixup
+ CURR_SLOT
.num_fixups
;
5980 fix
->code
= BFD_RELOC_IA64_LDXMOV
;
5981 fix
->opnd
= idesc
->operands
[index
];
5984 ++CURR_SLOT
.num_fixups
;
5985 return OPERAND_MATCH
;
5990 return OPERAND_MISMATCH
;
5999 memset (e
, 0, sizeof (*e
));
6002 if (*input_line_pointer
!= '}')
6004 sep
= *input_line_pointer
++;
6008 if (!md
.manual_bundling
)
6009 as_warn ("Found '}' when manual bundling is off");
6011 CURR_SLOT
.manual_bundling_off
= 1;
6012 md
.manual_bundling
= 0;
6018 /* Returns the next entry in the opcode table that matches the one in
6019 IDESC, and frees the entry in IDESC. If no matching entry is
6020 found, NULL is returned instead. */
6022 static struct ia64_opcode
*
6023 get_next_opcode (struct ia64_opcode
*idesc
)
6025 struct ia64_opcode
*next
= ia64_find_next_opcode (idesc
);
6026 ia64_free_opcode (idesc
);
6030 /* Parse the operands for the opcode and find the opcode variant that
6031 matches the specified operands, or NULL if no match is possible. */
6033 static struct ia64_opcode
*
6034 parse_operands (idesc
)
6035 struct ia64_opcode
*idesc
;
6037 int i
= 0, highest_unmatched_operand
, num_operands
= 0, num_outputs
= 0;
6038 int error_pos
, out_of_range_pos
, curr_out_of_range_pos
, sep
= 0;
6041 enum ia64_opnd expected_operand
= IA64_OPND_NIL
;
6042 enum operand_match_result result
;
6044 char *first_arg
= 0, *end
, *saved_input_pointer
;
6047 assert (strlen (idesc
->name
) <= 128);
6049 strcpy (mnemonic
, idesc
->name
);
6050 if (idesc
->operands
[2] == IA64_OPND_SOF
6051 || idesc
->operands
[1] == IA64_OPND_SOF
)
6053 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6054 can't parse the first operand until we have parsed the
6055 remaining operands of the "alloc" instruction. */
6057 first_arg
= input_line_pointer
;
6058 end
= strchr (input_line_pointer
, '=');
6061 as_bad ("Expected separator `='");
6064 input_line_pointer
= end
+ 1;
6071 if (i
< NELEMS (CURR_SLOT
.opnd
))
6073 sep
= parse_operand (CURR_SLOT
.opnd
+ i
);
6074 if (CURR_SLOT
.opnd
[i
].X_op
== O_absent
)
6081 sep
= parse_operand (&dummy
);
6082 if (dummy
.X_op
== O_absent
)
6088 if (sep
!= '=' && sep
!= ',')
6093 if (num_outputs
> 0)
6094 as_bad ("Duplicate equal sign (=) in instruction");
6096 num_outputs
= i
+ 1;
6101 as_bad ("Illegal operand separator `%c'", sep
);
6105 if (idesc
->operands
[2] == IA64_OPND_SOF
6106 || idesc
->operands
[1] == IA64_OPND_SOF
)
6108 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6109 know (strcmp (idesc
->name
, "alloc") == 0);
6110 i
= (CURR_SLOT
.opnd
[1].X_op
== O_register
6111 && CURR_SLOT
.opnd
[1].X_add_number
== REG_AR
+ AR_PFS
) ? 2 : 1;
6112 if (num_operands
== i
+ 3 /* first_arg not included in this count! */
6113 && CURR_SLOT
.opnd
[i
].X_op
== O_constant
6114 && CURR_SLOT
.opnd
[i
+ 1].X_op
== O_constant
6115 && CURR_SLOT
.opnd
[i
+ 2].X_op
== O_constant
6116 && CURR_SLOT
.opnd
[i
+ 3].X_op
== O_constant
)
6118 sof
= set_regstack (CURR_SLOT
.opnd
[i
].X_add_number
,
6119 CURR_SLOT
.opnd
[i
+ 1].X_add_number
,
6120 CURR_SLOT
.opnd
[i
+ 2].X_add_number
,
6121 CURR_SLOT
.opnd
[i
+ 3].X_add_number
);
6123 /* now we can parse the first arg: */
6124 saved_input_pointer
= input_line_pointer
;
6125 input_line_pointer
= first_arg
;
6126 sep
= parse_operand (CURR_SLOT
.opnd
+ 0);
6128 --num_outputs
; /* force error */
6129 input_line_pointer
= saved_input_pointer
;
6131 CURR_SLOT
.opnd
[i
].X_add_number
= sof
;
6132 CURR_SLOT
.opnd
[i
+ 1].X_add_number
6133 = sof
- CURR_SLOT
.opnd
[i
+ 2].X_add_number
;
6134 CURR_SLOT
.opnd
[i
+ 2] = CURR_SLOT
.opnd
[i
+ 3];
6138 highest_unmatched_operand
= -4;
6139 curr_out_of_range_pos
= -1;
6141 for (; idesc
; idesc
= get_next_opcode (idesc
))
6143 if (num_outputs
!= idesc
->num_outputs
)
6144 continue; /* mismatch in # of outputs */
6145 if (highest_unmatched_operand
< 0)
6146 highest_unmatched_operand
|= 1;
6147 if (num_operands
> NELEMS (idesc
->operands
)
6148 || (num_operands
< NELEMS (idesc
->operands
)
6149 && idesc
->operands
[num_operands
])
6150 || (num_operands
> 0 && !idesc
->operands
[num_operands
- 1]))
6151 continue; /* mismatch in number of arguments */
6152 if (highest_unmatched_operand
< 0)
6153 highest_unmatched_operand
|= 2;
6155 CURR_SLOT
.num_fixups
= 0;
6157 /* Try to match all operands. If we see an out-of-range operand,
6158 then continue trying to match the rest of the operands, since if
6159 the rest match, then this idesc will give the best error message. */
6161 out_of_range_pos
= -1;
6162 for (i
= 0; i
< num_operands
&& idesc
->operands
[i
]; ++i
)
6164 result
= operand_match (idesc
, i
, CURR_SLOT
.opnd
+ i
);
6165 if (result
!= OPERAND_MATCH
)
6167 if (result
!= OPERAND_OUT_OF_RANGE
)
6169 if (out_of_range_pos
< 0)
6170 /* remember position of the first out-of-range operand: */
6171 out_of_range_pos
= i
;
6175 /* If we did not match all operands, or if at least one operand was
6176 out-of-range, then this idesc does not match. Keep track of which
6177 idesc matched the most operands before failing. If we have two
6178 idescs that failed at the same position, and one had an out-of-range
6179 operand, then prefer the out-of-range operand. Thus if we have
6180 "add r0=0x1000000,r1" we get an error saying the constant is out
6181 of range instead of an error saying that the constant should have been
6184 if (i
!= num_operands
|| out_of_range_pos
>= 0)
6186 if (i
> highest_unmatched_operand
6187 || (i
== highest_unmatched_operand
6188 && out_of_range_pos
> curr_out_of_range_pos
))
6190 highest_unmatched_operand
= i
;
6191 if (out_of_range_pos
>= 0)
6193 expected_operand
= idesc
->operands
[out_of_range_pos
];
6194 error_pos
= out_of_range_pos
;
6198 expected_operand
= idesc
->operands
[i
];
6201 curr_out_of_range_pos
= out_of_range_pos
;
6210 if (expected_operand
)
6211 as_bad ("Operand %u of `%s' should be %s",
6212 error_pos
+ 1, mnemonic
,
6213 elf64_ia64_operands
[expected_operand
].desc
);
6214 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 1))
6215 as_bad ("Wrong number of output operands");
6216 else if (highest_unmatched_operand
< 0 && !(highest_unmatched_operand
& 2))
6217 as_bad ("Wrong number of input operands");
6219 as_bad ("Operand mismatch");
6223 /* Check that the instruction doesn't use
6224 - r0, f0, or f1 as output operands
6225 - the same predicate twice as output operands
6226 - r0 as address of a base update load or store
6227 - the same GR as output and address of a base update load
6228 - two even- or two odd-numbered FRs as output operands of a floating
6229 point parallel load.
6230 At most two (conflicting) output (or output-like) operands can exist,
6231 (floating point parallel loads have three outputs, but the base register,
6232 if updated, cannot conflict with the actual outputs). */
6234 for (i
= 0; i
< num_operands
; ++i
)
6239 switch (idesc
->operands
[i
])
6244 if (i
< num_outputs
)
6246 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6249 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6251 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6256 if (i
< num_outputs
)
6259 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6261 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6268 if (i
< num_outputs
)
6270 if (CURR_SLOT
.opnd
[i
].X_add_number
>= REG_FR
6271 && CURR_SLOT
.opnd
[i
].X_add_number
<= REG_FR
+ 1)
6274 regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
6277 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6279 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6283 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
6285 if (CURR_SLOT
.opnd
[i
].X_add_number
== REG_GR
)
6288 reg1
= CURR_SLOT
.opnd
[i
].X_add_number
;
6290 reg2
= CURR_SLOT
.opnd
[i
].X_add_number
;
6301 as_warn ("Invalid use of `%c%d' as output operand", reg_class
, regno
);
6304 as_warn ("Invalid use of `r%d' as base update address operand", regno
);
6310 if (reg1
>= REG_GR
&& reg1
<= REG_GR
+ 127)
6315 else if (reg1
>= REG_P
&& reg1
<= REG_P
+ 63)
6320 else if (reg1
>= REG_FR
&& reg1
<= REG_FR
+ 127)
6328 as_warn ("Invalid duplicate use of `%c%d'", reg_class
, reg1
);
6330 else if (((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6331 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31)
6332 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6333 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127))
6334 && ! ((reg1
^ reg2
) & 1))
6335 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6336 reg1
- REG_FR
, reg2
- REG_FR
);
6337 else if ((reg1
>= REG_FR
&& reg1
<= REG_FR
+ 31
6338 && reg2
>= REG_FR
+ 32 && reg2
<= REG_FR
+ 127)
6339 || (reg1
>= REG_FR
+ 32 && reg1
<= REG_FR
+ 127
6340 && reg2
>= REG_FR
&& reg2
<= REG_FR
+ 31))
6341 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6342 reg1
- REG_FR
, reg2
- REG_FR
);
6347 build_insn (slot
, insnp
)
6351 const struct ia64_operand
*odesc
, *o2desc
;
6352 struct ia64_opcode
*idesc
= slot
->idesc
;
6358 insn
= idesc
->opcode
| slot
->qp_regno
;
6360 for (i
= 0; i
< NELEMS (idesc
->operands
) && idesc
->operands
[i
]; ++i
)
6362 if (slot
->opnd
[i
].X_op
== O_register
6363 || slot
->opnd
[i
].X_op
== O_constant
6364 || slot
->opnd
[i
].X_op
== O_index
)
6365 val
= slot
->opnd
[i
].X_add_number
;
6366 else if (slot
->opnd
[i
].X_op
== O_big
)
6368 /* This must be the value 0x10000000000000000. */
6369 assert (idesc
->operands
[i
] == IA64_OPND_IMM8M1U8
);
6375 switch (idesc
->operands
[i
])
6377 case IA64_OPND_IMMU64
:
6378 *insnp
++ = (val
>> 22) & 0x1ffffffffffLL
;
6379 insn
|= (((val
& 0x7f) << 13) | (((val
>> 7) & 0x1ff) << 27)
6380 | (((val
>> 16) & 0x1f) << 22) | (((val
>> 21) & 0x1) << 21)
6381 | (((val
>> 63) & 0x1) << 36));
6384 case IA64_OPND_IMMU62
:
6385 val
&= 0x3fffffffffffffffULL
;
6386 if (val
!= slot
->opnd
[i
].X_add_number
)
6387 as_warn (_("Value truncated to 62 bits"));
6388 *insnp
++ = (val
>> 21) & 0x1ffffffffffLL
;
6389 insn
|= (((val
& 0xfffff) << 6) | (((val
>> 20) & 0x1) << 36));
6392 case IA64_OPND_TGT64
:
6394 *insnp
++ = ((val
>> 20) & 0x7fffffffffLL
) << 2;
6395 insn
|= ((((val
>> 59) & 0x1) << 36)
6396 | (((val
>> 0) & 0xfffff) << 13));
6427 case IA64_OPND_R3_2
:
6428 case IA64_OPND_CPUID_R3
:
6429 case IA64_OPND_DBR_R3
:
6430 case IA64_OPND_DTR_R3
:
6431 case IA64_OPND_ITR_R3
:
6432 case IA64_OPND_IBR_R3
:
6434 case IA64_OPND_MSR_R3
:
6435 case IA64_OPND_PKR_R3
:
6436 case IA64_OPND_PMC_R3
:
6437 case IA64_OPND_PMD_R3
:
6438 case IA64_OPND_RR_R3
:
6446 odesc
= elf64_ia64_operands
+ idesc
->operands
[i
];
6447 err
= (*odesc
->insert
) (odesc
, val
, &insn
);
6449 as_bad_where (slot
->src_file
, slot
->src_line
,
6450 "Bad operand value: %s", err
);
6451 if (idesc
->flags
& IA64_OPCODE_PSEUDO
)
6453 if ((idesc
->flags
& IA64_OPCODE_F2_EQ_F3
)
6454 && odesc
== elf64_ia64_operands
+ IA64_OPND_F3
)
6456 o2desc
= elf64_ia64_operands
+ IA64_OPND_F2
;
6457 (*o2desc
->insert
) (o2desc
, val
, &insn
);
6459 if ((idesc
->flags
& IA64_OPCODE_LEN_EQ_64MCNT
)
6460 && (odesc
== elf64_ia64_operands
+ IA64_OPND_CPOS6a
6461 || odesc
== elf64_ia64_operands
+ IA64_OPND_POS6
))
6463 o2desc
= elf64_ia64_operands
+ IA64_OPND_LEN6
;
6464 (*o2desc
->insert
) (o2desc
, 64 - val
, &insn
);
6474 int manual_bundling_off
= 0, manual_bundling
= 0;
6475 enum ia64_unit required_unit
, insn_unit
= 0;
6476 enum ia64_insn_type type
[3], insn_type
;
6477 unsigned int template, orig_template
;
6478 bfd_vma insn
[3] = { -1, -1, -1 };
6479 struct ia64_opcode
*idesc
;
6480 int end_of_insn_group
= 0, user_template
= -1;
6481 int n
, i
, j
, first
, curr
, last_slot
;
6482 unw_rec_list
*ptr
, *last_ptr
, *end_ptr
;
6483 bfd_vma t0
= 0, t1
= 0;
6484 struct label_fix
*lfix
;
6485 struct insn_fix
*ifix
;
6491 first
= (md
.curr_slot
+ NUM_SLOTS
- md
.num_slots_in_use
) % NUM_SLOTS
;
6492 know (first
>= 0 & first
< NUM_SLOTS
);
6493 n
= MIN (3, md
.num_slots_in_use
);
6495 /* Determine template: user user_template if specified, best match
6498 if (md
.slot
[first
].user_template
>= 0)
6499 user_template
= template = md
.slot
[first
].user_template
;
6502 /* Auto select appropriate template. */
6503 memset (type
, 0, sizeof (type
));
6505 for (i
= 0; i
< n
; ++i
)
6507 if (md
.slot
[curr
].label_fixups
&& i
!= 0)
6509 type
[i
] = md
.slot
[curr
].idesc
->type
;
6510 curr
= (curr
+ 1) % NUM_SLOTS
;
6512 template = best_template
[type
[0]][type
[1]][type
[2]];
6515 /* initialize instructions with appropriate nops: */
6516 for (i
= 0; i
< 3; ++i
)
6517 insn
[i
] = nop
[ia64_templ_desc
[template].exec_unit
[i
]];
6521 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6522 from the start of the frag. */
6523 addr_mod
= frag_now_fix () & 15;
6524 if (frag_now
->has_code
&& frag_now
->insn_addr
!= addr_mod
)
6525 as_bad (_("instruction address is not a multiple of 16"));
6526 frag_now
->insn_addr
= addr_mod
;
6527 frag_now
->has_code
= 1;
6529 /* now fill in slots with as many insns as possible: */
6531 idesc
= md
.slot
[curr
].idesc
;
6532 end_of_insn_group
= 0;
6534 for (i
= 0; i
< 3 && md
.num_slots_in_use
> 0; ++i
)
6536 /* If we have unwind records, we may need to update some now. */
6537 ptr
= md
.slot
[curr
].unwind_record
;
6540 /* Find the last prologue/body record in the list for the current
6541 insn, and set the slot number for all records up to that point.
6542 This needs to be done now, because prologue/body records refer to
6543 the current point, not the point after the instruction has been
6544 issued. This matters because there may have been nops emitted
6545 meanwhile. Any non-prologue non-body record followed by a
6546 prologue/body record must also refer to the current point. */
6548 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6549 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6550 if (ptr
->r
.type
== prologue
|| ptr
->r
.type
== prologue_gr
6551 || ptr
->r
.type
== body
)
6555 /* Make last_ptr point one after the last prologue/body
6557 last_ptr
= last_ptr
->next
;
6558 for (ptr
= md
.slot
[curr
].unwind_record
; ptr
!= last_ptr
;
6561 ptr
->slot_number
= (unsigned long) f
+ i
;
6562 ptr
->slot_frag
= frag_now
;
6564 /* Remove the initialized records, so that we won't accidentally
6565 update them again if we insert a nop and continue. */
6566 md
.slot
[curr
].unwind_record
= last_ptr
;
6570 manual_bundling_off
= md
.slot
[curr
].manual_bundling_off
;
6571 if (md
.slot
[curr
].manual_bundling_on
)
6574 manual_bundling
= 1;
6576 break; /* Need to start a new bundle. */
6579 /* If this instruction specifies a template, then it must be the first
6580 instruction of a bundle. */
6581 if (curr
!= first
&& md
.slot
[curr
].user_template
>= 0)
6584 if (idesc
->flags
& IA64_OPCODE_SLOT2
)
6586 if (manual_bundling
&& !manual_bundling_off
)
6588 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6589 "`%s' must be last in bundle", idesc
->name
);
6591 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6595 if (idesc
->flags
& IA64_OPCODE_LAST
)
6598 unsigned int required_template
;
6600 /* If we need a stop bit after an M slot, our only choice is
6601 template 5 (M;;MI). If we need a stop bit after a B
6602 slot, our only choice is to place it at the end of the
6603 bundle, because the only available templates are MIB,
6604 MBB, BBB, MMB, and MFB. We don't handle anything other
6605 than M and B slots because these are the only kind of
6606 instructions that can have the IA64_OPCODE_LAST bit set. */
6607 required_template
= template;
6608 switch (idesc
->type
)
6612 required_template
= 5;
6620 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6621 "Internal error: don't know how to force %s to end"
6622 "of instruction group", idesc
->name
);
6627 && (i
> required_slot
6628 || (required_slot
== 2 && !manual_bundling_off
)
6629 || (user_template
>= 0
6630 /* Changing from MMI to M;MI is OK. */
6631 && (template ^ required_template
) > 1)))
6633 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6634 "`%s' must be last in instruction group",
6636 if (i
< 2 && required_slot
== 2 && !manual_bundling_off
)
6637 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6639 if (required_slot
< i
)
6640 /* Can't fit this instruction. */
6644 if (required_template
!= template)
6646 /* If we switch the template, we need to reset the NOPs
6647 after slot i. The slot-types of the instructions ahead
6648 of i never change, so we don't need to worry about
6649 changing NOPs in front of this slot. */
6650 for (j
= i
; j
< 3; ++j
)
6651 insn
[j
] = nop
[ia64_templ_desc
[required_template
].exec_unit
[j
]];
6653 template = required_template
;
6655 if (curr
!= first
&& md
.slot
[curr
].label_fixups
)
6657 if (manual_bundling
)
6659 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6660 "Label must be first in a bundle");
6661 manual_bundling
= -1; /* Suppress meaningless post-loop errors. */
6663 /* This insn must go into the first slot of a bundle. */
6667 if (end_of_insn_group
&& md
.num_slots_in_use
>= 1)
6669 /* We need an instruction group boundary in the middle of a
6670 bundle. See if we can switch to an other template with
6671 an appropriate boundary. */
6673 orig_template
= template;
6674 if (i
== 1 && (user_template
== 4
6675 || (user_template
< 0
6676 && (ia64_templ_desc
[template].exec_unit
[0]
6680 end_of_insn_group
= 0;
6682 else if (i
== 2 && (user_template
== 0
6683 || (user_template
< 0
6684 && (ia64_templ_desc
[template].exec_unit
[1]
6686 /* This test makes sure we don't switch the template if
6687 the next instruction is one that needs to be first in
6688 an instruction group. Since all those instructions are
6689 in the M group, there is no way such an instruction can
6690 fit in this bundle even if we switch the template. The
6691 reason we have to check for this is that otherwise we
6692 may end up generating "MI;;I M.." which has the deadly
6693 effect that the second M instruction is no longer the
6694 first in the group! --davidm 99/12/16 */
6695 && (idesc
->flags
& IA64_OPCODE_FIRST
) == 0)
6698 end_of_insn_group
= 0;
6701 && user_template
== 0
6702 && !(idesc
->flags
& IA64_OPCODE_FIRST
))
6703 /* Use the next slot. */
6705 else if (curr
!= first
)
6706 /* can't fit this insn */
6709 if (template != orig_template
)
6710 /* if we switch the template, we need to reset the NOPs
6711 after slot i. The slot-types of the instructions ahead
6712 of i never change, so we don't need to worry about
6713 changing NOPs in front of this slot. */
6714 for (j
= i
; j
< 3; ++j
)
6715 insn
[j
] = nop
[ia64_templ_desc
[template].exec_unit
[j
]];
6717 required_unit
= ia64_templ_desc
[template].exec_unit
[i
];
6719 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6720 if (idesc
->type
== IA64_TYPE_DYN
)
6722 enum ia64_opnd opnd1
, opnd2
;
6724 if ((strcmp (idesc
->name
, "nop") == 0)
6725 || (strcmp (idesc
->name
, "break") == 0))
6726 insn_unit
= required_unit
;
6727 else if (strcmp (idesc
->name
, "hint") == 0)
6729 insn_unit
= required_unit
;
6730 if (required_unit
== IA64_UNIT_B
)
6736 case hint_b_warning
:
6737 as_warn ("hint in B unit may be treated as nop");
6740 /* When manual bundling is off and there is no
6741 user template, we choose a different unit so
6742 that hint won't go into the current slot. We
6743 will fill the current bundle with nops and
6744 try to put hint into the next bundle. */
6745 if (!manual_bundling
&& user_template
< 0)
6746 insn_unit
= IA64_UNIT_I
;
6748 as_bad ("hint in B unit can't be used");
6753 else if (strcmp (idesc
->name
, "chk.s") == 0
6754 || strcmp (idesc
->name
, "mov") == 0)
6756 insn_unit
= IA64_UNIT_M
;
6757 if (required_unit
== IA64_UNIT_I
6758 || (required_unit
== IA64_UNIT_F
&& template == 6))
6759 insn_unit
= IA64_UNIT_I
;
6762 as_fatal ("emit_one_bundle: unexpected dynamic op");
6764 sprintf (mnemonic
, "%s.%c", idesc
->name
, "?imbfxx"[insn_unit
]);
6765 opnd1
= idesc
->operands
[0];
6766 opnd2
= idesc
->operands
[1];
6767 ia64_free_opcode (idesc
);
6768 idesc
= ia64_find_opcode (mnemonic
);
6769 /* moves to/from ARs have collisions */
6770 if (opnd1
== IA64_OPND_AR3
|| opnd2
== IA64_OPND_AR3
)
6772 while (idesc
!= NULL
6773 && (idesc
->operands
[0] != opnd1
6774 || idesc
->operands
[1] != opnd2
))
6775 idesc
= get_next_opcode (idesc
);
6777 md
.slot
[curr
].idesc
= idesc
;
6781 insn_type
= idesc
->type
;
6782 insn_unit
= IA64_UNIT_NIL
;
6786 if (required_unit
== IA64_UNIT_I
|| required_unit
== IA64_UNIT_M
)
6787 insn_unit
= required_unit
;
6789 case IA64_TYPE_X
: insn_unit
= IA64_UNIT_L
; break;
6790 case IA64_TYPE_I
: insn_unit
= IA64_UNIT_I
; break;
6791 case IA64_TYPE_M
: insn_unit
= IA64_UNIT_M
; break;
6792 case IA64_TYPE_B
: insn_unit
= IA64_UNIT_B
; break;
6793 case IA64_TYPE_F
: insn_unit
= IA64_UNIT_F
; break;
6798 if (insn_unit
!= required_unit
)
6799 continue; /* Try next slot. */
6801 if (debug_type
== DEBUG_DWARF2
|| md
.slot
[curr
].loc_directive_seen
)
6803 bfd_vma addr
= frag_now
->fr_address
+ frag_now_fix () - 16 + i
;
6805 md
.slot
[curr
].loc_directive_seen
= 0;
6806 dwarf2_gen_line_info (addr
, &md
.slot
[curr
].debug_line
);
6809 build_insn (md
.slot
+ curr
, insn
+ i
);
6811 ptr
= md
.slot
[curr
].unwind_record
;
6814 /* Set slot numbers for all remaining unwind records belonging to the
6815 current insn. There can not be any prologue/body unwind records
6817 end_ptr
= md
.slot
[(curr
+ 1) % NUM_SLOTS
].unwind_record
;
6818 for (; ptr
!= end_ptr
; ptr
= ptr
->next
)
6820 ptr
->slot_number
= (unsigned long) f
+ i
;
6821 ptr
->slot_frag
= frag_now
;
6823 md
.slot
[curr
].unwind_record
= NULL
;
6826 if (required_unit
== IA64_UNIT_L
)
6829 /* skip one slot for long/X-unit instructions */
6832 --md
.num_slots_in_use
;
6835 /* now is a good time to fix up the labels for this insn: */
6836 for (lfix
= md
.slot
[curr
].label_fixups
; lfix
; lfix
= lfix
->next
)
6838 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16);
6839 symbol_set_frag (lfix
->sym
, frag_now
);
6841 /* and fix up the tags also. */
6842 for (lfix
= md
.slot
[curr
].tag_fixups
; lfix
; lfix
= lfix
->next
)
6844 S_SET_VALUE (lfix
->sym
, frag_now_fix () - 16 + i
);
6845 symbol_set_frag (lfix
->sym
, frag_now
);
6848 for (j
= 0; j
< md
.slot
[curr
].num_fixups
; ++j
)
6850 ifix
= md
.slot
[curr
].fixup
+ j
;
6851 fix
= fix_new_exp (frag_now
, frag_now_fix () - 16 + i
, 8,
6852 &ifix
->expr
, ifix
->is_pcrel
, ifix
->code
);
6853 fix
->tc_fix_data
.opnd
= ifix
->opnd
;
6854 fix
->fx_plt
= (fix
->fx_r_type
== BFD_RELOC_IA64_PLTOFF22
);
6855 fix
->fx_file
= md
.slot
[curr
].src_file
;
6856 fix
->fx_line
= md
.slot
[curr
].src_line
;
6859 end_of_insn_group
= md
.slot
[curr
].end_of_insn_group
;
6862 ia64_free_opcode (md
.slot
[curr
].idesc
);
6863 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6864 md
.slot
[curr
].user_template
= -1;
6866 if (manual_bundling_off
)
6868 manual_bundling
= 0;
6871 curr
= (curr
+ 1) % NUM_SLOTS
;
6872 idesc
= md
.slot
[curr
].idesc
;
6874 if (manual_bundling
> 0)
6876 if (md
.num_slots_in_use
> 0)
6879 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6880 "`%s' does not fit into bundle", idesc
->name
);
6881 else if (last_slot
< 0)
6883 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6884 "`%s' does not fit into %s template",
6885 idesc
->name
, ia64_templ_desc
[template].name
);
6886 /* Drop first insn so we don't livelock. */
6887 --md
.num_slots_in_use
;
6888 know (curr
== first
);
6889 ia64_free_opcode (md
.slot
[curr
].idesc
);
6890 memset (md
.slot
+ curr
, 0, sizeof (md
.slot
[curr
]));
6891 md
.slot
[curr
].user_template
= -1;
6899 else if (last_slot
== 0)
6900 where
= "slots 2 or 3";
6903 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6904 "`%s' can't go in %s of %s template",
6905 idesc
->name
, where
, ia64_templ_desc
[template].name
);
6909 as_bad_where (md
.slot
[curr
].src_file
, md
.slot
[curr
].src_line
,
6910 "Missing '}' at end of file");
6912 know (md
.num_slots_in_use
< NUM_SLOTS
);
6914 t0
= end_of_insn_group
| (template << 1) | (insn
[0] << 5) | (insn
[1] << 46);
6915 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
6917 number_to_chars_littleendian (f
+ 0, t0
, 8);
6918 number_to_chars_littleendian (f
+ 8, t1
, 8);
6922 md_parse_option (c
, arg
)
6929 /* Switches from the Intel assembler. */
6931 if (strcmp (arg
, "ilp64") == 0
6932 || strcmp (arg
, "lp64") == 0
6933 || strcmp (arg
, "p64") == 0)
6935 md
.flags
|= EF_IA_64_ABI64
;
6937 else if (strcmp (arg
, "ilp32") == 0)
6939 md
.flags
&= ~EF_IA_64_ABI64
;
6941 else if (strcmp (arg
, "le") == 0)
6943 md
.flags
&= ~EF_IA_64_BE
;
6944 default_big_endian
= 0;
6946 else if (strcmp (arg
, "be") == 0)
6948 md
.flags
|= EF_IA_64_BE
;
6949 default_big_endian
= 1;
6951 else if (strncmp (arg
, "unwind-check=", 13) == 0)
6954 if (strcmp (arg
, "warning") == 0)
6955 md
.unwind_check
= unwind_check_warning
;
6956 else if (strcmp (arg
, "error") == 0)
6957 md
.unwind_check
= unwind_check_error
;
6961 else if (strncmp (arg
, "hint.b=", 7) == 0)
6964 if (strcmp (arg
, "ok") == 0)
6965 md
.hint_b
= hint_b_ok
;
6966 else if (strcmp (arg
, "warning") == 0)
6967 md
.hint_b
= hint_b_warning
;
6968 else if (strcmp (arg
, "error") == 0)
6969 md
.hint_b
= hint_b_error
;
6973 else if (strncmp (arg
, "tune=", 5) == 0)
6976 if (strcmp (arg
, "itanium1") == 0)
6978 else if (strcmp (arg
, "itanium2") == 0)
6988 if (strcmp (arg
, "so") == 0)
6990 /* Suppress signon message. */
6992 else if (strcmp (arg
, "pi") == 0)
6994 /* Reject privileged instructions. FIXME */
6996 else if (strcmp (arg
, "us") == 0)
6998 /* Allow union of signed and unsigned range. FIXME */
7000 else if (strcmp (arg
, "close_fcalls") == 0)
7002 /* Do not resolve global function calls. */
7009 /* temp[="prefix"] Insert temporary labels into the object file
7010 symbol table prefixed by "prefix".
7011 Default prefix is ":temp:".
7016 /* indirect=<tgt> Assume unannotated indirect branches behavior
7017 according to <tgt> --
7018 exit: branch out from the current context (default)
7019 labels: all labels in context may be branch targets
7021 if (strncmp (arg
, "indirect=", 9) != 0)
7026 /* -X conflicts with an ignored option, use -x instead */
7028 if (!arg
|| strcmp (arg
, "explicit") == 0)
7030 /* set default mode to explicit */
7031 md
.default_explicit_mode
= 1;
7034 else if (strcmp (arg
, "auto") == 0)
7036 md
.default_explicit_mode
= 0;
7038 else if (strcmp (arg
, "none") == 0)
7042 else if (strcmp (arg
, "debug") == 0)
7046 else if (strcmp (arg
, "debugx") == 0)
7048 md
.default_explicit_mode
= 1;
7051 else if (strcmp (arg
, "debugn") == 0)
7058 as_bad (_("Unrecognized option '-x%s'"), arg
);
7063 /* nops Print nops statistics. */
7066 /* GNU specific switches for gcc. */
7067 case OPTION_MCONSTANT_GP
:
7068 md
.flags
|= EF_IA_64_CONS_GP
;
7071 case OPTION_MAUTO_PIC
:
7072 md
.flags
|= EF_IA_64_NOFUNCDESC_CONS_GP
;
7083 md_show_usage (stream
)
7088 --mconstant-gp mark output file as using the constant-GP model\n\
7089 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7090 --mauto-pic mark output file as using the constant-GP model\n\
7091 without function descriptors (sets ELF header flag\n\
7092 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7093 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7094 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7095 -mtune=[itanium1|itanium2]\n\
7096 tune for a specific CPU (default -mtune=itanium2)\n\
7097 -munwind-check=[warning|error]\n\
7098 unwind directive check (default -munwind-check=warning)\n\
7099 -mhint.b=[ok|warning|error]\n\
7100 hint.b check (default -mhint.b=error)\n\
7101 -x | -xexplicit turn on dependency violation checking\n\
7102 -xauto automagically remove dependency violations (default)\n\
7103 -xnone turn off dependency violation checking\n\
7104 -xdebug debug dependency violation checker\n\
7105 -xdebugn debug dependency violation checker but turn off\n\
7106 dependency violation checking\n\
7107 -xdebugx debug dependency violation checker and turn on\n\
7108 dependency violation checking\n"),
7113 ia64_after_parse_args ()
7115 if (debug_type
== DEBUG_STABS
)
7116 as_fatal (_("--gstabs is not supported for ia64"));
7119 /* Return true if TYPE fits in TEMPL at SLOT. */
7122 match (int templ
, int type
, int slot
)
7124 enum ia64_unit unit
;
7127 unit
= ia64_templ_desc
[templ
].exec_unit
[slot
];
7130 case IA64_TYPE_DYN
: result
= 1; break; /* for nop and break */
7132 result
= (unit
== IA64_UNIT_I
|| unit
== IA64_UNIT_M
);
7134 case IA64_TYPE_X
: result
= (unit
== IA64_UNIT_L
); break;
7135 case IA64_TYPE_I
: result
= (unit
== IA64_UNIT_I
); break;
7136 case IA64_TYPE_M
: result
= (unit
== IA64_UNIT_M
); break;
7137 case IA64_TYPE_B
: result
= (unit
== IA64_UNIT_B
); break;
7138 case IA64_TYPE_F
: result
= (unit
== IA64_UNIT_F
); break;
7139 default: result
= 0; break;
7144 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7145 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7146 type M or I would fit in TEMPL at SLOT. */
7149 extra_goodness (int templ
, int slot
)
7154 if (slot
== 1 && match (templ
, IA64_TYPE_F
, slot
))
7156 else if (slot
== 2 && match (templ
, IA64_TYPE_B
, slot
))
7162 if (match (templ
, IA64_TYPE_M
, slot
)
7163 || match (templ
, IA64_TYPE_I
, slot
))
7164 /* Favor M- and I-unit NOPs. We definitely want to avoid
7165 F-unit and B-unit may cause split-issue or less-than-optimal
7166 branch-prediction. */
7177 /* This function is called once, at assembler startup time. It sets
7178 up all the tables, etc. that the MD part of the assembler will need
7179 that can be determined before arguments are parsed. */
7183 int i
, j
, k
, t
, total
, ar_base
, cr_base
, goodness
, best
, regnum
, ok
;
7188 md
.explicit_mode
= md
.default_explicit_mode
;
7190 bfd_set_section_alignment (stdoutput
, text_section
, 4);
7192 /* Make sure function pointers get initialized. */
7193 target_big_endian
= -1;
7194 dot_byteorder (default_big_endian
);
7196 alias_hash
= hash_new ();
7197 alias_name_hash
= hash_new ();
7198 secalias_hash
= hash_new ();
7199 secalias_name_hash
= hash_new ();
7201 pseudo_func
[FUNC_DTP_MODULE
].u
.sym
=
7202 symbol_new (".<dtpmod>", undefined_section
, FUNC_DTP_MODULE
,
7203 &zero_address_frag
);
7205 pseudo_func
[FUNC_DTP_RELATIVE
].u
.sym
=
7206 symbol_new (".<dtprel>", undefined_section
, FUNC_DTP_RELATIVE
,
7207 &zero_address_frag
);
7209 pseudo_func
[FUNC_FPTR_RELATIVE
].u
.sym
=
7210 symbol_new (".<fptr>", undefined_section
, FUNC_FPTR_RELATIVE
,
7211 &zero_address_frag
);
7213 pseudo_func
[FUNC_GP_RELATIVE
].u
.sym
=
7214 symbol_new (".<gprel>", undefined_section
, FUNC_GP_RELATIVE
,
7215 &zero_address_frag
);
7217 pseudo_func
[FUNC_LT_RELATIVE
].u
.sym
=
7218 symbol_new (".<ltoff>", undefined_section
, FUNC_LT_RELATIVE
,
7219 &zero_address_frag
);
7221 pseudo_func
[FUNC_LT_RELATIVE_X
].u
.sym
=
7222 symbol_new (".<ltoffx>", undefined_section
, FUNC_LT_RELATIVE_X
,
7223 &zero_address_frag
);
7225 pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
=
7226 symbol_new (".<pcrel>", undefined_section
, FUNC_PC_RELATIVE
,
7227 &zero_address_frag
);
7229 pseudo_func
[FUNC_PLT_RELATIVE
].u
.sym
=
7230 symbol_new (".<pltoff>", undefined_section
, FUNC_PLT_RELATIVE
,
7231 &zero_address_frag
);
7233 pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
=
7234 symbol_new (".<secrel>", undefined_section
, FUNC_SEC_RELATIVE
,
7235 &zero_address_frag
);
7237 pseudo_func
[FUNC_SEG_RELATIVE
].u
.sym
=
7238 symbol_new (".<segrel>", undefined_section
, FUNC_SEG_RELATIVE
,
7239 &zero_address_frag
);
7241 pseudo_func
[FUNC_TP_RELATIVE
].u
.sym
=
7242 symbol_new (".<tprel>", undefined_section
, FUNC_TP_RELATIVE
,
7243 &zero_address_frag
);
7245 pseudo_func
[FUNC_LTV_RELATIVE
].u
.sym
=
7246 symbol_new (".<ltv>", undefined_section
, FUNC_LTV_RELATIVE
,
7247 &zero_address_frag
);
7249 pseudo_func
[FUNC_LT_FPTR_RELATIVE
].u
.sym
=
7250 symbol_new (".<ltoff.fptr>", undefined_section
, FUNC_LT_FPTR_RELATIVE
,
7251 &zero_address_frag
);
7253 pseudo_func
[FUNC_LT_DTP_MODULE
].u
.sym
=
7254 symbol_new (".<ltoff.dtpmod>", undefined_section
, FUNC_LT_DTP_MODULE
,
7255 &zero_address_frag
);
7257 pseudo_func
[FUNC_LT_DTP_RELATIVE
].u
.sym
=
7258 symbol_new (".<ltoff.dptrel>", undefined_section
, FUNC_LT_DTP_RELATIVE
,
7259 &zero_address_frag
);
7261 pseudo_func
[FUNC_LT_TP_RELATIVE
].u
.sym
=
7262 symbol_new (".<ltoff.tprel>", undefined_section
, FUNC_LT_TP_RELATIVE
,
7263 &zero_address_frag
);
7265 pseudo_func
[FUNC_IPLT_RELOC
].u
.sym
=
7266 symbol_new (".<iplt>", undefined_section
, FUNC_IPLT_RELOC
,
7267 &zero_address_frag
);
7269 if (md
.tune
!= itanium1
)
7271 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7273 le_nop_stop
[0] = 0x9;
7276 /* Compute the table of best templates. We compute goodness as a
7277 base 4 value, in which each match counts for 3. Match-failures
7278 result in NOPs and we use extra_goodness() to pick the execution
7279 units that are best suited for issuing the NOP. */
7280 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7281 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7282 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7285 for (t
= 0; t
< NELEMS (ia64_templ_desc
); ++t
)
7288 if (match (t
, i
, 0))
7290 if (match (t
, j
, 1))
7292 if ((t
== 2 && j
== IA64_TYPE_X
) || match (t
, k
, 2))
7293 goodness
= 3 + 3 + 3;
7295 goodness
= 3 + 3 + extra_goodness (t
, 2);
7297 else if (match (t
, j
, 2))
7298 goodness
= 3 + 3 + extra_goodness (t
, 1);
7302 goodness
+= extra_goodness (t
, 1);
7303 goodness
+= extra_goodness (t
, 2);
7306 else if (match (t
, i
, 1))
7308 if ((t
== 2 && i
== IA64_TYPE_X
) || match (t
, j
, 2))
7311 goodness
= 3 + extra_goodness (t
, 2);
7313 else if (match (t
, i
, 2))
7314 goodness
= 3 + extra_goodness (t
, 1);
7316 if (goodness
> best
)
7319 best_template
[i
][j
][k
] = t
;
7324 #ifdef DEBUG_TEMPLATES
7325 /* For debugging changes to the best_template calculations. We don't care
7326 about combinations with invalid instructions, so start the loops at 1. */
7327 for (i
= 0; i
< IA64_NUM_TYPES
; ++i
)
7328 for (j
= 0; j
< IA64_NUM_TYPES
; ++j
)
7329 for (k
= 0; k
< IA64_NUM_TYPES
; ++k
)
7331 char type_letter
[IA64_NUM_TYPES
] = { 'n', 'a', 'i', 'm', 'b', 'f',
7333 fprintf (stderr
, "%c%c%c %s\n", type_letter
[i
], type_letter
[j
],
7335 ia64_templ_desc
[best_template
[i
][j
][k
]].name
);
7339 for (i
= 0; i
< NUM_SLOTS
; ++i
)
7340 md
.slot
[i
].user_template
= -1;
7342 md
.pseudo_hash
= hash_new ();
7343 for (i
= 0; i
< NELEMS (pseudo_opcode
); ++i
)
7345 err
= hash_insert (md
.pseudo_hash
, pseudo_opcode
[i
].name
,
7346 (void *) (pseudo_opcode
+ i
));
7348 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7349 pseudo_opcode
[i
].name
, err
);
7352 md
.reg_hash
= hash_new ();
7353 md
.dynreg_hash
= hash_new ();
7354 md
.const_hash
= hash_new ();
7355 md
.entry_hash
= hash_new ();
7357 /* general registers: */
7360 for (i
= 0; i
< total
; ++i
)
7362 sprintf (name
, "r%d", i
- REG_GR
);
7363 md
.regsym
[i
] = declare_register (name
, i
);
7366 /* floating point registers: */
7368 for (; i
< total
; ++i
)
7370 sprintf (name
, "f%d", i
- REG_FR
);
7371 md
.regsym
[i
] = declare_register (name
, i
);
7374 /* application registers: */
7377 for (; i
< total
; ++i
)
7379 sprintf (name
, "ar%d", i
- REG_AR
);
7380 md
.regsym
[i
] = declare_register (name
, i
);
7383 /* control registers: */
7386 for (; i
< total
; ++i
)
7388 sprintf (name
, "cr%d", i
- REG_CR
);
7389 md
.regsym
[i
] = declare_register (name
, i
);
7392 /* predicate registers: */
7394 for (; i
< total
; ++i
)
7396 sprintf (name
, "p%d", i
- REG_P
);
7397 md
.regsym
[i
] = declare_register (name
, i
);
7400 /* branch registers: */
7402 for (; i
< total
; ++i
)
7404 sprintf (name
, "b%d", i
- REG_BR
);
7405 md
.regsym
[i
] = declare_register (name
, i
);
7408 md
.regsym
[REG_IP
] = declare_register ("ip", REG_IP
);
7409 md
.regsym
[REG_CFM
] = declare_register ("cfm", REG_CFM
);
7410 md
.regsym
[REG_PR
] = declare_register ("pr", REG_PR
);
7411 md
.regsym
[REG_PR_ROT
] = declare_register ("pr.rot", REG_PR_ROT
);
7412 md
.regsym
[REG_PSR
] = declare_register ("psr", REG_PSR
);
7413 md
.regsym
[REG_PSR_L
] = declare_register ("psr.l", REG_PSR_L
);
7414 md
.regsym
[REG_PSR_UM
] = declare_register ("psr.um", REG_PSR_UM
);
7416 for (i
= 0; i
< NELEMS (indirect_reg
); ++i
)
7418 regnum
= indirect_reg
[i
].regnum
;
7419 md
.regsym
[regnum
] = declare_register (indirect_reg
[i
].name
, regnum
);
7422 /* define synonyms for application registers: */
7423 for (i
= REG_AR
; i
< REG_AR
+ NELEMS (ar
); ++i
)
7424 md
.regsym
[i
] = declare_register (ar
[i
- REG_AR
].name
,
7425 REG_AR
+ ar
[i
- REG_AR
].regnum
);
7427 /* define synonyms for control registers: */
7428 for (i
= REG_CR
; i
< REG_CR
+ NELEMS (cr
); ++i
)
7429 md
.regsym
[i
] = declare_register (cr
[i
- REG_CR
].name
,
7430 REG_CR
+ cr
[i
- REG_CR
].regnum
);
7432 declare_register ("gp", REG_GR
+ 1);
7433 declare_register ("sp", REG_GR
+ 12);
7434 declare_register ("rp", REG_BR
+ 0);
7436 /* pseudo-registers used to specify unwind info: */
7437 declare_register ("psp", REG_PSP
);
7439 declare_register_set ("ret", 4, REG_GR
+ 8);
7440 declare_register_set ("farg", 8, REG_FR
+ 8);
7441 declare_register_set ("fret", 8, REG_FR
+ 8);
7443 for (i
= 0; i
< NELEMS (const_bits
); ++i
)
7445 err
= hash_insert (md
.const_hash
, const_bits
[i
].name
,
7446 (PTR
) (const_bits
+ i
));
7448 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7452 /* Set the architecture and machine depending on defaults and command line
7454 if (md
.flags
& EF_IA_64_ABI64
)
7455 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf64
);
7457 ok
= bfd_set_arch_mach (stdoutput
, bfd_arch_ia64
, bfd_mach_ia64_elf32
);
7460 as_warn (_("Could not set architecture and machine"));
7462 /* Set the pointer size and pointer shift size depending on md.flags */
7464 if (md
.flags
& EF_IA_64_ABI64
)
7466 md
.pointer_size
= 8; /* pointers are 8 bytes */
7467 md
.pointer_size_shift
= 3; /* alignment is 8 bytes = 2^2 */
7471 md
.pointer_size
= 4; /* pointers are 4 bytes */
7472 md
.pointer_size_shift
= 2; /* alignment is 4 bytes = 2^2 */
7475 md
.mem_offset
.hint
= 0;
7478 md
.entry_labels
= NULL
;
7481 /* Set the default options in md. Cannot do this in md_begin because
7482 that is called after md_parse_option which is where we set the
7483 options in md based on command line options. */
7486 ia64_init (argc
, argv
)
7487 int argc ATTRIBUTE_UNUSED
;
7488 char **argv ATTRIBUTE_UNUSED
;
7490 md
.flags
= MD_FLAGS_DEFAULT
;
7492 /* FIXME: We should change it to unwind_check_error someday. */
7493 md
.unwind_check
= unwind_check_warning
;
7494 md
.hint_b
= hint_b_error
;
7498 /* Return a string for the target object file format. */
7501 ia64_target_format ()
7503 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
7505 if (md
.flags
& EF_IA_64_BE
)
7507 if (md
.flags
& EF_IA_64_ABI64
)
7508 #if defined(TE_AIX50)
7509 return "elf64-ia64-aix-big";
7510 #elif defined(TE_HPUX)
7511 return "elf64-ia64-hpux-big";
7513 return "elf64-ia64-big";
7516 #if defined(TE_AIX50)
7517 return "elf32-ia64-aix-big";
7518 #elif defined(TE_HPUX)
7519 return "elf32-ia64-hpux-big";
7521 return "elf32-ia64-big";
7526 if (md
.flags
& EF_IA_64_ABI64
)
7528 return "elf64-ia64-aix-little";
7530 return "elf64-ia64-little";
7534 return "elf32-ia64-aix-little";
7536 return "elf32-ia64-little";
7541 return "unknown-format";
7545 ia64_end_of_source ()
7547 /* terminate insn group upon reaching end of file: */
7548 insn_group_break (1, 0, 0);
7550 /* emits slots we haven't written yet: */
7551 ia64_flush_insns ();
7553 bfd_set_private_flags (stdoutput
, md
.flags
);
7555 md
.mem_offset
.hint
= 0;
7561 if (md
.qp
.X_op
== O_register
)
7562 as_bad ("qualifying predicate not followed by instruction");
7563 md
.qp
.X_op
= O_absent
;
7565 if (ignore_input ())
7568 if (input_line_pointer
[0] == ';' && input_line_pointer
[-1] == ';')
7570 if (md
.detect_dv
&& !md
.explicit_mode
)
7577 as_warn (_("Explicit stops are ignored in auto mode"));
7581 insn_group_break (1, 0, 0);
7585 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7587 static int defining_tag
= 0;
7590 ia64_unrecognized_line (ch
)
7596 expression (&md
.qp
);
7597 if (*input_line_pointer
++ != ')')
7599 as_bad ("Expected ')'");
7602 if (md
.qp
.X_op
!= O_register
)
7604 as_bad ("Qualifying predicate expected");
7607 if (md
.qp
.X_add_number
< REG_P
|| md
.qp
.X_add_number
>= REG_P
+ 64)
7609 as_bad ("Predicate register expected");
7615 if (md
.manual_bundling
)
7616 as_warn ("Found '{' when manual bundling is already turned on");
7618 CURR_SLOT
.manual_bundling_on
= 1;
7619 md
.manual_bundling
= 1;
7621 /* Bundling is only acceptable in explicit mode
7622 or when in default automatic mode. */
7623 if (md
.detect_dv
&& !md
.explicit_mode
)
7625 if (!md
.mode_explicitly_set
7626 && !md
.default_explicit_mode
)
7629 as_warn (_("Found '{' after explicit switch to automatic mode"));
7634 if (!md
.manual_bundling
)
7635 as_warn ("Found '}' when manual bundling is off");
7637 PREV_SLOT
.manual_bundling_off
= 1;
7638 md
.manual_bundling
= 0;
7640 /* switch back to automatic mode, if applicable */
7643 && !md
.mode_explicitly_set
7644 && !md
.default_explicit_mode
)
7647 /* Allow '{' to follow on the same line. We also allow ";;", but that
7648 happens automatically because ';' is an end of line marker. */
7650 if (input_line_pointer
[0] == '{')
7652 input_line_pointer
++;
7653 return ia64_unrecognized_line ('{');
7656 demand_empty_rest_of_line ();
7666 if (md
.qp
.X_op
== O_register
)
7668 as_bad ("Tag must come before qualifying predicate.");
7672 /* This implements just enough of read_a_source_file in read.c to
7673 recognize labels. */
7674 if (is_name_beginner (*input_line_pointer
))
7676 s
= input_line_pointer
;
7677 c
= get_symbol_end ();
7679 else if (LOCAL_LABELS_FB
7680 && ISDIGIT (*input_line_pointer
))
7683 while (ISDIGIT (*input_line_pointer
))
7684 temp
= (temp
* 10) + *input_line_pointer
++ - '0';
7685 fb_label_instance_inc (temp
);
7686 s
= fb_label_name (temp
, 0);
7687 c
= *input_line_pointer
;
7696 /* Put ':' back for error messages' sake. */
7697 *input_line_pointer
++ = ':';
7698 as_bad ("Expected ':'");
7705 /* Put ':' back for error messages' sake. */
7706 *input_line_pointer
++ = ':';
7707 if (*input_line_pointer
++ != ']')
7709 as_bad ("Expected ']'");
7714 as_bad ("Tag name expected");
7724 /* Not a valid line. */
7729 ia64_frob_label (sym
)
7732 struct label_fix
*fix
;
7734 /* Tags need special handling since they are not bundle breaks like
7738 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7740 fix
->next
= CURR_SLOT
.tag_fixups
;
7741 CURR_SLOT
.tag_fixups
= fix
;
7746 if (bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7748 md
.last_text_seg
= now_seg
;
7749 fix
= obstack_alloc (¬es
, sizeof (*fix
));
7751 fix
->next
= CURR_SLOT
.label_fixups
;
7752 CURR_SLOT
.label_fixups
= fix
;
7754 /* Keep track of how many code entry points we've seen. */
7755 if (md
.path
== md
.maxpaths
)
7758 md
.entry_labels
= (const char **)
7759 xrealloc ((void *) md
.entry_labels
,
7760 md
.maxpaths
* sizeof (char *));
7762 md
.entry_labels
[md
.path
++] = S_GET_NAME (sym
);
7767 /* The HP-UX linker will give unresolved symbol errors for symbols
7768 that are declared but unused. This routine removes declared,
7769 unused symbols from an object. */
7771 ia64_frob_symbol (sym
)
7774 if ((S_GET_SEGMENT (sym
) == &bfd_und_section
&& ! symbol_used_p (sym
) &&
7775 ELF_ST_VISIBILITY (S_GET_OTHER (sym
)) == STV_DEFAULT
)
7776 || (S_GET_SEGMENT (sym
) == &bfd_abs_section
7777 && ! S_IS_EXTERNAL (sym
)))
7784 ia64_flush_pending_output ()
7786 if (!md
.keep_pending_output
7787 && bfd_get_section_flags (stdoutput
, now_seg
) & SEC_CODE
)
7789 /* ??? This causes many unnecessary stop bits to be emitted.
7790 Unfortunately, it isn't clear if it is safe to remove this. */
7791 insn_group_break (1, 0, 0);
7792 ia64_flush_insns ();
7796 /* Do ia64-specific expression optimization. All that's done here is
7797 to transform index expressions that are either due to the indexing
7798 of rotating registers or due to the indexing of indirect register
7801 ia64_optimize_expr (l
, op
, r
)
7810 if (l
->X_op
== O_register
&& r
->X_op
== O_constant
)
7812 num_regs
= (l
->X_add_number
>> 16);
7813 if ((unsigned) r
->X_add_number
>= num_regs
)
7816 as_bad ("No current frame");
7818 as_bad ("Index out of range 0..%u", num_regs
- 1);
7819 r
->X_add_number
= 0;
7821 l
->X_add_number
= (l
->X_add_number
& 0xffff) + r
->X_add_number
;
7824 else if (l
->X_op
== O_register
&& r
->X_op
== O_register
)
7826 if (l
->X_add_number
< IND_CPUID
|| l
->X_add_number
> IND_RR
7827 || l
->X_add_number
== IND_MEM
)
7829 as_bad ("Indirect register set name expected");
7830 l
->X_add_number
= IND_CPUID
;
7833 l
->X_op_symbol
= md
.regsym
[l
->X_add_number
];
7834 l
->X_add_number
= r
->X_add_number
;
7842 ia64_parse_name (name
, e
, nextcharP
)
7847 struct const_desc
*cdesc
;
7848 struct dynreg
*dr
= 0;
7855 enum pseudo_type pseudo_type
= PSEUDO_FUNC_NONE
;
7857 /* Find what relocation pseudo-function we're dealing with. */
7858 for (idx
= 0; idx
< NELEMS (pseudo_func
); ++idx
)
7859 if (pseudo_func
[idx
].name
7860 && pseudo_func
[idx
].name
[0] == name
[1]
7861 && strcmp (pseudo_func
[idx
].name
+ 1, name
+ 2) == 0)
7863 pseudo_type
= pseudo_func
[idx
].type
;
7866 switch (pseudo_type
)
7868 case PSEUDO_FUNC_RELOC
:
7869 end
= input_line_pointer
;
7870 if (*nextcharP
!= '(')
7872 as_bad ("Expected '('");
7876 ++input_line_pointer
;
7878 if (*input_line_pointer
!= ')')
7880 as_bad ("Missing ')'");
7884 ++input_line_pointer
;
7885 if (e
->X_op
!= O_symbol
)
7887 if (e
->X_op
!= O_pseudo_fixup
)
7889 as_bad ("Not a symbolic expression");
7892 if (idx
!= FUNC_LT_RELATIVE
)
7894 as_bad ("Illegal combination of relocation functions");
7897 switch (S_GET_VALUE (e
->X_op_symbol
))
7899 case FUNC_FPTR_RELATIVE
:
7900 idx
= FUNC_LT_FPTR_RELATIVE
; break;
7901 case FUNC_DTP_MODULE
:
7902 idx
= FUNC_LT_DTP_MODULE
; break;
7903 case FUNC_DTP_RELATIVE
:
7904 idx
= FUNC_LT_DTP_RELATIVE
; break;
7905 case FUNC_TP_RELATIVE
:
7906 idx
= FUNC_LT_TP_RELATIVE
; break;
7908 as_bad ("Illegal combination of relocation functions");
7912 /* Make sure gas doesn't get rid of local symbols that are used
7914 e
->X_op
= O_pseudo_fixup
;
7915 e
->X_op_symbol
= pseudo_func
[idx
].u
.sym
;
7917 *nextcharP
= *input_line_pointer
;
7920 case PSEUDO_FUNC_CONST
:
7921 e
->X_op
= O_constant
;
7922 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7925 case PSEUDO_FUNC_REG
:
7926 e
->X_op
= O_register
;
7927 e
->X_add_number
= pseudo_func
[idx
].u
.ival
;
7936 /* first see if NAME is a known register name: */
7937 sym
= hash_find (md
.reg_hash
, name
);
7940 e
->X_op
= O_register
;
7941 e
->X_add_number
= S_GET_VALUE (sym
);
7945 cdesc
= hash_find (md
.const_hash
, name
);
7948 e
->X_op
= O_constant
;
7949 e
->X_add_number
= cdesc
->value
;
7953 /* check for inN, locN, or outN: */
7958 if (name
[1] == 'n' && ISDIGIT (name
[2]))
7966 if (name
[1] == 'o' && name
[2] == 'c' && ISDIGIT (name
[3]))
7974 if (name
[1] == 'u' && name
[2] == 't' && ISDIGIT (name
[3]))
7985 /* Ignore register numbers with leading zeroes, except zero itself. */
7986 if (dr
&& (name
[idx
] != '0' || name
[idx
+ 1] == '\0'))
7988 unsigned long regnum
;
7990 /* The name is inN, locN, or outN; parse the register number. */
7991 regnum
= strtoul (name
+ idx
, &end
, 10);
7992 if (end
> name
+ idx
&& *end
== '\0' && regnum
< 96)
7994 if (regnum
>= dr
->num_regs
)
7997 as_bad ("No current frame");
7999 as_bad ("Register number out of range 0..%u",
8003 e
->X_op
= O_register
;
8004 e
->X_add_number
= dr
->base
+ regnum
;
8009 end
= alloca (strlen (name
) + 1);
8011 name
= ia64_canonicalize_symbol_name (end
);
8012 if ((dr
= hash_find (md
.dynreg_hash
, name
)))
8014 /* We've got ourselves the name of a rotating register set.
8015 Store the base register number in the low 16 bits of
8016 X_add_number and the size of the register set in the top 16
8018 e
->X_op
= O_register
;
8019 e
->X_add_number
= dr
->base
| (dr
->num_regs
<< 16);
8025 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8028 ia64_canonicalize_symbol_name (name
)
8031 size_t len
= strlen (name
), full
= len
;
8033 while (len
> 0 && name
[len
- 1] == '#')
8038 as_bad ("Standalone `#' is illegal");
8040 else if (len
< full
- 1)
8041 as_warn ("Redundant `#' suffix operators");
8046 /* Return true if idesc is a conditional branch instruction. This excludes
8047 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8048 because they always read/write resources regardless of the value of the
8049 qualifying predicate. br.ia must always use p0, and hence is always
8050 taken. Thus this function returns true for branches which can fall
8051 through, and which use no resources if they do fall through. */
8054 is_conditional_branch (idesc
)
8055 struct ia64_opcode
*idesc
;
8057 /* br is a conditional branch. Everything that starts with br. except
8058 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8059 Everything that starts with brl is a conditional branch. */
8060 return (idesc
->name
[0] == 'b' && idesc
->name
[1] == 'r'
8061 && (idesc
->name
[2] == '\0'
8062 || (idesc
->name
[2] == '.' && idesc
->name
[3] != 'i'
8063 && idesc
->name
[3] != 'c' && idesc
->name
[3] != 'w')
8064 || idesc
->name
[2] == 'l'
8065 /* br.cond, br.call, br.clr */
8066 || (idesc
->name
[2] == '.' && idesc
->name
[3] == 'c'
8067 && (idesc
->name
[4] == 'a' || idesc
->name
[4] == 'o'
8068 || (idesc
->name
[4] == 'l' && idesc
->name
[5] == 'r')))));
8071 /* Return whether the given opcode is a taken branch. If there's any doubt,
8075 is_taken_branch (idesc
)
8076 struct ia64_opcode
*idesc
;
8078 return ((is_conditional_branch (idesc
) && CURR_SLOT
.qp_regno
== 0)
8079 || strncmp (idesc
->name
, "br.ia", 5) == 0);
8082 /* Return whether the given opcode is an interruption or rfi. If there's any
8083 doubt, returns zero. */
8086 is_interruption_or_rfi (idesc
)
8087 struct ia64_opcode
*idesc
;
8089 if (strcmp (idesc
->name
, "rfi") == 0)
8094 /* Returns the index of the given dependency in the opcode's list of chks, or
8095 -1 if there is no dependency. */
8098 depends_on (depind
, idesc
)
8100 struct ia64_opcode
*idesc
;
8103 const struct ia64_opcode_dependency
*dep
= idesc
->dependencies
;
8104 for (i
= 0; i
< dep
->nchks
; i
++)
8106 if (depind
== DEP (dep
->chks
[i
]))
8112 /* Determine a set of specific resources used for a particular resource
8113 class. Returns the number of specific resources identified For those
8114 cases which are not determinable statically, the resource returned is
8117 Meanings of value in 'NOTE':
8118 1) only read/write when the register number is explicitly encoded in the
8120 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8121 accesses CFM when qualifying predicate is in the rotating region.
8122 3) general register value is used to specify an indirect register; not
8123 determinable statically.
8124 4) only read the given resource when bits 7:0 of the indirect index
8125 register value does not match the register number of the resource; not
8126 determinable statically.
8127 5) all rules are implementation specific.
8128 6) only when both the index specified by the reader and the index specified
8129 by the writer have the same value in bits 63:61; not determinable
8131 7) only access the specified resource when the corresponding mask bit is
8133 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8134 only read when these insns reference FR2-31
8135 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8136 written when these insns write FR32-127
8137 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8139 11) The target predicates are written independently of PR[qp], but source
8140 registers are only read if PR[qp] is true. Since the state of PR[qp]
8141 cannot statically be determined, all source registers are marked used.
8142 12) This insn only reads the specified predicate register when that
8143 register is the PR[qp].
8144 13) This reference to ld-c only applies to teh GR whose value is loaded
8145 with data returned from memory, not the post-incremented address register.
8146 14) The RSE resource includes the implementation-specific RSE internal
8147 state resources. At least one (and possibly more) of these resources are
8148 read by each instruction listed in IC:rse-readers. At least one (and
8149 possibly more) of these resources are written by each insn listed in
8151 15+16) Represents reserved instructions, which the assembler does not
8154 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8155 this code; there are no dependency violations based on memory access.
8158 #define MAX_SPECS 256
8163 specify_resource (dep
, idesc
, type
, specs
, note
, path
)
8164 const struct ia64_dependency
*dep
;
8165 struct ia64_opcode
*idesc
;
8166 int type
; /* is this a DV chk or a DV reg? */
8167 struct rsrc specs
[MAX_SPECS
]; /* returned specific resources */
8168 int note
; /* resource note for this insn's usage */
8169 int path
; /* which execution path to examine */
8176 if (dep
->mode
== IA64_DV_WAW
8177 || (dep
->mode
== IA64_DV_RAW
&& type
== DV_REG
)
8178 || (dep
->mode
== IA64_DV_WAR
&& type
== DV_CHK
))
8181 /* template for any resources we identify */
8182 tmpl
.dependency
= dep
;
8184 tmpl
.insn_srlz
= tmpl
.data_srlz
= 0;
8185 tmpl
.qp_regno
= CURR_SLOT
.qp_regno
;
8186 tmpl
.link_to_qp_branch
= 1;
8187 tmpl
.mem_offset
.hint
= 0;
8188 tmpl
.mem_offset
.offset
= 0;
8189 tmpl
.mem_offset
.base
= 0;
8192 tmpl
.cmp_type
= CMP_NONE
;
8199 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8200 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8201 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8203 /* we don't need to track these */
8204 if (dep
->semantics
== IA64_DVS_NONE
)
8207 switch (dep
->specifier
)
8212 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8214 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8215 if (regno
>= 0 && regno
<= 7)
8217 specs
[count
] = tmpl
;
8218 specs
[count
++].index
= regno
;
8224 for (i
= 0; i
< 8; i
++)
8226 specs
[count
] = tmpl
;
8227 specs
[count
++].index
= i
;
8236 case IA64_RS_AR_UNAT
:
8237 /* This is a mov =AR or mov AR= instruction. */
8238 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8240 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8241 if (regno
== AR_UNAT
)
8243 specs
[count
++] = tmpl
;
8248 /* This is a spill/fill, or other instruction that modifies the
8251 /* Unless we can determine the specific bits used, mark the whole
8252 thing; bits 8:3 of the memory address indicate the bit used in
8253 UNAT. The .mem.offset hint may be used to eliminate a small
8254 subset of conflicts. */
8255 specs
[count
] = tmpl
;
8256 if (md
.mem_offset
.hint
)
8259 fprintf (stderr
, " Using hint for spill/fill\n");
8260 /* The index isn't actually used, just set it to something
8261 approximating the bit index. */
8262 specs
[count
].index
= (md
.mem_offset
.offset
>> 3) & 0x3F;
8263 specs
[count
].mem_offset
.hint
= 1;
8264 specs
[count
].mem_offset
.offset
= md
.mem_offset
.offset
;
8265 specs
[count
++].mem_offset
.base
= md
.mem_offset
.base
;
8269 specs
[count
++].specific
= 0;
8277 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8279 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8280 if ((regno
>= 8 && regno
<= 15)
8281 || (regno
>= 20 && regno
<= 23)
8282 || (regno
>= 31 && regno
<= 39)
8283 || (regno
>= 41 && regno
<= 47)
8284 || (regno
>= 67 && regno
<= 111))
8286 specs
[count
] = tmpl
;
8287 specs
[count
++].index
= regno
;
8300 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
8302 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
8303 if ((regno
>= 48 && regno
<= 63)
8304 || (regno
>= 112 && regno
<= 127))
8306 specs
[count
] = tmpl
;
8307 specs
[count
++].index
= regno
;
8313 for (i
= 48; i
< 64; i
++)
8315 specs
[count
] = tmpl
;
8316 specs
[count
++].index
= i
;
8318 for (i
= 112; i
< 128; i
++)
8320 specs
[count
] = tmpl
;
8321 specs
[count
++].index
= i
;
8339 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8340 if (idesc
->operands
[i
] == IA64_OPND_B1
8341 || idesc
->operands
[i
] == IA64_OPND_B2
)
8343 specs
[count
] = tmpl
;
8344 specs
[count
++].index
=
8345 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8350 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8351 if (idesc
->operands
[i
] == IA64_OPND_B1
8352 || idesc
->operands
[i
] == IA64_OPND_B2
)
8354 specs
[count
] = tmpl
;
8355 specs
[count
++].index
=
8356 CURR_SLOT
.opnd
[i
].X_add_number
- REG_BR
;
8362 case IA64_RS_CPUID
: /* four or more registers */
8365 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CPUID_R3
)
8367 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8368 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8371 specs
[count
] = tmpl
;
8372 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8376 specs
[count
] = tmpl
;
8377 specs
[count
++].specific
= 0;
8387 case IA64_RS_DBR
: /* four or more registers */
8390 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_DBR_R3
)
8392 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8393 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8396 specs
[count
] = tmpl
;
8397 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8401 specs
[count
] = tmpl
;
8402 specs
[count
++].specific
= 0;
8406 else if (note
== 0 && !rsrc_write
)
8408 specs
[count
] = tmpl
;
8409 specs
[count
++].specific
= 0;
8417 case IA64_RS_IBR
: /* four or more registers */
8420 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_IBR_R3
)
8422 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8423 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8426 specs
[count
] = tmpl
;
8427 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8431 specs
[count
] = tmpl
;
8432 specs
[count
++].specific
= 0;
8445 /* These are implementation specific. Force all references to
8446 conflict with all other references. */
8447 specs
[count
] = tmpl
;
8448 specs
[count
++].specific
= 0;
8456 case IA64_RS_PKR
: /* 16 or more registers */
8457 if (note
== 3 || note
== 4)
8459 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PKR_R3
)
8461 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8462 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8467 specs
[count
] = tmpl
;
8468 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8471 for (i
= 0; i
< NELEMS (gr_values
); i
++)
8473 /* Uses all registers *except* the one in R3. */
8474 if ((unsigned)i
!= (gr_values
[regno
].value
& 0xFF))
8476 specs
[count
] = tmpl
;
8477 specs
[count
++].index
= i
;
8483 specs
[count
] = tmpl
;
8484 specs
[count
++].specific
= 0;
8491 specs
[count
] = tmpl
;
8492 specs
[count
++].specific
= 0;
8496 case IA64_RS_PMC
: /* four or more registers */
8499 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMC_R3
8500 || (!rsrc_write
&& idesc
->operands
[1] == IA64_OPND_PMD_R3
))
8503 int index
= ((idesc
->operands
[1] == IA64_OPND_R3
&& !rsrc_write
)
8505 int regno
= CURR_SLOT
.opnd
[index
].X_add_number
- REG_GR
;
8506 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8509 specs
[count
] = tmpl
;
8510 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8514 specs
[count
] = tmpl
;
8515 specs
[count
++].specific
= 0;
8525 case IA64_RS_PMD
: /* four or more registers */
8528 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PMD_R3
)
8530 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8531 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8534 specs
[count
] = tmpl
;
8535 specs
[count
++].index
= gr_values
[regno
].value
& 0xFF;
8539 specs
[count
] = tmpl
;
8540 specs
[count
++].specific
= 0;
8550 case IA64_RS_RR
: /* eight registers */
8553 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_RR_R3
)
8555 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_GR
;
8556 if (regno
>= 0 && regno
< NELEMS (gr_values
)
8559 specs
[count
] = tmpl
;
8560 specs
[count
++].index
= (gr_values
[regno
].value
>> 61) & 0x7;
8564 specs
[count
] = tmpl
;
8565 specs
[count
++].specific
= 0;
8569 else if (note
== 0 && !rsrc_write
)
8571 specs
[count
] = tmpl
;
8572 specs
[count
++].specific
= 0;
8580 case IA64_RS_CR_IRR
:
8583 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8584 int regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
;
8586 && idesc
->operands
[1] == IA64_OPND_CR3
8589 for (i
= 0; i
< 4; i
++)
8591 specs
[count
] = tmpl
;
8592 specs
[count
++].index
= CR_IRR0
+ i
;
8598 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8599 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8601 && regno
<= CR_IRR3
)
8603 specs
[count
] = tmpl
;
8604 specs
[count
++].index
= regno
;
8613 case IA64_RS_CR_LRR
:
8620 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8621 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
8622 && (regno
== CR_LRR0
|| regno
== CR_LRR1
))
8624 specs
[count
] = tmpl
;
8625 specs
[count
++].index
= regno
;
8633 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
8635 specs
[count
] = tmpl
;
8636 specs
[count
++].index
=
8637 CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
8652 else if (rsrc_write
)
8654 if (dep
->specifier
== IA64_RS_FRb
8655 && idesc
->operands
[0] == IA64_OPND_F1
)
8657 specs
[count
] = tmpl
;
8658 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_FR
;
8663 for (i
= idesc
->num_outputs
; i
< NELEMS (idesc
->operands
); i
++)
8665 if (idesc
->operands
[i
] == IA64_OPND_F2
8666 || idesc
->operands
[i
] == IA64_OPND_F3
8667 || idesc
->operands
[i
] == IA64_OPND_F4
)
8669 specs
[count
] = tmpl
;
8670 specs
[count
++].index
=
8671 CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
8680 /* This reference applies only to the GR whose value is loaded with
8681 data returned from memory. */
8682 specs
[count
] = tmpl
;
8683 specs
[count
++].index
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
8689 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8690 if (idesc
->operands
[i
] == IA64_OPND_R1
8691 || idesc
->operands
[i
] == IA64_OPND_R2
8692 || idesc
->operands
[i
] == IA64_OPND_R3
)
8694 specs
[count
] = tmpl
;
8695 specs
[count
++].index
=
8696 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8698 if (idesc
->flags
& IA64_OPCODE_POSTINC
)
8699 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8700 if (idesc
->operands
[i
] == IA64_OPND_MR3
)
8702 specs
[count
] = tmpl
;
8703 specs
[count
++].index
=
8704 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8709 /* Look for anything that reads a GR. */
8710 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
8712 if (idesc
->operands
[i
] == IA64_OPND_MR3
8713 || idesc
->operands
[i
] == IA64_OPND_CPUID_R3
8714 || idesc
->operands
[i
] == IA64_OPND_DBR_R3
8715 || idesc
->operands
[i
] == IA64_OPND_IBR_R3
8716 || idesc
->operands
[i
] == IA64_OPND_MSR_R3
8717 || idesc
->operands
[i
] == IA64_OPND_PKR_R3
8718 || idesc
->operands
[i
] == IA64_OPND_PMC_R3
8719 || idesc
->operands
[i
] == IA64_OPND_PMD_R3
8720 || idesc
->operands
[i
] == IA64_OPND_RR_R3
8721 || ((i
>= idesc
->num_outputs
)
8722 && (idesc
->operands
[i
] == IA64_OPND_R1
8723 || idesc
->operands
[i
] == IA64_OPND_R2
8724 || idesc
->operands
[i
] == IA64_OPND_R3
8725 /* addl source register. */
8726 || idesc
->operands
[i
] == IA64_OPND_R3_2
)))
8728 specs
[count
] = tmpl
;
8729 specs
[count
++].index
=
8730 CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
8741 /* This is the same as IA64_RS_PRr, except that the register range is
8742 from 1 - 15, and there are no rotating register reads/writes here. */
8746 for (i
= 1; i
< 16; i
++)
8748 specs
[count
] = tmpl
;
8749 specs
[count
++].index
= i
;
8755 /* Mark only those registers indicated by the mask. */
8758 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8759 for (i
= 1; i
< 16; i
++)
8760 if (mask
& ((valueT
) 1 << i
))
8762 specs
[count
] = tmpl
;
8763 specs
[count
++].index
= i
;
8771 else if (note
== 11) /* note 11 implies note 1 as well */
8775 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8777 if (idesc
->operands
[i
] == IA64_OPND_P1
8778 || idesc
->operands
[i
] == IA64_OPND_P2
)
8780 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8781 if (regno
>= 1 && regno
< 16)
8783 specs
[count
] = tmpl
;
8784 specs
[count
++].index
= regno
;
8794 else if (note
== 12)
8796 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8798 specs
[count
] = tmpl
;
8799 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8806 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8807 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8808 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8809 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8811 if ((idesc
->operands
[0] == IA64_OPND_P1
8812 || idesc
->operands
[0] == IA64_OPND_P2
)
8813 && p1
>= 1 && p1
< 16)
8815 specs
[count
] = tmpl
;
8816 specs
[count
].cmp_type
=
8817 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8818 specs
[count
++].index
= p1
;
8820 if ((idesc
->operands
[1] == IA64_OPND_P1
8821 || idesc
->operands
[1] == IA64_OPND_P2
)
8822 && p2
>= 1 && p2
< 16)
8824 specs
[count
] = tmpl
;
8825 specs
[count
].cmp_type
=
8826 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8827 specs
[count
++].index
= p2
;
8832 if (CURR_SLOT
.qp_regno
>= 1 && CURR_SLOT
.qp_regno
< 16)
8834 specs
[count
] = tmpl
;
8835 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8837 if (idesc
->operands
[1] == IA64_OPND_PR
)
8839 for (i
= 1; i
< 16; i
++)
8841 specs
[count
] = tmpl
;
8842 specs
[count
++].index
= i
;
8853 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8854 simplified cases of this. */
8858 for (i
= 16; i
< 63; i
++)
8860 specs
[count
] = tmpl
;
8861 specs
[count
++].index
= i
;
8867 /* Mark only those registers indicated by the mask. */
8869 && idesc
->operands
[0] == IA64_OPND_PR
)
8871 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
8872 if (mask
& ((valueT
) 1 << 16))
8873 for (i
= 16; i
< 63; i
++)
8875 specs
[count
] = tmpl
;
8876 specs
[count
++].index
= i
;
8880 && idesc
->operands
[0] == IA64_OPND_PR_ROT
)
8882 for (i
= 16; i
< 63; i
++)
8884 specs
[count
] = tmpl
;
8885 specs
[count
++].index
= i
;
8893 else if (note
== 11) /* note 11 implies note 1 as well */
8897 for (i
= 0; i
< idesc
->num_outputs
; i
++)
8899 if (idesc
->operands
[i
] == IA64_OPND_P1
8900 || idesc
->operands
[i
] == IA64_OPND_P2
)
8902 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
8903 if (regno
>= 16 && regno
< 63)
8905 specs
[count
] = tmpl
;
8906 specs
[count
++].index
= regno
;
8916 else if (note
== 12)
8918 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8920 specs
[count
] = tmpl
;
8921 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8928 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
8929 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
8930 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
8931 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
8933 if ((idesc
->operands
[0] == IA64_OPND_P1
8934 || idesc
->operands
[0] == IA64_OPND_P2
)
8935 && p1
>= 16 && p1
< 63)
8937 specs
[count
] = tmpl
;
8938 specs
[count
].cmp_type
=
8939 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
8940 specs
[count
++].index
= p1
;
8942 if ((idesc
->operands
[1] == IA64_OPND_P1
8943 || idesc
->operands
[1] == IA64_OPND_P2
)
8944 && p2
>= 16 && p2
< 63)
8946 specs
[count
] = tmpl
;
8947 specs
[count
].cmp_type
=
8948 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
8949 specs
[count
++].index
= p2
;
8954 if (CURR_SLOT
.qp_regno
>= 16 && CURR_SLOT
.qp_regno
< 63)
8956 specs
[count
] = tmpl
;
8957 specs
[count
++].index
= CURR_SLOT
.qp_regno
;
8959 if (idesc
->operands
[1] == IA64_OPND_PR
)
8961 for (i
= 16; i
< 63; i
++)
8963 specs
[count
] = tmpl
;
8964 specs
[count
++].index
= i
;
8976 /* Verify that the instruction is using the PSR bit indicated in
8980 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_UM
)
8982 if (dep
->regindex
< 6)
8984 specs
[count
++] = tmpl
;
8987 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR
)
8989 if (dep
->regindex
< 32
8990 || dep
->regindex
== 35
8991 || dep
->regindex
== 36
8992 || (!rsrc_write
&& dep
->regindex
== PSR_CPL
))
8994 specs
[count
++] = tmpl
;
8997 else if (idesc
->operands
[!rsrc_write
] == IA64_OPND_PSR_L
)
8999 if (dep
->regindex
< 32
9000 || dep
->regindex
== 35
9001 || dep
->regindex
== 36
9002 || (rsrc_write
&& dep
->regindex
== PSR_CPL
))
9004 specs
[count
++] = tmpl
;
9009 /* Several PSR bits have very specific dependencies. */
9010 switch (dep
->regindex
)
9013 specs
[count
++] = tmpl
;
9018 specs
[count
++] = tmpl
;
9022 /* Only certain CR accesses use PSR.ic */
9023 if (idesc
->operands
[0] == IA64_OPND_CR3
9024 || idesc
->operands
[1] == IA64_OPND_CR3
)
9027 ((idesc
->operands
[0] == IA64_OPND_CR3
)
9030 CURR_SLOT
.opnd
[index
].X_add_number
- REG_CR
;
9045 specs
[count
++] = tmpl
;
9054 specs
[count
++] = tmpl
;
9058 /* Only some AR accesses use cpl */
9059 if (idesc
->operands
[0] == IA64_OPND_AR3
9060 || idesc
->operands
[1] == IA64_OPND_AR3
)
9063 ((idesc
->operands
[0] == IA64_OPND_AR3
)
9066 CURR_SLOT
.opnd
[index
].X_add_number
- REG_AR
;
9073 && regno
<= AR_K7
))))
9075 specs
[count
++] = tmpl
;
9080 specs
[count
++] = tmpl
;
9090 if (idesc
->operands
[0] == IA64_OPND_IMMU24
)
9092 mask
= CURR_SLOT
.opnd
[0].X_add_number
;
9098 if (mask
& ((valueT
) 1 << dep
->regindex
))
9100 specs
[count
++] = tmpl
;
9105 int min
= dep
->regindex
== PSR_DFL
? 2 : 32;
9106 int max
= dep
->regindex
== PSR_DFL
? 31 : 127;
9107 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9108 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9110 if (idesc
->operands
[i
] == IA64_OPND_F1
9111 || idesc
->operands
[i
] == IA64_OPND_F2
9112 || idesc
->operands
[i
] == IA64_OPND_F3
9113 || idesc
->operands
[i
] == IA64_OPND_F4
)
9115 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9116 if (reg
>= min
&& reg
<= max
)
9118 specs
[count
++] = tmpl
;
9125 int min
= dep
->regindex
== PSR_MFL
? 2 : 32;
9126 int max
= dep
->regindex
== PSR_MFL
? 31 : 127;
9127 /* mfh is read on writes to FR32-127; mfl is read on writes to
9129 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9131 if (idesc
->operands
[i
] == IA64_OPND_F1
)
9133 int reg
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9134 if (reg
>= min
&& reg
<= max
)
9136 specs
[count
++] = tmpl
;
9141 else if (note
== 10)
9143 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9145 if (idesc
->operands
[i
] == IA64_OPND_R1
9146 || idesc
->operands
[i
] == IA64_OPND_R2
9147 || idesc
->operands
[i
] == IA64_OPND_R3
)
9149 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9150 if (regno
>= 16 && regno
<= 31)
9152 specs
[count
++] = tmpl
;
9163 case IA64_RS_AR_FPSR
:
9164 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
)
9166 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9167 if (regno
== AR_FPSR
)
9169 specs
[count
++] = tmpl
;
9174 specs
[count
++] = tmpl
;
9179 /* Handle all AR[REG] resources */
9180 if (note
== 0 || note
== 1)
9182 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_AR
;
9183 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_AR3
9184 && regno
== dep
->regindex
)
9186 specs
[count
++] = tmpl
;
9188 /* other AR[REG] resources may be affected by AR accesses */
9189 else if (idesc
->operands
[0] == IA64_OPND_AR3
)
9192 regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
;
9193 switch (dep
->regindex
)
9199 if (regno
== AR_BSPSTORE
)
9201 specs
[count
++] = tmpl
;
9205 (regno
== AR_BSPSTORE
9206 || regno
== AR_RNAT
))
9208 specs
[count
++] = tmpl
;
9213 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9216 regno
= CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
;
9217 switch (dep
->regindex
)
9222 if (regno
== AR_BSPSTORE
|| regno
== AR_RNAT
)
9224 specs
[count
++] = tmpl
;
9231 specs
[count
++] = tmpl
;
9241 /* Handle all CR[REG] resources */
9242 if (note
== 0 || note
== 1)
9244 if (idesc
->operands
[!rsrc_write
] == IA64_OPND_CR3
)
9246 int regno
= CURR_SLOT
.opnd
[!rsrc_write
].X_add_number
- REG_CR
;
9247 if (regno
== dep
->regindex
)
9249 specs
[count
++] = tmpl
;
9251 else if (!rsrc_write
)
9253 /* Reads from CR[IVR] affect other resources. */
9254 if (regno
== CR_IVR
)
9256 if ((dep
->regindex
>= CR_IRR0
9257 && dep
->regindex
<= CR_IRR3
)
9258 || dep
->regindex
== CR_TPR
)
9260 specs
[count
++] = tmpl
;
9267 specs
[count
++] = tmpl
;
9276 case IA64_RS_INSERVICE
:
9277 /* look for write of EOI (67) or read of IVR (65) */
9278 if ((idesc
->operands
[0] == IA64_OPND_CR3
9279 && CURR_SLOT
.opnd
[0].X_add_number
- REG_CR
== CR_EOI
)
9280 || (idesc
->operands
[1] == IA64_OPND_CR3
9281 && CURR_SLOT
.opnd
[1].X_add_number
- REG_CR
== CR_IVR
))
9283 specs
[count
++] = tmpl
;
9290 specs
[count
++] = tmpl
;
9301 specs
[count
++] = tmpl
;
9305 /* Check if any of the registers accessed are in the rotating region.
9306 mov to/from pr accesses CFM only when qp_regno is in the rotating
9308 for (i
= 0; i
< NELEMS (idesc
->operands
); i
++)
9310 if (idesc
->operands
[i
] == IA64_OPND_R1
9311 || idesc
->operands
[i
] == IA64_OPND_R2
9312 || idesc
->operands
[i
] == IA64_OPND_R3
)
9314 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9315 /* Assumes that md.rot.num_regs is always valid */
9316 if (md
.rot
.num_regs
> 0
9318 && num
< 31 + md
.rot
.num_regs
)
9320 specs
[count
] = tmpl
;
9321 specs
[count
++].specific
= 0;
9324 else if (idesc
->operands
[i
] == IA64_OPND_F1
9325 || idesc
->operands
[i
] == IA64_OPND_F2
9326 || idesc
->operands
[i
] == IA64_OPND_F3
9327 || idesc
->operands
[i
] == IA64_OPND_F4
)
9329 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_FR
;
9332 specs
[count
] = tmpl
;
9333 specs
[count
++].specific
= 0;
9336 else if (idesc
->operands
[i
] == IA64_OPND_P1
9337 || idesc
->operands
[i
] == IA64_OPND_P2
)
9339 int num
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9342 specs
[count
] = tmpl
;
9343 specs
[count
++].specific
= 0;
9347 if (CURR_SLOT
.qp_regno
> 15)
9349 specs
[count
] = tmpl
;
9350 specs
[count
++].specific
= 0;
9355 /* This is the same as IA64_RS_PRr, except simplified to account for
9356 the fact that there is only one register. */
9360 specs
[count
++] = tmpl
;
9365 if (idesc
->operands
[2] == IA64_OPND_IMM17
)
9366 mask
= CURR_SLOT
.opnd
[2].X_add_number
;
9367 if (mask
& ((valueT
) 1 << 63))
9368 specs
[count
++] = tmpl
;
9370 else if (note
== 11)
9372 if ((idesc
->operands
[0] == IA64_OPND_P1
9373 && CURR_SLOT
.opnd
[0].X_add_number
- REG_P
== 63)
9374 || (idesc
->operands
[1] == IA64_OPND_P2
9375 && CURR_SLOT
.opnd
[1].X_add_number
- REG_P
== 63))
9377 specs
[count
++] = tmpl
;
9380 else if (note
== 12)
9382 if (CURR_SLOT
.qp_regno
== 63)
9384 specs
[count
++] = tmpl
;
9391 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9392 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9393 int or_andcm
= strstr (idesc
->name
, "or.andcm") != NULL
;
9394 int and_orcm
= strstr (idesc
->name
, "and.orcm") != NULL
;
9397 && (idesc
->operands
[0] == IA64_OPND_P1
9398 || idesc
->operands
[0] == IA64_OPND_P2
))
9400 specs
[count
] = tmpl
;
9401 specs
[count
++].cmp_type
=
9402 (or_andcm
? CMP_OR
: (and_orcm
? CMP_AND
: CMP_NONE
));
9405 && (idesc
->operands
[1] == IA64_OPND_P1
9406 || idesc
->operands
[1] == IA64_OPND_P2
))
9408 specs
[count
] = tmpl
;
9409 specs
[count
++].cmp_type
=
9410 (or_andcm
? CMP_AND
: (and_orcm
? CMP_OR
: CMP_NONE
));
9415 if (CURR_SLOT
.qp_regno
== 63)
9417 specs
[count
++] = tmpl
;
9428 /* FIXME we can identify some individual RSE written resources, but RSE
9429 read resources have not yet been completely identified, so for now
9430 treat RSE as a single resource */
9431 if (strncmp (idesc
->name
, "mov", 3) == 0)
9435 if (idesc
->operands
[0] == IA64_OPND_AR3
9436 && CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
)
9438 specs
[count
++] = tmpl
;
9443 if (idesc
->operands
[0] == IA64_OPND_AR3
)
9445 if (CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_BSPSTORE
9446 || CURR_SLOT
.opnd
[0].X_add_number
- REG_AR
== AR_RNAT
)
9448 specs
[count
++] = tmpl
;
9451 else if (idesc
->operands
[1] == IA64_OPND_AR3
)
9453 if (CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSP
9454 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_BSPSTORE
9455 || CURR_SLOT
.opnd
[1].X_add_number
- REG_AR
== AR_RNAT
)
9457 specs
[count
++] = tmpl
;
9464 specs
[count
++] = tmpl
;
9469 /* FIXME -- do any of these need to be non-specific? */
9470 specs
[count
++] = tmpl
;
9474 as_bad (_("Unrecognized dependency specifier %d\n"), dep
->specifier
);
9481 /* Clear branch flags on marked resources. This breaks the link between the
9482 QP of the marking instruction and a subsequent branch on the same QP. */
9485 clear_qp_branch_flag (mask
)
9489 for (i
= 0; i
< regdepslen
; i
++)
9491 valueT bit
= ((valueT
) 1 << regdeps
[i
].qp_regno
);
9492 if ((bit
& mask
) != 0)
9494 regdeps
[i
].link_to_qp_branch
= 0;
9499 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9500 any mutexes which contain one of the PRs and create new ones when
9504 update_qp_mutex (valueT mask
)
9510 while (i
< qp_mutexeslen
)
9512 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9514 /* If it destroys and creates the same mutex, do nothing. */
9515 if (qp_mutexes
[i
].prmask
== mask
9516 && qp_mutexes
[i
].path
== md
.path
)
9527 fprintf (stderr
, " Clearing mutex relation");
9528 print_prmask (qp_mutexes
[i
].prmask
);
9529 fprintf (stderr
, "\n");
9532 /* Deal with the old mutex with more than 3+ PRs only if
9533 the new mutex on the same execution path with it.
9535 FIXME: The 3+ mutex support is incomplete.
9536 dot_pred_rel () may be a better place to fix it. */
9537 if (qp_mutexes
[i
].path
== md
.path
)
9539 /* If it is a proper subset of the mutex, create a
9542 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9545 qp_mutexes
[i
].prmask
&= ~mask
;
9546 if (qp_mutexes
[i
].prmask
& (qp_mutexes
[i
].prmask
- 1))
9548 /* Modify the mutex if there are more than one
9556 /* Remove the mutex. */
9557 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9565 add_qp_mutex (mask
);
9570 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9572 Any changes to a PR clears the mutex relations which include that PR. */
9575 clear_qp_mutex (mask
)
9581 while (i
< qp_mutexeslen
)
9583 if ((qp_mutexes
[i
].prmask
& mask
) != 0)
9587 fprintf (stderr
, " Clearing mutex relation");
9588 print_prmask (qp_mutexes
[i
].prmask
);
9589 fprintf (stderr
, "\n");
9591 qp_mutexes
[i
] = qp_mutexes
[--qp_mutexeslen
];
9598 /* Clear implies relations which contain PRs in the given masks.
9599 P1_MASK indicates the source of the implies relation, while P2_MASK
9600 indicates the implied PR. */
9603 clear_qp_implies (p1_mask
, p2_mask
)
9610 while (i
< qp_implieslen
)
9612 if ((((valueT
) 1 << qp_implies
[i
].p1
) & p1_mask
) != 0
9613 || (((valueT
) 1 << qp_implies
[i
].p2
) & p2_mask
) != 0)
9616 fprintf (stderr
, "Clearing implied relation PR%d->PR%d\n",
9617 qp_implies
[i
].p1
, qp_implies
[i
].p2
);
9618 qp_implies
[i
] = qp_implies
[--qp_implieslen
];
9625 /* Add the PRs specified to the list of implied relations. */
9628 add_qp_imply (p1
, p2
)
9635 /* p0 is not meaningful here. */
9636 if (p1
== 0 || p2
== 0)
9642 /* If it exists already, ignore it. */
9643 for (i
= 0; i
< qp_implieslen
; i
++)
9645 if (qp_implies
[i
].p1
== p1
9646 && qp_implies
[i
].p2
== p2
9647 && qp_implies
[i
].path
== md
.path
9648 && !qp_implies
[i
].p2_branched
)
9652 if (qp_implieslen
== qp_impliestotlen
)
9654 qp_impliestotlen
+= 20;
9655 qp_implies
= (struct qp_imply
*)
9656 xrealloc ((void *) qp_implies
,
9657 qp_impliestotlen
* sizeof (struct qp_imply
));
9660 fprintf (stderr
, " Registering PR%d implies PR%d\n", p1
, p2
);
9661 qp_implies
[qp_implieslen
].p1
= p1
;
9662 qp_implies
[qp_implieslen
].p2
= p2
;
9663 qp_implies
[qp_implieslen
].path
= md
.path
;
9664 qp_implies
[qp_implieslen
++].p2_branched
= 0;
9666 /* Add in the implied transitive relations; for everything that p2 implies,
9667 make p1 imply that, too; for everything that implies p1, make it imply p2
9669 for (i
= 0; i
< qp_implieslen
; i
++)
9671 if (qp_implies
[i
].p1
== p2
)
9672 add_qp_imply (p1
, qp_implies
[i
].p2
);
9673 if (qp_implies
[i
].p2
== p1
)
9674 add_qp_imply (qp_implies
[i
].p1
, p2
);
9676 /* Add in mutex relations implied by this implies relation; for each mutex
9677 relation containing p2, duplicate it and replace p2 with p1. */
9678 bit
= (valueT
) 1 << p1
;
9679 mask
= (valueT
) 1 << p2
;
9680 for (i
= 0; i
< qp_mutexeslen
; i
++)
9682 if (qp_mutexes
[i
].prmask
& mask
)
9683 add_qp_mutex ((qp_mutexes
[i
].prmask
& ~mask
) | bit
);
9687 /* Add the PRs specified in the mask to the mutex list; this means that only
9688 one of the PRs can be true at any time. PR0 should never be included in
9698 if (qp_mutexeslen
== qp_mutexestotlen
)
9700 qp_mutexestotlen
+= 20;
9701 qp_mutexes
= (struct qpmutex
*)
9702 xrealloc ((void *) qp_mutexes
,
9703 qp_mutexestotlen
* sizeof (struct qpmutex
));
9707 fprintf (stderr
, " Registering mutex on");
9708 print_prmask (mask
);
9709 fprintf (stderr
, "\n");
9711 qp_mutexes
[qp_mutexeslen
].path
= md
.path
;
9712 qp_mutexes
[qp_mutexeslen
++].prmask
= mask
;
9716 has_suffix_p (name
, suffix
)
9720 size_t namelen
= strlen (name
);
9721 size_t sufflen
= strlen (suffix
);
9723 if (namelen
<= sufflen
)
9725 return strcmp (name
+ namelen
- sufflen
, suffix
) == 0;
9729 clear_register_values ()
9733 fprintf (stderr
, " Clearing register values\n");
9734 for (i
= 1; i
< NELEMS (gr_values
); i
++)
9735 gr_values
[i
].known
= 0;
9738 /* Keep track of register values/changes which affect DV tracking.
9740 optimization note: should add a flag to classes of insns where otherwise we
9741 have to examine a group of strings to identify them. */
9744 note_register_values (idesc
)
9745 struct ia64_opcode
*idesc
;
9747 valueT qp_changemask
= 0;
9750 /* Invalidate values for registers being written to. */
9751 for (i
= 0; i
< idesc
->num_outputs
; i
++)
9753 if (idesc
->operands
[i
] == IA64_OPND_R1
9754 || idesc
->operands
[i
] == IA64_OPND_R2
9755 || idesc
->operands
[i
] == IA64_OPND_R3
)
9757 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9758 if (regno
> 0 && regno
< NELEMS (gr_values
))
9759 gr_values
[regno
].known
= 0;
9761 else if (idesc
->operands
[i
] == IA64_OPND_R3_2
)
9763 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_GR
;
9764 if (regno
> 0 && regno
< 4)
9765 gr_values
[regno
].known
= 0;
9767 else if (idesc
->operands
[i
] == IA64_OPND_P1
9768 || idesc
->operands
[i
] == IA64_OPND_P2
)
9770 int regno
= CURR_SLOT
.opnd
[i
].X_add_number
- REG_P
;
9771 qp_changemask
|= (valueT
) 1 << regno
;
9773 else if (idesc
->operands
[i
] == IA64_OPND_PR
)
9775 if (idesc
->operands
[2] & (valueT
) 0x10000)
9776 qp_changemask
= ~(valueT
) 0x1FFFF | idesc
->operands
[2];
9778 qp_changemask
= idesc
->operands
[2];
9781 else if (idesc
->operands
[i
] == IA64_OPND_PR_ROT
)
9783 if (idesc
->operands
[1] & ((valueT
) 1 << 43))
9784 qp_changemask
= -((valueT
) 1 << 44) | idesc
->operands
[1];
9786 qp_changemask
= idesc
->operands
[1];
9787 qp_changemask
&= ~(valueT
) 0xFFFF;
9792 /* Always clear qp branch flags on any PR change. */
9793 /* FIXME there may be exceptions for certain compares. */
9794 clear_qp_branch_flag (qp_changemask
);
9796 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9797 if (idesc
->flags
& IA64_OPCODE_MOD_RRBS
)
9799 qp_changemask
|= ~(valueT
) 0xFFFF;
9800 if (strcmp (idesc
->name
, "clrrrb.pr") != 0)
9802 for (i
= 32; i
< 32 + md
.rot
.num_regs
; i
++)
9803 gr_values
[i
].known
= 0;
9805 clear_qp_mutex (qp_changemask
);
9806 clear_qp_implies (qp_changemask
, qp_changemask
);
9808 /* After a call, all register values are undefined, except those marked
9810 else if (strncmp (idesc
->name
, "br.call", 6) == 0
9811 || strncmp (idesc
->name
, "brl.call", 7) == 0)
9813 /* FIXME keep GR values which are marked as "safe_across_calls" */
9814 clear_register_values ();
9815 clear_qp_mutex (~qp_safe_across_calls
);
9816 clear_qp_implies (~qp_safe_across_calls
, ~qp_safe_across_calls
);
9817 clear_qp_branch_flag (~qp_safe_across_calls
);
9819 else if (is_interruption_or_rfi (idesc
)
9820 || is_taken_branch (idesc
))
9822 clear_register_values ();
9823 clear_qp_mutex (~(valueT
) 0);
9824 clear_qp_implies (~(valueT
) 0, ~(valueT
) 0);
9826 /* Look for mutex and implies relations. */
9827 else if ((idesc
->operands
[0] == IA64_OPND_P1
9828 || idesc
->operands
[0] == IA64_OPND_P2
)
9829 && (idesc
->operands
[1] == IA64_OPND_P1
9830 || idesc
->operands
[1] == IA64_OPND_P2
))
9832 int p1
= CURR_SLOT
.opnd
[0].X_add_number
- REG_P
;
9833 int p2
= CURR_SLOT
.opnd
[1].X_add_number
- REG_P
;
9834 valueT p1mask
= (p1
!= 0) ? (valueT
) 1 << p1
: 0;
9835 valueT p2mask
= (p2
!= 0) ? (valueT
) 1 << p2
: 0;
9837 /* If both PRs are PR0, we can't really do anything. */
9838 if (p1
== 0 && p2
== 0)
9841 fprintf (stderr
, " Ignoring PRs due to inclusion of p0\n");
9843 /* In general, clear mutexes and implies which include P1 or P2,
9844 with the following exceptions. */
9845 else if (has_suffix_p (idesc
->name
, ".or.andcm")
9846 || has_suffix_p (idesc
->name
, ".and.orcm"))
9848 clear_qp_implies (p2mask
, p1mask
);
9850 else if (has_suffix_p (idesc
->name
, ".andcm")
9851 || has_suffix_p (idesc
->name
, ".and"))
9853 clear_qp_implies (0, p1mask
| p2mask
);
9855 else if (has_suffix_p (idesc
->name
, ".orcm")
9856 || has_suffix_p (idesc
->name
, ".or"))
9858 clear_qp_mutex (p1mask
| p2mask
);
9859 clear_qp_implies (p1mask
| p2mask
, 0);
9865 clear_qp_implies (p1mask
| p2mask
, p1mask
| p2mask
);
9867 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9868 if (p1
== 0 || p2
== 0)
9869 clear_qp_mutex (p1mask
| p2mask
);
9871 added
= update_qp_mutex (p1mask
| p2mask
);
9873 if (CURR_SLOT
.qp_regno
== 0
9874 || has_suffix_p (idesc
->name
, ".unc"))
9876 if (added
== 0 && p1
&& p2
)
9877 add_qp_mutex (p1mask
| p2mask
);
9878 if (CURR_SLOT
.qp_regno
!= 0)
9881 add_qp_imply (p1
, CURR_SLOT
.qp_regno
);
9883 add_qp_imply (p2
, CURR_SLOT
.qp_regno
);
9888 /* Look for mov imm insns into GRs. */
9889 else if (idesc
->operands
[0] == IA64_OPND_R1
9890 && (idesc
->operands
[1] == IA64_OPND_IMM22
9891 || idesc
->operands
[1] == IA64_OPND_IMMU64
)
9892 && CURR_SLOT
.opnd
[1].X_op
== O_constant
9893 && (strcmp (idesc
->name
, "mov") == 0
9894 || strcmp (idesc
->name
, "movl") == 0))
9896 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9897 if (regno
> 0 && regno
< NELEMS (gr_values
))
9899 gr_values
[regno
].known
= 1;
9900 gr_values
[regno
].value
= CURR_SLOT
.opnd
[1].X_add_number
;
9901 gr_values
[regno
].path
= md
.path
;
9904 fprintf (stderr
, " Know gr%d = ", regno
);
9905 fprintf_vma (stderr
, gr_values
[regno
].value
);
9906 fputs ("\n", stderr
);
9910 /* Look for dep.z imm insns. */
9911 else if (idesc
->operands
[0] == IA64_OPND_R1
9912 && idesc
->operands
[1] == IA64_OPND_IMM8
9913 && strcmp (idesc
->name
, "dep.z") == 0)
9915 int regno
= CURR_SLOT
.opnd
[0].X_add_number
- REG_GR
;
9916 if (regno
> 0 && regno
< NELEMS (gr_values
))
9918 valueT value
= CURR_SLOT
.opnd
[1].X_add_number
;
9920 if (CURR_SLOT
.opnd
[3].X_add_number
< 64)
9921 value
&= ((valueT
)1 << CURR_SLOT
.opnd
[3].X_add_number
) - 1;
9922 value
<<= CURR_SLOT
.opnd
[2].X_add_number
;
9923 gr_values
[regno
].known
= 1;
9924 gr_values
[regno
].value
= value
;
9925 gr_values
[regno
].path
= md
.path
;
9928 fprintf (stderr
, " Know gr%d = ", regno
);
9929 fprintf_vma (stderr
, gr_values
[regno
].value
);
9930 fputs ("\n", stderr
);
9936 clear_qp_mutex (qp_changemask
);
9937 clear_qp_implies (qp_changemask
, qp_changemask
);
9941 /* Return whether the given predicate registers are currently mutex. */
9944 qp_mutex (p1
, p2
, path
)
9954 mask
= ((valueT
) 1 << p1
) | (valueT
) 1 << p2
;
9955 for (i
= 0; i
< qp_mutexeslen
; i
++)
9957 if (qp_mutexes
[i
].path
>= path
9958 && (qp_mutexes
[i
].prmask
& mask
) == mask
)
9965 /* Return whether the given resource is in the given insn's list of chks
9966 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9970 resources_match (rs
, idesc
, note
, qp_regno
, path
)
9972 struct ia64_opcode
*idesc
;
9977 struct rsrc specs
[MAX_SPECS
];
9980 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9981 we don't need to check. One exception is note 11, which indicates that
9982 target predicates are written regardless of PR[qp]. */
9983 if (qp_mutex (rs
->qp_regno
, qp_regno
, path
)
9987 count
= specify_resource (rs
->dependency
, idesc
, DV_CHK
, specs
, note
, path
);
9990 /* UNAT checking is a bit more specific than other resources */
9991 if (rs
->dependency
->specifier
== IA64_RS_AR_UNAT
9992 && specs
[count
].mem_offset
.hint
9993 && rs
->mem_offset
.hint
)
9995 if (rs
->mem_offset
.base
== specs
[count
].mem_offset
.base
)
9997 if (((rs
->mem_offset
.offset
>> 3) & 0x3F) ==
9998 ((specs
[count
].mem_offset
.offset
>> 3) & 0x3F))
10005 /* Skip apparent PR write conflicts where both writes are an AND or both
10006 writes are an OR. */
10007 if (rs
->dependency
->specifier
== IA64_RS_PR
10008 || rs
->dependency
->specifier
== IA64_RS_PRr
10009 || rs
->dependency
->specifier
== IA64_RS_PR63
)
10011 if (specs
[count
].cmp_type
!= CMP_NONE
10012 && specs
[count
].cmp_type
== rs
->cmp_type
)
10015 fprintf (stderr
, " %s on parallel compare allowed (PR%d)\n",
10016 dv_mode
[rs
->dependency
->mode
],
10017 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10018 specs
[count
].index
: 63);
10023 " %s on parallel compare conflict %s vs %s on PR%d\n",
10024 dv_mode
[rs
->dependency
->mode
],
10025 dv_cmp_type
[rs
->cmp_type
],
10026 dv_cmp_type
[specs
[count
].cmp_type
],
10027 rs
->dependency
->specifier
!= IA64_RS_PR63
?
10028 specs
[count
].index
: 63);
10032 /* If either resource is not specific, conservatively assume a conflict
10034 if (!specs
[count
].specific
|| !rs
->specific
)
10036 else if (specs
[count
].index
== rs
->index
)
10043 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10044 insert a stop to create the break. Update all resource dependencies
10045 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10046 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10047 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10051 insn_group_break (insert_stop
, qp_regno
, save_current
)
10058 if (insert_stop
&& md
.num_slots_in_use
> 0)
10059 PREV_SLOT
.end_of_insn_group
= 1;
10063 fprintf (stderr
, " Insn group break%s",
10064 (insert_stop
? " (w/stop)" : ""));
10066 fprintf (stderr
, " effective for QP=%d", qp_regno
);
10067 fprintf (stderr
, "\n");
10071 while (i
< regdepslen
)
10073 const struct ia64_dependency
*dep
= regdeps
[i
].dependency
;
10076 && regdeps
[i
].qp_regno
!= qp_regno
)
10083 && CURR_SLOT
.src_file
== regdeps
[i
].file
10084 && CURR_SLOT
.src_line
== regdeps
[i
].line
)
10090 /* clear dependencies which are automatically cleared by a stop, or
10091 those that have reached the appropriate state of insn serialization */
10092 if (dep
->semantics
== IA64_DVS_IMPLIED
10093 || dep
->semantics
== IA64_DVS_IMPLIEDF
10094 || regdeps
[i
].insn_srlz
== STATE_SRLZ
)
10096 print_dependency ("Removing", i
);
10097 regdeps
[i
] = regdeps
[--regdepslen
];
10101 if (dep
->semantics
== IA64_DVS_DATA
10102 || dep
->semantics
== IA64_DVS_INSTR
10103 || dep
->semantics
== IA64_DVS_SPECIFIC
)
10105 if (regdeps
[i
].insn_srlz
== STATE_NONE
)
10106 regdeps
[i
].insn_srlz
= STATE_STOP
;
10107 if (regdeps
[i
].data_srlz
== STATE_NONE
)
10108 regdeps
[i
].data_srlz
= STATE_STOP
;
10115 /* Add the given resource usage spec to the list of active dependencies. */
10118 mark_resource (idesc
, dep
, spec
, depind
, path
)
10119 struct ia64_opcode
*idesc ATTRIBUTE_UNUSED
;
10120 const struct ia64_dependency
*dep ATTRIBUTE_UNUSED
;
10125 if (regdepslen
== regdepstotlen
)
10127 regdepstotlen
+= 20;
10128 regdeps
= (struct rsrc
*)
10129 xrealloc ((void *) regdeps
,
10130 regdepstotlen
* sizeof (struct rsrc
));
10133 regdeps
[regdepslen
] = *spec
;
10134 regdeps
[regdepslen
].depind
= depind
;
10135 regdeps
[regdepslen
].path
= path
;
10136 regdeps
[regdepslen
].file
= CURR_SLOT
.src_file
;
10137 regdeps
[regdepslen
].line
= CURR_SLOT
.src_line
;
10139 print_dependency ("Adding", regdepslen
);
10145 print_dependency (action
, depind
)
10146 const char *action
;
10151 fprintf (stderr
, " %s %s '%s'",
10152 action
, dv_mode
[(regdeps
[depind
].dependency
)->mode
],
10153 (regdeps
[depind
].dependency
)->name
);
10154 if (regdeps
[depind
].specific
&& regdeps
[depind
].index
>= 0)
10155 fprintf (stderr
, " (%d)", regdeps
[depind
].index
);
10156 if (regdeps
[depind
].mem_offset
.hint
)
10158 fputs (" ", stderr
);
10159 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.base
);
10160 fputs ("+", stderr
);
10161 fprintf_vma (stderr
, regdeps
[depind
].mem_offset
.offset
);
10163 fprintf (stderr
, "\n");
10168 instruction_serialization ()
10172 fprintf (stderr
, " Instruction serialization\n");
10173 for (i
= 0; i
< regdepslen
; i
++)
10174 if (regdeps
[i
].insn_srlz
== STATE_STOP
)
10175 regdeps
[i
].insn_srlz
= STATE_SRLZ
;
10179 data_serialization ()
10183 fprintf (stderr
, " Data serialization\n");
10184 while (i
< regdepslen
)
10186 if (regdeps
[i
].data_srlz
== STATE_STOP
10187 /* Note: as of 991210, all "other" dependencies are cleared by a
10188 data serialization. This might change with new tables */
10189 || (regdeps
[i
].dependency
)->semantics
== IA64_DVS_OTHER
)
10191 print_dependency ("Removing", i
);
10192 regdeps
[i
] = regdeps
[--regdepslen
];
10199 /* Insert stops and serializations as needed to avoid DVs. */
10202 remove_marked_resource (rs
)
10205 switch (rs
->dependency
->semantics
)
10207 case IA64_DVS_SPECIFIC
:
10209 fprintf (stderr
, "Implementation-specific, assume worst case...\n");
10210 /* ...fall through... */
10211 case IA64_DVS_INSTR
:
10213 fprintf (stderr
, "Inserting instr serialization\n");
10214 if (rs
->insn_srlz
< STATE_STOP
)
10215 insn_group_break (1, 0, 0);
10216 if (rs
->insn_srlz
< STATE_SRLZ
)
10218 struct slot oldslot
= CURR_SLOT
;
10219 /* Manually jam a srlz.i insn into the stream */
10220 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10221 CURR_SLOT
.user_template
= -1;
10222 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.i");
10223 instruction_serialization ();
10224 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10225 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10226 emit_one_bundle ();
10227 CURR_SLOT
= oldslot
;
10229 insn_group_break (1, 0, 0);
10231 case IA64_DVS_OTHER
: /* as of rev2 (991220) of the DV tables, all
10232 "other" types of DV are eliminated
10233 by a data serialization */
10234 case IA64_DVS_DATA
:
10236 fprintf (stderr
, "Inserting data serialization\n");
10237 if (rs
->data_srlz
< STATE_STOP
)
10238 insn_group_break (1, 0, 0);
10240 struct slot oldslot
= CURR_SLOT
;
10241 /* Manually jam a srlz.d insn into the stream */
10242 memset (&CURR_SLOT
, 0, sizeof (CURR_SLOT
));
10243 CURR_SLOT
.user_template
= -1;
10244 CURR_SLOT
.idesc
= ia64_find_opcode ("srlz.d");
10245 data_serialization ();
10246 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10247 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10248 emit_one_bundle ();
10249 CURR_SLOT
= oldslot
;
10252 case IA64_DVS_IMPLIED
:
10253 case IA64_DVS_IMPLIEDF
:
10255 fprintf (stderr
, "Inserting stop\n");
10256 insn_group_break (1, 0, 0);
10263 /* Check the resources used by the given opcode against the current dependency
10266 The check is run once for each execution path encountered. In this case,
10267 a unique execution path is the sequence of instructions following a code
10268 entry point, e.g. the following has three execution paths, one starting
10269 at L0, one at L1, and one at L2.
10278 check_dependencies (idesc
)
10279 struct ia64_opcode
*idesc
;
10281 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10285 /* Note that the number of marked resources may change within the
10286 loop if in auto mode. */
10288 while (i
< regdepslen
)
10290 struct rsrc
*rs
= ®deps
[i
];
10291 const struct ia64_dependency
*dep
= rs
->dependency
;
10294 int start_over
= 0;
10296 if (dep
->semantics
== IA64_DVS_NONE
10297 || (chkind
= depends_on (rs
->depind
, idesc
)) == -1)
10303 note
= NOTE (opdeps
->chks
[chkind
]);
10305 /* Check this resource against each execution path seen thus far. */
10306 for (path
= 0; path
<= md
.path
; path
++)
10310 /* If the dependency wasn't on the path being checked, ignore it. */
10311 if (rs
->path
< path
)
10314 /* If the QP for this insn implies a QP which has branched, don't
10315 bother checking. Ed. NOTE: I don't think this check is terribly
10316 useful; what's the point of generating code which will only be
10317 reached if its QP is zero?
10318 This code was specifically inserted to handle the following code,
10319 based on notes from Intel's DV checking code, where p1 implies p2.
10325 if (CURR_SLOT
.qp_regno
!= 0)
10329 for (implies
= 0; implies
< qp_implieslen
; implies
++)
10331 if (qp_implies
[implies
].path
>= path
10332 && qp_implies
[implies
].p1
== CURR_SLOT
.qp_regno
10333 && qp_implies
[implies
].p2_branched
)
10343 if ((matchtype
= resources_match (rs
, idesc
, note
,
10344 CURR_SLOT
.qp_regno
, path
)) != 0)
10347 char pathmsg
[256] = "";
10348 char indexmsg
[256] = "";
10349 int certain
= (matchtype
== 1 && CURR_SLOT
.qp_regno
== 0);
10352 sprintf (pathmsg
, " when entry is at label '%s'",
10353 md
.entry_labels
[path
- 1]);
10354 if (matchtype
== 1 && rs
->index
>= 0)
10355 sprintf (indexmsg
, ", specific resource number is %d",
10357 sprintf (msg
, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10359 (certain
? "violates" : "may violate"),
10360 dv_mode
[dep
->mode
], dep
->name
,
10361 dv_sem
[dep
->semantics
],
10362 pathmsg
, indexmsg
);
10364 if (md
.explicit_mode
)
10366 as_warn ("%s", msg
);
10367 if (path
< md
.path
)
10368 as_warn (_("Only the first path encountering the conflict "
10370 as_warn_where (rs
->file
, rs
->line
,
10371 _("This is the location of the "
10372 "conflicting usage"));
10373 /* Don't bother checking other paths, to avoid duplicating
10374 the same warning */
10380 fprintf (stderr
, "%s @ %s:%d\n", msg
, rs
->file
, rs
->line
);
10382 remove_marked_resource (rs
);
10384 /* since the set of dependencies has changed, start over */
10385 /* FIXME -- since we're removing dvs as we go, we
10386 probably don't really need to start over... */
10399 /* Register new dependencies based on the given opcode. */
10402 mark_resources (idesc
)
10403 struct ia64_opcode
*idesc
;
10406 const struct ia64_opcode_dependency
*opdeps
= idesc
->dependencies
;
10407 int add_only_qp_reads
= 0;
10409 /* A conditional branch only uses its resources if it is taken; if it is
10410 taken, we stop following that path. The other branch types effectively
10411 *always* write their resources. If it's not taken, register only QP
10413 if (is_conditional_branch (idesc
) || is_interruption_or_rfi (idesc
))
10415 add_only_qp_reads
= 1;
10419 fprintf (stderr
, "Registering '%s' resource usage\n", idesc
->name
);
10421 for (i
= 0; i
< opdeps
->nregs
; i
++)
10423 const struct ia64_dependency
*dep
;
10424 struct rsrc specs
[MAX_SPECS
];
10429 dep
= ia64_find_dependency (opdeps
->regs
[i
]);
10430 note
= NOTE (opdeps
->regs
[i
]);
10432 if (add_only_qp_reads
10433 && !(dep
->mode
== IA64_DV_WAR
10434 && (dep
->specifier
== IA64_RS_PR
10435 || dep
->specifier
== IA64_RS_PRr
10436 || dep
->specifier
== IA64_RS_PR63
)))
10439 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, md
.path
);
10441 while (count
-- > 0)
10443 mark_resource (idesc
, dep
, &specs
[count
],
10444 DEP (opdeps
->regs
[i
]), md
.path
);
10447 /* The execution path may affect register values, which may in turn
10448 affect which indirect-access resources are accessed. */
10449 switch (dep
->specifier
)
10453 case IA64_RS_CPUID
:
10461 for (path
= 0; path
< md
.path
; path
++)
10463 count
= specify_resource (dep
, idesc
, DV_REG
, specs
, note
, path
);
10464 while (count
-- > 0)
10465 mark_resource (idesc
, dep
, &specs
[count
],
10466 DEP (opdeps
->regs
[i
]), path
);
10473 /* Remove dependencies when they no longer apply. */
10476 update_dependencies (idesc
)
10477 struct ia64_opcode
*idesc
;
10481 if (strcmp (idesc
->name
, "srlz.i") == 0)
10483 instruction_serialization ();
10485 else if (strcmp (idesc
->name
, "srlz.d") == 0)
10487 data_serialization ();
10489 else if (is_interruption_or_rfi (idesc
)
10490 || is_taken_branch (idesc
))
10492 /* Although technically the taken branch doesn't clear dependencies
10493 which require a srlz.[id], we don't follow the branch; the next
10494 instruction is assumed to start with a clean slate. */
10498 else if (is_conditional_branch (idesc
)
10499 && CURR_SLOT
.qp_regno
!= 0)
10501 int is_call
= strstr (idesc
->name
, ".call") != NULL
;
10503 for (i
= 0; i
< qp_implieslen
; i
++)
10505 /* If the conditional branch's predicate is implied by the predicate
10506 in an existing dependency, remove that dependency. */
10507 if (qp_implies
[i
].p2
== CURR_SLOT
.qp_regno
)
10510 /* Note that this implied predicate takes a branch so that if
10511 a later insn generates a DV but its predicate implies this
10512 one, we can avoid the false DV warning. */
10513 qp_implies
[i
].p2_branched
= 1;
10514 while (depind
< regdepslen
)
10516 if (regdeps
[depind
].qp_regno
== qp_implies
[i
].p1
)
10518 print_dependency ("Removing", depind
);
10519 regdeps
[depind
] = regdeps
[--regdepslen
];
10526 /* Any marked resources which have this same predicate should be
10527 cleared, provided that the QP hasn't been modified between the
10528 marking instruction and the branch. */
10531 insn_group_break (0, CURR_SLOT
.qp_regno
, 1);
10536 while (i
< regdepslen
)
10538 if (regdeps
[i
].qp_regno
== CURR_SLOT
.qp_regno
10539 && regdeps
[i
].link_to_qp_branch
10540 && (regdeps
[i
].file
!= CURR_SLOT
.src_file
10541 || regdeps
[i
].line
!= CURR_SLOT
.src_line
))
10543 /* Treat like a taken branch */
10544 print_dependency ("Removing", i
);
10545 regdeps
[i
] = regdeps
[--regdepslen
];
10554 /* Examine the current instruction for dependency violations. */
10558 struct ia64_opcode
*idesc
;
10562 fprintf (stderr
, "Checking %s for violations (line %d, %d/%d)\n",
10563 idesc
->name
, CURR_SLOT
.src_line
,
10564 idesc
->dependencies
->nchks
,
10565 idesc
->dependencies
->nregs
);
10568 /* Look through the list of currently marked resources; if the current
10569 instruction has the dependency in its chks list which uses that resource,
10570 check against the specific resources used. */
10571 check_dependencies (idesc
);
10573 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10574 then add them to the list of marked resources. */
10575 mark_resources (idesc
);
10577 /* There are several types of dependency semantics, and each has its own
10578 requirements for being cleared
10580 Instruction serialization (insns separated by interruption, rfi, or
10581 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10583 Data serialization (instruction serialization, or writer + srlz.d +
10584 reader, where writer and srlz.d are in separate groups) clears
10585 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10586 always be the case).
10588 Instruction group break (groups separated by stop, taken branch,
10589 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10591 update_dependencies (idesc
);
10593 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10594 warning. Keep track of as many as possible that are useful. */
10595 note_register_values (idesc
);
10597 /* We don't need or want this anymore. */
10598 md
.mem_offset
.hint
= 0;
10603 /* Translate one line of assembly. Pseudo ops and labels do not show
10609 char *saved_input_line_pointer
, *mnemonic
;
10610 const struct pseudo_opcode
*pdesc
;
10611 struct ia64_opcode
*idesc
;
10612 unsigned char qp_regno
;
10613 unsigned int flags
;
10616 saved_input_line_pointer
= input_line_pointer
;
10617 input_line_pointer
= str
;
10619 /* extract the opcode (mnemonic): */
10621 mnemonic
= input_line_pointer
;
10622 ch
= get_symbol_end ();
10623 pdesc
= (struct pseudo_opcode
*) hash_find (md
.pseudo_hash
, mnemonic
);
10626 *input_line_pointer
= ch
;
10627 (*pdesc
->handler
) (pdesc
->arg
);
10631 /* Find the instruction descriptor matching the arguments. */
10633 idesc
= ia64_find_opcode (mnemonic
);
10634 *input_line_pointer
= ch
;
10637 as_bad ("Unknown opcode `%s'", mnemonic
);
10641 idesc
= parse_operands (idesc
);
10645 /* Handle the dynamic ops we can handle now: */
10646 if (idesc
->type
== IA64_TYPE_DYN
)
10648 if (strcmp (idesc
->name
, "add") == 0)
10650 if (CURR_SLOT
.opnd
[2].X_op
== O_register
10651 && CURR_SLOT
.opnd
[2].X_add_number
< 4)
10655 ia64_free_opcode (idesc
);
10656 idesc
= ia64_find_opcode (mnemonic
);
10658 else if (strcmp (idesc
->name
, "mov") == 0)
10660 enum ia64_opnd opnd1
, opnd2
;
10663 opnd1
= idesc
->operands
[0];
10664 opnd2
= idesc
->operands
[1];
10665 if (opnd1
== IA64_OPND_AR3
)
10667 else if (opnd2
== IA64_OPND_AR3
)
10671 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10673 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10674 mnemonic
= "mov.i";
10675 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10676 mnemonic
= "mov.m";
10684 ia64_free_opcode (idesc
);
10685 idesc
= ia64_find_opcode (mnemonic
);
10686 while (idesc
!= NULL
10687 && (idesc
->operands
[0] != opnd1
10688 || idesc
->operands
[1] != opnd2
))
10689 idesc
= get_next_opcode (idesc
);
10693 else if (strcmp (idesc
->name
, "mov.i") == 0
10694 || strcmp (idesc
->name
, "mov.m") == 0)
10696 enum ia64_opnd opnd1
, opnd2
;
10699 opnd1
= idesc
->operands
[0];
10700 opnd2
= idesc
->operands
[1];
10701 if (opnd1
== IA64_OPND_AR3
)
10703 else if (opnd2
== IA64_OPND_AR3
)
10707 if (CURR_SLOT
.opnd
[rop
].X_op
== O_register
)
10710 if (ar_is_only_in_integer_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10712 else if (ar_is_only_in_memory_unit (CURR_SLOT
.opnd
[rop
].X_add_number
))
10714 if (unit
!= 'a' && unit
!= idesc
->name
[4])
10715 as_bad ("AR %d can only be accessed by %c-unit",
10716 (int) (CURR_SLOT
.opnd
[rop
].X_add_number
- REG_AR
),
10720 else if (strcmp (idesc
->name
, "hint.b") == 0)
10726 case hint_b_warning
:
10727 as_warn ("hint.b may be treated as nop");
10730 as_bad ("hint.b shouldn't be used");
10736 if (md
.qp
.X_op
== O_register
)
10738 qp_regno
= md
.qp
.X_add_number
- REG_P
;
10739 md
.qp
.X_op
= O_absent
;
10742 flags
= idesc
->flags
;
10744 if ((flags
& IA64_OPCODE_FIRST
) != 0)
10746 /* The alignment frag has to end with a stop bit only if the
10747 next instruction after the alignment directive has to be
10748 the first instruction in an instruction group. */
10751 while (align_frag
->fr_type
!= rs_align_code
)
10753 align_frag
= align_frag
->fr_next
;
10757 /* align_frag can be NULL if there are directives in
10759 if (align_frag
&& align_frag
->fr_next
== frag_now
)
10760 align_frag
->tc_frag_data
= 1;
10763 insn_group_break (1, 0, 0);
10767 if ((flags
& IA64_OPCODE_NO_PRED
) != 0 && qp_regno
!= 0)
10769 as_bad ("`%s' cannot be predicated", idesc
->name
);
10773 /* Build the instruction. */
10774 CURR_SLOT
.qp_regno
= qp_regno
;
10775 CURR_SLOT
.idesc
= idesc
;
10776 as_where (&CURR_SLOT
.src_file
, &CURR_SLOT
.src_line
);
10777 dwarf2_where (&CURR_SLOT
.debug_line
);
10779 /* Add unwind entry, if there is one. */
10780 if (unwind
.current_entry
)
10782 CURR_SLOT
.unwind_record
= unwind
.current_entry
;
10783 unwind
.current_entry
= NULL
;
10785 if (unwind
.proc_start
&& S_IS_DEFINED (unwind
.proc_start
))
10788 /* Check for dependency violations. */
10792 md
.curr_slot
= (md
.curr_slot
+ 1) % NUM_SLOTS
;
10793 if (++md
.num_slots_in_use
>= NUM_SLOTS
)
10794 emit_one_bundle ();
10796 if ((flags
& IA64_OPCODE_LAST
) != 0)
10797 insn_group_break (1, 0, 0);
10799 md
.last_text_seg
= now_seg
;
10802 input_line_pointer
= saved_input_line_pointer
;
10805 /* Called when symbol NAME cannot be found in the symbol table.
10806 Should be used for dynamic valued symbols only. */
10809 md_undefined_symbol (name
)
10810 char *name ATTRIBUTE_UNUSED
;
10815 /* Called for any expression that can not be recognized. When the
10816 function is called, `input_line_pointer' will point to the start of
10823 switch (*input_line_pointer
)
10826 ++input_line_pointer
;
10828 if (*input_line_pointer
!= ']')
10830 as_bad ("Closing bracket missing");
10835 if (e
->X_op
!= O_register
)
10836 as_bad ("Register expected as index");
10838 ++input_line_pointer
;
10849 ignore_rest_of_line ();
10852 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10853 a section symbol plus some offset. For relocs involving @fptr(),
10854 directives we don't want such adjustments since we need to have the
10855 original symbol's name in the reloc. */
10857 ia64_fix_adjustable (fix
)
10860 /* Prevent all adjustments to global symbols */
10861 if (S_IS_EXTERNAL (fix
->fx_addsy
) || S_IS_WEAK (fix
->fx_addsy
))
10864 switch (fix
->fx_r_type
)
10866 case BFD_RELOC_IA64_FPTR64I
:
10867 case BFD_RELOC_IA64_FPTR32MSB
:
10868 case BFD_RELOC_IA64_FPTR32LSB
:
10869 case BFD_RELOC_IA64_FPTR64MSB
:
10870 case BFD_RELOC_IA64_FPTR64LSB
:
10871 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10872 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10882 ia64_force_relocation (fix
)
10885 switch (fix
->fx_r_type
)
10887 case BFD_RELOC_IA64_FPTR64I
:
10888 case BFD_RELOC_IA64_FPTR32MSB
:
10889 case BFD_RELOC_IA64_FPTR32LSB
:
10890 case BFD_RELOC_IA64_FPTR64MSB
:
10891 case BFD_RELOC_IA64_FPTR64LSB
:
10893 case BFD_RELOC_IA64_LTOFF22
:
10894 case BFD_RELOC_IA64_LTOFF64I
:
10895 case BFD_RELOC_IA64_LTOFF_FPTR22
:
10896 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
10897 case BFD_RELOC_IA64_PLTOFF22
:
10898 case BFD_RELOC_IA64_PLTOFF64I
:
10899 case BFD_RELOC_IA64_PLTOFF64MSB
:
10900 case BFD_RELOC_IA64_PLTOFF64LSB
:
10902 case BFD_RELOC_IA64_LTOFF22X
:
10903 case BFD_RELOC_IA64_LDXMOV
:
10910 return generic_force_reloc (fix
);
10913 /* Decide from what point a pc-relative relocation is relative to,
10914 relative to the pc-relative fixup. Er, relatively speaking. */
10916 ia64_pcrel_from_section (fix
, sec
)
10920 unsigned long off
= fix
->fx_frag
->fr_address
+ fix
->fx_where
;
10922 if (bfd_get_section_flags (stdoutput
, sec
) & SEC_CODE
)
10929 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10931 ia64_dwarf2_emit_offset (symbolS
*symbol
, unsigned int size
)
10935 expr
.X_op
= O_pseudo_fixup
;
10936 expr
.X_op_symbol
= pseudo_func
[FUNC_SEC_RELATIVE
].u
.sym
;
10937 expr
.X_add_number
= 0;
10938 expr
.X_add_symbol
= symbol
;
10939 emit_expr (&expr
, size
);
10942 /* This is called whenever some data item (not an instruction) needs a
10943 fixup. We pick the right reloc code depending on the byteorder
10944 currently in effect. */
10946 ia64_cons_fix_new (f
, where
, nbytes
, exp
)
10952 bfd_reloc_code_real_type code
;
10957 /* There are no reloc for 8 and 16 bit quantities, but we allow
10958 them here since they will work fine as long as the expression
10959 is fully defined at the end of the pass over the source file. */
10960 case 1: code
= BFD_RELOC_8
; break;
10961 case 2: code
= BFD_RELOC_16
; break;
10963 if (target_big_endian
)
10964 code
= BFD_RELOC_IA64_DIR32MSB
;
10966 code
= BFD_RELOC_IA64_DIR32LSB
;
10970 /* In 32-bit mode, data8 could mean function descriptors too. */
10971 if (exp
->X_op
== O_pseudo_fixup
10972 && exp
->X_op_symbol
10973 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
10974 && !(md
.flags
& EF_IA_64_ABI64
))
10976 if (target_big_endian
)
10977 code
= BFD_RELOC_IA64_IPLTMSB
;
10979 code
= BFD_RELOC_IA64_IPLTLSB
;
10980 exp
->X_op
= O_symbol
;
10985 if (target_big_endian
)
10986 code
= BFD_RELOC_IA64_DIR64MSB
;
10988 code
= BFD_RELOC_IA64_DIR64LSB
;
10993 if (exp
->X_op
== O_pseudo_fixup
10994 && exp
->X_op_symbol
10995 && S_GET_VALUE (exp
->X_op_symbol
) == FUNC_IPLT_RELOC
)
10997 if (target_big_endian
)
10998 code
= BFD_RELOC_IA64_IPLTMSB
;
11000 code
= BFD_RELOC_IA64_IPLTLSB
;
11001 exp
->X_op
= O_symbol
;
11007 as_bad ("Unsupported fixup size %d", nbytes
);
11008 ignore_rest_of_line ();
11012 if (exp
->X_op
== O_pseudo_fixup
)
11014 exp
->X_op
= O_symbol
;
11015 code
= ia64_gen_real_reloc_type (exp
->X_op_symbol
, code
);
11016 /* ??? If code unchanged, unsupported. */
11019 fix
= fix_new_exp (f
, where
, nbytes
, exp
, 0, code
);
11020 /* We need to store the byte order in effect in case we're going
11021 to fix an 8 or 16 bit relocation (for which there no real
11022 relocs available). See md_apply_fix3(). */
11023 fix
->tc_fix_data
.bigendian
= target_big_endian
;
11026 /* Return the actual relocation we wish to associate with the pseudo
11027 reloc described by SYM and R_TYPE. SYM should be one of the
11028 symbols in the pseudo_func array, or NULL. */
11030 static bfd_reloc_code_real_type
11031 ia64_gen_real_reloc_type (sym
, r_type
)
11032 struct symbol
*sym
;
11033 bfd_reloc_code_real_type r_type
;
11035 bfd_reloc_code_real_type
new = 0;
11036 const char *type
= NULL
, *suffix
= "";
11043 switch (S_GET_VALUE (sym
))
11045 case FUNC_FPTR_RELATIVE
:
11048 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_FPTR64I
; break;
11049 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_FPTR32MSB
; break;
11050 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_FPTR32LSB
; break;
11051 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_FPTR64MSB
; break;
11052 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_FPTR64LSB
; break;
11053 default: type
= "FPTR"; break;
11057 case FUNC_GP_RELATIVE
:
11060 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_GPREL22
; break;
11061 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_GPREL64I
; break;
11062 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_GPREL32MSB
; break;
11063 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_GPREL32LSB
; break;
11064 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_GPREL64MSB
; break;
11065 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_GPREL64LSB
; break;
11066 default: type
= "GPREL"; break;
11070 case FUNC_LT_RELATIVE
:
11073 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22
; break;
11074 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_LTOFF64I
; break;
11075 default: type
= "LTOFF"; break;
11079 case FUNC_LT_RELATIVE_X
:
11082 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_LTOFF22X
; break;
11083 default: type
= "LTOFF"; suffix
= "X"; break;
11087 case FUNC_PC_RELATIVE
:
11090 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PCREL22
; break;
11091 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PCREL64I
; break;
11092 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_PCREL32MSB
; break;
11093 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_PCREL32LSB
; break;
11094 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PCREL64MSB
; break;
11095 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PCREL64LSB
; break;
11096 default: type
= "PCREL"; break;
11100 case FUNC_PLT_RELATIVE
:
11103 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_PLTOFF22
; break;
11104 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_PLTOFF64I
; break;
11105 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_PLTOFF64MSB
;break;
11106 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_PLTOFF64LSB
;break;
11107 default: type
= "PLTOFF"; break;
11111 case FUNC_SEC_RELATIVE
:
11114 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SECREL32MSB
;break;
11115 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SECREL32LSB
;break;
11116 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SECREL64MSB
;break;
11117 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SECREL64LSB
;break;
11118 default: type
= "SECREL"; break;
11122 case FUNC_SEG_RELATIVE
:
11125 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_SEGREL32MSB
;break;
11126 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_SEGREL32LSB
;break;
11127 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_SEGREL64MSB
;break;
11128 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_SEGREL64LSB
;break;
11129 default: type
= "SEGREL"; break;
11133 case FUNC_LTV_RELATIVE
:
11136 case BFD_RELOC_IA64_DIR32MSB
: new = BFD_RELOC_IA64_LTV32MSB
; break;
11137 case BFD_RELOC_IA64_DIR32LSB
: new = BFD_RELOC_IA64_LTV32LSB
; break;
11138 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_LTV64MSB
; break;
11139 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_LTV64LSB
; break;
11140 default: type
= "LTV"; break;
11144 case FUNC_LT_FPTR_RELATIVE
:
11147 case BFD_RELOC_IA64_IMM22
:
11148 new = BFD_RELOC_IA64_LTOFF_FPTR22
; break;
11149 case BFD_RELOC_IA64_IMM64
:
11150 new = BFD_RELOC_IA64_LTOFF_FPTR64I
; break;
11151 case BFD_RELOC_IA64_DIR32MSB
:
11152 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB
; break;
11153 case BFD_RELOC_IA64_DIR32LSB
:
11154 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB
; break;
11155 case BFD_RELOC_IA64_DIR64MSB
:
11156 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB
; break;
11157 case BFD_RELOC_IA64_DIR64LSB
:
11158 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB
; break;
11160 type
= "LTOFF_FPTR"; break;
11164 case FUNC_TP_RELATIVE
:
11167 case BFD_RELOC_IA64_IMM14
: new = BFD_RELOC_IA64_TPREL14
; break;
11168 case BFD_RELOC_IA64_IMM22
: new = BFD_RELOC_IA64_TPREL22
; break;
11169 case BFD_RELOC_IA64_IMM64
: new = BFD_RELOC_IA64_TPREL64I
; break;
11170 case BFD_RELOC_IA64_DIR64MSB
: new = BFD_RELOC_IA64_TPREL64MSB
; break;
11171 case BFD_RELOC_IA64_DIR64LSB
: new = BFD_RELOC_IA64_TPREL64LSB
; break;
11172 default: type
= "TPREL"; break;
11176 case FUNC_LT_TP_RELATIVE
:
11179 case BFD_RELOC_IA64_IMM22
:
11180 new = BFD_RELOC_IA64_LTOFF_TPREL22
; break;
11182 type
= "LTOFF_TPREL"; break;
11186 case FUNC_DTP_MODULE
:
11189 case BFD_RELOC_IA64_DIR64MSB
:
11190 new = BFD_RELOC_IA64_DTPMOD64MSB
; break;
11191 case BFD_RELOC_IA64_DIR64LSB
:
11192 new = BFD_RELOC_IA64_DTPMOD64LSB
; break;
11194 type
= "DTPMOD"; break;
11198 case FUNC_LT_DTP_MODULE
:
11201 case BFD_RELOC_IA64_IMM22
:
11202 new = BFD_RELOC_IA64_LTOFF_DTPMOD22
; break;
11204 type
= "LTOFF_DTPMOD"; break;
11208 case FUNC_DTP_RELATIVE
:
11211 case BFD_RELOC_IA64_DIR32MSB
:
11212 new = BFD_RELOC_IA64_DTPREL32MSB
; break;
11213 case BFD_RELOC_IA64_DIR32LSB
:
11214 new = BFD_RELOC_IA64_DTPREL32LSB
; break;
11215 case BFD_RELOC_IA64_DIR64MSB
:
11216 new = BFD_RELOC_IA64_DTPREL64MSB
; break;
11217 case BFD_RELOC_IA64_DIR64LSB
:
11218 new = BFD_RELOC_IA64_DTPREL64LSB
; break;
11219 case BFD_RELOC_IA64_IMM14
:
11220 new = BFD_RELOC_IA64_DTPREL14
; break;
11221 case BFD_RELOC_IA64_IMM22
:
11222 new = BFD_RELOC_IA64_DTPREL22
; break;
11223 case BFD_RELOC_IA64_IMM64
:
11224 new = BFD_RELOC_IA64_DTPREL64I
; break;
11226 type
= "DTPREL"; break;
11230 case FUNC_LT_DTP_RELATIVE
:
11233 case BFD_RELOC_IA64_IMM22
:
11234 new = BFD_RELOC_IA64_LTOFF_DTPREL22
; break;
11236 type
= "LTOFF_DTPREL"; break;
11240 case FUNC_IPLT_RELOC
:
11243 case BFD_RELOC_IA64_IPLTMSB
: return r_type
;
11244 case BFD_RELOC_IA64_IPLTLSB
: return r_type
;
11245 default: type
= "IPLT"; break;
11263 case BFD_RELOC_IA64_DIR32MSB
: width
= 32; suffix
= "MSB"; break;
11264 case BFD_RELOC_IA64_DIR32LSB
: width
= 32; suffix
= "LSB"; break;
11265 case BFD_RELOC_IA64_DIR64MSB
: width
= 64; suffix
= "MSB"; break;
11266 case BFD_RELOC_IA64_DIR64LSB
: width
= 64; suffix
= "LSB"; break;
11267 case BFD_RELOC_UNUSED
: width
= 13; break;
11268 case BFD_RELOC_IA64_IMM14
: width
= 14; break;
11269 case BFD_RELOC_IA64_IMM22
: width
= 22; break;
11270 case BFD_RELOC_IA64_IMM64
: width
= 64; suffix
= "I"; break;
11274 /* This should be an error, but since previously there wasn't any
11275 diagnostic here, dont't make it fail because of this for now. */
11276 as_warn ("Cannot express %s%d%s relocation", type
, width
, suffix
);
11281 /* Here is where generate the appropriate reloc for pseudo relocation
11284 ia64_validate_fix (fix
)
11287 switch (fix
->fx_r_type
)
11289 case BFD_RELOC_IA64_FPTR64I
:
11290 case BFD_RELOC_IA64_FPTR32MSB
:
11291 case BFD_RELOC_IA64_FPTR64LSB
:
11292 case BFD_RELOC_IA64_LTOFF_FPTR22
:
11293 case BFD_RELOC_IA64_LTOFF_FPTR64I
:
11294 if (fix
->fx_offset
!= 0)
11295 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11296 "No addend allowed in @fptr() relocation");
11304 fix_insn (fix
, odesc
, value
)
11306 const struct ia64_operand
*odesc
;
11309 bfd_vma insn
[3], t0
, t1
, control_bits
;
11314 slot
= fix
->fx_where
& 0x3;
11315 fixpos
= fix
->fx_frag
->fr_literal
+ (fix
->fx_where
- slot
);
11317 /* Bundles are always in little-endian byte order */
11318 t0
= bfd_getl64 (fixpos
);
11319 t1
= bfd_getl64 (fixpos
+ 8);
11320 control_bits
= t0
& 0x1f;
11321 insn
[0] = (t0
>> 5) & 0x1ffffffffffLL
;
11322 insn
[1] = ((t0
>> 46) & 0x3ffff) | ((t1
& 0x7fffff) << 18);
11323 insn
[2] = (t1
>> 23) & 0x1ffffffffffLL
;
11326 if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU64
)
11328 insn
[1] = (value
>> 22) & 0x1ffffffffffLL
;
11329 insn
[2] |= (((value
& 0x7f) << 13)
11330 | (((value
>> 7) & 0x1ff) << 27)
11331 | (((value
>> 16) & 0x1f) << 22)
11332 | (((value
>> 21) & 0x1) << 21)
11333 | (((value
>> 63) & 0x1) << 36));
11335 else if (odesc
- elf64_ia64_operands
== IA64_OPND_IMMU62
)
11337 if (value
& ~0x3fffffffffffffffULL
)
11338 err
= "integer operand out of range";
11339 insn
[1] = (value
>> 21) & 0x1ffffffffffLL
;
11340 insn
[2] |= (((value
& 0xfffff) << 6) | (((value
>> 20) & 0x1) << 36));
11342 else if (odesc
- elf64_ia64_operands
== IA64_OPND_TGT64
)
11345 insn
[1] = ((value
>> 20) & 0x7fffffffffLL
) << 2;
11346 insn
[2] |= ((((value
>> 59) & 0x1) << 36)
11347 | (((value
>> 0) & 0xfffff) << 13));
11350 err
= (*odesc
->insert
) (odesc
, value
, insn
+ slot
);
11353 as_bad_where (fix
->fx_file
, fix
->fx_line
, err
);
11355 t0
= control_bits
| (insn
[0] << 5) | (insn
[1] << 46);
11356 t1
= ((insn
[1] >> 18) & 0x7fffff) | (insn
[2] << 23);
11357 number_to_chars_littleendian (fixpos
+ 0, t0
, 8);
11358 number_to_chars_littleendian (fixpos
+ 8, t1
, 8);
11361 /* Attempt to simplify or even eliminate a fixup. The return value is
11362 ignored; perhaps it was once meaningful, but now it is historical.
11363 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11365 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11369 md_apply_fix3 (fix
, valP
, seg
)
11372 segT seg ATTRIBUTE_UNUSED
;
11375 valueT value
= *valP
;
11377 fixpos
= fix
->fx_frag
->fr_literal
+ fix
->fx_where
;
11381 switch (fix
->fx_r_type
)
11383 case BFD_RELOC_IA64_PCREL21B
: break;
11384 case BFD_RELOC_IA64_PCREL21BI
: break;
11385 case BFD_RELOC_IA64_PCREL21F
: break;
11386 case BFD_RELOC_IA64_PCREL21M
: break;
11387 case BFD_RELOC_IA64_PCREL60B
: break;
11388 case BFD_RELOC_IA64_PCREL22
: break;
11389 case BFD_RELOC_IA64_PCREL64I
: break;
11390 case BFD_RELOC_IA64_PCREL32MSB
: break;
11391 case BFD_RELOC_IA64_PCREL32LSB
: break;
11392 case BFD_RELOC_IA64_PCREL64MSB
: break;
11393 case BFD_RELOC_IA64_PCREL64LSB
: break;
11395 fix
->fx_r_type
= ia64_gen_real_reloc_type (pseudo_func
[FUNC_PC_RELATIVE
].u
.sym
,
11402 switch (fix
->fx_r_type
)
11404 case BFD_RELOC_UNUSED
:
11405 /* This must be a TAG13 or TAG13b operand. There are no external
11406 relocs defined for them, so we must give an error. */
11407 as_bad_where (fix
->fx_file
, fix
->fx_line
,
11408 "%s must have a constant value",
11409 elf64_ia64_operands
[fix
->tc_fix_data
.opnd
].desc
);
11413 case BFD_RELOC_IA64_TPREL14
:
11414 case BFD_RELOC_IA64_TPREL22
:
11415 case BFD_RELOC_IA64_TPREL64I
:
11416 case BFD_RELOC_IA64_LTOFF_TPREL22
:
11417 case BFD_RELOC_IA64_LTOFF_DTPMOD22
:
11418 case BFD_RELOC_IA64_DTPREL14
:
11419 case BFD_RELOC_IA64_DTPREL22
:
11420 case BFD_RELOC_IA64_DTPREL64I
:
11421 case BFD_RELOC_IA64_LTOFF_DTPREL22
:
11422 S_SET_THREAD_LOCAL (fix
->fx_addsy
);
11429 else if (fix
->tc_fix_data
.opnd
== IA64_OPND_NIL
)
11431 if (fix
->tc_fix_data
.bigendian
)
11432 number_to_chars_bigendian (fixpos
, value
, fix
->fx_size
);
11434 number_to_chars_littleendian (fixpos
, value
, fix
->fx_size
);
11439 fix_insn (fix
, elf64_ia64_operands
+ fix
->tc_fix_data
.opnd
, value
);
11444 /* Generate the BFD reloc to be stuck in the object file from the
11445 fixup used internally in the assembler. */
11448 tc_gen_reloc (sec
, fixp
)
11449 asection
*sec ATTRIBUTE_UNUSED
;
11454 reloc
= xmalloc (sizeof (*reloc
));
11455 reloc
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
11456 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
11457 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
11458 reloc
->addend
= fixp
->fx_offset
;
11459 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
11463 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
11464 "Cannot represent %s relocation in object file",
11465 bfd_get_reloc_code_name (fixp
->fx_r_type
));
11470 /* Turn a string in input_line_pointer into a floating point constant
11471 of type TYPE, and store the appropriate bytes in *LIT. The number
11472 of LITTLENUMS emitted is stored in *SIZE. An error message is
11473 returned, or NULL on OK. */
11475 #define MAX_LITTLENUMS 5
11478 md_atof (type
, lit
, size
)
11483 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
11513 return "Bad call to MD_ATOF()";
11515 t
= atof_ieee (input_line_pointer
, type
, words
);
11517 input_line_pointer
= t
;
11519 (*ia64_float_to_chars
) (lit
, words
, prec
);
11523 /* It is 10 byte floating point with 6 byte padding. */
11524 memset (&lit
[10], 0, 6);
11525 *size
= 8 * sizeof (LITTLENUM_TYPE
);
11528 *size
= prec
* sizeof (LITTLENUM_TYPE
);
11533 /* Handle ia64 specific semantics of the align directive. */
11536 ia64_md_do_align (n
, fill
, len
, max
)
11537 int n ATTRIBUTE_UNUSED
;
11538 const char *fill ATTRIBUTE_UNUSED
;
11539 int len ATTRIBUTE_UNUSED
;
11540 int max ATTRIBUTE_UNUSED
;
11542 if (subseg_text_p (now_seg
))
11543 ia64_flush_insns ();
11546 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11547 of an rs_align_code fragment. */
11550 ia64_handle_align (fragp
)
11555 const unsigned char *nop
;
11557 if (fragp
->fr_type
!= rs_align_code
)
11560 /* Check if this frag has to end with a stop bit. */
11561 nop
= fragp
->tc_frag_data
? le_nop_stop
: le_nop
;
11563 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
11564 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
11566 /* If no paddings are needed, we check if we need a stop bit. */
11567 if (!bytes
&& fragp
->tc_frag_data
)
11569 if (fragp
->fr_fix
< 16)
11571 /* FIXME: It won't work with
11573 alloc r32=ar.pfs,1,2,4,0
11577 as_bad_where (fragp
->fr_file
, fragp
->fr_line
,
11578 _("Can't add stop bit to mark end of instruction group"));
11581 /* Bundles are always in little-endian byte order. Make sure
11582 the previous bundle has the stop bit. */
11586 /* Make sure we are on a 16-byte boundary, in case someone has been
11587 putting data into a text section. */
11590 int fix
= bytes
& 15;
11591 memset (p
, 0, fix
);
11594 fragp
->fr_fix
+= fix
;
11597 /* Instruction bundles are always little-endian. */
11598 memcpy (p
, nop
, 16);
11599 fragp
->fr_var
= 16;
11603 ia64_float_to_chars_bigendian (char *lit
, LITTLENUM_TYPE
*words
,
11608 number_to_chars_bigendian (lit
, (long) (*words
++),
11609 sizeof (LITTLENUM_TYPE
));
11610 lit
+= sizeof (LITTLENUM_TYPE
);
11615 ia64_float_to_chars_littleendian (char *lit
, LITTLENUM_TYPE
*words
,
11620 number_to_chars_littleendian (lit
, (long) (words
[prec
]),
11621 sizeof (LITTLENUM_TYPE
));
11622 lit
+= sizeof (LITTLENUM_TYPE
);
11627 ia64_elf_section_change_hook (void)
11629 if (elf_section_type (now_seg
) == SHT_IA_64_UNWIND
11630 && elf_linked_to_section (now_seg
) == NULL
)
11631 elf_linked_to_section (now_seg
) = text_section
;
11632 dot_byteorder (-1);
11635 /* Check if a label should be made global. */
11637 ia64_check_label (symbolS
*label
)
11639 if (*input_line_pointer
== ':')
11641 S_SET_EXTERNAL (label
);
11642 input_line_pointer
++;
11646 /* Used to remember where .alias and .secalias directives are seen. We
11647 will rename symbol and section names when we are about to output
11648 the relocatable file. */
11651 char *file
; /* The file where the directive is seen. */
11652 unsigned int line
; /* The line number the directive is at. */
11653 const char *name
; /* The orignale name of the symbol. */
11656 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11657 .secalias. Otherwise, it is .alias. */
11659 dot_alias (int section
)
11661 char *name
, *alias
;
11665 const char *error_string
;
11668 struct hash_control
*ahash
, *nhash
;
11671 name
= input_line_pointer
;
11672 delim
= get_symbol_end ();
11673 end_name
= input_line_pointer
;
11676 if (name
== end_name
)
11678 as_bad (_("expected symbol name"));
11679 discard_rest_of_line ();
11683 SKIP_WHITESPACE ();
11685 if (*input_line_pointer
!= ',')
11688 as_bad (_("expected comma after \"%s\""), name
);
11690 ignore_rest_of_line ();
11694 input_line_pointer
++;
11696 ia64_canonicalize_symbol_name (name
);
11698 /* We call demand_copy_C_string to check if alias string is valid.
11699 There should be a closing `"' and no `\0' in the string. */
11700 alias
= demand_copy_C_string (&len
);
11703 ignore_rest_of_line ();
11707 /* Make a copy of name string. */
11708 len
= strlen (name
) + 1;
11709 obstack_grow (¬es
, name
, len
);
11710 name
= obstack_finish (¬es
);
11715 ahash
= secalias_hash
;
11716 nhash
= secalias_name_hash
;
11721 ahash
= alias_hash
;
11722 nhash
= alias_name_hash
;
11725 /* Check if alias has been used before. */
11726 h
= (struct alias
*) hash_find (ahash
, alias
);
11729 if (strcmp (h
->name
, name
))
11730 as_bad (_("`%s' is already the alias of %s `%s'"),
11731 alias
, kind
, h
->name
);
11735 /* Check if name already has an alias. */
11736 a
= (const char *) hash_find (nhash
, name
);
11739 if (strcmp (a
, alias
))
11740 as_bad (_("%s `%s' already has an alias `%s'"), kind
, name
, a
);
11744 h
= (struct alias
*) xmalloc (sizeof (struct alias
));
11745 as_where (&h
->file
, &h
->line
);
11748 error_string
= hash_jam (ahash
, alias
, (PTR
) h
);
11751 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11752 alias
, kind
, error_string
);
11756 error_string
= hash_jam (nhash
, name
, (PTR
) alias
);
11759 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11760 alias
, kind
, error_string
);
11762 obstack_free (¬es
, name
);
11763 obstack_free (¬es
, alias
);
11766 demand_empty_rest_of_line ();
11769 /* It renames the original symbol name to its alias. */
11771 do_alias (const char *alias
, PTR value
)
11773 struct alias
*h
= (struct alias
*) value
;
11774 symbolS
*sym
= symbol_find (h
->name
);
11777 as_warn_where (h
->file
, h
->line
,
11778 _("symbol `%s' aliased to `%s' is not used"),
11781 S_SET_NAME (sym
, (char *) alias
);
11784 /* Called from write_object_file. */
11786 ia64_adjust_symtab (void)
11788 hash_traverse (alias_hash
, do_alias
);
11791 /* It renames the original section name to its alias. */
11793 do_secalias (const char *alias
, PTR value
)
11795 struct alias
*h
= (struct alias
*) value
;
11796 segT sec
= bfd_get_section_by_name (stdoutput
, h
->name
);
11799 as_warn_where (h
->file
, h
->line
,
11800 _("section `%s' aliased to `%s' is not used"),
11806 /* Called from write_object_file. */
11808 ia64_frob_file (void)
11810 hash_traverse (secalias_hash
, do_secalias
);