* ld-mips-elf/mips16-call-global-2.s,
[binutils.git] / opcodes / ppc-dis.c
blob8b3996a1476ea89a14b9f6d2fb0d88a21378a7b9
1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006
3 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of GDB, GAS, and the GNU binutils.
8 GDB, GAS, and the GNU binutils are free software; you can redistribute
9 them and/or modify them under the terms of the GNU General Public
10 License as published by the Free Software Foundation; either version
11 2, or (at your option) any later version.
13 GDB, GAS, and the GNU binutils are distributed in the hope that they
14 will be useful, but WITHOUT ANY WARRANTY; without even the implied
15 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16 the GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
22 #include <stdio.h>
23 #include "sysdep.h"
24 #include "dis-asm.h"
25 #include "opcode/ppc.h"
27 /* This file provides several disassembler functions, all of which use
28 the disassembler interface defined in dis-asm.h. Several functions
29 are provided because this file handles disassembly for the PowerPC
30 in both big and little endian mode and also for the POWER (RS/6000)
31 chip. */
33 static int print_insn_powerpc (bfd_vma, struct disassemble_info *, int, int);
35 /* Determine which set of machines to disassemble for. PPC403/601 or
36 BookE. For convenience, also disassemble instructions supported
37 by the AltiVec vector unit. */
39 static int
40 powerpc_dialect (struct disassemble_info *info)
42 int dialect = PPC_OPCODE_PPC;
44 if (BFD_DEFAULT_TARGET_SIZE == 64)
45 dialect |= PPC_OPCODE_64;
47 if (info->disassembler_options
48 && strstr (info->disassembler_options, "booke") != NULL)
49 dialect |= PPC_OPCODE_BOOKE | PPC_OPCODE_BOOKE64;
50 else if ((info->mach == bfd_mach_ppc_e500)
51 || (info->disassembler_options
52 && strstr (info->disassembler_options, "e500") != NULL))
53 dialect |= (PPC_OPCODE_BOOKE
54 | PPC_OPCODE_SPE | PPC_OPCODE_ISEL
55 | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
56 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
57 | PPC_OPCODE_RFMCI);
58 else if (info->disassembler_options
59 && strstr (info->disassembler_options, "efs") != NULL)
60 dialect |= PPC_OPCODE_EFS;
61 else if (info->disassembler_options
62 && strstr (info->disassembler_options, "e300") != NULL)
63 dialect |= PPC_OPCODE_E300 | PPC_OPCODE_CLASSIC | PPC_OPCODE_COMMON;
64 else
65 dialect |= (PPC_OPCODE_403 | PPC_OPCODE_601 | PPC_OPCODE_CLASSIC
66 | PPC_OPCODE_COMMON | PPC_OPCODE_ALTIVEC);
68 if (info->disassembler_options
69 && strstr (info->disassembler_options, "power4") != NULL)
70 dialect |= PPC_OPCODE_POWER4;
72 if (info->disassembler_options
73 && strstr (info->disassembler_options, "power5") != NULL)
74 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5;
76 if (info->disassembler_options
77 && strstr (info->disassembler_options, "power6") != NULL)
78 dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
80 if (info->disassembler_options
81 && strstr (info->disassembler_options, "any") != NULL)
82 dialect |= PPC_OPCODE_ANY;
84 if (info->disassembler_options)
86 if (strstr (info->disassembler_options, "32") != NULL)
87 dialect &= ~PPC_OPCODE_64;
88 else if (strstr (info->disassembler_options, "64") != NULL)
89 dialect |= PPC_OPCODE_64;
92 info->private_data = (char *) 0 + dialect;
93 return dialect;
96 /* Print a big endian PowerPC instruction. */
98 int
99 print_insn_big_powerpc (bfd_vma memaddr, struct disassemble_info *info)
101 int dialect = (char *) info->private_data - (char *) 0;
102 return print_insn_powerpc (memaddr, info, 1, dialect);
105 /* Print a little endian PowerPC instruction. */
108 print_insn_little_powerpc (bfd_vma memaddr, struct disassemble_info *info)
110 int dialect = (char *) info->private_data - (char *) 0;
111 return print_insn_powerpc (memaddr, info, 0, dialect);
114 /* Print a POWER (RS/6000) instruction. */
117 print_insn_rs6000 (bfd_vma memaddr, struct disassemble_info *info)
119 return print_insn_powerpc (memaddr, info, 1, PPC_OPCODE_POWER);
122 /* Print a PowerPC or POWER instruction. */
124 static int
125 print_insn_powerpc (bfd_vma memaddr,
126 struct disassemble_info *info,
127 int bigendian,
128 int dialect)
130 bfd_byte buffer[4];
131 int status;
132 unsigned long insn;
133 const struct powerpc_opcode *opcode;
134 const struct powerpc_opcode *opcode_end;
135 unsigned long op;
137 if (dialect == 0)
138 dialect = powerpc_dialect (info);
140 status = (*info->read_memory_func) (memaddr, buffer, 4, info);
141 if (status != 0)
143 (*info->memory_error_func) (status, memaddr, info);
144 return -1;
147 if (bigendian)
148 insn = bfd_getb32 (buffer);
149 else
150 insn = bfd_getl32 (buffer);
152 /* Get the major opcode of the instruction. */
153 op = PPC_OP (insn);
155 /* Find the first match in the opcode table. We could speed this up
156 a bit by doing a binary search on the major opcode. */
157 opcode_end = powerpc_opcodes + powerpc_num_opcodes;
158 again:
159 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
161 unsigned long table_op;
162 const unsigned char *opindex;
163 const struct powerpc_operand *operand;
164 int invalid;
165 int need_comma;
166 int need_paren;
168 table_op = PPC_OP (opcode->opcode);
169 if (op < table_op)
170 break;
171 if (op > table_op)
172 continue;
174 if ((insn & opcode->mask) != opcode->opcode
175 || (opcode->flags & dialect) == 0)
176 continue;
178 /* Make two passes over the operands. First see if any of them
179 have extraction functions, and, if they do, make sure the
180 instruction is valid. */
181 invalid = 0;
182 for (opindex = opcode->operands; *opindex != 0; opindex++)
184 operand = powerpc_operands + *opindex;
185 if (operand->extract)
186 (*operand->extract) (insn, dialect, &invalid);
188 if (invalid)
189 continue;
191 /* The instruction is valid. */
192 if (opcode->operands[0] != 0)
193 (*info->fprintf_func) (info->stream, "%-7s ", opcode->name);
194 else
195 (*info->fprintf_func) (info->stream, "%s", opcode->name);
197 /* Now extract and print the operands. */
198 need_comma = 0;
199 need_paren = 0;
200 for (opindex = opcode->operands; *opindex != 0; opindex++)
202 long value;
204 operand = powerpc_operands + *opindex;
206 /* Operands that are marked FAKE are simply ignored. We
207 already made sure that the extract function considered
208 the instruction to be valid. */
209 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
210 continue;
212 /* Extract the value from the instruction. */
213 if (operand->extract)
214 value = (*operand->extract) (insn, dialect, &invalid);
215 else
217 value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
218 if ((operand->flags & PPC_OPERAND_SIGNED) != 0
219 && (value & (1 << (operand->bits - 1))) != 0)
220 value -= 1 << operand->bits;
223 /* If the operand is optional, and the value is zero, don't
224 print anything. */
225 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
226 && (operand->flags & PPC_OPERAND_NEXT) == 0
227 && value == 0)
228 continue;
230 if (need_comma)
232 (*info->fprintf_func) (info->stream, ",");
233 need_comma = 0;
236 /* Print the operand as directed by the flags. */
237 if ((operand->flags & PPC_OPERAND_GPR) != 0
238 || ((operand->flags & PPC_OPERAND_GPR_0) != 0 && value != 0))
239 (*info->fprintf_func) (info->stream, "r%ld", value);
240 else if ((operand->flags & PPC_OPERAND_FPR) != 0)
241 (*info->fprintf_func) (info->stream, "f%ld", value);
242 else if ((operand->flags & PPC_OPERAND_VR) != 0)
243 (*info->fprintf_func) (info->stream, "v%ld", value);
244 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
245 (*info->print_address_func) (memaddr + value, info);
246 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
247 (*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
248 else if ((operand->flags & PPC_OPERAND_CR) == 0
249 || (dialect & PPC_OPCODE_PPC) == 0)
250 (*info->fprintf_func) (info->stream, "%ld", value);
251 else
253 if (operand->bits == 3)
254 (*info->fprintf_func) (info->stream, "cr%ld", value);
255 else
257 static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
258 int cr;
259 int cc;
261 cr = value >> 2;
262 if (cr != 0)
263 (*info->fprintf_func) (info->stream, "4*cr%d+", cr);
264 cc = value & 3;
265 (*info->fprintf_func) (info->stream, "%s", cbnames[cc]);
269 if (need_paren)
271 (*info->fprintf_func) (info->stream, ")");
272 need_paren = 0;
275 if ((operand->flags & PPC_OPERAND_PARENS) == 0)
276 need_comma = 1;
277 else
279 (*info->fprintf_func) (info->stream, "(");
280 need_paren = 1;
284 /* We have found and printed an instruction; return. */
285 return 4;
288 if ((dialect & PPC_OPCODE_ANY) != 0)
290 dialect = ~PPC_OPCODE_ANY;
291 goto again;
294 /* We could not find a match. */
295 (*info->fprintf_func) (info->stream, ".long 0x%lx", insn);
297 return 4;
300 void
301 print_ppc_disassembler_options (FILE *stream)
303 fprintf (stream, "\n\
304 The following PPC specific disassembler options are supported for use with\n\
305 the -M switch:\n");
307 fprintf (stream, " booke|booke32|booke64 Disassemble the BookE instructions\n");
308 fprintf (stream, " e300 Disassemble the e300 instructions\n");
309 fprintf (stream, " e500|e500x2 Disassemble the e500 instructions\n");
310 fprintf (stream, " efs Disassemble the EFS instructions\n");
311 fprintf (stream, " power4 Disassemble the Power4 instructions\n");
312 fprintf (stream, " power5 Disassemble the Power5 instructions\n");
313 fprintf (stream, " power6 Disassemble the Power6 instructions\n");
314 fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
315 fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");