1 /* BFD support for handling relocation entries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Cygnus Support.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
27 BFD maintains relocations in much the same way it maintains
28 symbols: they are left alone until required, then read in
29 en-masse and translated into an internal form. A common
30 routine <<bfd_perform_relocation>> acts upon the
31 canonical form to do the fixup.
33 Relocations are maintained on a per section basis,
34 while symbols are maintained on a per BFD basis.
36 All that a back end has to do to fit the BFD interface is to create
37 a <<struct reloc_cache_entry>> for each relocation
38 in a particular section, and fill in the right bits of the structures.
47 /* DO compile in the reloc_code name table from libbfd.h. */
48 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
57 typedef arelent, howto manager, Relocations, Relocations
62 This is the structure of a relocation entry:
66 .typedef enum bfd_reloc_status
68 . {* No errors detected. *}
71 . {* The relocation was performed, but there was an overflow. *}
74 . {* The address to relocate was not within the section supplied. *}
75 . bfd_reloc_outofrange,
77 . {* Used by special functions. *}
80 . {* Unsupported relocation size requested. *}
81 . bfd_reloc_notsupported,
86 . {* The symbol to relocate against was undefined. *}
87 . bfd_reloc_undefined,
89 . {* The relocation was performed, but may not be ok - presently
90 . generated only when linking i960 coff files with i960 b.out
91 . symbols. If this type is returned, the error_message argument
92 . to bfd_perform_relocation will be set. *}
95 . bfd_reloc_status_type;
98 .typedef struct reloc_cache_entry
100 . {* A pointer into the canonical table of pointers. *}
101 . struct symbol_cache_entry **sym_ptr_ptr;
103 . {* offset in section. *}
104 . bfd_size_type address;
106 . {* addend for relocation value. *}
109 . {* Pointer to how to perform the required relocation. *}
110 . reloc_howto_type *howto;
120 Here is a description of each of the fields within an <<arelent>>:
124 The symbol table pointer points to a pointer to the symbol
125 associated with the relocation request. It is
126 the pointer into the table returned by the back end's
127 <<get_symtab>> action. @xref{Symbols}. The symbol is referenced
128 through a pointer to a pointer so that tools like the linker
129 can fix up all the symbols of the same name by modifying only
130 one pointer. The relocation routine looks in the symbol and
131 uses the base of the section the symbol is attached to and the
132 value of the symbol as the initial relocation offset. If the
133 symbol pointer is zero, then the section provided is looked up.
137 The <<address>> field gives the offset in bytes from the base of
138 the section data which owns the relocation record to the first
139 byte of relocatable information. The actual data relocated
140 will be relative to this point; for example, a relocation
141 type which modifies the bottom two bytes of a four byte word
142 would not touch the first byte pointed to in a big endian
147 The <<addend>> is a value provided by the back end to be added (!)
148 to the relocation offset. Its interpretation is dependent upon
149 the howto. For example, on the 68k the code:
154 | return foo[0x12345678];
157 Could be compiled into:
160 | moveb @@#12345678,d0
165 This could create a reloc pointing to <<foo>>, but leave the
166 offset in the data, something like:
168 |RELOCATION RECORDS FOR [.text]:
172 |00000000 4e56 fffc ; linkw fp,#-4
173 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
174 |0000000a 49c0 ; extbl d0
175 |0000000c 4e5e ; unlk fp
178 Using coff and an 88k, some instructions don't have enough
179 space in them to represent the full address range, and
180 pointers have to be loaded in two parts. So you'd get something like:
182 | or.u r13,r0,hi16(_foo+0x12345678)
183 | ld.b r2,r13,lo16(_foo+0x12345678)
186 This should create two relocs, both pointing to <<_foo>>, and with
187 0x12340000 in their addend field. The data would consist of:
189 |RELOCATION RECORDS FOR [.text]:
191 |00000002 HVRT16 _foo+0x12340000
192 |00000006 LVRT16 _foo+0x12340000
194 |00000000 5da05678 ; or.u r13,r0,0x5678
195 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
196 |00000008 f400c001 ; jmp r1
198 The relocation routine digs out the value from the data, adds
199 it to the addend to get the original offset, and then adds the
200 value of <<_foo>>. Note that all 32 bits have to be kept around
201 somewhere, to cope with carry from bit 15 to bit 16.
203 One further example is the sparc and the a.out format. The
204 sparc has a similar problem to the 88k, in that some
205 instructions don't have room for an entire offset, but on the
206 sparc the parts are created in odd sized lumps. The designers of
207 the a.out format chose to not use the data within the section
208 for storing part of the offset; all the offset is kept within
209 the reloc. Anything in the data should be ignored.
212 | sethi %hi(_foo+0x12345678),%g2
213 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
217 Both relocs contain a pointer to <<foo>>, and the offsets
220 |RELOCATION RECORDS FOR [.text]:
222 |00000004 HI22 _foo+0x12345678
223 |00000008 LO10 _foo+0x12345678
225 |00000000 9de3bf90 ; save %sp,-112,%sp
226 |00000004 05000000 ; sethi %hi(_foo+0),%g2
227 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
228 |0000000c 81c7e008 ; ret
229 |00000010 81e80000 ; restore
233 The <<howto>> field can be imagined as a
234 relocation instruction. It is a pointer to a structure which
235 contains information on what to do with all of the other
236 information in the reloc record and data section. A back end
237 would normally have a relocation instruction set and turn
238 relocations into pointers to the correct structure on input -
239 but it would be possible to create each howto field on demand.
245 <<enum complain_overflow>>
247 Indicates what sort of overflow checking should be done when
248 performing a relocation.
252 .enum complain_overflow
254 . {* Do not complain on overflow. *}
255 . complain_overflow_dont,
257 . {* Complain if the bitfield overflows, whether it is considered
258 . as signed or unsigned. *}
259 . complain_overflow_bitfield,
261 . {* Complain if the value overflows when considered as signed
263 . complain_overflow_signed,
265 . {* Complain if the value overflows when considered as an
266 . unsigned number. *}
267 . complain_overflow_unsigned
276 The <<reloc_howto_type>> is a structure which contains all the
277 information that libbfd needs to know to tie up a back end's data.
280 .struct symbol_cache_entry; {* Forward declaration. *}
282 .struct reloc_howto_struct
284 . {* The type field has mainly a documentary use - the back end can
285 . do what it wants with it, though normally the back end's
286 . external idea of what a reloc number is stored
287 . in this field. For example, a PC relative word relocation
288 . in a coff environment has the type 023 - because that's
289 . what the outside world calls a R_PCRWORD reloc. *}
292 . {* The value the final relocation is shifted right by. This drops
293 . unwanted data from the relocation. *}
294 . unsigned int rightshift;
296 . {* The size of the item to be relocated. This is *not* a
297 . power-of-two measure. To get the number of bytes operated
298 . on by a type of relocation, use bfd_get_reloc_size. *}
301 . {* The number of bits in the item to be relocated. This is used
302 . when doing overflow checking. *}
303 . unsigned int bitsize;
305 . {* Notes that the relocation is relative to the location in the
306 . data section of the addend. The relocation function will
307 . subtract from the relocation value the address of the location
308 . being relocated. *}
309 . bfd_boolean pc_relative;
311 . {* The bit position of the reloc value in the destination.
312 . The relocated value is left shifted by this amount. *}
313 . unsigned int bitpos;
315 . {* What type of overflow error should be checked for when
317 . enum complain_overflow complain_on_overflow;
319 . {* If this field is non null, then the supplied function is
320 . called rather than the normal function. This allows really
321 . strange relocation methods to be accomodated (e.g., i960 callj
323 . bfd_reloc_status_type (*special_function)
324 . (bfd *, arelent *, struct symbol_cache_entry *, void *, asection *,
327 . {* The textual name of the relocation type. *}
330 . {* Some formats record a relocation addend in the section contents
331 . rather than with the relocation. For ELF formats this is the
332 . distinction between USE_REL and USE_RELA (though the code checks
333 . for USE_REL == 1/0). The value of this field is TRUE if the
334 . addend is recorded with the section contents; when performing a
335 . partial link (ld -r) the section contents (the data) will be
336 . modified. The value of this field is FALSE if addends are
337 . recorded with the relocation (in arelent.addend); when performing
338 . a partial link the relocation will be modified.
339 . All relocations for all ELF USE_RELA targets should set this field
340 . to FALSE (values of TRUE should be looked on with suspicion).
341 . However, the converse is not true: not all relocations of all ELF
342 . USE_REL targets set this field to TRUE. Why this is so is peculiar
343 . to each particular target. For relocs that aren't used in partial
344 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
345 . bfd_boolean partial_inplace;
347 . {* src_mask selects the part of the instruction (or data) to be used
348 . in the relocation sum. If the target relocations don't have an
349 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
350 . dst_mask to extract the addend from the section contents. If
351 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
352 . field should be zero. Non-zero values for ELF USE_RELA targets are
353 . bogus as in those cases the value in the dst_mask part of the
354 . section contents should be treated as garbage. *}
357 . {* dst_mask selects which parts of the instruction (or data) are
358 . replaced with a relocated value. *}
361 . {* When some formats create PC relative instructions, they leave
362 . the value of the pc of the place being relocated in the offset
363 . slot of the instruction, so that a PC relative relocation can
364 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
365 . Some formats leave the displacement part of an instruction
366 . empty (e.g., m88k bcs); this flag signals the fact. *}
367 . bfd_boolean pcrel_offset;
377 The HOWTO define is horrible and will go away.
379 .#define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
380 . { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
383 And will be replaced with the totally magic way. But for the
384 moment, we are compatible, so do it this way.
386 .#define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
387 . HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
388 . NAME, FALSE, 0, 0, IN)
392 This is used to fill in an empty howto entry in an array.
394 .#define EMPTY_HOWTO(C) \
395 . HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
396 . NULL, FALSE, 0, 0, FALSE)
400 Helper routine to turn a symbol into a relocation value.
402 .#define HOWTO_PREPARE(relocation, symbol) \
404 . if (symbol != NULL) \
406 . if (bfd_is_com_section (symbol->section)) \
412 . relocation = symbol->value; \
424 unsigned int bfd_get_reloc_size (reloc_howto_type *);
427 For a reloc_howto_type that operates on a fixed number of bytes,
428 this returns the number of bytes operated on.
432 bfd_get_reloc_size (reloc_howto_type
*howto
)
453 How relocs are tied together in an <<asection>>:
455 .typedef struct relent_chain
458 . struct relent_chain *next;
464 /* N_ONES produces N one bits, without overflowing machine arithmetic. */
465 #define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
472 bfd_reloc_status_type bfd_check_overflow
473 (enum complain_overflow how,
474 unsigned int bitsize,
475 unsigned int rightshift,
476 unsigned int addrsize,
480 Perform overflow checking on @var{relocation} which has
481 @var{bitsize} significant bits and will be shifted right by
482 @var{rightshift} bits, on a machine with addresses containing
483 @var{addrsize} significant bits. The result is either of
484 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
488 bfd_reloc_status_type
489 bfd_check_overflow (enum complain_overflow how
,
490 unsigned int bitsize
,
491 unsigned int rightshift
,
492 unsigned int addrsize
,
495 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
496 bfd_reloc_status_type flag
= bfd_reloc_ok
;
500 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
501 we'll be permissive: extra bits in the field mask will
502 automatically extend the address mask for purposes of the
504 fieldmask
= N_ONES (bitsize
);
505 addrmask
= N_ONES (addrsize
) | fieldmask
;
509 case complain_overflow_dont
:
512 case complain_overflow_signed
:
513 /* If any sign bits are set, all sign bits must be set. That
514 is, A must be a valid negative address after shifting. */
515 a
= (a
& addrmask
) >> rightshift
;
516 signmask
= ~ (fieldmask
>> 1);
518 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
519 flag
= bfd_reloc_overflow
;
522 case complain_overflow_unsigned
:
523 /* We have an overflow if the address does not fit in the field. */
524 a
= (a
& addrmask
) >> rightshift
;
525 if ((a
& ~ fieldmask
) != 0)
526 flag
= bfd_reloc_overflow
;
529 case complain_overflow_bitfield
:
530 /* Bitfields are sometimes signed, sometimes unsigned. We
531 explicitly allow an address wrap too, which means a bitfield
532 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
533 if the value has some, but not all, bits set outside the
536 ss
= a
& ~ fieldmask
;
537 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & ~ fieldmask
))
538 flag
= bfd_reloc_overflow
;
550 bfd_perform_relocation
553 bfd_reloc_status_type bfd_perform_relocation
555 arelent *reloc_entry,
557 asection *input_section,
559 char **error_message);
562 If @var{output_bfd} is supplied to this function, the
563 generated image will be relocatable; the relocations are
564 copied to the output file after they have been changed to
565 reflect the new state of the world. There are two ways of
566 reflecting the results of partial linkage in an output file:
567 by modifying the output data in place, and by modifying the
568 relocation record. Some native formats (e.g., basic a.out and
569 basic coff) have no way of specifying an addend in the
570 relocation type, so the addend has to go in the output data.
571 This is no big deal since in these formats the output data
572 slot will always be big enough for the addend. Complex reloc
573 types with addends were invented to solve just this problem.
574 The @var{error_message} argument is set to an error message if
575 this return @code{bfd_reloc_dangerous}.
579 bfd_reloc_status_type
580 bfd_perform_relocation (bfd
*abfd
,
581 arelent
*reloc_entry
,
583 asection
*input_section
,
585 char **error_message
)
588 bfd_reloc_status_type flag
= bfd_reloc_ok
;
589 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
590 bfd_vma output_base
= 0;
591 reloc_howto_type
*howto
= reloc_entry
->howto
;
592 asection
*reloc_target_output_section
;
595 symbol
= *(reloc_entry
->sym_ptr_ptr
);
596 if (bfd_is_abs_section (symbol
->section
)
597 && output_bfd
!= NULL
)
599 reloc_entry
->address
+= input_section
->output_offset
;
603 /* If we are not producing relocatable output, return an error if
604 the symbol is not defined. An undefined weak symbol is
605 considered to have a value of zero (SVR4 ABI, p. 4-27). */
606 if (bfd_is_und_section (symbol
->section
)
607 && (symbol
->flags
& BSF_WEAK
) == 0
608 && output_bfd
== NULL
)
609 flag
= bfd_reloc_undefined
;
611 /* If there is a function supplied to handle this relocation type,
612 call it. It'll return `bfd_reloc_continue' if further processing
614 if (howto
->special_function
)
616 bfd_reloc_status_type cont
;
617 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
618 input_section
, output_bfd
,
620 if (cont
!= bfd_reloc_continue
)
624 /* Is the address of the relocation really within the section? */
625 if (reloc_entry
->address
> (input_section
->_cooked_size
626 / bfd_octets_per_byte (abfd
)))
627 return bfd_reloc_outofrange
;
629 /* Work out which section the relocation is targetted at and the
630 initial relocation command value. */
632 /* Get symbol value. (Common symbols are special.) */
633 if (bfd_is_com_section (symbol
->section
))
636 relocation
= symbol
->value
;
638 reloc_target_output_section
= symbol
->section
->output_section
;
640 /* Convert input-section-relative symbol value to absolute. */
641 if ((output_bfd
&& ! howto
->partial_inplace
)
642 || reloc_target_output_section
== NULL
)
645 output_base
= reloc_target_output_section
->vma
;
647 relocation
+= output_base
+ symbol
->section
->output_offset
;
649 /* Add in supplied addend. */
650 relocation
+= reloc_entry
->addend
;
652 /* Here the variable relocation holds the final address of the
653 symbol we are relocating against, plus any addend. */
655 if (howto
->pc_relative
)
657 /* This is a PC relative relocation. We want to set RELOCATION
658 to the distance between the address of the symbol and the
659 location. RELOCATION is already the address of the symbol.
661 We start by subtracting the address of the section containing
664 If pcrel_offset is set, we must further subtract the position
665 of the location within the section. Some targets arrange for
666 the addend to be the negative of the position of the location
667 within the section; for example, i386-aout does this. For
668 i386-aout, pcrel_offset is FALSE. Some other targets do not
669 include the position of the location; for example, m88kbcs,
670 or ELF. For those targets, pcrel_offset is TRUE.
672 If we are producing relocatable output, then we must ensure
673 that this reloc will be correctly computed when the final
674 relocation is done. If pcrel_offset is FALSE we want to wind
675 up with the negative of the location within the section,
676 which means we must adjust the existing addend by the change
677 in the location within the section. If pcrel_offset is TRUE
678 we do not want to adjust the existing addend at all.
680 FIXME: This seems logical to me, but for the case of
681 producing relocatable output it is not what the code
682 actually does. I don't want to change it, because it seems
683 far too likely that something will break. */
686 input_section
->output_section
->vma
+ input_section
->output_offset
;
688 if (howto
->pcrel_offset
)
689 relocation
-= reloc_entry
->address
;
692 if (output_bfd
!= NULL
)
694 if (! howto
->partial_inplace
)
696 /* This is a partial relocation, and we want to apply the relocation
697 to the reloc entry rather than the raw data. Modify the reloc
698 inplace to reflect what we now know. */
699 reloc_entry
->addend
= relocation
;
700 reloc_entry
->address
+= input_section
->output_offset
;
705 /* This is a partial relocation, but inplace, so modify the
708 If we've relocated with a symbol with a section, change
709 into a ref to the section belonging to the symbol. */
711 reloc_entry
->address
+= input_section
->output_offset
;
714 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
715 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
716 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
719 /* For m68k-coff, the addend was being subtracted twice during
720 relocation with -r. Removing the line below this comment
721 fixes that problem; see PR 2953.
723 However, Ian wrote the following, regarding removing the line below,
724 which explains why it is still enabled: --djm
726 If you put a patch like that into BFD you need to check all the COFF
727 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
728 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
729 problem in a different way. There may very well be a reason that the
730 code works as it does.
732 Hmmm. The first obvious point is that bfd_perform_relocation should
733 not have any tests that depend upon the flavour. It's seem like
734 entirely the wrong place for such a thing. The second obvious point
735 is that the current code ignores the reloc addend when producing
736 relocatable output for COFF. That's peculiar. In fact, I really
737 have no idea what the point of the line you want to remove is.
739 A typical COFF reloc subtracts the old value of the symbol and adds in
740 the new value to the location in the object file (if it's a pc
741 relative reloc it adds the difference between the symbol value and the
742 location). When relocating we need to preserve that property.
744 BFD handles this by setting the addend to the negative of the old
745 value of the symbol. Unfortunately it handles common symbols in a
746 non-standard way (it doesn't subtract the old value) but that's a
747 different story (we can't change it without losing backward
748 compatibility with old object files) (coff-i386 does subtract the old
749 value, to be compatible with existing coff-i386 targets, like SCO).
751 So everything works fine when not producing relocatable output. When
752 we are producing relocatable output, logically we should do exactly
753 what we do when not producing relocatable output. Therefore, your
754 patch is correct. In fact, it should probably always just set
755 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
756 add the value into the object file. This won't hurt the COFF code,
757 which doesn't use the addend; I'm not sure what it will do to other
758 formats (the thing to check for would be whether any formats both use
759 the addend and set partial_inplace).
761 When I wanted to make coff-i386 produce relocatable output, I ran
762 into the problem that you are running into: I wanted to remove that
763 line. Rather than risk it, I made the coff-i386 relocs use a special
764 function; it's coff_i386_reloc in coff-i386.c. The function
765 specifically adds the addend field into the object file, knowing that
766 bfd_perform_relocation is not going to. If you remove that line, then
767 coff-i386.c will wind up adding the addend field in twice. It's
768 trivial to fix; it just needs to be done.
770 The problem with removing the line is just that it may break some
771 working code. With BFD it's hard to be sure of anything. The right
772 way to deal with this is simply to build and test at least all the
773 supported COFF targets. It should be straightforward if time and disk
774 space consuming. For each target:
776 2) generate some executable, and link it using -r (I would
777 probably use paranoia.o and link against newlib/libc.a, which
778 for all the supported targets would be available in
779 /usr/cygnus/progressive/H-host/target/lib/libc.a).
780 3) make the change to reloc.c
781 4) rebuild the linker
783 6) if the resulting object files are the same, you have at least
785 7) if they are different you have to figure out which version is
788 relocation
-= reloc_entry
->addend
;
790 reloc_entry
->addend
= 0;
794 reloc_entry
->addend
= relocation
;
800 reloc_entry
->addend
= 0;
803 /* FIXME: This overflow checking is incomplete, because the value
804 might have overflowed before we get here. For a correct check we
805 need to compute the value in a size larger than bitsize, but we
806 can't reasonably do that for a reloc the same size as a host
808 FIXME: We should also do overflow checking on the result after
809 adding in the value contained in the object file. */
810 if (howto
->complain_on_overflow
!= complain_overflow_dont
811 && flag
== bfd_reloc_ok
)
812 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
815 bfd_arch_bits_per_address (abfd
),
818 /* Either we are relocating all the way, or we don't want to apply
819 the relocation to the reloc entry (probably because there isn't
820 any room in the output format to describe addends to relocs). */
822 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
823 (OSF version 1.3, compiler version 3.11). It miscompiles the
837 x <<= (unsigned long) s.i0;
841 printf ("succeeded (%lx)\n", x);
845 relocation
>>= (bfd_vma
) howto
->rightshift
;
847 /* Shift everything up to where it's going to be used. */
848 relocation
<<= (bfd_vma
) howto
->bitpos
;
850 /* Wait for the day when all have the mask in them. */
853 i instruction to be left alone
854 o offset within instruction
855 r relocation offset to apply
864 (( i i i i i o o o o o from bfd_get<size>
865 and S S S S S) to get the size offset we want
866 + r r r r r r r r r r) to get the final value to place
867 and D D D D D to chop to right size
868 -----------------------
871 ( i i i i i o o o o o from bfd_get<size>
872 and N N N N N ) get instruction
873 -----------------------
879 -----------------------
880 = R R R R R R R R R R put into bfd_put<size>
884 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
890 char x
= bfd_get_8 (abfd
, (char *) data
+ octets
);
892 bfd_put_8 (abfd
, x
, (unsigned char *) data
+ octets
);
898 short x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
900 bfd_put_16 (abfd
, (bfd_vma
) x
, (unsigned char *) data
+ octets
);
905 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
907 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
912 long x
= bfd_get_32 (abfd
, (bfd_byte
*) data
+ octets
);
913 relocation
= -relocation
;
915 bfd_put_32 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
921 long x
= bfd_get_16 (abfd
, (bfd_byte
*) data
+ octets
);
922 relocation
= -relocation
;
924 bfd_put_16 (abfd
, (bfd_vma
) x
, (bfd_byte
*) data
+ octets
);
935 bfd_vma x
= bfd_get_64 (abfd
, (bfd_byte
*) data
+ octets
);
937 bfd_put_64 (abfd
, x
, (bfd_byte
*) data
+ octets
);
944 return bfd_reloc_other
;
952 bfd_install_relocation
955 bfd_reloc_status_type bfd_install_relocation
957 arelent *reloc_entry,
958 void *data, bfd_vma data_start,
959 asection *input_section,
960 char **error_message);
963 This looks remarkably like <<bfd_perform_relocation>>, except it
964 does not expect that the section contents have been filled in.
965 I.e., it's suitable for use when creating, rather than applying
968 For now, this function should be considered reserved for the
972 bfd_reloc_status_type
973 bfd_install_relocation (bfd
*abfd
,
974 arelent
*reloc_entry
,
976 bfd_vma data_start_offset
,
977 asection
*input_section
,
978 char **error_message
)
981 bfd_reloc_status_type flag
= bfd_reloc_ok
;
982 bfd_size_type octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
);
983 bfd_vma output_base
= 0;
984 reloc_howto_type
*howto
= reloc_entry
->howto
;
985 asection
*reloc_target_output_section
;
989 symbol
= *(reloc_entry
->sym_ptr_ptr
);
990 if (bfd_is_abs_section (symbol
->section
))
992 reloc_entry
->address
+= input_section
->output_offset
;
996 /* If there is a function supplied to handle this relocation type,
997 call it. It'll return `bfd_reloc_continue' if further processing
999 if (howto
->special_function
)
1001 bfd_reloc_status_type cont
;
1003 /* XXX - The special_function calls haven't been fixed up to deal
1004 with creating new relocations and section contents. */
1005 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1006 /* XXX - Non-portable! */
1007 ((bfd_byte
*) data_start
1008 - data_start_offset
),
1009 input_section
, abfd
, error_message
);
1010 if (cont
!= bfd_reloc_continue
)
1014 /* Is the address of the relocation really within the section? */
1015 if (reloc_entry
->address
> (input_section
->_cooked_size
1016 / bfd_octets_per_byte (abfd
)))
1017 return bfd_reloc_outofrange
;
1019 /* Work out which section the relocation is targetted at and the
1020 initial relocation command value. */
1022 /* Get symbol value. (Common symbols are special.) */
1023 if (bfd_is_com_section (symbol
->section
))
1026 relocation
= symbol
->value
;
1028 reloc_target_output_section
= symbol
->section
->output_section
;
1030 /* Convert input-section-relative symbol value to absolute. */
1031 if (! howto
->partial_inplace
)
1034 output_base
= reloc_target_output_section
->vma
;
1036 relocation
+= output_base
+ symbol
->section
->output_offset
;
1038 /* Add in supplied addend. */
1039 relocation
+= reloc_entry
->addend
;
1041 /* Here the variable relocation holds the final address of the
1042 symbol we are relocating against, plus any addend. */
1044 if (howto
->pc_relative
)
1046 /* This is a PC relative relocation. We want to set RELOCATION
1047 to the distance between the address of the symbol and the
1048 location. RELOCATION is already the address of the symbol.
1050 We start by subtracting the address of the section containing
1053 If pcrel_offset is set, we must further subtract the position
1054 of the location within the section. Some targets arrange for
1055 the addend to be the negative of the position of the location
1056 within the section; for example, i386-aout does this. For
1057 i386-aout, pcrel_offset is FALSE. Some other targets do not
1058 include the position of the location; for example, m88kbcs,
1059 or ELF. For those targets, pcrel_offset is TRUE.
1061 If we are producing relocatable output, then we must ensure
1062 that this reloc will be correctly computed when the final
1063 relocation is done. If pcrel_offset is FALSE we want to wind
1064 up with the negative of the location within the section,
1065 which means we must adjust the existing addend by the change
1066 in the location within the section. If pcrel_offset is TRUE
1067 we do not want to adjust the existing addend at all.
1069 FIXME: This seems logical to me, but for the case of
1070 producing relocatable output it is not what the code
1071 actually does. I don't want to change it, because it seems
1072 far too likely that something will break. */
1075 input_section
->output_section
->vma
+ input_section
->output_offset
;
1077 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1078 relocation
-= reloc_entry
->address
;
1081 if (! howto
->partial_inplace
)
1083 /* This is a partial relocation, and we want to apply the relocation
1084 to the reloc entry rather than the raw data. Modify the reloc
1085 inplace to reflect what we now know. */
1086 reloc_entry
->addend
= relocation
;
1087 reloc_entry
->address
+= input_section
->output_offset
;
1092 /* This is a partial relocation, but inplace, so modify the
1095 If we've relocated with a symbol with a section, change
1096 into a ref to the section belonging to the symbol. */
1097 reloc_entry
->address
+= input_section
->output_offset
;
1100 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
1101 && strcmp (abfd
->xvec
->name
, "coff-Intel-little") != 0
1102 && strcmp (abfd
->xvec
->name
, "coff-Intel-big") != 0)
1105 /* For m68k-coff, the addend was being subtracted twice during
1106 relocation with -r. Removing the line below this comment
1107 fixes that problem; see PR 2953.
1109 However, Ian wrote the following, regarding removing the line below,
1110 which explains why it is still enabled: --djm
1112 If you put a patch like that into BFD you need to check all the COFF
1113 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
1114 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
1115 problem in a different way. There may very well be a reason that the
1116 code works as it does.
1118 Hmmm. The first obvious point is that bfd_install_relocation should
1119 not have any tests that depend upon the flavour. It's seem like
1120 entirely the wrong place for such a thing. The second obvious point
1121 is that the current code ignores the reloc addend when producing
1122 relocatable output for COFF. That's peculiar. In fact, I really
1123 have no idea what the point of the line you want to remove is.
1125 A typical COFF reloc subtracts the old value of the symbol and adds in
1126 the new value to the location in the object file (if it's a pc
1127 relative reloc it adds the difference between the symbol value and the
1128 location). When relocating we need to preserve that property.
1130 BFD handles this by setting the addend to the negative of the old
1131 value of the symbol. Unfortunately it handles common symbols in a
1132 non-standard way (it doesn't subtract the old value) but that's a
1133 different story (we can't change it without losing backward
1134 compatibility with old object files) (coff-i386 does subtract the old
1135 value, to be compatible with existing coff-i386 targets, like SCO).
1137 So everything works fine when not producing relocatable output. When
1138 we are producing relocatable output, logically we should do exactly
1139 what we do when not producing relocatable output. Therefore, your
1140 patch is correct. In fact, it should probably always just set
1141 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
1142 add the value into the object file. This won't hurt the COFF code,
1143 which doesn't use the addend; I'm not sure what it will do to other
1144 formats (the thing to check for would be whether any formats both use
1145 the addend and set partial_inplace).
1147 When I wanted to make coff-i386 produce relocatable output, I ran
1148 into the problem that you are running into: I wanted to remove that
1149 line. Rather than risk it, I made the coff-i386 relocs use a special
1150 function; it's coff_i386_reloc in coff-i386.c. The function
1151 specifically adds the addend field into the object file, knowing that
1152 bfd_install_relocation is not going to. If you remove that line, then
1153 coff-i386.c will wind up adding the addend field in twice. It's
1154 trivial to fix; it just needs to be done.
1156 The problem with removing the line is just that it may break some
1157 working code. With BFD it's hard to be sure of anything. The right
1158 way to deal with this is simply to build and test at least all the
1159 supported COFF targets. It should be straightforward if time and disk
1160 space consuming. For each target:
1162 2) generate some executable, and link it using -r (I would
1163 probably use paranoia.o and link against newlib/libc.a, which
1164 for all the supported targets would be available in
1165 /usr/cygnus/progressive/H-host/target/lib/libc.a).
1166 3) make the change to reloc.c
1167 4) rebuild the linker
1169 6) if the resulting object files are the same, you have at least
1171 7) if they are different you have to figure out which version is
1173 relocation
-= reloc_entry
->addend
;
1175 reloc_entry
->addend
= 0;
1179 reloc_entry
->addend
= relocation
;
1183 /* FIXME: This overflow checking is incomplete, because the value
1184 might have overflowed before we get here. For a correct check we
1185 need to compute the value in a size larger than bitsize, but we
1186 can't reasonably do that for a reloc the same size as a host
1188 FIXME: We should also do overflow checking on the result after
1189 adding in the value contained in the object file. */
1190 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1191 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1194 bfd_arch_bits_per_address (abfd
),
1197 /* Either we are relocating all the way, or we don't want to apply
1198 the relocation to the reloc entry (probably because there isn't
1199 any room in the output format to describe addends to relocs). */
1201 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
1202 (OSF version 1.3, compiler version 3.11). It miscompiles the
1216 x <<= (unsigned long) s.i0;
1218 printf ("failed\n");
1220 printf ("succeeded (%lx)\n", x);
1224 relocation
>>= (bfd_vma
) howto
->rightshift
;
1226 /* Shift everything up to where it's going to be used. */
1227 relocation
<<= (bfd_vma
) howto
->bitpos
;
1229 /* Wait for the day when all have the mask in them. */
1232 i instruction to be left alone
1233 o offset within instruction
1234 r relocation offset to apply
1243 (( i i i i i o o o o o from bfd_get<size>
1244 and S S S S S) to get the size offset we want
1245 + r r r r r r r r r r) to get the final value to place
1246 and D D D D D to chop to right size
1247 -----------------------
1250 ( i i i i i o o o o o from bfd_get<size>
1251 and N N N N N ) get instruction
1252 -----------------------
1258 -----------------------
1259 = R R R R R R R R R R put into bfd_put<size>
1263 x = ( (x & ~howto->dst_mask) | (((x & howto->src_mask) + relocation) & howto->dst_mask))
1265 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1267 switch (howto
->size
)
1271 char x
= bfd_get_8 (abfd
, data
);
1273 bfd_put_8 (abfd
, x
, data
);
1279 short x
= bfd_get_16 (abfd
, data
);
1281 bfd_put_16 (abfd
, (bfd_vma
) x
, data
);
1286 long x
= bfd_get_32 (abfd
, data
);
1288 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1293 long x
= bfd_get_32 (abfd
, data
);
1294 relocation
= -relocation
;
1296 bfd_put_32 (abfd
, (bfd_vma
) x
, data
);
1306 bfd_vma x
= bfd_get_64 (abfd
, data
);
1308 bfd_put_64 (abfd
, x
, data
);
1312 return bfd_reloc_other
;
1318 /* This relocation routine is used by some of the backend linkers.
1319 They do not construct asymbol or arelent structures, so there is no
1320 reason for them to use bfd_perform_relocation. Also,
1321 bfd_perform_relocation is so hacked up it is easier to write a new
1322 function than to try to deal with it.
1324 This routine does a final relocation. Whether it is useful for a
1325 relocatable link depends upon how the object format defines
1328 FIXME: This routine ignores any special_function in the HOWTO,
1329 since the existing special_function values have been written for
1330 bfd_perform_relocation.
1332 HOWTO is the reloc howto information.
1333 INPUT_BFD is the BFD which the reloc applies to.
1334 INPUT_SECTION is the section which the reloc applies to.
1335 CONTENTS is the contents of the section.
1336 ADDRESS is the address of the reloc within INPUT_SECTION.
1337 VALUE is the value of the symbol the reloc refers to.
1338 ADDEND is the addend of the reloc. */
1340 bfd_reloc_status_type
1341 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1343 asection
*input_section
,
1351 /* Sanity check the address. */
1352 if (address
> input_section
->_raw_size
)
1353 return bfd_reloc_outofrange
;
1355 /* This function assumes that we are dealing with a basic relocation
1356 against a symbol. We want to compute the value of the symbol to
1357 relocate to. This is just VALUE, the value of the symbol, plus
1358 ADDEND, any addend associated with the reloc. */
1359 relocation
= value
+ addend
;
1361 /* If the relocation is PC relative, we want to set RELOCATION to
1362 the distance between the symbol (currently in RELOCATION) and the
1363 location we are relocating. Some targets (e.g., i386-aout)
1364 arrange for the contents of the section to be the negative of the
1365 offset of the location within the section; for such targets
1366 pcrel_offset is FALSE. Other targets (e.g., m88kbcs or ELF)
1367 simply leave the contents of the section as zero; for such
1368 targets pcrel_offset is TRUE. If pcrel_offset is FALSE we do not
1369 need to subtract out the offset of the location within the
1370 section (which is just ADDRESS). */
1371 if (howto
->pc_relative
)
1373 relocation
-= (input_section
->output_section
->vma
1374 + input_section
->output_offset
);
1375 if (howto
->pcrel_offset
)
1376 relocation
-= address
;
1379 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1380 contents
+ address
);
1383 /* Relocate a given location using a given value and howto. */
1385 bfd_reloc_status_type
1386 _bfd_relocate_contents (reloc_howto_type
*howto
,
1393 bfd_reloc_status_type flag
;
1394 unsigned int rightshift
= howto
->rightshift
;
1395 unsigned int bitpos
= howto
->bitpos
;
1397 /* If the size is negative, negate RELOCATION. This isn't very
1399 if (howto
->size
< 0)
1400 relocation
= -relocation
;
1402 /* Get the value we are going to relocate. */
1403 size
= bfd_get_reloc_size (howto
);
1410 x
= bfd_get_8 (input_bfd
, location
);
1413 x
= bfd_get_16 (input_bfd
, location
);
1416 x
= bfd_get_32 (input_bfd
, location
);
1420 x
= bfd_get_64 (input_bfd
, location
);
1427 /* Check for overflow. FIXME: We may drop bits during the addition
1428 which we don't check for. We must either check at every single
1429 operation, which would be tedious, or we must do the computations
1430 in a type larger than bfd_vma, which would be inefficient. */
1431 flag
= bfd_reloc_ok
;
1432 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1434 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1437 /* Get the values to be added together. For signed and unsigned
1438 relocations, we assume that all values should be truncated to
1439 the size of an address. For bitfields, all the bits matter.
1440 See also bfd_check_overflow. */
1441 fieldmask
= N_ONES (howto
->bitsize
);
1442 addrmask
= N_ONES (bfd_arch_bits_per_address (input_bfd
)) | fieldmask
;
1444 b
= x
& howto
->src_mask
;
1446 switch (howto
->complain_on_overflow
)
1448 case complain_overflow_signed
:
1449 a
= (a
& addrmask
) >> rightshift
;
1451 /* If any sign bits are set, all sign bits must be set.
1452 That is, A must be a valid negative address after
1454 signmask
= ~ (fieldmask
>> 1);
1456 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
1457 flag
= bfd_reloc_overflow
;
1459 /* We only need this next bit of code if the sign bit of B
1460 is below the sign bit of A. This would only happen if
1461 SRC_MASK had fewer bits than BITSIZE. Note that if
1462 SRC_MASK has more bits than BITSIZE, we can get into
1463 trouble; we would need to verify that B is in range, as
1464 we do for A above. */
1465 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1467 /* Set all the bits above the sign bit. */
1468 b
= (b
^ signmask
) - signmask
;
1470 b
= (b
& addrmask
) >> bitpos
;
1472 /* Now we can do the addition. */
1475 /* See if the result has the correct sign. Bits above the
1476 sign bit are junk now; ignore them. If the sum is
1477 positive, make sure we did not have all negative inputs;
1478 if the sum is negative, make sure we did not have all
1479 positive inputs. The test below looks only at the sign
1480 bits, and it really just
1481 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1483 signmask
= (fieldmask
>> 1) + 1;
1484 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
)
1485 flag
= bfd_reloc_overflow
;
1489 case complain_overflow_unsigned
:
1490 /* Checking for an unsigned overflow is relatively easy:
1491 trim the addresses and add, and trim the result as well.
1492 Overflow is normally indicated when the result does not
1493 fit in the field. However, we also need to consider the
1494 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1495 input is 0x80000000, and bfd_vma is only 32 bits; then we
1496 will get sum == 0, but there is an overflow, since the
1497 inputs did not fit in the field. Instead of doing a
1498 separate test, we can check for this by or-ing in the
1499 operands when testing for the sum overflowing its final
1501 a
= (a
& addrmask
) >> rightshift
;
1502 b
= (b
& addrmask
) >> bitpos
;
1503 sum
= (a
+ b
) & addrmask
;
1504 if ((a
| b
| sum
) & ~ fieldmask
)
1505 flag
= bfd_reloc_overflow
;
1509 case complain_overflow_bitfield
:
1510 /* Much like the signed check, but for a field one bit
1511 wider, and no trimming inputs with addrmask. We allow a
1512 bitfield to represent numbers in the range -2**n to
1513 2**n-1, where n is the number of bits in the field.
1514 Note that when bfd_vma is 32 bits, a 32-bit reloc can't
1515 overflow, which is exactly what we want. */
1518 signmask
= ~ fieldmask
;
1520 if (ss
!= 0 && ss
!= (((bfd_vma
) -1 >> rightshift
) & signmask
))
1521 flag
= bfd_reloc_overflow
;
1523 signmask
= ((~ howto
->src_mask
) >> 1) & howto
->src_mask
;
1524 b
= (b
^ signmask
) - signmask
;
1530 /* We mask with addrmask here to explicitly allow an address
1531 wrap-around. The Linux kernel relies on it, and it is
1532 the only way to write assembler code which can run when
1533 loaded at a location 0x80000000 away from the location at
1534 which it is linked. */
1535 signmask
= fieldmask
+ 1;
1536 if (((~ (a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1537 flag
= bfd_reloc_overflow
;
1546 /* Put RELOCATION in the right bits. */
1547 relocation
>>= (bfd_vma
) rightshift
;
1548 relocation
<<= (bfd_vma
) bitpos
;
1550 /* Add RELOCATION to the right bits of X. */
1551 x
= ((x
& ~howto
->dst_mask
)
1552 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1554 /* Put the relocated value back in the object file. */
1561 bfd_put_8 (input_bfd
, x
, location
);
1564 bfd_put_16 (input_bfd
, x
, location
);
1567 bfd_put_32 (input_bfd
, x
, location
);
1571 bfd_put_64 (input_bfd
, x
, location
);
1584 howto manager, , typedef arelent, Relocations
1589 When an application wants to create a relocation, but doesn't
1590 know what the target machine might call it, it can find out by
1591 using this bit of code.
1600 The insides of a reloc code. The idea is that, eventually, there
1601 will be one enumerator for every type of relocation we ever do.
1602 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1603 return a howto pointer.
1605 This does mean that the application must determine the correct
1606 enumerator value; you can't get a howto pointer from a random set
1627 Basic absolute relocations of N bits.
1642 PC-relative relocations. Sometimes these are relative to the address
1643 of the relocation itself; sometimes they are relative to the start of
1644 the section containing the relocation. It depends on the specific target.
1646 The 24-bit relocation is used in some Intel 960 configurations.
1649 BFD_RELOC_32_GOT_PCREL
1651 BFD_RELOC_16_GOT_PCREL
1653 BFD_RELOC_8_GOT_PCREL
1659 BFD_RELOC_LO16_GOTOFF
1661 BFD_RELOC_HI16_GOTOFF
1663 BFD_RELOC_HI16_S_GOTOFF
1667 BFD_RELOC_64_PLT_PCREL
1669 BFD_RELOC_32_PLT_PCREL
1671 BFD_RELOC_24_PLT_PCREL
1673 BFD_RELOC_16_PLT_PCREL
1675 BFD_RELOC_8_PLT_PCREL
1683 BFD_RELOC_LO16_PLTOFF
1685 BFD_RELOC_HI16_PLTOFF
1687 BFD_RELOC_HI16_S_PLTOFF
1694 BFD_RELOC_68K_GLOB_DAT
1696 BFD_RELOC_68K_JMP_SLOT
1698 BFD_RELOC_68K_RELATIVE
1700 Relocations used by 68K ELF.
1703 BFD_RELOC_32_BASEREL
1705 BFD_RELOC_16_BASEREL
1707 BFD_RELOC_LO16_BASEREL
1709 BFD_RELOC_HI16_BASEREL
1711 BFD_RELOC_HI16_S_BASEREL
1717 Linkage-table relative.
1722 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1725 BFD_RELOC_32_PCREL_S2
1727 BFD_RELOC_16_PCREL_S2
1729 BFD_RELOC_23_PCREL_S2
1731 These PC-relative relocations are stored as word displacements --
1732 i.e., byte displacements shifted right two bits. The 30-bit word
1733 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1734 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1735 signed 16-bit displacement is used on the MIPS, and the 23-bit
1736 displacement is used on the Alpha.
1743 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1744 the target word. These are used on the SPARC.
1751 For systems that allocate a Global Pointer register, these are
1752 displacements off that register. These relocation types are
1753 handled specially, because the value the register will have is
1754 decided relatively late.
1757 BFD_RELOC_I960_CALLJ
1759 Reloc types used for i960/b.out.
1764 BFD_RELOC_SPARC_WDISP22
1770 BFD_RELOC_SPARC_GOT10
1772 BFD_RELOC_SPARC_GOT13
1774 BFD_RELOC_SPARC_GOT22
1776 BFD_RELOC_SPARC_PC10
1778 BFD_RELOC_SPARC_PC22
1780 BFD_RELOC_SPARC_WPLT30
1782 BFD_RELOC_SPARC_COPY
1784 BFD_RELOC_SPARC_GLOB_DAT
1786 BFD_RELOC_SPARC_JMP_SLOT
1788 BFD_RELOC_SPARC_RELATIVE
1790 BFD_RELOC_SPARC_UA16
1792 BFD_RELOC_SPARC_UA32
1794 BFD_RELOC_SPARC_UA64
1796 SPARC ELF relocations. There is probably some overlap with other
1797 relocation types already defined.
1800 BFD_RELOC_SPARC_BASE13
1802 BFD_RELOC_SPARC_BASE22
1804 I think these are specific to SPARC a.out (e.g., Sun 4).
1814 BFD_RELOC_SPARC_OLO10
1816 BFD_RELOC_SPARC_HH22
1818 BFD_RELOC_SPARC_HM10
1820 BFD_RELOC_SPARC_LM22
1822 BFD_RELOC_SPARC_PC_HH22
1824 BFD_RELOC_SPARC_PC_HM10
1826 BFD_RELOC_SPARC_PC_LM22
1828 BFD_RELOC_SPARC_WDISP16
1830 BFD_RELOC_SPARC_WDISP19
1838 BFD_RELOC_SPARC_DISP64
1841 BFD_RELOC_SPARC_PLT32
1843 BFD_RELOC_SPARC_PLT64
1845 BFD_RELOC_SPARC_HIX22
1847 BFD_RELOC_SPARC_LOX10
1855 BFD_RELOC_SPARC_REGISTER
1860 BFD_RELOC_SPARC_REV32
1862 SPARC little endian relocation
1864 BFD_RELOC_SPARC_TLS_GD_HI22
1866 BFD_RELOC_SPARC_TLS_GD_LO10
1868 BFD_RELOC_SPARC_TLS_GD_ADD
1870 BFD_RELOC_SPARC_TLS_GD_CALL
1872 BFD_RELOC_SPARC_TLS_LDM_HI22
1874 BFD_RELOC_SPARC_TLS_LDM_LO10
1876 BFD_RELOC_SPARC_TLS_LDM_ADD
1878 BFD_RELOC_SPARC_TLS_LDM_CALL
1880 BFD_RELOC_SPARC_TLS_LDO_HIX22
1882 BFD_RELOC_SPARC_TLS_LDO_LOX10
1884 BFD_RELOC_SPARC_TLS_LDO_ADD
1886 BFD_RELOC_SPARC_TLS_IE_HI22
1888 BFD_RELOC_SPARC_TLS_IE_LO10
1890 BFD_RELOC_SPARC_TLS_IE_LD
1892 BFD_RELOC_SPARC_TLS_IE_LDX
1894 BFD_RELOC_SPARC_TLS_IE_ADD
1896 BFD_RELOC_SPARC_TLS_LE_HIX22
1898 BFD_RELOC_SPARC_TLS_LE_LOX10
1900 BFD_RELOC_SPARC_TLS_DTPMOD32
1902 BFD_RELOC_SPARC_TLS_DTPMOD64
1904 BFD_RELOC_SPARC_TLS_DTPOFF32
1906 BFD_RELOC_SPARC_TLS_DTPOFF64
1908 BFD_RELOC_SPARC_TLS_TPOFF32
1910 BFD_RELOC_SPARC_TLS_TPOFF64
1912 SPARC TLS relocations
1915 BFD_RELOC_ALPHA_GPDISP_HI16
1917 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1918 "addend" in some special way.
1919 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1920 writing; when reading, it will be the absolute section symbol. The
1921 addend is the displacement in bytes of the "lda" instruction from
1922 the "ldah" instruction (which is at the address of this reloc).
1924 BFD_RELOC_ALPHA_GPDISP_LO16
1926 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1927 with GPDISP_HI16 relocs. The addend is ignored when writing the
1928 relocations out, and is filled in with the file's GP value on
1929 reading, for convenience.
1932 BFD_RELOC_ALPHA_GPDISP
1934 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1935 relocation except that there is no accompanying GPDISP_LO16
1939 BFD_RELOC_ALPHA_LITERAL
1941 BFD_RELOC_ALPHA_ELF_LITERAL
1943 BFD_RELOC_ALPHA_LITUSE
1945 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1946 the assembler turns it into a LDQ instruction to load the address of
1947 the symbol, and then fills in a register in the real instruction.
1949 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1950 section symbol. The addend is ignored when writing, but is filled
1951 in with the file's GP value on reading, for convenience, as with the
1954 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1955 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1956 but it generates output not based on the position within the .got
1957 section, but relative to the GP value chosen for the file during the
1960 The LITUSE reloc, on the instruction using the loaded address, gives
1961 information to the linker that it might be able to use to optimize
1962 away some literal section references. The symbol is ignored (read
1963 as the absolute section symbol), and the "addend" indicates the type
1964 of instruction using the register:
1965 1 - "memory" fmt insn
1966 2 - byte-manipulation (byte offset reg)
1967 3 - jsr (target of branch)
1970 BFD_RELOC_ALPHA_HINT
1972 The HINT relocation indicates a value that should be filled into the
1973 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1974 prediction logic which may be provided on some processors.
1977 BFD_RELOC_ALPHA_LINKAGE
1979 The LINKAGE relocation outputs a linkage pair in the object file,
1980 which is filled by the linker.
1983 BFD_RELOC_ALPHA_CODEADDR
1985 The CODEADDR relocation outputs a STO_CA in the object file,
1986 which is filled by the linker.
1989 BFD_RELOC_ALPHA_GPREL_HI16
1991 BFD_RELOC_ALPHA_GPREL_LO16
1993 The GPREL_HI/LO relocations together form a 32-bit offset from the
1997 BFD_RELOC_ALPHA_BRSGP
1999 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
2000 share a common GP, and the target address is adjusted for
2001 STO_ALPHA_STD_GPLOAD.
2004 BFD_RELOC_ALPHA_TLSGD
2006 BFD_RELOC_ALPHA_TLSLDM
2008 BFD_RELOC_ALPHA_DTPMOD64
2010 BFD_RELOC_ALPHA_GOTDTPREL16
2012 BFD_RELOC_ALPHA_DTPREL64
2014 BFD_RELOC_ALPHA_DTPREL_HI16
2016 BFD_RELOC_ALPHA_DTPREL_LO16
2018 BFD_RELOC_ALPHA_DTPREL16
2020 BFD_RELOC_ALPHA_GOTTPREL16
2022 BFD_RELOC_ALPHA_TPREL64
2024 BFD_RELOC_ALPHA_TPREL_HI16
2026 BFD_RELOC_ALPHA_TPREL_LO16
2028 BFD_RELOC_ALPHA_TPREL16
2030 Alpha thread-local storage relocations.
2035 Bits 27..2 of the relocation address shifted right 2 bits;
2036 simple reloc otherwise.
2039 BFD_RELOC_MIPS16_JMP
2041 The MIPS16 jump instruction.
2044 BFD_RELOC_MIPS16_GPREL
2046 MIPS16 GP relative reloc.
2051 High 16 bits of 32-bit value; simple reloc.
2055 High 16 bits of 32-bit value but the low 16 bits will be sign
2056 extended and added to form the final result. If the low 16
2057 bits form a negative number, we need to add one to the high value
2058 to compensate for the borrow when the low bits are added.
2064 BFD_RELOC_PCREL_HI16_S
2066 Like BFD_RELOC_HI16_S, but PC relative.
2068 BFD_RELOC_PCREL_LO16
2070 Like BFD_RELOC_LO16, but PC relative.
2073 BFD_RELOC_MIPS_LITERAL
2075 Relocation against a MIPS literal section.
2078 BFD_RELOC_MIPS_GOT16
2080 BFD_RELOC_MIPS_CALL16
2082 BFD_RELOC_MIPS_GOT_HI16
2084 BFD_RELOC_MIPS_GOT_LO16
2086 BFD_RELOC_MIPS_CALL_HI16
2088 BFD_RELOC_MIPS_CALL_LO16
2092 BFD_RELOC_MIPS_GOT_PAGE
2094 BFD_RELOC_MIPS_GOT_OFST
2096 BFD_RELOC_MIPS_GOT_DISP
2098 BFD_RELOC_MIPS_SHIFT5
2100 BFD_RELOC_MIPS_SHIFT6
2102 BFD_RELOC_MIPS_INSERT_A
2104 BFD_RELOC_MIPS_INSERT_B
2106 BFD_RELOC_MIPS_DELETE
2108 BFD_RELOC_MIPS_HIGHEST
2110 BFD_RELOC_MIPS_HIGHER
2112 BFD_RELOC_MIPS_SCN_DISP
2114 BFD_RELOC_MIPS_REL16
2116 BFD_RELOC_MIPS_RELGOT
2121 BFD_RELOC_FRV_LABEL16
2123 BFD_RELOC_FRV_LABEL24
2129 BFD_RELOC_FRV_GPREL12
2131 BFD_RELOC_FRV_GPRELU12
2133 BFD_RELOC_FRV_GPREL32
2135 BFD_RELOC_FRV_GPRELHI
2137 BFD_RELOC_FRV_GPRELLO
2139 Fujitsu Frv Relocations.
2143 MIPS ELF relocations.
2147 BFD_RELOC_MN10300_GOTOFF24
2149 This is a 24bit GOT-relative reloc for the mn10300.
2151 BFD_RELOC_MN10300_GOT32
2153 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2156 BFD_RELOC_MN10300_GOT24
2158 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2161 BFD_RELOC_MN10300_GOT16
2163 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2166 BFD_RELOC_MN10300_COPY
2168 Copy symbol at runtime.
2170 BFD_RELOC_MN10300_GLOB_DAT
2174 BFD_RELOC_MN10300_JMP_SLOT
2178 BFD_RELOC_MN10300_RELATIVE
2180 Adjust by program base.
2190 BFD_RELOC_386_GLOB_DAT
2192 BFD_RELOC_386_JUMP_SLOT
2194 BFD_RELOC_386_RELATIVE
2196 BFD_RELOC_386_GOTOFF
2200 BFD_RELOC_386_TLS_TPOFF
2202 BFD_RELOC_386_TLS_IE
2204 BFD_RELOC_386_TLS_GOTIE
2206 BFD_RELOC_386_TLS_LE
2208 BFD_RELOC_386_TLS_GD
2210 BFD_RELOC_386_TLS_LDM
2212 BFD_RELOC_386_TLS_LDO_32
2214 BFD_RELOC_386_TLS_IE_32
2216 BFD_RELOC_386_TLS_LE_32
2218 BFD_RELOC_386_TLS_DTPMOD32
2220 BFD_RELOC_386_TLS_DTPOFF32
2222 BFD_RELOC_386_TLS_TPOFF32
2224 i386/elf relocations
2227 BFD_RELOC_X86_64_GOT32
2229 BFD_RELOC_X86_64_PLT32
2231 BFD_RELOC_X86_64_COPY
2233 BFD_RELOC_X86_64_GLOB_DAT
2235 BFD_RELOC_X86_64_JUMP_SLOT
2237 BFD_RELOC_X86_64_RELATIVE
2239 BFD_RELOC_X86_64_GOTPCREL
2241 BFD_RELOC_X86_64_32S
2243 BFD_RELOC_X86_64_DTPMOD64
2245 BFD_RELOC_X86_64_DTPOFF64
2247 BFD_RELOC_X86_64_TPOFF64
2249 BFD_RELOC_X86_64_TLSGD
2251 BFD_RELOC_X86_64_TLSLD
2253 BFD_RELOC_X86_64_DTPOFF32
2255 BFD_RELOC_X86_64_GOTTPOFF
2257 BFD_RELOC_X86_64_TPOFF32
2259 x86-64/elf relocations
2262 BFD_RELOC_NS32K_IMM_8
2264 BFD_RELOC_NS32K_IMM_16
2266 BFD_RELOC_NS32K_IMM_32
2268 BFD_RELOC_NS32K_IMM_8_PCREL
2270 BFD_RELOC_NS32K_IMM_16_PCREL
2272 BFD_RELOC_NS32K_IMM_32_PCREL
2274 BFD_RELOC_NS32K_DISP_8
2276 BFD_RELOC_NS32K_DISP_16
2278 BFD_RELOC_NS32K_DISP_32
2280 BFD_RELOC_NS32K_DISP_8_PCREL
2282 BFD_RELOC_NS32K_DISP_16_PCREL
2284 BFD_RELOC_NS32K_DISP_32_PCREL
2289 BFD_RELOC_PDP11_DISP_8_PCREL
2291 BFD_RELOC_PDP11_DISP_6_PCREL
2296 BFD_RELOC_PJ_CODE_HI16
2298 BFD_RELOC_PJ_CODE_LO16
2300 BFD_RELOC_PJ_CODE_DIR16
2302 BFD_RELOC_PJ_CODE_DIR32
2304 BFD_RELOC_PJ_CODE_REL16
2306 BFD_RELOC_PJ_CODE_REL32
2308 Picojava relocs. Not all of these appear in object files.
2319 BFD_RELOC_PPC_B16_BRTAKEN
2321 BFD_RELOC_PPC_B16_BRNTAKEN
2325 BFD_RELOC_PPC_BA16_BRTAKEN
2327 BFD_RELOC_PPC_BA16_BRNTAKEN
2331 BFD_RELOC_PPC_GLOB_DAT
2333 BFD_RELOC_PPC_JMP_SLOT
2335 BFD_RELOC_PPC_RELATIVE
2337 BFD_RELOC_PPC_LOCAL24PC
2339 BFD_RELOC_PPC_EMB_NADDR32
2341 BFD_RELOC_PPC_EMB_NADDR16
2343 BFD_RELOC_PPC_EMB_NADDR16_LO
2345 BFD_RELOC_PPC_EMB_NADDR16_HI
2347 BFD_RELOC_PPC_EMB_NADDR16_HA
2349 BFD_RELOC_PPC_EMB_SDAI16
2351 BFD_RELOC_PPC_EMB_SDA2I16
2353 BFD_RELOC_PPC_EMB_SDA2REL
2355 BFD_RELOC_PPC_EMB_SDA21
2357 BFD_RELOC_PPC_EMB_MRKREF
2359 BFD_RELOC_PPC_EMB_RELSEC16
2361 BFD_RELOC_PPC_EMB_RELST_LO
2363 BFD_RELOC_PPC_EMB_RELST_HI
2365 BFD_RELOC_PPC_EMB_RELST_HA
2367 BFD_RELOC_PPC_EMB_BIT_FLD
2369 BFD_RELOC_PPC_EMB_RELSDA
2371 BFD_RELOC_PPC64_HIGHER
2373 BFD_RELOC_PPC64_HIGHER_S
2375 BFD_RELOC_PPC64_HIGHEST
2377 BFD_RELOC_PPC64_HIGHEST_S
2379 BFD_RELOC_PPC64_TOC16_LO
2381 BFD_RELOC_PPC64_TOC16_HI
2383 BFD_RELOC_PPC64_TOC16_HA
2387 BFD_RELOC_PPC64_PLTGOT16
2389 BFD_RELOC_PPC64_PLTGOT16_LO
2391 BFD_RELOC_PPC64_PLTGOT16_HI
2393 BFD_RELOC_PPC64_PLTGOT16_HA
2395 BFD_RELOC_PPC64_ADDR16_DS
2397 BFD_RELOC_PPC64_ADDR16_LO_DS
2399 BFD_RELOC_PPC64_GOT16_DS
2401 BFD_RELOC_PPC64_GOT16_LO_DS
2403 BFD_RELOC_PPC64_PLT16_LO_DS
2405 BFD_RELOC_PPC64_SECTOFF_DS
2407 BFD_RELOC_PPC64_SECTOFF_LO_DS
2409 BFD_RELOC_PPC64_TOC16_DS
2411 BFD_RELOC_PPC64_TOC16_LO_DS
2413 BFD_RELOC_PPC64_PLTGOT16_DS
2415 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2417 Power(rs6000) and PowerPC relocations.
2422 BFD_RELOC_PPC_DTPMOD
2424 BFD_RELOC_PPC_TPREL16
2426 BFD_RELOC_PPC_TPREL16_LO
2428 BFD_RELOC_PPC_TPREL16_HI
2430 BFD_RELOC_PPC_TPREL16_HA
2434 BFD_RELOC_PPC_DTPREL16
2436 BFD_RELOC_PPC_DTPREL16_LO
2438 BFD_RELOC_PPC_DTPREL16_HI
2440 BFD_RELOC_PPC_DTPREL16_HA
2442 BFD_RELOC_PPC_DTPREL
2444 BFD_RELOC_PPC_GOT_TLSGD16
2446 BFD_RELOC_PPC_GOT_TLSGD16_LO
2448 BFD_RELOC_PPC_GOT_TLSGD16_HI
2450 BFD_RELOC_PPC_GOT_TLSGD16_HA
2452 BFD_RELOC_PPC_GOT_TLSLD16
2454 BFD_RELOC_PPC_GOT_TLSLD16_LO
2456 BFD_RELOC_PPC_GOT_TLSLD16_HI
2458 BFD_RELOC_PPC_GOT_TLSLD16_HA
2460 BFD_RELOC_PPC_GOT_TPREL16
2462 BFD_RELOC_PPC_GOT_TPREL16_LO
2464 BFD_RELOC_PPC_GOT_TPREL16_HI
2466 BFD_RELOC_PPC_GOT_TPREL16_HA
2468 BFD_RELOC_PPC_GOT_DTPREL16
2470 BFD_RELOC_PPC_GOT_DTPREL16_LO
2472 BFD_RELOC_PPC_GOT_DTPREL16_HI
2474 BFD_RELOC_PPC_GOT_DTPREL16_HA
2476 BFD_RELOC_PPC64_TPREL16_DS
2478 BFD_RELOC_PPC64_TPREL16_LO_DS
2480 BFD_RELOC_PPC64_TPREL16_HIGHER
2482 BFD_RELOC_PPC64_TPREL16_HIGHERA
2484 BFD_RELOC_PPC64_TPREL16_HIGHEST
2486 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2488 BFD_RELOC_PPC64_DTPREL16_DS
2490 BFD_RELOC_PPC64_DTPREL16_LO_DS
2492 BFD_RELOC_PPC64_DTPREL16_HIGHER
2494 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2496 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2498 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2500 PowerPC and PowerPC64 thread-local storage relocations.
2505 IBM 370/390 relocations
2510 The type of reloc used to build a contructor table - at the moment
2511 probably a 32 bit wide absolute relocation, but the target can choose.
2512 It generally does map to one of the other relocation types.
2515 BFD_RELOC_ARM_PCREL_BRANCH
2517 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2518 not stored in the instruction.
2520 BFD_RELOC_ARM_PCREL_BLX
2522 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2523 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2524 field in the instruction.
2526 BFD_RELOC_THUMB_PCREL_BLX
2528 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2529 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2530 field in the instruction.
2532 BFD_RELOC_ARM_IMMEDIATE
2534 BFD_RELOC_ARM_ADRL_IMMEDIATE
2536 BFD_RELOC_ARM_OFFSET_IMM
2538 BFD_RELOC_ARM_SHIFT_IMM
2544 BFD_RELOC_ARM_CP_OFF_IMM
2546 BFD_RELOC_ARM_CP_OFF_IMM_S2
2548 BFD_RELOC_ARM_ADR_IMM
2550 BFD_RELOC_ARM_LDR_IMM
2552 BFD_RELOC_ARM_LITERAL
2554 BFD_RELOC_ARM_IN_POOL
2556 BFD_RELOC_ARM_OFFSET_IMM8
2558 BFD_RELOC_ARM_HWLITERAL
2560 BFD_RELOC_ARM_THUMB_ADD
2562 BFD_RELOC_ARM_THUMB_IMM
2564 BFD_RELOC_ARM_THUMB_SHIFT
2566 BFD_RELOC_ARM_THUMB_OFFSET
2572 BFD_RELOC_ARM_JUMP_SLOT
2576 BFD_RELOC_ARM_GLOB_DAT
2580 BFD_RELOC_ARM_RELATIVE
2582 BFD_RELOC_ARM_GOTOFF
2586 These relocs are only used within the ARM assembler. They are not
2587 (at present) written to any object files.
2590 BFD_RELOC_SH_PCDISP8BY2
2592 BFD_RELOC_SH_PCDISP12BY2
2596 BFD_RELOC_SH_IMM4BY2
2598 BFD_RELOC_SH_IMM4BY4
2602 BFD_RELOC_SH_IMM8BY2
2604 BFD_RELOC_SH_IMM8BY4
2606 BFD_RELOC_SH_PCRELIMM8BY2
2608 BFD_RELOC_SH_PCRELIMM8BY4
2610 BFD_RELOC_SH_SWITCH16
2612 BFD_RELOC_SH_SWITCH32
2626 BFD_RELOC_SH_LOOP_START
2628 BFD_RELOC_SH_LOOP_END
2632 BFD_RELOC_SH_GLOB_DAT
2634 BFD_RELOC_SH_JMP_SLOT
2636 BFD_RELOC_SH_RELATIVE
2640 BFD_RELOC_SH_GOT_LOW16
2642 BFD_RELOC_SH_GOT_MEDLOW16
2644 BFD_RELOC_SH_GOT_MEDHI16
2646 BFD_RELOC_SH_GOT_HI16
2648 BFD_RELOC_SH_GOTPLT_LOW16
2650 BFD_RELOC_SH_GOTPLT_MEDLOW16
2652 BFD_RELOC_SH_GOTPLT_MEDHI16
2654 BFD_RELOC_SH_GOTPLT_HI16
2656 BFD_RELOC_SH_PLT_LOW16
2658 BFD_RELOC_SH_PLT_MEDLOW16
2660 BFD_RELOC_SH_PLT_MEDHI16
2662 BFD_RELOC_SH_PLT_HI16
2664 BFD_RELOC_SH_GOTOFF_LOW16
2666 BFD_RELOC_SH_GOTOFF_MEDLOW16
2668 BFD_RELOC_SH_GOTOFF_MEDHI16
2670 BFD_RELOC_SH_GOTOFF_HI16
2672 BFD_RELOC_SH_GOTPC_LOW16
2674 BFD_RELOC_SH_GOTPC_MEDLOW16
2676 BFD_RELOC_SH_GOTPC_MEDHI16
2678 BFD_RELOC_SH_GOTPC_HI16
2682 BFD_RELOC_SH_GLOB_DAT64
2684 BFD_RELOC_SH_JMP_SLOT64
2686 BFD_RELOC_SH_RELATIVE64
2688 BFD_RELOC_SH_GOT10BY4
2690 BFD_RELOC_SH_GOT10BY8
2692 BFD_RELOC_SH_GOTPLT10BY4
2694 BFD_RELOC_SH_GOTPLT10BY8
2696 BFD_RELOC_SH_GOTPLT32
2698 BFD_RELOC_SH_SHMEDIA_CODE
2704 BFD_RELOC_SH_IMMS6BY32
2710 BFD_RELOC_SH_IMMS10BY2
2712 BFD_RELOC_SH_IMMS10BY4
2714 BFD_RELOC_SH_IMMS10BY8
2720 BFD_RELOC_SH_IMM_LOW16
2722 BFD_RELOC_SH_IMM_LOW16_PCREL
2724 BFD_RELOC_SH_IMM_MEDLOW16
2726 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
2728 BFD_RELOC_SH_IMM_MEDHI16
2730 BFD_RELOC_SH_IMM_MEDHI16_PCREL
2732 BFD_RELOC_SH_IMM_HI16
2734 BFD_RELOC_SH_IMM_HI16_PCREL
2738 BFD_RELOC_SH_TLS_GD_32
2740 BFD_RELOC_SH_TLS_LD_32
2742 BFD_RELOC_SH_TLS_LDO_32
2744 BFD_RELOC_SH_TLS_IE_32
2746 BFD_RELOC_SH_TLS_LE_32
2748 BFD_RELOC_SH_TLS_DTPMOD32
2750 BFD_RELOC_SH_TLS_DTPOFF32
2752 BFD_RELOC_SH_TLS_TPOFF32
2754 Renesas / SuperH SH relocs. Not all of these appear in object files.
2757 BFD_RELOC_THUMB_PCREL_BRANCH9
2759 BFD_RELOC_THUMB_PCREL_BRANCH12
2761 BFD_RELOC_THUMB_PCREL_BRANCH23
2763 Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
2764 be zero and is not stored in the instruction.
2767 BFD_RELOC_ARC_B22_PCREL
2770 ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
2771 not stored in the instruction. The high 20 bits are installed in bits 26
2772 through 7 of the instruction.
2776 ARC 26 bit absolute branch. The lowest two bits must be zero and are not
2777 stored in the instruction. The high 24 bits are installed in bits 23
2781 BFD_RELOC_D10V_10_PCREL_R
2783 Mitsubishi D10V relocs.
2784 This is a 10-bit reloc with the right 2 bits
2787 BFD_RELOC_D10V_10_PCREL_L
2789 Mitsubishi D10V relocs.
2790 This is a 10-bit reloc with the right 2 bits
2791 assumed to be 0. This is the same as the previous reloc
2792 except it is in the left container, i.e.,
2793 shifted left 15 bits.
2797 This is an 18-bit reloc with the right 2 bits
2800 BFD_RELOC_D10V_18_PCREL
2802 This is an 18-bit reloc with the right 2 bits
2808 Mitsubishi D30V relocs.
2809 This is a 6-bit absolute reloc.
2811 BFD_RELOC_D30V_9_PCREL
2813 This is a 6-bit pc-relative reloc with
2814 the right 3 bits assumed to be 0.
2816 BFD_RELOC_D30V_9_PCREL_R
2818 This is a 6-bit pc-relative reloc with
2819 the right 3 bits assumed to be 0. Same
2820 as the previous reloc but on the right side
2825 This is a 12-bit absolute reloc with the
2826 right 3 bitsassumed to be 0.
2828 BFD_RELOC_D30V_15_PCREL
2830 This is a 12-bit pc-relative reloc with
2831 the right 3 bits assumed to be 0.
2833 BFD_RELOC_D30V_15_PCREL_R
2835 This is a 12-bit pc-relative reloc with
2836 the right 3 bits assumed to be 0. Same
2837 as the previous reloc but on the right side
2842 This is an 18-bit absolute reloc with
2843 the right 3 bits assumed to be 0.
2845 BFD_RELOC_D30V_21_PCREL
2847 This is an 18-bit pc-relative reloc with
2848 the right 3 bits assumed to be 0.
2850 BFD_RELOC_D30V_21_PCREL_R
2852 This is an 18-bit pc-relative reloc with
2853 the right 3 bits assumed to be 0. Same
2854 as the previous reloc but on the right side
2859 This is a 32-bit absolute reloc.
2861 BFD_RELOC_D30V_32_PCREL
2863 This is a 32-bit pc-relative reloc.
2866 BFD_RELOC_DLX_HI16_S
2881 Renesas M32R (formerly Mitsubishi M32R) relocs.
2882 This is a 24 bit absolute address.
2884 BFD_RELOC_M32R_10_PCREL
2886 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
2888 BFD_RELOC_M32R_18_PCREL
2890 This is an 18-bit reloc with the right 2 bits assumed to be 0.
2892 BFD_RELOC_M32R_26_PCREL
2894 This is a 26-bit reloc with the right 2 bits assumed to be 0.
2896 BFD_RELOC_M32R_HI16_ULO
2898 This is a 16-bit reloc containing the high 16 bits of an address
2899 used when the lower 16 bits are treated as unsigned.
2901 BFD_RELOC_M32R_HI16_SLO
2903 This is a 16-bit reloc containing the high 16 bits of an address
2904 used when the lower 16 bits are treated as signed.
2908 This is a 16-bit reloc containing the lower 16 bits of an address.
2910 BFD_RELOC_M32R_SDA16
2912 This is a 16-bit reloc containing the small data area offset for use in
2913 add3, load, and store instructions.
2916 BFD_RELOC_V850_9_PCREL
2918 This is a 9-bit reloc
2920 BFD_RELOC_V850_22_PCREL
2922 This is a 22-bit reloc
2925 BFD_RELOC_V850_SDA_16_16_OFFSET
2927 This is a 16 bit offset from the short data area pointer.
2929 BFD_RELOC_V850_SDA_15_16_OFFSET
2931 This is a 16 bit offset (of which only 15 bits are used) from the
2932 short data area pointer.
2934 BFD_RELOC_V850_ZDA_16_16_OFFSET
2936 This is a 16 bit offset from the zero data area pointer.
2938 BFD_RELOC_V850_ZDA_15_16_OFFSET
2940 This is a 16 bit offset (of which only 15 bits are used) from the
2941 zero data area pointer.
2943 BFD_RELOC_V850_TDA_6_8_OFFSET
2945 This is an 8 bit offset (of which only 6 bits are used) from the
2946 tiny data area pointer.
2948 BFD_RELOC_V850_TDA_7_8_OFFSET
2950 This is an 8bit offset (of which only 7 bits are used) from the tiny
2953 BFD_RELOC_V850_TDA_7_7_OFFSET
2955 This is a 7 bit offset from the tiny data area pointer.
2957 BFD_RELOC_V850_TDA_16_16_OFFSET
2959 This is a 16 bit offset from the tiny data area pointer.
2962 BFD_RELOC_V850_TDA_4_5_OFFSET
2964 This is a 5 bit offset (of which only 4 bits are used) from the tiny
2967 BFD_RELOC_V850_TDA_4_4_OFFSET
2969 This is a 4 bit offset from the tiny data area pointer.
2971 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
2973 This is a 16 bit offset from the short data area pointer, with the
2974 bits placed non-contigously in the instruction.
2976 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
2978 This is a 16 bit offset from the zero data area pointer, with the
2979 bits placed non-contigously in the instruction.
2981 BFD_RELOC_V850_CALLT_6_7_OFFSET
2983 This is a 6 bit offset from the call table base pointer.
2985 BFD_RELOC_V850_CALLT_16_16_OFFSET
2987 This is a 16 bit offset from the call table base pointer.
2989 BFD_RELOC_V850_LONGCALL
2991 Used for relaxing indirect function calls.
2993 BFD_RELOC_V850_LONGJUMP
2995 Used for relaxing indirect jumps.
2997 BFD_RELOC_V850_ALIGN
2999 Used to maintain alignment whilst relaxing.
3001 BFD_RELOC_MN10300_32_PCREL
3003 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
3006 BFD_RELOC_MN10300_16_PCREL
3008 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
3014 This is a 8bit DP reloc for the tms320c30, where the most
3015 significant 8 bits of a 24 bit word are placed into the least
3016 significant 8 bits of the opcode.
3019 BFD_RELOC_TIC54X_PARTLS7
3021 This is a 7bit reloc for the tms320c54x, where the least
3022 significant 7 bits of a 16 bit word are placed into the least
3023 significant 7 bits of the opcode.
3026 BFD_RELOC_TIC54X_PARTMS9
3028 This is a 9bit DP reloc for the tms320c54x, where the most
3029 significant 9 bits of a 16 bit word are placed into the least
3030 significant 9 bits of the opcode.
3035 This is an extended address 23-bit reloc for the tms320c54x.
3038 BFD_RELOC_TIC54X_16_OF_23
3040 This is a 16-bit reloc for the tms320c54x, where the least
3041 significant 16 bits of a 23-bit extended address are placed into
3045 BFD_RELOC_TIC54X_MS7_OF_23
3047 This is a reloc for the tms320c54x, where the most
3048 significant 7 bits of a 23-bit extended address are placed into
3054 This is a 48 bit reloc for the FR30 that stores 32 bits.
3058 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
3061 BFD_RELOC_FR30_6_IN_4
3063 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
3066 BFD_RELOC_FR30_8_IN_8
3068 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
3071 BFD_RELOC_FR30_9_IN_8
3073 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
3076 BFD_RELOC_FR30_10_IN_8
3078 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
3081 BFD_RELOC_FR30_9_PCREL
3083 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
3084 short offset into 8 bits.
3086 BFD_RELOC_FR30_12_PCREL
3088 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
3089 short offset into 11 bits.
3092 BFD_RELOC_MCORE_PCREL_IMM8BY4
3094 BFD_RELOC_MCORE_PCREL_IMM11BY2
3096 BFD_RELOC_MCORE_PCREL_IMM4BY2
3098 BFD_RELOC_MCORE_PCREL_32
3100 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
3104 Motorola Mcore relocations.
3109 BFD_RELOC_MMIX_GETA_1
3111 BFD_RELOC_MMIX_GETA_2
3113 BFD_RELOC_MMIX_GETA_3
3115 These are relocations for the GETA instruction.
3117 BFD_RELOC_MMIX_CBRANCH
3119 BFD_RELOC_MMIX_CBRANCH_J
3121 BFD_RELOC_MMIX_CBRANCH_1
3123 BFD_RELOC_MMIX_CBRANCH_2
3125 BFD_RELOC_MMIX_CBRANCH_3
3127 These are relocations for a conditional branch instruction.
3129 BFD_RELOC_MMIX_PUSHJ
3131 BFD_RELOC_MMIX_PUSHJ_1
3133 BFD_RELOC_MMIX_PUSHJ_2
3135 BFD_RELOC_MMIX_PUSHJ_3
3137 These are relocations for the PUSHJ instruction.
3141 BFD_RELOC_MMIX_JMP_1
3143 BFD_RELOC_MMIX_JMP_2
3145 BFD_RELOC_MMIX_JMP_3
3147 These are relocations for the JMP instruction.
3149 BFD_RELOC_MMIX_ADDR19
3151 This is a relocation for a relative address as in a GETA instruction or
3154 BFD_RELOC_MMIX_ADDR27
3156 This is a relocation for a relative address as in a JMP instruction.
3158 BFD_RELOC_MMIX_REG_OR_BYTE
3160 This is a relocation for an instruction field that may be a general
3161 register or a value 0..255.
3165 This is a relocation for an instruction field that may be a general
3168 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
3170 This is a relocation for two instruction fields holding a register and
3171 an offset, the equivalent of the relocation.
3173 BFD_RELOC_MMIX_LOCAL
3175 This relocation is an assertion that the expression is not allocated as
3176 a global register. It does not modify contents.
3179 BFD_RELOC_AVR_7_PCREL
3181 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
3182 short offset into 7 bits.
3184 BFD_RELOC_AVR_13_PCREL
3186 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
3187 short offset into 12 bits.
3191 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
3192 program memory address) into 16 bits.
3194 BFD_RELOC_AVR_LO8_LDI
3196 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3197 data memory address) into 8 bit immediate value of LDI insn.
3199 BFD_RELOC_AVR_HI8_LDI
3201 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3202 of data memory address) into 8 bit immediate value of LDI insn.
3204 BFD_RELOC_AVR_HH8_LDI
3206 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3207 of program memory address) into 8 bit immediate value of LDI insn.
3209 BFD_RELOC_AVR_LO8_LDI_NEG
3211 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3212 (usually data memory address) into 8 bit immediate value of SUBI insn.
3214 BFD_RELOC_AVR_HI8_LDI_NEG
3216 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3217 (high 8 bit of data memory address) into 8 bit immediate value of
3220 BFD_RELOC_AVR_HH8_LDI_NEG
3222 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3223 (most high 8 bit of program memory address) into 8 bit immediate value
3224 of LDI or SUBI insn.
3226 BFD_RELOC_AVR_LO8_LDI_PM
3228 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
3229 command address) into 8 bit immediate value of LDI insn.
3231 BFD_RELOC_AVR_HI8_LDI_PM
3233 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
3234 of command address) into 8 bit immediate value of LDI insn.
3236 BFD_RELOC_AVR_HH8_LDI_PM
3238 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
3239 of command address) into 8 bit immediate value of LDI insn.
3241 BFD_RELOC_AVR_LO8_LDI_PM_NEG
3243 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3244 (usually command address) into 8 bit immediate value of SUBI insn.
3246 BFD_RELOC_AVR_HI8_LDI_PM_NEG
3248 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3249 (high 8 bit of 16 bit command address) into 8 bit immediate value
3252 BFD_RELOC_AVR_HH8_LDI_PM_NEG
3254 This is a 16 bit reloc for the AVR that stores negated 8 bit value
3255 (high 6 bit of 22 bit command address) into 8 bit immediate
3260 This is a 32 bit reloc for the AVR that stores 23 bit value
3274 32 bit PC relative PLT address.
3278 Copy symbol at runtime.
3280 BFD_RELOC_390_GLOB_DAT
3284 BFD_RELOC_390_JMP_SLOT
3288 BFD_RELOC_390_RELATIVE
3290 Adjust by program base.
3294 32 bit PC relative offset to GOT.
3300 BFD_RELOC_390_PC16DBL
3302 PC relative 16 bit shifted by 1.
3304 BFD_RELOC_390_PLT16DBL
3306 16 bit PC rel. PLT shifted by 1.
3308 BFD_RELOC_390_PC32DBL
3310 PC relative 32 bit shifted by 1.
3312 BFD_RELOC_390_PLT32DBL
3314 32 bit PC rel. PLT shifted by 1.
3316 BFD_RELOC_390_GOTPCDBL
3318 32 bit PC rel. GOT shifted by 1.
3326 64 bit PC relative PLT address.
3328 BFD_RELOC_390_GOTENT
3330 32 bit rel. offset to GOT entry.
3332 BFD_RELOC_390_GOTOFF64
3334 64 bit offset to GOT.
3336 BFD_RELOC_390_GOTPLT12
3338 12-bit offset to symbol-entry within GOT, with PLT handling.
3340 BFD_RELOC_390_GOTPLT16
3342 16-bit offset to symbol-entry within GOT, with PLT handling.
3344 BFD_RELOC_390_GOTPLT32
3346 32-bit offset to symbol-entry within GOT, with PLT handling.
3348 BFD_RELOC_390_GOTPLT64
3350 64-bit offset to symbol-entry within GOT, with PLT handling.
3352 BFD_RELOC_390_GOTPLTENT
3354 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
3356 BFD_RELOC_390_PLTOFF16
3358 16-bit rel. offset from the GOT to a PLT entry.
3360 BFD_RELOC_390_PLTOFF32
3362 32-bit rel. offset from the GOT to a PLT entry.
3364 BFD_RELOC_390_PLTOFF64
3366 64-bit rel. offset from the GOT to a PLT entry.
3369 BFD_RELOC_390_TLS_LOAD
3371 BFD_RELOC_390_TLS_GDCALL
3373 BFD_RELOC_390_TLS_LDCALL
3375 BFD_RELOC_390_TLS_GD32
3377 BFD_RELOC_390_TLS_GD64
3379 BFD_RELOC_390_TLS_GOTIE12
3381 BFD_RELOC_390_TLS_GOTIE32
3383 BFD_RELOC_390_TLS_GOTIE64
3385 BFD_RELOC_390_TLS_LDM32
3387 BFD_RELOC_390_TLS_LDM64
3389 BFD_RELOC_390_TLS_IE32
3391 BFD_RELOC_390_TLS_IE64
3393 BFD_RELOC_390_TLS_IEENT
3395 BFD_RELOC_390_TLS_LE32
3397 BFD_RELOC_390_TLS_LE64
3399 BFD_RELOC_390_TLS_LDO32
3401 BFD_RELOC_390_TLS_LDO64
3403 BFD_RELOC_390_TLS_DTPMOD
3405 BFD_RELOC_390_TLS_DTPOFF
3407 BFD_RELOC_390_TLS_TPOFF
3409 s390 tls relocations.
3416 BFD_RELOC_390_GOTPLT20
3418 BFD_RELOC_390_TLS_GOTIE20
3420 Long displacement extension.
3425 Scenix IP2K - 9-bit register number / data address
3429 Scenix IP2K - 4-bit register/data bank number
3431 BFD_RELOC_IP2K_ADDR16CJP
3433 Scenix IP2K - low 13 bits of instruction word address
3435 BFD_RELOC_IP2K_PAGE3
3437 Scenix IP2K - high 3 bits of instruction word address
3439 BFD_RELOC_IP2K_LO8DATA
3441 BFD_RELOC_IP2K_HI8DATA
3443 BFD_RELOC_IP2K_EX8DATA
3445 Scenix IP2K - ext/low/high 8 bits of data address
3447 BFD_RELOC_IP2K_LO8INSN
3449 BFD_RELOC_IP2K_HI8INSN
3451 Scenix IP2K - low/high 8 bits of instruction word address
3453 BFD_RELOC_IP2K_PC_SKIP
3455 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
3459 Scenix IP2K - 16 bit word address in text section.
3461 BFD_RELOC_IP2K_FR_OFFSET
3463 Scenix IP2K - 7-bit sp or dp offset
3465 BFD_RELOC_VPE4KMATH_DATA
3467 BFD_RELOC_VPE4KMATH_INSN
3469 Scenix VPE4K coprocessor - data/insn-space addressing
3472 BFD_RELOC_VTABLE_INHERIT
3474 BFD_RELOC_VTABLE_ENTRY
3476 These two relocations are used by the linker to determine which of
3477 the entries in a C++ virtual function table are actually used. When
3478 the --gc-sections option is given, the linker will zero out the entries
3479 that are not used, so that the code for those functions need not be
3480 included in the output.
3482 VTABLE_INHERIT is a zero-space relocation used to describe to the
3483 linker the inheritence tree of a C++ virtual function table. The
3484 relocation's symbol should be the parent class' vtable, and the
3485 relocation should be located at the child vtable.
3487 VTABLE_ENTRY is a zero-space relocation that describes the use of a
3488 virtual function table entry. The reloc's symbol should refer to the
3489 table of the class mentioned in the code. Off of that base, an offset
3490 describes the entry that is being used. For Rela hosts, this offset
3491 is stored in the reloc's addend. For Rel hosts, we are forced to put
3492 this offset in the reloc's section offset.
3495 BFD_RELOC_IA64_IMM14
3497 BFD_RELOC_IA64_IMM22
3499 BFD_RELOC_IA64_IMM64
3501 BFD_RELOC_IA64_DIR32MSB
3503 BFD_RELOC_IA64_DIR32LSB
3505 BFD_RELOC_IA64_DIR64MSB
3507 BFD_RELOC_IA64_DIR64LSB
3509 BFD_RELOC_IA64_GPREL22
3511 BFD_RELOC_IA64_GPREL64I
3513 BFD_RELOC_IA64_GPREL32MSB
3515 BFD_RELOC_IA64_GPREL32LSB
3517 BFD_RELOC_IA64_GPREL64MSB
3519 BFD_RELOC_IA64_GPREL64LSB
3521 BFD_RELOC_IA64_LTOFF22
3523 BFD_RELOC_IA64_LTOFF64I
3525 BFD_RELOC_IA64_PLTOFF22
3527 BFD_RELOC_IA64_PLTOFF64I
3529 BFD_RELOC_IA64_PLTOFF64MSB
3531 BFD_RELOC_IA64_PLTOFF64LSB
3533 BFD_RELOC_IA64_FPTR64I
3535 BFD_RELOC_IA64_FPTR32MSB
3537 BFD_RELOC_IA64_FPTR32LSB
3539 BFD_RELOC_IA64_FPTR64MSB
3541 BFD_RELOC_IA64_FPTR64LSB
3543 BFD_RELOC_IA64_PCREL21B
3545 BFD_RELOC_IA64_PCREL21BI
3547 BFD_RELOC_IA64_PCREL21M
3549 BFD_RELOC_IA64_PCREL21F
3551 BFD_RELOC_IA64_PCREL22
3553 BFD_RELOC_IA64_PCREL60B
3555 BFD_RELOC_IA64_PCREL64I
3557 BFD_RELOC_IA64_PCREL32MSB
3559 BFD_RELOC_IA64_PCREL32LSB
3561 BFD_RELOC_IA64_PCREL64MSB
3563 BFD_RELOC_IA64_PCREL64LSB
3565 BFD_RELOC_IA64_LTOFF_FPTR22
3567 BFD_RELOC_IA64_LTOFF_FPTR64I
3569 BFD_RELOC_IA64_LTOFF_FPTR32MSB
3571 BFD_RELOC_IA64_LTOFF_FPTR32LSB
3573 BFD_RELOC_IA64_LTOFF_FPTR64MSB
3575 BFD_RELOC_IA64_LTOFF_FPTR64LSB
3577 BFD_RELOC_IA64_SEGREL32MSB
3579 BFD_RELOC_IA64_SEGREL32LSB
3581 BFD_RELOC_IA64_SEGREL64MSB
3583 BFD_RELOC_IA64_SEGREL64LSB
3585 BFD_RELOC_IA64_SECREL32MSB
3587 BFD_RELOC_IA64_SECREL32LSB
3589 BFD_RELOC_IA64_SECREL64MSB
3591 BFD_RELOC_IA64_SECREL64LSB
3593 BFD_RELOC_IA64_REL32MSB
3595 BFD_RELOC_IA64_REL32LSB
3597 BFD_RELOC_IA64_REL64MSB
3599 BFD_RELOC_IA64_REL64LSB
3601 BFD_RELOC_IA64_LTV32MSB
3603 BFD_RELOC_IA64_LTV32LSB
3605 BFD_RELOC_IA64_LTV64MSB
3607 BFD_RELOC_IA64_LTV64LSB
3609 BFD_RELOC_IA64_IPLTMSB
3611 BFD_RELOC_IA64_IPLTLSB
3615 BFD_RELOC_IA64_LTOFF22X
3617 BFD_RELOC_IA64_LDXMOV
3619 BFD_RELOC_IA64_TPREL14
3621 BFD_RELOC_IA64_TPREL22
3623 BFD_RELOC_IA64_TPREL64I
3625 BFD_RELOC_IA64_TPREL64MSB
3627 BFD_RELOC_IA64_TPREL64LSB
3629 BFD_RELOC_IA64_LTOFF_TPREL22
3631 BFD_RELOC_IA64_DTPMOD64MSB
3633 BFD_RELOC_IA64_DTPMOD64LSB
3635 BFD_RELOC_IA64_LTOFF_DTPMOD22
3637 BFD_RELOC_IA64_DTPREL14
3639 BFD_RELOC_IA64_DTPREL22
3641 BFD_RELOC_IA64_DTPREL64I
3643 BFD_RELOC_IA64_DTPREL32MSB
3645 BFD_RELOC_IA64_DTPREL32LSB
3647 BFD_RELOC_IA64_DTPREL64MSB
3649 BFD_RELOC_IA64_DTPREL64LSB
3651 BFD_RELOC_IA64_LTOFF_DTPREL22
3653 Intel IA64 Relocations.
3656 BFD_RELOC_M68HC11_HI8
3658 Motorola 68HC11 reloc.
3659 This is the 8 bit high part of an absolute address.
3661 BFD_RELOC_M68HC11_LO8
3663 Motorola 68HC11 reloc.
3664 This is the 8 bit low part of an absolute address.
3666 BFD_RELOC_M68HC11_3B
3668 Motorola 68HC11 reloc.
3669 This is the 3 bit of a value.
3671 BFD_RELOC_M68HC11_RL_JUMP
3673 Motorola 68HC11 reloc.
3674 This reloc marks the beginning of a jump/call instruction.
3675 It is used for linker relaxation to correctly identify beginning
3676 of instruction and change some branchs to use PC-relative
3679 BFD_RELOC_M68HC11_RL_GROUP
3681 Motorola 68HC11 reloc.
3682 This reloc marks a group of several instructions that gcc generates
3683 and for which the linker relaxation pass can modify and/or remove
3686 BFD_RELOC_M68HC11_LO16
3688 Motorola 68HC11 reloc.
3689 This is the 16-bit lower part of an address. It is used for 'call'
3690 instruction to specify the symbol address without any special
3691 transformation (due to memory bank window).
3693 BFD_RELOC_M68HC11_PAGE
3695 Motorola 68HC11 reloc.
3696 This is a 8-bit reloc that specifies the page number of an address.
3697 It is used by 'call' instruction to specify the page number of
3700 BFD_RELOC_M68HC11_24
3702 Motorola 68HC11 reloc.
3703 This is a 24-bit reloc that represents the address with a 16-bit
3704 value and a 8-bit page number. The symbol address is transformed
3705 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
3708 BFD_RELOC_CRIS_BDISP8
3710 BFD_RELOC_CRIS_UNSIGNED_5
3712 BFD_RELOC_CRIS_SIGNED_6
3714 BFD_RELOC_CRIS_UNSIGNED_6
3716 BFD_RELOC_CRIS_UNSIGNED_4
3718 These relocs are only used within the CRIS assembler. They are not
3719 (at present) written to any object files.
3723 BFD_RELOC_CRIS_GLOB_DAT
3725 BFD_RELOC_CRIS_JUMP_SLOT
3727 BFD_RELOC_CRIS_RELATIVE
3729 Relocs used in ELF shared libraries for CRIS.
3731 BFD_RELOC_CRIS_32_GOT
3733 32-bit offset to symbol-entry within GOT.
3735 BFD_RELOC_CRIS_16_GOT
3737 16-bit offset to symbol-entry within GOT.
3739 BFD_RELOC_CRIS_32_GOTPLT
3741 32-bit offset to symbol-entry within GOT, with PLT handling.
3743 BFD_RELOC_CRIS_16_GOTPLT
3745 16-bit offset to symbol-entry within GOT, with PLT handling.
3747 BFD_RELOC_CRIS_32_GOTREL
3749 32-bit offset to symbol, relative to GOT.
3751 BFD_RELOC_CRIS_32_PLT_GOTREL
3753 32-bit offset to symbol with PLT entry, relative to GOT.
3755 BFD_RELOC_CRIS_32_PLT_PCREL
3757 32-bit offset to symbol with PLT entry, relative to this relocation.
3762 BFD_RELOC_860_GLOB_DAT
3764 BFD_RELOC_860_JUMP_SLOT
3766 BFD_RELOC_860_RELATIVE
3776 BFD_RELOC_860_SPLIT0
3780 BFD_RELOC_860_SPLIT1
3784 BFD_RELOC_860_SPLIT2
3788 BFD_RELOC_860_LOGOT0
3790 BFD_RELOC_860_SPGOT0
3792 BFD_RELOC_860_LOGOT1
3794 BFD_RELOC_860_SPGOT1
3796 BFD_RELOC_860_LOGOTOFF0
3798 BFD_RELOC_860_SPGOTOFF0
3800 BFD_RELOC_860_LOGOTOFF1
3802 BFD_RELOC_860_SPGOTOFF1
3804 BFD_RELOC_860_LOGOTOFF2
3806 BFD_RELOC_860_LOGOTOFF3
3810 BFD_RELOC_860_HIGHADJ
3814 BFD_RELOC_860_HAGOTOFF
3822 BFD_RELOC_860_HIGOTOFF
3824 Intel i860 Relocations.
3827 BFD_RELOC_OPENRISC_ABS_26
3829 BFD_RELOC_OPENRISC_REL_26
3831 OpenRISC Relocations.
3834 BFD_RELOC_H8_DIR16A8
3836 BFD_RELOC_H8_DIR16R8
3838 BFD_RELOC_H8_DIR24A8
3840 BFD_RELOC_H8_DIR24R8
3842 BFD_RELOC_H8_DIR32A16
3847 BFD_RELOC_XSTORMY16_REL_12
3849 BFD_RELOC_XSTORMY16_12
3851 BFD_RELOC_XSTORMY16_24
3853 BFD_RELOC_XSTORMY16_FPTR16
3855 Sony Xstormy16 Relocations.
3858 BFD_RELOC_VAX_GLOB_DAT
3860 BFD_RELOC_VAX_JMP_SLOT
3862 BFD_RELOC_VAX_RELATIVE
3864 Relocations used by VAX ELF.
3867 BFD_RELOC_MSP430_10_PCREL
3869 BFD_RELOC_MSP430_16_PCREL
3873 BFD_RELOC_MSP430_16_PCREL_BYTE
3875 BFD_RELOC_MSP430_16_BYTE
3877 msp430 specific relocation codes
3880 BFD_RELOC_IQ2000_OFFSET_16
3882 BFD_RELOC_IQ2000_OFFSET_21
3884 BFD_RELOC_IQ2000_UHI16
3889 BFD_RELOC_XTENSA_RTLD
3891 Special Xtensa relocation used only by PLT entries in ELF shared
3892 objects to indicate that the runtime linker should set the value
3893 to one of its own internal functions or data structures.
3895 BFD_RELOC_XTENSA_GLOB_DAT
3897 BFD_RELOC_XTENSA_JMP_SLOT
3899 BFD_RELOC_XTENSA_RELATIVE
3901 Xtensa relocations for ELF shared objects.
3903 BFD_RELOC_XTENSA_PLT
3905 Xtensa relocation used in ELF object files for symbols that may require
3906 PLT entries. Otherwise, this is just a generic 32-bit relocation.
3908 BFD_RELOC_XTENSA_OP0
3910 BFD_RELOC_XTENSA_OP1
3912 BFD_RELOC_XTENSA_OP2
3914 Generic Xtensa relocations. Only the operand number is encoded
3915 in the relocation. The details are determined by extracting the
3918 BFD_RELOC_XTENSA_ASM_EXPAND
3920 Xtensa relocation to mark that the assembler expanded the
3921 instructions from an original target. The expansion size is
3922 encoded in the reloc size.
3924 BFD_RELOC_XTENSA_ASM_SIMPLIFY
3926 Xtensa relocation to mark that the linker should simplify
3927 assembler-expanded instructions. This is commonly used
3928 internally by the linker after analysis of a
3929 BFD_RELOC_XTENSA_ASM_EXPAND.
3935 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
3940 bfd_reloc_type_lookup
3943 reloc_howto_type *bfd_reloc_type_lookup
3944 (bfd *abfd, bfd_reloc_code_real_type code);
3947 Return a pointer to a howto structure which, when
3948 invoked, will perform the relocation @var{code} on data from the
3954 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
3956 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
3959 static reloc_howto_type bfd_howto_32
=
3960 HOWTO (0, 00, 2, 32, FALSE
, 0, complain_overflow_bitfield
, 0, "VRT32", FALSE
, 0xffffffff, 0xffffffff, TRUE
);
3964 bfd_default_reloc_type_lookup
3967 reloc_howto_type *bfd_default_reloc_type_lookup
3968 (bfd *abfd, bfd_reloc_code_real_type code);
3971 Provides a default relocation lookup routine for any architecture.
3976 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
3980 case BFD_RELOC_CTOR
:
3981 /* The type of reloc used in a ctor, which will be as wide as the
3982 address - so either a 64, 32, or 16 bitter. */
3983 switch (bfd_get_arch_info (abfd
)->bits_per_address
)
3988 return &bfd_howto_32
;
4002 bfd_get_reloc_code_name
4005 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
4008 Provides a printable name for the supplied relocation code.
4009 Useful mainly for printing error messages.
4013 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
4015 if (code
> BFD_RELOC_UNUSED
)
4017 return bfd_reloc_code_real_names
[code
];
4022 bfd_generic_relax_section
4025 bfd_boolean bfd_generic_relax_section
4028 struct bfd_link_info *,
4032 Provides default handling for relaxing for back ends which
4033 don't do relaxing -- i.e., does nothing.
4037 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
4038 asection
*section ATTRIBUTE_UNUSED
,
4039 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
4048 bfd_generic_gc_sections
4051 bfd_boolean bfd_generic_gc_sections
4052 (bfd *, struct bfd_link_info *);
4055 Provides default handling for relaxing for back ends which
4056 don't do section gc -- i.e., does nothing.
4060 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4061 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4068 bfd_generic_merge_sections
4071 bfd_boolean bfd_generic_merge_sections
4072 (bfd *, struct bfd_link_info *);
4075 Provides default handling for SEC_MERGE section merging for back ends
4076 which don't have SEC_MERGE support -- i.e., does nothing.
4080 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
4081 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
4088 bfd_generic_get_relocated_section_contents
4091 bfd_byte *bfd_generic_get_relocated_section_contents
4093 struct bfd_link_info *link_info,
4094 struct bfd_link_order *link_order,
4096 bfd_boolean relocatable,
4100 Provides default handling of relocation effort for back ends
4101 which can't be bothered to do it efficiently.
4106 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
4107 struct bfd_link_info
*link_info
,
4108 struct bfd_link_order
*link_order
,
4110 bfd_boolean relocatable
,
4113 /* Get enough memory to hold the stuff. */
4114 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
4115 asection
*input_section
= link_order
->u
.indirect
.section
;
4117 long reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
4118 arelent
**reloc_vector
= NULL
;
4124 reloc_vector
= bfd_malloc (reloc_size
);
4125 if (reloc_vector
== NULL
&& reloc_size
!= 0)
4128 /* Read in the section. */
4129 if (!bfd_get_section_contents (input_bfd
,
4133 input_section
->_raw_size
))
4136 /* We're not relaxing the section, so just copy the size info. */
4137 input_section
->_cooked_size
= input_section
->_raw_size
;
4138 input_section
->reloc_done
= TRUE
;
4140 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
4144 if (reloc_count
< 0)
4147 if (reloc_count
> 0)
4150 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
4152 char *error_message
= NULL
;
4153 bfd_reloc_status_type r
=
4154 bfd_perform_relocation (input_bfd
,
4158 relocatable
? abfd
: NULL
,
4163 asection
*os
= input_section
->output_section
;
4165 /* A partial link, so keep the relocs. */
4166 os
->orelocation
[os
->reloc_count
] = *parent
;
4170 if (r
!= bfd_reloc_ok
)
4174 case bfd_reloc_undefined
:
4175 if (!((*link_info
->callbacks
->undefined_symbol
)
4176 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4177 input_bfd
, input_section
, (*parent
)->address
,
4181 case bfd_reloc_dangerous
:
4182 BFD_ASSERT (error_message
!= NULL
);
4183 if (!((*link_info
->callbacks
->reloc_dangerous
)
4184 (link_info
, error_message
, input_bfd
, input_section
,
4185 (*parent
)->address
)))
4188 case bfd_reloc_overflow
:
4189 if (!((*link_info
->callbacks
->reloc_overflow
)
4190 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
4191 (*parent
)->howto
->name
, (*parent
)->addend
,
4192 input_bfd
, input_section
, (*parent
)->address
)))
4195 case bfd_reloc_outofrange
:
4204 if (reloc_vector
!= NULL
)
4205 free (reloc_vector
);
4209 if (reloc_vector
!= NULL
)
4210 free (reloc_vector
);