1 /* BFD back-end for Hitachi H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
7 This file is part of BFD, the Binary File Descriptor library.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
32 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34 /* We derive a hash table from the basic BFD hash table to
35 hold entries in the function vector. Aside from the
36 info stored by the basic hash table, we need the offset
37 of a particular entry within the hash table as well as
38 the offset where we'll add the next entry. */
40 struct funcvec_hash_entry
42 /* The basic hash table entry. */
43 struct bfd_hash_entry root
;
45 /* The offset within the vectors section where
50 struct funcvec_hash_table
52 /* The basic hash table. */
53 struct bfd_hash_table root
;
57 /* Offset at which we'll add the next entry. */
61 static struct bfd_hash_entry
*
63 PARAMS ((struct bfd_hash_entry
*, struct bfd_hash_table
*, const char *));
66 funcvec_hash_table_init
67 PARAMS ((struct funcvec_hash_table
*, bfd
*,
68 struct bfd_hash_entry
*(*) (struct bfd_hash_entry
*,
69 struct bfd_hash_table
*,
72 static bfd_reloc_status_type special
73 PARAMS ((bfd
*, arelent
*, asymbol
*, PTR
, asection
*, bfd
*, char **));
74 static int select_reloc
75 PARAMS ((reloc_howto_type
*));
76 static void rtype2howto
77 PARAMS ((arelent
*, struct internal_reloc
*));
78 static void reloc_processing
79 PARAMS ((arelent
*, struct internal_reloc
*, asymbol
**, bfd
*, asection
*));
80 static bfd_boolean h8300_symbol_address_p
81 PARAMS ((bfd
*, asection
*, bfd_vma
));
82 static int h8300_reloc16_estimate
83 PARAMS ((bfd
*, asection
*, arelent
*, unsigned int,
84 struct bfd_link_info
*));
85 static void h8300_reloc16_extra_cases
86 PARAMS ((bfd
*, struct bfd_link_info
*, struct bfd_link_order
*, arelent
*,
87 bfd_byte
*, unsigned int *, unsigned int *));
88 static bfd_boolean h8300_bfd_link_add_symbols
89 PARAMS ((bfd
*, struct bfd_link_info
*));
91 /* To lookup a value in the function vector hash table. */
92 #define funcvec_hash_lookup(table, string, create, copy) \
93 ((struct funcvec_hash_entry *) \
94 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
96 /* The derived h8300 COFF linker table. Note it's derived from
97 the generic linker hash table, not the COFF backend linker hash
98 table! We use this to attach additional data structures we
99 need while linking on the h8300. */
100 struct h8300_coff_link_hash_table
{
101 /* The main hash table. */
102 struct generic_link_hash_table root
;
104 /* Section for the vectors table. This gets attached to a
105 random input bfd, we keep it here for easy access. */
106 asection
*vectors_sec
;
108 /* Hash table of the functions we need to enter into the function
110 struct funcvec_hash_table
*funcvec_hash_table
;
113 static struct bfd_link_hash_table
*h8300_coff_link_hash_table_create
116 /* Get the H8/300 COFF linker hash table from a link_info structure. */
118 #define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
121 /* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
124 static struct bfd_hash_entry
*
125 funcvec_hash_newfunc (entry
, gen_table
, string
)
126 struct bfd_hash_entry
*entry
;
127 struct bfd_hash_table
*gen_table
;
130 struct funcvec_hash_entry
*ret
;
131 struct funcvec_hash_table
*table
;
133 ret
= (struct funcvec_hash_entry
*) entry
;
134 table
= (struct funcvec_hash_table
*) gen_table
;
136 /* Allocate the structure if it has not already been allocated by a
139 ret
= ((struct funcvec_hash_entry
*)
140 bfd_hash_allocate (gen_table
,
141 sizeof (struct funcvec_hash_entry
)));
145 /* Call the allocation method of the superclass. */
146 ret
= ((struct funcvec_hash_entry
*)
147 bfd_hash_newfunc ((struct bfd_hash_entry
*) ret
, gen_table
, string
));
152 /* Note where this entry will reside in the function vector table. */
153 ret
->offset
= table
->offset
;
155 /* Bump the offset at which we store entries in the function
156 vector. We'd like to bump up the size of the vectors section,
157 but it's not easily available here. */
158 if (bfd_get_mach (table
->abfd
) == bfd_mach_h8300
)
160 else if (bfd_get_mach (table
->abfd
) == bfd_mach_h8300h
161 || bfd_get_mach (table
->abfd
) == bfd_mach_h8300s
)
166 /* Everything went OK. */
167 return (struct bfd_hash_entry
*) ret
;
170 /* Initialize the function vector hash table. */
173 funcvec_hash_table_init (table
, abfd
, newfunc
)
174 struct funcvec_hash_table
*table
;
176 struct bfd_hash_entry
*(*newfunc
)
177 PARAMS ((struct bfd_hash_entry
*, struct bfd_hash_table
*,
180 /* Initialize our local fields, then call the generic initialization
184 return (bfd_hash_table_init (&table
->root
, newfunc
));
187 /* Create the derived linker hash table. We use a derived hash table
188 basically to hold "static" information during an h8/300 coff link
189 without using static variables. */
191 static struct bfd_link_hash_table
*
192 h8300_coff_link_hash_table_create (abfd
)
195 struct h8300_coff_link_hash_table
*ret
;
196 bfd_size_type amt
= sizeof (struct h8300_coff_link_hash_table
);
198 ret
= (struct h8300_coff_link_hash_table
*) bfd_malloc (amt
);
201 if (!_bfd_link_hash_table_init (&ret
->root
.root
, abfd
,
202 _bfd_generic_link_hash_newfunc
))
208 /* Initialize our data. */
209 ret
->vectors_sec
= NULL
;
210 ret
->funcvec_hash_table
= NULL
;
212 /* OK. Everything's intialized, return the base pointer. */
213 return &ret
->root
.root
;
216 /* Special handling for H8/300 relocs.
217 We only come here for pcrel stuff and return normally if not an -r link.
218 When doing -r, we can't do any arithmetic for the pcrel stuff, because
219 the code in reloc.c assumes that we can manipulate the targets of
220 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
221 which means that the gap after the instruction may not be enough to
222 contain the offset required for the branch, so we have to use only
223 the addend until the final link. */
225 static bfd_reloc_status_type
226 special (abfd
, reloc_entry
, symbol
, data
, input_section
, output_bfd
,
228 bfd
*abfd ATTRIBUTE_UNUSED
;
229 arelent
*reloc_entry ATTRIBUTE_UNUSED
;
230 asymbol
*symbol ATTRIBUTE_UNUSED
;
231 PTR data ATTRIBUTE_UNUSED
;
232 asection
*input_section ATTRIBUTE_UNUSED
;
234 char **error_message ATTRIBUTE_UNUSED
;
236 if (output_bfd
== (bfd
*) NULL
)
237 return bfd_reloc_continue
;
239 /* Adjust the reloc address to that in the output section. */
240 reloc_entry
->address
+= input_section
->output_offset
;
244 static reloc_howto_type howto_table
[] = {
245 HOWTO (R_RELBYTE
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "8", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
246 HOWTO (R_RELWORD
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "16", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
247 HOWTO (R_RELLONG
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "32", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
248 HOWTO (R_PCRBYTE
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "DISP8", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
249 HOWTO (R_PCRWORD
, 0, 1, 16, TRUE
, 0, complain_overflow_signed
, special
, "DISP16", FALSE
, 0x0000ffff, 0x0000ffff, TRUE
),
250 HOWTO (R_PCRLONG
, 0, 2, 32, TRUE
, 0, complain_overflow_signed
, special
, "DISP32", FALSE
, 0xffffffff, 0xffffffff, TRUE
),
251 HOWTO (R_MOV16B1
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxable mov.b:16", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
252 HOWTO (R_MOV16B2
, 0, 1, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxed mov.b:16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
253 HOWTO (R_JMP1
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "16/pcrel", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
254 HOWTO (R_JMP2
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "pcrecl/16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
255 HOWTO (R_JMPL1
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "24/pcrell", FALSE
, 0x00ffffff, 0x00ffffff, FALSE
),
256 HOWTO (R_JMPL2
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "pc8/24", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
257 HOWTO (R_MOV24B1
, 0, 1, 32, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxable mov.b:24", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
258 HOWTO (R_MOV24B2
, 0, 1, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "relaxed mov.b:24", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
260 /* An indirect reference to a function. This causes the function's address
261 to be added to the function vector in lo-mem and puts the address of
262 the function vector's entry in the jsr instruction. */
263 HOWTO (R_MEM_INDIRECT
, 0, 0, 8, FALSE
, 0, complain_overflow_bitfield
, special
, "8/indirect", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
265 /* Internal reloc for relaxing. This is created when a 16bit pc-relative
266 branch is turned into an 8bit pc-relative branch. */
267 HOWTO (R_PCRWORD_B
, 0, 0, 8, TRUE
, 0, complain_overflow_bitfield
, special
, "relaxed bCC:16", FALSE
, 0x000000ff, 0x000000ff, FALSE
),
269 HOWTO (R_MOVL1
, 0, 2, 32, FALSE
, 0, complain_overflow_bitfield
,special
, "32/24 relaxable move", FALSE
, 0xffffffff, 0xffffffff, FALSE
),
271 HOWTO (R_MOVL2
, 0, 1, 16, FALSE
, 0, complain_overflow_bitfield
, special
, "32/24 relaxed move", FALSE
, 0x0000ffff, 0x0000ffff, FALSE
),
273 HOWTO (R_BCC_INV
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "DISP8 inverted", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
275 HOWTO (R_JMP_DEL
, 0, 0, 8, TRUE
, 0, complain_overflow_signed
, special
, "Deleted jump", FALSE
, 0x000000ff, 0x000000ff, TRUE
),
278 /* Turn a howto into a reloc number. */
280 #define SELECT_RELOC(x,howto) \
281 { x.r_type = select_reloc (howto); }
283 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x))
284 #define H8300 1 /* Customize coffcode.h */
285 #define __A_MAGIC_SET__
287 /* Code to swap in the reloc. */
288 #define SWAP_IN_RELOC_OFFSET H_GET_32
289 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
290 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
291 dst->r_stuff[0] = 'S'; \
292 dst->r_stuff[1] = 'C';
296 reloc_howto_type
*howto
;
301 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
304 rtype2howto (internal
, dst
)
306 struct internal_reloc
*dst
;
311 internal
->howto
= howto_table
+ 0;
314 internal
->howto
= howto_table
+ 1;
317 internal
->howto
= howto_table
+ 2;
320 internal
->howto
= howto_table
+ 3;
323 internal
->howto
= howto_table
+ 4;
326 internal
->howto
= howto_table
+ 5;
329 internal
->howto
= howto_table
+ 6;
332 internal
->howto
= howto_table
+ 7;
335 internal
->howto
= howto_table
+ 8;
338 internal
->howto
= howto_table
+ 9;
341 internal
->howto
= howto_table
+ 10;
344 internal
->howto
= howto_table
+ 11;
347 internal
->howto
= howto_table
+ 12;
350 internal
->howto
= howto_table
+ 13;
353 internal
->howto
= howto_table
+ 14;
356 internal
->howto
= howto_table
+ 15;
359 internal
->howto
= howto_table
+ 16;
362 internal
->howto
= howto_table
+ 17;
365 internal
->howto
= howto_table
+ 18;
368 internal
->howto
= howto_table
+ 19;
376 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
378 /* Perform any necessary magic to the addend in a reloc entry. */
380 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
381 cache_ptr->addend = ext_reloc.r_offset;
383 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
384 reloc_processing (relent, reloc, symbols, abfd, section)
387 reloc_processing (relent
, reloc
, symbols
, abfd
, section
)
389 struct internal_reloc
*reloc
;
394 relent
->address
= reloc
->r_vaddr
;
395 rtype2howto (relent
, reloc
);
397 if (((int) reloc
->r_symndx
) > 0)
399 relent
->sym_ptr_ptr
= symbols
+ obj_convert (abfd
)[reloc
->r_symndx
];
403 relent
->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
406 relent
->addend
= reloc
->r_offset
;
408 relent
->address
-= section
->vma
;
415 h8300_symbol_address_p (abfd
, input_section
, address
)
417 asection
*input_section
;
422 s
= _bfd_generic_link_get_symbols (abfd
);
423 BFD_ASSERT (s
!= (asymbol
**) NULL
);
425 /* Search all the symbols for one in INPUT_SECTION with
430 if (p
->section
== input_section
431 && (input_section
->output_section
->vma
432 + input_section
->output_offset
433 + p
->value
) == address
)
440 /* If RELOC represents a relaxable instruction/reloc, change it into
441 the relaxed reloc, notify the linker that symbol addresses
442 have changed (bfd_perform_slip) and return how much the current
443 section has shrunk by.
445 FIXME: Much of this code has knowledge of the ordering of entries
446 in the howto table. This needs to be fixed. */
449 h8300_reloc16_estimate (abfd
, input_section
, reloc
, shrink
, link_info
)
451 asection
*input_section
;
454 struct bfd_link_info
*link_info
;
459 static asection
*last_input_section
= NULL
;
460 static arelent
*last_reloc
= NULL
;
462 /* The address of the thing to be relocated will have moved back by
463 the size of the shrink - but we don't change reloc->address here,
464 since we need it to know where the relocation lives in the source
466 bfd_vma address
= reloc
->address
- shrink
;
468 if (input_section
!= last_input_section
)
471 /* Only examine the relocs which might be relaxable. */
472 switch (reloc
->howto
->type
)
474 /* This is the 16/24 bit absolute branch which could become an 8 bit
475 pc-relative branch. */
478 /* Get the address of the target of this branch. */
479 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
481 /* Get the address of the next instruction (not the reloc). */
482 dot
= (input_section
->output_section
->vma
483 + input_section
->output_offset
+ address
);
485 /* Adjust for R_JMP1 vs R_JMPL1. */
486 dot
+= (reloc
->howto
->type
== R_JMP1
? 1 : 2);
488 /* Compute the distance from this insn to the branch target. */
491 /* If the distance is within -128..+128 inclusive, then we can relax
492 this jump. +128 is valid since the target will move two bytes
493 closer if we do relax this branch. */
494 if ((int) gap
>= -128 && (int) gap
<= 128)
498 if (!bfd_get_section_contents (abfd
, input_section
, & code
,
501 code
= bfd_get_8 (abfd
, & code
);
503 /* It's possible we may be able to eliminate this branch entirely;
504 if the previous instruction is a branch around this instruction,
505 and there's no label at this instruction, then we can reverse
506 the condition on the previous branch and eliminate this jump.
513 This saves 4 bytes instead of two, and should be relatively
516 Only perform this optimisation for jumps (code 0x5a) not
517 subroutine calls, as otherwise it could transform:
530 which changes the call (jsr) into a branch (bne). */
534 && last_reloc
->howto
->type
== R_PCRBYTE
)
537 last_value
= bfd_coff_reloc16_get_value (last_reloc
, link_info
,
540 if (last_value
== dot
+ 2
541 && last_reloc
->address
+ 1 == reloc
->address
542 && !h8300_symbol_address_p (abfd
, input_section
, dot
- 2))
544 reloc
->howto
= howto_table
+ 19;
545 last_reloc
->howto
= howto_table
+ 18;
546 last_reloc
->sym_ptr_ptr
= reloc
->sym_ptr_ptr
;
547 last_reloc
->addend
= reloc
->addend
;
549 bfd_perform_slip (abfd
, 4, input_section
, address
);
554 /* Change the reloc type. */
555 reloc
->howto
= reloc
->howto
+ 1;
557 /* This shrinks this section by two bytes. */
559 bfd_perform_slip (abfd
, 2, input_section
, address
);
563 /* This is the 16 bit pc-relative branch which could become an 8 bit
564 pc-relative branch. */
566 /* Get the address of the target of this branch, add one to the value
567 because the addend field in PCrel jumps is off by -1. */
568 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
) + 1;
570 /* Get the address of the next instruction if we were to relax. */
571 dot
= input_section
->output_section
->vma
+
572 input_section
->output_offset
+ address
;
574 /* Compute the distance from this insn to the branch target. */
577 /* If the distance is within -128..+128 inclusive, then we can relax
578 this jump. +128 is valid since the target will move two bytes
579 closer if we do relax this branch. */
580 if ((int) gap
>= -128 && (int) gap
<= 128)
582 /* Change the reloc type. */
583 reloc
->howto
= howto_table
+ 15;
585 /* This shrinks this section by two bytes. */
587 bfd_perform_slip (abfd
, 2, input_section
, address
);
591 /* This is a 16 bit absolute address in a mov.b insn, which can
592 become an 8 bit absolute address if it's in the right range. */
594 /* Get the address of the data referenced by this mov.b insn. */
595 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
597 /* The address is in 0xff00..0xffff inclusive on the h8300 or
598 0xffff00..0xffffff inclusive on the h8300h, then we can
600 if ((bfd_get_mach (abfd
) == bfd_mach_h8300
603 || ((bfd_get_mach (abfd
) == bfd_mach_h8300h
604 || bfd_get_mach (abfd
) == bfd_mach_h8300s
)
606 && value
<= 0xffffff))
608 /* Change the reloc type. */
609 reloc
->howto
= reloc
->howto
+ 1;
611 /* This shrinks this section by two bytes. */
613 bfd_perform_slip (abfd
, 2, input_section
, address
);
617 /* Similarly for a 24 bit absolute address in a mov.b. Note that
618 if we can't relax this into an 8 bit absolute, we'll fall through
619 and try to relax it into a 16bit absolute. */
621 /* Get the address of the data referenced by this mov.b insn. */
622 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
624 /* The address is in 0xffff00..0xffffff inclusive on the h8300h,
625 then we can relax this mov.b */
626 if ((bfd_get_mach (abfd
) == bfd_mach_h8300h
627 || bfd_get_mach (abfd
) == bfd_mach_h8300s
)
629 && value
<= 0xffffff)
631 /* Change the reloc type. */
632 reloc
->howto
= reloc
->howto
+ 1;
634 /* This shrinks this section by four bytes. */
636 bfd_perform_slip (abfd
, 4, input_section
, address
);
638 /* Done with this reloc. */
642 /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit
645 /* This is a 24/32 bit absolute address in a mov insn, which can
646 become an 16 bit absolute address if it's in the right range. */
648 /* Get the address of the data referenced by this mov insn. */
649 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
651 /* If this address is in 0x0000..0x7fff inclusive or
652 0xff8000..0xffffff inclusive, then it can be relaxed. */
653 if (value
<= 0x7fff || value
>= 0xff8000)
655 /* Change the reloc type. */
656 reloc
->howto
= howto_table
+ 17;
658 /* This shrinks this section by two bytes. */
660 bfd_perform_slip (abfd
, 2, input_section
, address
);
664 /* No other reloc types represent relaxing opportunities. */
670 last_input_section
= input_section
;
674 /* Handle relocations for the H8/300, including relocs for relaxed
677 FIXME: Not all relocations check for overflow! */
680 h8300_reloc16_extra_cases (abfd
, link_info
, link_order
, reloc
, data
, src_ptr
,
683 struct bfd_link_info
*link_info
;
684 struct bfd_link_order
*link_order
;
687 unsigned int *src_ptr
;
688 unsigned int *dst_ptr
;
690 unsigned int src_address
= *src_ptr
;
691 unsigned int dst_address
= *dst_ptr
;
692 asection
*input_section
= link_order
->u
.indirect
.section
;
697 switch (reloc
->howto
->type
)
699 /* Generic 8bit pc-relative relocation. */
701 /* Get the address of the target of this branch. */
702 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
704 dot
= (link_order
->offset
706 + link_order
->u
.indirect
.section
->output_section
->vma
);
711 if (gap
< -128 || gap
> 126)
713 if (! ((*link_info
->callbacks
->reloc_overflow
)
714 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
715 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
716 input_section
, reloc
->address
)))
720 /* Everything looks OK. Apply the relocation and update the
721 src/dst address appropriately. */
723 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
730 /* Generic 16bit pc-relative relocation. */
732 /* Get the address of the target of this branch. */
733 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
735 /* Get the address of the instruction (not the reloc). */
736 dot
= (link_order
->offset
738 + link_order
->u
.indirect
.section
->output_section
->vma
+ 1);
743 if (gap
> 32766 || gap
< -32768)
745 if (! ((*link_info
->callbacks
->reloc_overflow
)
746 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
747 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
748 input_section
, reloc
->address
)))
752 /* Everything looks OK. Apply the relocation and update the
753 src/dst address appropriately. */
755 bfd_put_16 (abfd
, (bfd_vma
) gap
, data
+ dst_address
);
762 /* Generic 8bit absolute relocation. */
764 /* Get the address of the object referenced by this insn. */
765 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
769 || (value
>= 0x0000ff00 && value
<= 0x0000ffff)
770 || (value
>= 0x00ffff00 && value
<= 0x00ffffff)
771 || (value
>= 0xffffff00 && value
<= 0xffffffff))
773 /* Everything looks OK. Apply the relocation and update the
774 src/dst address appropriately. */
776 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
);
782 if (! ((*link_info
->callbacks
->reloc_overflow
)
783 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
784 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
785 input_section
, reloc
->address
)))
792 /* Various simple 16bit absolute relocations. */
796 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
797 bfd_put_16 (abfd
, value
, data
+ dst_address
);
802 /* Various simple 24/32bit absolute relocations. */
806 /* Get the address of the target of this branch. */
807 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
808 bfd_put_32 (abfd
, value
, data
+ dst_address
);
813 /* Another 24/32bit absolute relocation. */
815 /* Get the address of the target of this branch. */
816 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
818 value
= ((value
& 0x00ffffff)
819 | (bfd_get_32 (abfd
, data
+ src_address
) & 0xff000000));
820 bfd_put_32 (abfd
, value
, data
+ dst_address
);
825 /* A 16bit abolute relocation that was formerlly a 24/32bit
826 absolute relocation. */
828 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
831 if (value
<= 0x7fff || value
>= 0xff8000)
833 /* Insert the 16bit value into the proper location. */
834 bfd_put_16 (abfd
, value
, data
+ dst_address
);
836 /* Fix the opcode. For all the move insns, we simply
837 need to turn off bit 0x20 in the previous byte. */
838 data
[dst_address
- 1] &= ~0x20;
844 if (! ((*link_info
->callbacks
->reloc_overflow
)
845 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
846 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
847 input_section
, reloc
->address
)))
852 /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */
854 /* Get the address of the target of this branch. */
855 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
857 /* Get the address of the next instruction. */
858 dot
= (link_order
->offset
860 + link_order
->u
.indirect
.section
->output_section
->vma
+ 1);
865 if (gap
< -128 || gap
> 126)
867 if (! ((*link_info
->callbacks
->reloc_overflow
)
868 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
869 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
870 input_section
, reloc
->address
)))
874 /* Now fix the instruction itself. */
875 switch (data
[dst_address
- 1])
879 bfd_put_8 (abfd
, 0x55, data
+ dst_address
- 1);
883 bfd_put_8 (abfd
, 0x40, data
+ dst_address
- 1);
890 /* Write out the 8bit value. */
891 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
898 /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */
900 /* Get the address of the target of this branch. */
901 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
903 /* Get the address of the instruction (not the reloc). */
904 dot
= (link_order
->offset
906 + link_order
->u
.indirect
.section
->output_section
->vma
- 1);
911 if (gap
< -128 || gap
> 126)
913 if (! ((*link_info
->callbacks
->reloc_overflow
)
914 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
915 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
916 input_section
, reloc
->address
)))
920 /* Now fix the instruction. */
921 switch (data
[dst_address
- 2])
924 /* bCC:16 -> bCC:8 */
925 /* Get the condition code from the original insn. */
926 tmp
= data
[dst_address
- 1];
930 /* Now or in the high nibble of the opcode. */
934 bfd_put_8 (abfd
, tmp
, data
+ dst_address
- 2);
938 /* bsr:16 -> bsr:8 */
939 bfd_put_8 (abfd
, 0x55, data
+ dst_address
- 2);
946 /* Output the target. */
947 bfd_put_8 (abfd
, gap
, data
+ dst_address
- 1);
949 /* We don't advance dst_address -- the 8bit reloc is applied at
950 dst_address - 1, so the next insn should begin at dst_address. */
955 /* Similarly for a 24bit absolute that is now 8 bits. */
957 /* Get the address of the target of this branch. */
958 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
960 /* Get the address of the instruction (not the reloc). */
961 dot
= (link_order
->offset
963 + link_order
->u
.indirect
.section
->output_section
->vma
+ 2);
967 /* Fix the instruction. */
968 switch (data
[src_address
])
972 bfd_put_8 (abfd
, 0x55, data
+ dst_address
);
976 bfd_put_8 (abfd
, 0x40, data
+ dst_address
);
982 bfd_put_8 (abfd
, gap
, data
+ dst_address
+ 1);
988 /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */
990 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
993 if (data
[dst_address
- 2] != 0x6a)
996 /* Fix up the opcode. */
997 switch (data
[src_address
- 1] & 0xf0)
1000 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x20;
1003 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x30;
1009 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
- 1);
1013 /* Similarly for a 24bit mov.b */
1015 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1018 if (data
[dst_address
- 2] != 0x6a)
1021 /* Fix up the opcode. */
1022 switch (data
[src_address
- 1] & 0xf0)
1025 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x20;
1028 data
[dst_address
- 2] = (data
[src_address
- 1] & 0xf) | 0x30;
1034 bfd_put_8 (abfd
, value
& 0xff, data
+ dst_address
- 1);
1039 /* Get the address of the target of this branch. */
1040 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1042 dot
= (link_order
->offset
1044 + link_order
->u
.indirect
.section
->output_section
->vma
) + 1;
1049 if (gap
< -128 || gap
> 126)
1051 if (! ((*link_info
->callbacks
->reloc_overflow
)
1052 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
1053 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
1054 input_section
, reloc
->address
)))
1058 /* Everything looks OK. Fix the condition in the instruction, apply
1059 the relocation, and update the src/dst address appropriately. */
1061 bfd_put_8 (abfd
, bfd_get_8 (abfd
, data
+ dst_address
- 1) ^ 1,
1062 data
+ dst_address
- 1);
1063 bfd_put_8 (abfd
, gap
, data
+ dst_address
);
1074 /* An 8bit memory indirect instruction (jmp/jsr).
1076 There's several things that need to be done to handle
1079 If this is a reloc against the absolute symbol, then
1080 we should handle it just R_RELBYTE. Likewise if it's
1081 for a symbol with a value ge 0 and le 0xff.
1083 Otherwise it's a jump/call through the function vector,
1084 and the linker is expected to set up the function vector
1085 and put the right value into the jump/call instruction. */
1086 case R_MEM_INDIRECT
:
1088 /* We need to find the symbol so we can determine it's
1089 address in the function vector table. */
1092 struct funcvec_hash_table
*ftab
;
1093 struct funcvec_hash_entry
*h
;
1094 asection
*vectors_sec
= h8300_coff_hash_table (link_info
)->vectors_sec
;
1096 /* First see if this is a reloc against the absolute symbol
1097 or against a symbol with a nonnegative value <= 0xff. */
1098 symbol
= *(reloc
->sym_ptr_ptr
);
1099 value
= bfd_coff_reloc16_get_value (reloc
, link_info
, input_section
);
1100 if (symbol
== bfd_abs_section_ptr
->symbol
1103 /* This should be handled in a manner very similar to
1104 R_RELBYTES. If the value is in range, then just slam
1105 the value into the right location. Else trigger a
1106 reloc overflow callback. */
1109 bfd_put_8 (abfd
, value
, data
+ dst_address
);
1115 if (! ((*link_info
->callbacks
->reloc_overflow
)
1116 (link_info
, bfd_asymbol_name (*reloc
->sym_ptr_ptr
),
1117 reloc
->howto
->name
, reloc
->addend
, input_section
->owner
,
1118 input_section
, reloc
->address
)))
1124 /* This is a jump/call through a function vector, and we're
1125 expected to create the function vector ourselves.
1127 First look up this symbol in the linker hash table -- we need
1128 the derived linker symbol which holds this symbol's index
1129 in the function vector. */
1130 name
= symbol
->name
;
1131 if (symbol
->flags
& BSF_LOCAL
)
1133 char *new_name
= bfd_malloc ((bfd_size_type
) strlen (name
) + 9);
1134 if (new_name
== NULL
)
1137 strcpy (new_name
, name
);
1138 sprintf (new_name
+ strlen (name
), "_%08x",
1139 (int) symbol
->section
);
1143 ftab
= h8300_coff_hash_table (link_info
)->funcvec_hash_table
;
1144 h
= funcvec_hash_lookup (ftab
, name
, FALSE
, FALSE
);
1146 /* This shouldn't ever happen. If it does that means we've got
1147 data corruption of some kind. Aborting seems like a reasonable
1148 think to do here. */
1149 if (h
== NULL
|| vectors_sec
== NULL
)
1152 /* Place the address of the function vector entry into the
1155 vectors_sec
->output_offset
+ h
->offset
,
1156 data
+ dst_address
);
1161 /* Now create an entry in the function vector itself. */
1162 if (bfd_get_mach (input_section
->owner
) == bfd_mach_h8300
)
1164 bfd_coff_reloc16_get_value (reloc
,
1167 vectors_sec
->contents
+ h
->offset
);
1168 else if (bfd_get_mach (input_section
->owner
) == bfd_mach_h8300h
1169 || bfd_get_mach (input_section
->owner
) == bfd_mach_h8300s
)
1171 bfd_coff_reloc16_get_value (reloc
,
1174 vectors_sec
->contents
+ h
->offset
);
1178 /* Gross. We've already written the contents of the vector section
1179 before we get here... So we write it again with the new data. */
1180 bfd_set_section_contents (vectors_sec
->output_section
->owner
,
1181 vectors_sec
->output_section
,
1182 vectors_sec
->contents
,
1183 (file_ptr
) vectors_sec
->output_offset
,
1184 vectors_sec
->_raw_size
);
1194 *src_ptr
= src_address
;
1195 *dst_ptr
= dst_address
;
1198 /* Routine for the h8300 linker.
1200 This routine is necessary to handle the special R_MEM_INDIRECT
1201 relocs on the h8300. It's responsible for generating a vectors
1202 section and attaching it to an input bfd as well as sizing
1203 the vectors section. It also creates our vectors hash table.
1205 It uses the generic linker routines to actually add the symbols.
1206 from this BFD to the bfd linker hash table. It may add a few
1207 selected static symbols to the bfd linker hash table. */
1210 h8300_bfd_link_add_symbols (abfd
, info
)
1212 struct bfd_link_info
*info
;
1215 struct funcvec_hash_table
*funcvec_hash_table
;
1218 /* If we haven't created a vectors section, do so now. */
1219 if (!h8300_coff_hash_table (info
)->vectors_sec
)
1223 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1224 flags
= (SEC_ALLOC
| SEC_LOAD
1225 | SEC_HAS_CONTENTS
| SEC_IN_MEMORY
| SEC_READONLY
);
1226 h8300_coff_hash_table (info
)->vectors_sec
= bfd_make_section (abfd
,
1229 /* If the section wasn't created, or we couldn't set the flags,
1230 quit quickly now, rather than dieing a painful death later. */
1231 if (! h8300_coff_hash_table (info
)->vectors_sec
1232 || ! bfd_set_section_flags (abfd
,
1233 h8300_coff_hash_table(info
)->vectors_sec
,
1237 /* Also create the vector hash table. */
1238 amt
= sizeof (struct funcvec_hash_table
);
1239 funcvec_hash_table
= (struct funcvec_hash_table
*) bfd_alloc (abfd
, amt
);
1241 if (!funcvec_hash_table
)
1244 /* And initialize the funcvec hash table. */
1245 if (!funcvec_hash_table_init (funcvec_hash_table
, abfd
,
1246 funcvec_hash_newfunc
))
1248 bfd_release (abfd
, funcvec_hash_table
);
1252 /* Store away a pointer to the funcvec hash table. */
1253 h8300_coff_hash_table (info
)->funcvec_hash_table
= funcvec_hash_table
;
1256 /* Load up the function vector hash table. */
1257 funcvec_hash_table
= h8300_coff_hash_table (info
)->funcvec_hash_table
;
1259 /* Add the symbols using the generic code. */
1260 _bfd_generic_link_add_symbols (abfd
, info
);
1262 /* Now scan the relocs for all the sections in this bfd; create
1263 additional space in the .vectors section as needed. */
1264 for (sec
= abfd
->sections
; sec
; sec
= sec
->next
)
1266 long reloc_size
, reloc_count
, i
;
1270 /* Suck in the relocs, symbols & canonicalize them. */
1271 reloc_size
= bfd_get_reloc_upper_bound (abfd
, sec
);
1272 if (reloc_size
<= 0)
1275 relocs
= (arelent
**) bfd_malloc ((bfd_size_type
) reloc_size
);
1279 /* The symbols should have been read in by _bfd_generic link_add_symbols
1280 call abovec, so we can cheat and use the pointer to them that was
1281 saved in the above call. */
1282 symbols
= _bfd_generic_link_get_symbols(abfd
);
1283 reloc_count
= bfd_canonicalize_reloc (abfd
, sec
, relocs
, symbols
);
1284 if (reloc_count
<= 0)
1290 /* Now walk through all the relocations in this section. */
1291 for (i
= 0; i
< reloc_count
; i
++)
1293 arelent
*reloc
= relocs
[i
];
1294 asymbol
*symbol
= *(reloc
->sym_ptr_ptr
);
1297 /* We've got an indirect reloc. See if we need to add it
1298 to the function vector table. At this point, we have
1299 to add a new entry for each unique symbol referenced
1300 by an R_MEM_INDIRECT relocation except for a reloc
1301 against the absolute section symbol. */
1302 if (reloc
->howto
->type
== R_MEM_INDIRECT
1303 && symbol
!= bfd_abs_section_ptr
->symbol
)
1306 struct funcvec_hash_table
*ftab
;
1307 struct funcvec_hash_entry
*h
;
1309 name
= symbol
->name
;
1310 if (symbol
->flags
& BSF_LOCAL
)
1314 new_name
= bfd_malloc ((bfd_size_type
) strlen (name
) + 9);
1315 if (new_name
== NULL
)
1318 strcpy (new_name
, name
);
1319 sprintf (new_name
+ strlen (name
), "_%08x",
1320 (int) symbol
->section
);
1324 /* Look this symbol up in the function vector hash table. */
1325 ftab
= h8300_coff_hash_table (info
)->funcvec_hash_table
;
1326 h
= funcvec_hash_lookup (ftab
, name
, FALSE
, FALSE
);
1328 /* If this symbol isn't already in the hash table, add
1329 it and bump up the size of the hash table. */
1332 h
= funcvec_hash_lookup (ftab
, name
, TRUE
, TRUE
);
1339 /* Bump the size of the vectors section. Each vector
1340 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1341 if (bfd_get_mach (abfd
) == bfd_mach_h8300
)
1342 h8300_coff_hash_table (info
)->vectors_sec
->_raw_size
+= 2;
1343 else if (bfd_get_mach (abfd
) == bfd_mach_h8300h
1344 || bfd_get_mach (abfd
) == bfd_mach_h8300s
)
1345 h8300_coff_hash_table (info
)->vectors_sec
->_raw_size
+= 4;
1350 /* We're done with the relocations, release them. */
1354 /* Now actually allocate some space for the function vector. It's
1355 wasteful to do this more than once, but this is easier. */
1356 sec
= h8300_coff_hash_table (info
)->vectors_sec
;
1357 if (sec
->_raw_size
!= 0)
1359 /* Free the old contents. */
1361 free (sec
->contents
);
1363 /* Allocate new contents. */
1364 sec
->contents
= bfd_malloc (sec
->_raw_size
);
1370 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1371 #define coff_reloc16_estimate h8300_reloc16_estimate
1372 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1373 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1375 #define COFF_LONG_FILENAMES
1376 #include "coffcode.h"
1378 #undef coff_bfd_get_relocated_section_contents
1379 #undef coff_bfd_relax_section
1380 #define coff_bfd_get_relocated_section_contents \
1381 bfd_coff_reloc16_get_relocated_section_contents
1382 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1384 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec
, "coff-h8300", BFD_IS_RELAXABLE
, 0, '_', NULL
)