1 2006-06-06 Thiemo Seufer <ths@mips.com>
2 Chao-ying Fu <fu@mips.com>
4 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
5 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
6 (macro_build): Update comment.
7 (mips_ip): Allow DSP64 instructions for MIPS64R2.
8 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
10 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
11 MIPS_CPU_ASE_MDMX flags for sb1.
13 2006-06-05 Thiemo Seufer <ths@mips.com>
15 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
17 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
18 (mips_ip): Make overflowed/underflowed constant arguments in DSP
19 and MT instructions a fatal error. Use INSERT_OPERAND where
20 appropriate. Improve warnings for break and wait code overflows.
21 Use symbolic constant of OP_MASK_COPZ.
22 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
24 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
26 * po/Make-in (top_builddir): Define.
28 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
30 * doc/Makefile.am (TEXI2DVI): Define.
31 * doc/Makefile.in: Regenerate.
32 * doc/c-arc.texi: Fix typo.
34 2006-06-01 Alan Modra <amodra@bigpond.net.au>
36 * config/obj-ieee.c: Delete.
37 * config/obj-ieee.h: Delete.
38 * Makefile.am (OBJ_FORMATS): Remove ieee.
39 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
40 (obj-ieee.o): Remove rule.
41 * Makefile.in: Regenerate.
42 * configure.in (atof): Remove tahoe.
43 (OBJ_MAYBE_IEEE): Don't define.
44 * configure: Regenerate.
45 * config.in: Regenerate.
46 * doc/Makefile.in: Regenerate.
47 * po/POTFILES.in: Regenerate.
49 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
51 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
52 and LIBINTL_DEP everywhere.
54 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
55 * acinclude.m4: Include new gettext macros.
56 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
57 Remove local code for po/Makefile.
58 * Makefile.in, configure, doc/Makefile.in: Regenerated.
60 2006-05-30 Nick Clifton <nickc@redhat.com>
62 * po/es.po: Updated Spanish translation.
64 2006-05-06 Denis Chertykov <denisc@overta.ru>
66 * doc/c-avr.texi: New file.
67 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
68 * doc/all.texi: Set AVR
69 * doc/as.texinfo: Include c-avr.texi
71 2006-05-28 Jie Zhang <jie.zhang@analog.com>
73 * config/bfin-parse.y (check_macfunc): Loose the condition of
74 calling check_multiply_halfregs ().
76 2006-05-25 Jie Zhang <jie.zhang@analog.com>
78 * config/bfin-parse.y (asm_1): Better check and deal with
79 vector and scalar Multiply 16-Bit Operands instructions.
81 2006-05-24 Nick Clifton <nickc@redhat.com>
83 * config/tc-hppa.c: Convert to ISO C90 format.
84 * config/tc-hppa.h: Likewise.
86 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
87 Randolph Chung <randolph@tausq.org>
89 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
90 is_tls_ieoff, is_tls_leoff): Define.
91 (fix_new_hppa): Handle TLS.
92 (cons_fix_new_hppa): Likewise.
94 (md_apply_fix): Handle TLS relocs.
95 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
97 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
99 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
101 2006-05-23 Thiemo Seufer <ths@mips.com>
102 David Ung <davidu@mips.com>
103 Nigel Stephens <nigel@mips.com>
106 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
107 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
108 ISA_HAS_MXHC1): New macros.
109 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
110 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
111 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
112 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
113 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
114 (mips_after_parse_args): Change default handling of float register
115 size to account for 32bit code with 64bit FP. Better sanity checking
116 of ISA/ASE/ABI option combinations.
117 (s_mipsset): Support switching of GPR and FPR sizes via
118 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
120 (mips_elf_final_processing): We should record the use of 64bit FP
121 registers in 32bit code but we don't, because ELF header flags are
123 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
124 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
125 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
126 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
127 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
128 missing -march options. Document .set arch=CPU. Move .set smartmips
129 to ASE page. Use @code for .set FOO examples.
131 2006-05-23 Jie Zhang <jie.zhang@analog.com>
133 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
136 2006-05-23 Jie Zhang <jie.zhang@analog.com>
138 * config/bfin-defs.h (bfin_equals): Remove declaration.
139 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
140 * config/tc-bfin.c (bfin_name_is_register): Remove.
141 (bfin_equals): Remove.
142 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
143 (bfin_name_is_register): Remove declaration.
145 2006-05-19 Thiemo Seufer <ths@mips.com>
146 Nigel Stephens <nigel@mips.com>
148 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
149 (mips_oddfpreg_ok): New function.
152 2006-05-19 Thiemo Seufer <ths@mips.com>
153 David Ung <davidu@mips.com>
155 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
156 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
157 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
158 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
159 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
160 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
161 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
162 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
163 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
164 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
165 reg_names_o32, reg_names_n32n64): Define register classes.
166 (reg_lookup): New function, use register classes.
167 (md_begin): Reserve register names in the symbol table. Simplify
169 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
171 (mips16_ip): Use reg_lookup.
172 (tc_get_register): Likewise.
173 (tc_mips_regname_to_dw2regnum): New function.
175 2006-05-19 Thiemo Seufer <ths@mips.com>
177 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
178 Un-constify string argument.
179 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
181 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
183 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
185 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
187 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
189 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
192 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
194 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
195 cfloat/m68881 to correct architecture before using it.
197 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
199 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
202 2006-05-15 Paul Brook <paul@codesourcery.com>
204 * config/tc-arm.c (arm_adjust_symtab): Use
205 bfd_is_arm_special_symbol_name.
207 2006-05-15 Bob Wilson <bob.wilson@acm.org>
209 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
210 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
211 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
212 Handle errors from calls to xtensa_opcode_is_* functions.
214 2006-05-14 Thiemo Seufer <ths@mips.com>
216 * config/tc-mips.c (macro_build): Test for currently active
218 (mips16_ip): Reject invalid opcodes.
220 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
222 * doc/as.texinfo: Rename "Index" to "AS Index",
223 and "ABORT" to "ABORT (COFF)".
225 2006-05-11 Paul Brook <paul@codesourcery.com>
227 * config/tc-arm.c (parse_half): New function.
228 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
229 (parse_operands): Ditto.
230 (do_mov16): Reject invalid relocations.
231 (do_t_mov16): Ditto. Use Thumb reloc numbers.
232 (insns): Replace Iffff with HALF.
233 (md_apply_fix): Add MOVW and MOVT relocs.
234 (tc_gen_reloc): Ditto.
235 * doc/c-arm.texi: Document relocation operators
237 2006-05-11 Paul Brook <paul@codesourcery.com>
239 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
241 2006-05-11 Thiemo Seufer <ths@mips.com>
243 * config/tc-mips.c (append_insn): Don't check the range of j or
246 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
248 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
249 relocs against external symbols for WinCE targets.
250 (md_apply_fix): Likewise.
252 2006-05-09 David Ung <davidu@mips.com>
254 * config/tc-mips.c (append_insn): Only warn about an out-of-range
257 2006-05-09 Nick Clifton <nickc@redhat.com>
259 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
260 against symbols which are not going to be placed into the symbol
263 2006-05-09 Ben Elliston <bje@au.ibm.com>
265 * expr.c (operand): Remove `if (0 && ..)' statement and
266 subsequently unused target_op label. Collapse `if (1 || ..)'
268 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
269 separately above the switch.
271 2006-05-08 Nick Clifton <nickc@redhat.com>
274 * config/tc-msp430.c (line_separator_character): Define as |.
276 2006-05-08 Thiemo Seufer <ths@mips.com>
277 Nigel Stephens <nigel@mips.com>
278 David Ung <davidu@mips.com>
280 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
281 (mips_opts): Likewise.
282 (file_ase_smartmips): New variable.
283 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
284 (macro_build): Handle SmartMIPS instructions.
286 (md_longopts): Add argument handling for smartmips.
287 (md_parse_options, mips_after_parse_args): Likewise.
288 (s_mipsset): Add .set smartmips support.
289 (md_show_usage): Document -msmartmips/-mno-smartmips.
290 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
292 * doc/c-mips.texi: Likewise.
294 2006-05-08 Alan Modra <amodra@bigpond.net.au>
296 * write.c (relax_segment): Add pass count arg. Don't error on
297 negative org/space on first two passes.
298 (relax_seg_info): New struct.
299 (relax_seg, write_object_file): Adjust.
300 * write.h (relax_segment): Update prototype.
302 2006-05-05 Julian Brown <julian@codesourcery.com>
304 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
306 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
307 architecture version checks.
308 (insns): Allow overlapping instructions to be used in VFP mode.
310 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
313 * config/obj-elf.c (obj_elf_change_section): Allow user
314 specified SHF_ALPHA_GPREL.
316 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
318 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
319 for PMEM related expressions.
321 2006-05-05 Nick Clifton <nickc@redhat.com>
324 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
325 insertion of a directory separator character into a string at a
326 given offset. Uses heuristics to decide when to use a backslash
327 character rather than a forward-slash character.
328 (dwarf2_directive_loc): Use the macro.
329 (out_debug_info): Likewise.
331 2006-05-05 Thiemo Seufer <ths@mips.com>
332 David Ung <davidu@mips.com>
334 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
336 (macro): Add new case M_CACHE_AB.
338 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
340 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
341 (opcode_lookup): Issue a warning for opcode with
342 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
343 identical to OT_cinfix3.
344 (TxC3w, TC3w, tC3w): New.
345 (insns): Use tC3w and TC3w for comparison instructions with
348 2006-05-04 Alan Modra <amodra@bigpond.net.au>
350 * subsegs.h (struct frchain): Delete frch_seg.
351 (frchain_root): Delete.
352 (seg_info): Define as macro.
353 * subsegs.c (frchain_root): Delete.
354 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
355 (subsegs_begin, subseg_change): Adjust for above.
356 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
357 rather than to one big list.
358 (subseg_get): Don't special case abs, und sections.
359 (subseg_new, subseg_force_new): Don't set frchainP here.
361 (subsegs_print_statistics): Adjust frag chain control list traversal.
362 * debug.c (dmp_frags): Likewise.
363 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
364 at frchain_root. Make use of known frchain ordering.
365 (last_frag_for_seg): Likewise.
366 (get_frag_fix): Likewise. Add seg param.
367 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
368 * write.c (chain_frchains_together_1): Adjust for struct frchain.
369 (SUB_SEGMENT_ALIGN): Likewise.
370 (subsegs_finish): Adjust frchain list traversal.
371 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
372 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
373 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
374 (xtensa_fix_b_j_loop_end_frags): Likewise.
375 (xtensa_fix_close_loop_end_frags): Likewise.
376 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
377 (retrieve_segment_info): Delete frch_seg initialisation.
379 2006-05-03 Alan Modra <amodra@bigpond.net.au>
381 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
382 * config/obj-elf.h (obj_sec_set_private_data): Delete.
383 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
384 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
386 2006-05-02 Joseph Myers <joseph@codesourcery.com>
388 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
390 (md_apply_fix3): Multiply offset by 4 here for
391 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
393 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
394 Jan Beulich <jbeulich@novell.com>
396 * config/tc-i386.c (output_invalid_buf): Change size for
398 * config/tc-tic30.c (output_invalid_buf): Likewise.
400 * config/tc-i386.c (output_invalid): Cast none-ascii char to
402 * config/tc-tic30.c (output_invalid): Likewise.
404 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
406 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
407 (TEXI2POD): Use AM_MAKEINFOFLAGS.
408 (asconfig.texi): Don't set top_srcdir.
409 * doc/as.texinfo: Don't use top_srcdir.
410 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
412 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
414 * config/tc-i386.c (output_invalid_buf): Change size to 16.
415 * config/tc-tic30.c (output_invalid_buf): Likewise.
417 * config/tc-i386.c (output_invalid): Use snprintf instead of
419 * config/tc-ia64.c (declare_register_set): Likewise.
420 (emit_one_bundle): Likewise.
421 (check_dependencies): Likewise.
422 * config/tc-tic30.c (output_invalid): Likewise.
424 2006-05-02 Paul Brook <paul@codesourcery.com>
426 * config/tc-arm.c (arm_optimize_expr): New function.
427 * config/tc-arm.h (md_optimize_expr): Define
428 (arm_optimize_expr): Add prototype.
429 (TC_FORCE_RELOCATION_SUB_SAME): Define.
431 2006-05-02 Ben Elliston <bje@au.ibm.com>
433 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
436 * sb.h (sb_list_vector): Move to sb.c.
437 * sb.c (free_list): Use type of sb_list_vector directly.
438 (sb_build): Fix off-by-one error in assertion about `size'.
440 2006-05-01 Ben Elliston <bje@au.ibm.com>
442 * listing.c (listing_listing): Remove useless loop.
443 * macro.c (macro_expand): Remove is_positional local variable.
444 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
445 and simplify surrounding expressions, where possible.
446 (assign_symbol): Likewise.
447 (s_weakref): Likewise.
448 * symbols.c (colon): Likewise.
450 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
452 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
454 2006-04-30 Thiemo Seufer <ths@mips.com>
455 David Ung <davidu@mips.com>
457 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
458 (mips_immed): New table that records various handling of udi
459 instruction patterns.
460 (mips_ip): Adds udi handling.
462 2006-04-28 Alan Modra <amodra@bigpond.net.au>
464 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
465 of list rather than beginning.
467 2006-04-26 Julian Brown <julian@codesourcery.com>
469 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
470 (is_quarter_float): Rename from above. Simplify slightly.
471 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
473 (parse_neon_mov): Parse floating-point constants.
474 (neon_qfloat_bits): Fix encoding.
475 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
476 preference to integer encoding when using the F32 type.
478 2006-04-26 Julian Brown <julian@codesourcery.com>
480 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
481 zero-initialising structures containing it will lead to invalid types).
482 (arm_it): Add vectype to each operand.
483 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
485 (neon_typed_alias): New structure. Extra information for typed
487 (reg_entry): Add neon type info field.
488 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
489 Break out alternative syntax for coprocessor registers, etc. into...
490 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
491 out from arm_reg_parse.
492 (parse_neon_type): Move. Return SUCCESS/FAIL.
493 (first_error): New function. Call to ensure first error which occurs is
495 (parse_neon_operand_type): Parse exactly one type.
496 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
497 (parse_typed_reg_or_scalar): New function. Handle core of both
498 arm_typed_reg_parse and parse_scalar.
499 (arm_typed_reg_parse): Parse a register with an optional type.
500 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
502 (parse_scalar): Parse a Neon scalar with optional type.
503 (parse_reg_list): Use first_error.
504 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
505 (neon_alias_types_same): New function. Return true if two (alias) types
507 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
509 (insert_reg_alias): Return new reg_entry not void.
510 (insert_neon_reg_alias): New function. Insert type/index information as
511 well as register for alias.
512 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
513 make typed register aliases accordingly.
514 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
516 (s_unreq): Delete type information if present.
517 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
518 (s_arm_unwind_save_mmxwcg): Likewise.
519 (s_arm_unwind_movsp): Likewise.
520 (s_arm_unwind_setfp): Likewise.
521 (parse_shift): Likewise.
522 (parse_shifter_operand): Likewise.
523 (parse_address): Likewise.
524 (parse_tb): Likewise.
525 (tc_arm_regname_to_dw2regnum): Likewise.
526 (md_pseudo_table): Add dn, qn.
527 (parse_neon_mov): Handle typed operands.
528 (parse_operands): Likewise.
529 (neon_type_mask): Add N_SIZ.
530 (N_ALLMODS): New macro.
531 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
532 (el_type_of_type_chk): Add some safeguards.
533 (modify_types_allowed): Fix logic bug.
534 (neon_check_type): Handle operands with types.
535 (neon_three_same): Remove redundant optional arg handling.
536 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
537 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
538 (do_neon_step): Adjust accordingly.
539 (neon_cmode_for_logic_imm): Use first_error.
540 (do_neon_bitfield): Call neon_check_type.
541 (neon_dyadic): Rename to...
542 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
543 to allow modification of type of the destination.
544 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
545 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
546 (do_neon_compare): Make destination be an untyped bitfield.
547 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
548 (neon_mul_mac): Return early in case of errors.
549 (neon_move_immediate): Use first_error.
550 (neon_mac_reg_scalar_long): Fix type to include scalar.
551 (do_neon_dup): Likewise.
552 (do_neon_mov): Likewise (in several places).
553 (do_neon_tbl_tbx): Fix type.
554 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
555 (do_neon_ld_dup): Exit early in case of errors and/or use
557 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
558 Handle .dn/.qn directives.
559 (REGDEF): Add zero for reg_entry neon field.
561 2006-04-26 Julian Brown <julian@codesourcery.com>
563 * config/tc-arm.c (limits.h): Include.
564 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
565 (fpu_vfp_v3_or_neon_ext): Declare constants.
566 (neon_el_type): New enumeration of types for Neon vector elements.
567 (neon_type_el): New struct. Define type and size of a vector element.
568 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
570 (neon_type): Define struct. The type of an instruction.
571 (arm_it): Add 'vectype' for the current instruction.
572 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
573 (vfp_sp_reg_pos): Rename to...
574 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
576 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
577 (Neon D or Q register).
578 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
580 (GE_OPT_PREFIX_BIG): Define constant, for use in...
581 (my_get_expression): Allow above constant as argument to accept
582 64-bit constants with optional prefix.
583 (arm_reg_parse): Add extra argument to return the specific type of
584 register in when either a D or Q register (REG_TYPE_NDQ) is
585 requested. Can be NULL.
586 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
587 (parse_reg_list): Update for new arm_reg_parse args.
588 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
589 (parse_neon_el_struct_list): New function. Parse element/structure
590 register lists for VLD<n>/VST<n> instructions.
591 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
592 (s_arm_unwind_save_mmxwr): Likewise.
593 (s_arm_unwind_save_mmxwcg): Likewise.
594 (s_arm_unwind_movsp): Likewise.
595 (s_arm_unwind_setfp): Likewise.
596 (parse_big_immediate): New function. Parse an immediate, which may be
597 64 bits wide. Put results in inst.operands[i].
598 (parse_shift): Update for new arm_reg_parse args.
599 (parse_address): Likewise. Add parsing of alignment specifiers.
600 (parse_neon_mov): Parse the operands of a VMOV instruction.
601 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
602 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
603 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
604 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
605 (parse_operands): Handle new codes above.
606 (encode_arm_vfp_sp_reg): Rename to...
607 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
608 selected VFP version only supports D0-D15.
609 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
610 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
611 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
612 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
613 encode_arm_vfp_reg name, and allow 32 D regs.
614 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
615 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
617 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
618 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
619 constant-load and conversion insns introduced with VFPv3.
620 (neon_tab_entry): New struct.
621 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
622 those which are the targets of pseudo-instructions.
623 (neon_opc): Enumerate opcodes, use as indices into...
624 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
625 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
626 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
627 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
629 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
631 (neon_type_mask): New. Compact type representation for type checking.
632 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
633 permitted type combinations.
634 (N_IGNORE_TYPE): New macro.
635 (neon_check_shape): New function. Check an instruction shape for
636 multiple alternatives. Return the specific shape for the current
638 (neon_modify_type_size): New function. Modify a vector type and size,
639 depending on the bit mask in argument 1.
640 (neon_type_promote): New function. Convert a given "key" type (of an
641 operand) into the correct type for a different operand, based on a bit
643 (type_chk_of_el_type): New function. Convert a type and size into the
644 compact representation used for type checking.
645 (el_type_of_type_ckh): New function. Reverse of above (only when a
646 single bit is set in the bit mask).
647 (modify_types_allowed): New function. Alter a mask of allowed types
648 based on a bit mask of modifications.
649 (neon_check_type): New function. Check the type of the current
650 instruction against the variable argument list. The "key" type of the
651 instruction is returned.
652 (neon_dp_fixup): New function. Fill in and modify instruction bits for
653 a Neon data-processing instruction depending on whether we're in ARM
654 mode or Thumb-2 mode.
655 (neon_logbits): New function.
656 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
657 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
658 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
659 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
660 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
661 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
662 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
663 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
664 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
665 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
666 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
667 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
668 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
669 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
670 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
671 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
672 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
673 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
674 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
675 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
676 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
677 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
678 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
679 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
680 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
682 (parse_neon_type): New function. Parse Neon type specifier.
683 (opcode_lookup): Allow parsing of Neon type specifiers.
684 (REGNUM2, REGSETH, REGSET2): New macros.
685 (reg_names): Add new VFPv3 and Neon registers.
686 (NUF, nUF, NCE, nCE): New macros for opcode table.
687 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
688 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
689 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
690 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
691 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
692 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
693 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
694 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
695 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
696 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
697 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
698 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
699 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
700 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
702 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
703 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
704 (arm_option_cpu_value): Add vfp3 and neon.
705 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
708 2006-04-25 Bob Wilson <bob.wilson@acm.org>
710 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
711 syntax instead of hardcoded opcodes with ".w18" suffixes.
712 (wide_branch_opcode): New.
713 (build_transition): Use it to check for wide branch opcodes with
714 either ".w18" or ".w15" suffixes.
716 2006-04-25 Bob Wilson <bob.wilson@acm.org>
718 * config/tc-xtensa.c (xtensa_create_literal_symbol,
719 xg_assemble_literal, xg_assemble_literal_space): Do not set the
720 frag's is_literal flag.
722 2006-04-25 Bob Wilson <bob.wilson@acm.org>
724 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
726 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
728 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
729 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
730 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
731 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
732 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
734 2005-04-20 Paul Brook <paul@codesourcery.com>
736 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
738 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
740 2006-04-19 Alan Modra <amodra@bigpond.net.au>
742 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
743 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
744 Make some cpus unsupported on ELF. Run "make dep-am".
745 * Makefile.in: Regenerate.
747 2006-04-19 Alan Modra <amodra@bigpond.net.au>
749 * configure.in (--enable-targets): Indent help message.
750 * configure: Regenerate.
752 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
755 * config/tc-i386.c (i386_immediate): Check illegal immediate
758 2006-04-18 Alan Modra <amodra@bigpond.net.au>
760 * config/tc-i386.c: Formatting.
761 (output_disp, output_imm): ISO C90 params.
763 * frags.c (frag_offset_fixed_p): Constify args.
764 * frags.h (frag_offset_fixed_p): Ditto.
766 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
767 (COFF_MAGIC): Delete.
769 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
771 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
773 * po/POTFILES.in: Regenerated.
775 2006-04-16 Mark Mitchell <mark@codesourcery.com>
777 * doc/as.texinfo: Mention that some .type syntaxes are not
778 supported on all architectures.
780 2006-04-14 Sterling Augustine <sterling@tensilica.com>
782 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
783 instructions when such transformations have been disabled.
785 2006-04-10 Sterling Augustine <sterling@tensilica.com>
787 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
788 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
789 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
790 decoding the loop instructions. Remove current_offset variable.
791 (xtensa_fix_short_loop_frags): Likewise.
792 (min_bytes_to_other_loop_end): Remove current_offset argument.
794 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
796 * config/tc-z80.c (z80_optimize_expr): Removed.
797 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
799 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
801 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
802 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
803 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
804 atmega644, atmega329, atmega3290, atmega649, atmega6490,
805 atmega406, atmega640, atmega1280, atmega1281, at90can32,
806 at90can64, at90usb646, at90usb647, at90usb1286 and
808 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
810 2006-04-07 Paul Brook <paul@codesourcery.com>
812 * config/tc-arm.c (parse_operands): Set default error message.
814 2006-04-07 Paul Brook <paul@codesourcery.com>
816 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
818 2006-04-07 Paul Brook <paul@codesourcery.com>
820 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
822 2006-04-07 Paul Brook <paul@codesourcery.com>
824 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
825 (move_or_literal_pool): Handle Thumb-2 instructions.
826 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
828 2006-04-07 Alan Modra <amodra@bigpond.net.au>
831 * config/tc-i386.c (match_template): Move 64-bit operand tests
834 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
836 * po/Make-in: Add install-html target.
837 * Makefile.am: Add install-html and install-html-recursive targets.
838 * Makefile.in: Regenerate.
839 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
840 * configure: Regenerate.
841 * doc/Makefile.am: Add install-html and install-html-am targets.
842 * doc/Makefile.in: Regenerate.
844 2006-04-06 Alan Modra <amodra@bigpond.net.au>
846 * frags.c (frag_offset_fixed_p): Reinitialise offset before
849 2006-04-05 Richard Sandiford <richard@codesourcery.com>
850 Daniel Jacobowitz <dan@codesourcery.com>
852 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
853 (GOTT_BASE, GOTT_INDEX): New.
854 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
855 GOTT_INDEX when generating VxWorks PIC.
856 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
857 use the generic *-*-vxworks* stanza instead.
859 2006-04-04 Alan Modra <amodra@bigpond.net.au>
862 * frags.c (frag_offset_fixed_p): New function.
863 * frags.h (frag_offset_fixed_p): Declare.
864 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
865 (resolve_expression): Likewise.
867 2006-04-03 Sterling Augustine <sterling@tensilica.com>
869 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
870 of the same length but different numbers of slots.
872 2006-03-30 Andreas Schwab <schwab@suse.de>
874 * configure.in: Fix help string for --enable-targets option.
875 * configure: Regenerate.
877 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
879 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
880 (m68k_ip): ... here. Use for all chips. Protect against buffer
881 overrun and avoid excessive copying.
883 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
884 m68020_control_regs, m68040_control_regs, m68060_control_regs,
885 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
886 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
887 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
888 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
889 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
890 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
891 mcf5282_ctrl, mcfv4e_ctrl): ... these.
892 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
893 (struct m68k_cpu): Change chip field to control_regs.
894 (current_chip): Remove.
896 (m68k_archs, m68k_extensions): Adjust.
897 (m68k_cpus): Reorder to be in cpu number order. Adjust.
898 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
899 (find_cf_chip): Reimplement for new organization of cpu table.
900 (select_control_regs): Remove.
902 (struct save_opts): Save control regs, not chip.
903 (s_save, s_restore): Adjust.
904 (m68k_lookup_cpu): Give deprecated warning when necessary.
905 (m68k_init_arch): Adjust.
906 (md_show_usage): Adjust for new cpu table organization.
908 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
910 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
911 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
912 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
914 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
915 (any_gotrel): New rule.
916 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
917 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
919 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
920 (bfin_pic_ptr): New function.
921 (md_pseudo_table): Add it for ".picptr".
922 (OPTION_FDPIC): New macro.
923 (md_longopts): Add -mfdpic.
924 (md_parse_option): Handle it.
925 (md_begin): Set BFD flags.
926 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
927 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
929 * Makefile.am (bfin-parse.o): Update dependencies.
930 (DEPTC_bfin_elf): Likewise.
931 * Makefile.in: Regenerate.
933 2006-03-25 Richard Sandiford <richard@codesourcery.com>
935 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
936 mcfemac instead of mcfmac.
938 2006-03-23 Michael Matz <matz@suse.de>
940 * config/tc-i386.c (type_names): Correct placement of 'static'.
941 (reloc): Map some more relocs to their 64 bit counterpart when
943 (output_insn): Work around breakage if DEBUG386 is defined.
944 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
945 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
946 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
949 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
951 (md_convert_frag): Jumps can now be larger than 2GB away, error
953 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
954 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
956 2006-03-22 Richard Sandiford <richard@codesourcery.com>
957 Daniel Jacobowitz <dan@codesourcery.com>
958 Phil Edwards <phil@codesourcery.com>
959 Zack Weinberg <zack@codesourcery.com>
960 Mark Mitchell <mark@codesourcery.com>
961 Nathan Sidwell <nathan@codesourcery.com>
963 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
964 (md_begin): Complain about -G being used for PIC. Don't change
965 the text, data and bss alignments on VxWorks.
966 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
967 generating VxWorks PIC.
968 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
969 (macro): Likewise, but do not treat la $25 specially for
970 VxWorks PIC, and do not handle jal.
971 (OPTION_MVXWORKS_PIC): New macro.
972 (md_longopts): Add -mvxworks-pic.
973 (md_parse_option): Don't complain about using PIC and -G together here.
974 Handle OPTION_MVXWORKS_PIC.
975 (md_estimate_size_before_relax): Always use the first relaxation
977 * config/tc-mips.h (VXWORKS_PIC): New.
979 2006-03-21 Paul Brook <paul@codesourcery.com>
981 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
983 2006-03-21 Sterling Augustine <sterling@tensilica.com>
985 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
986 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
987 (get_loop_align_size): New.
988 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
989 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
990 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
991 (get_noop_aligned_address): Use get_loop_align_size.
992 (get_aligned_diff): Likewise.
994 2006-03-21 Paul Brook <paul@codesourcery.com>
996 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
998 2006-03-20 Paul Brook <paul@codesourcery.com>
1000 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1001 (do_t_branch): Encode branches inside IT blocks as unconditional.
1002 (do_t_cps): New function.
1003 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1004 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1005 (opcode_lookup): Allow conditional suffixes on all instructions in
1007 (md_assemble): Advance condexec state before checking for errors.
1008 (insns): Use do_t_cps.
1010 2006-03-20 Paul Brook <paul@codesourcery.com>
1012 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1013 outputting the insn.
1015 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1017 * config/tc-vax.c: Update copyright year.
1018 * config/tc-vax.h: Likewise.
1020 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1022 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1024 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1026 2006-03-17 Paul Brook <paul@codesourcery.com>
1028 * config/tc-arm.c (insns): Add ldm and stm.
1030 2006-03-17 Ben Elliston <bje@au.ibm.com>
1033 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1035 2006-03-16 Paul Brook <paul@codesourcery.com>
1037 * config/tc-arm.c (insns): Add "svc".
1039 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1041 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1042 flag and avoid double underscore prefixes.
1044 2006-03-10 Paul Brook <paul@codesourcery.com>
1046 * config/tc-arm.c (md_begin): Handle EABIv5.
1047 (arm_eabis): Add EF_ARM_EABI_VER5.
1048 * doc/c-arm.texi: Document -meabi=5.
1050 2006-03-10 Ben Elliston <bje@au.ibm.com>
1052 * app.c (do_scrub_chars): Simplify string handling.
1054 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1055 Daniel Jacobowitz <dan@codesourcery.com>
1056 Zack Weinberg <zack@codesourcery.com>
1057 Nathan Sidwell <nathan@codesourcery.com>
1058 Paul Brook <paul@codesourcery.com>
1059 Ricardo Anguiano <anguiano@codesourcery.com>
1060 Phil Edwards <phil@codesourcery.com>
1062 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1063 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1065 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1066 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1067 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1069 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1071 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1072 even when using the text-section-literals option.
1074 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1076 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1078 (m68k_ip): <case 'J'> Check we have some control regs.
1079 (md_parse_option): Allow raw arch switch.
1080 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1081 whether 68881 or cfloat was meant by -mfloat.
1082 (md_show_usage): Adjust extension display.
1083 (m68k_elf_final_processing): Adjust.
1085 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1087 * config/tc-avr.c (avr_mod_hash_value): New function.
1088 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1089 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1090 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1091 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1093 (tc_gen_reloc): Handle substractions of symbols, if possible do
1094 fixups, abort otherwise.
1095 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1096 tc_fix_adjustable): Define.
1098 2006-03-02 James E Wilson <wilson@specifix.com>
1100 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1101 change the template, then clear md.slot[curr].end_of_insn_group.
1103 2006-02-28 Jan Beulich <jbeulich@novell.com>
1105 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1107 2006-02-28 Jan Beulich <jbeulich@novell.com>
1110 * macro.c (getstring): Don't treat parentheses special anymore.
1111 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1112 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1115 2006-02-28 Mat <mat@csail.mit.edu>
1117 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1119 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1121 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1123 (CFI_signal_frame): Define.
1124 (cfi_pseudo_table): Add .cfi_signal_frame.
1125 (dot_cfi): Handle CFI_signal_frame.
1126 (output_cie): Handle cie->signal_frame.
1127 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1128 different. Copy signal_frame from FDE to newly created CIE.
1129 * doc/as.texinfo: Document .cfi_signal_frame.
1131 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1133 * doc/Makefile.am: Add html target.
1134 * doc/Makefile.in: Regenerate.
1135 * po/Make-in: Add html target.
1137 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1139 * config/tc-i386.c (output_insn): Support Intel Merom New
1142 * config/tc-i386.h (CpuMNI): New.
1143 (CpuUnknownFlags): Add CpuMNI.
1145 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1147 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1148 (hpriv_reg_table): New table for hyperprivileged registers.
1149 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1152 2006-02-24 DJ Delorie <dj@redhat.com>
1154 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1155 (tc_gen_reloc): Don't define.
1156 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1157 (OPTION_LINKRELAX): New.
1158 (md_longopts): Add it.
1160 (md_parse_options): Set it.
1161 (md_assemble): Emit relaxation relocs as needed.
1162 (md_convert_frag): Emit relaxation relocs as needed.
1163 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1164 (m32c_apply_fix): New.
1165 (tc_gen_reloc): New.
1166 (m32c_force_relocation): Force out jump relocs when relaxing.
1167 (m32c_fix_adjustable): Return false if relaxing.
1169 2006-02-24 Paul Brook <paul@codesourcery.com>
1171 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1172 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1173 (struct asm_barrier_opt): Define.
1174 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1175 (parse_psr): Accept V7M psr names.
1176 (parse_barrier): New function.
1177 (enum operand_parse_code): Add OP_oBARRIER.
1178 (parse_operands): Implement OP_oBARRIER.
1179 (do_barrier): New function.
1180 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1181 (do_t_cpsi): Add V7M restrictions.
1182 (do_t_mrs, do_t_msr): Validate V7M variants.
1183 (md_assemble): Check for NULL variants.
1184 (v7m_psrs, barrier_opt_names): New tables.
1185 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1186 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1187 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1188 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1189 (struct cpu_arch_ver_table): Define.
1190 (cpu_arch_ver): New.
1191 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1192 Tag_CPU_arch_profile.
1193 * doc/c-arm.texi: Document new cpu and arch options.
1195 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1197 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1199 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1201 * config/tc-ia64.c: Update copyright years.
1203 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1205 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1208 2005-02-22 Paul Brook <paul@codesourcery.com>
1210 * config/tc-arm.c (do_pld): Remove incorrect write to
1212 (encode_thumb32_addr_mode): Use correct operand.
1214 2006-02-21 Paul Brook <paul@codesourcery.com>
1216 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1218 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1219 Anil Paranjape <anilp1@kpitcummins.com>
1220 Shilin Shakti <shilins@kpitcummins.com>
1222 * Makefile.am: Add xc16x related entry.
1223 * Makefile.in: Regenerate.
1224 * configure.in: Added xc16x related entry.
1225 * configure: Regenerate.
1226 * config/tc-xc16x.h: New file
1227 * config/tc-xc16x.c: New file
1228 * doc/c-xc16x.texi: New file for xc16x
1229 * doc/all.texi: Entry for xc16x
1230 * doc/Makefile.texi: Added c-xc16x.texi
1231 * NEWS: Announce the support for the new target.
1233 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1235 * configure.tgt: set emulation for mips-*-netbsd*
1237 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1239 * config.in: Rebuilt.
1241 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1243 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1244 from 1, not 0, in error messages.
1245 (md_assemble): Simplify special-case check for ENTRY instructions.
1246 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1247 operand in error message.
1249 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1251 * configure.tgt (arm-*-linux-gnueabi*): Change to
1254 2006-02-10 Nick Clifton <nickc@redhat.com>
1256 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1257 32-bit value is propagated into the upper bits of a 64-bit long.
1259 * config/tc-arc.c (init_opcode_tables): Fix cast.
1260 (arc_extoper, md_operand): Likewise.
1262 2006-02-09 David Heine <dlheine@tensilica.com>
1264 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1265 each relaxation step.
1267 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1269 * configure.in (CHECK_DECLS): Add vsnprintf.
1270 * configure: Regenerate.
1271 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1272 include/declare here, but...
1273 * as.h: Move code detecting VARARGS idiom to the top.
1274 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1275 (vsnprintf): Declare if not already declared.
1277 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1279 * as.c (close_output_file): New.
1280 (main): Register close_output_file with xatexit before
1281 dump_statistics. Don't call output_file_close.
1283 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1285 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1286 mcf5329_control_regs): New.
1287 (not_current_architecture, selected_arch, selected_cpu): New.
1288 (m68k_archs, m68k_extensions): New.
1289 (archs): Renamed to ...
1290 (m68k_cpus): ... here. Adjust.
1292 (md_pseudo_table): Add arch and cpu directives.
1293 (find_cf_chip, m68k_ip): Adjust table scanning.
1294 (no_68851, no_68881): Remove.
1295 (md_assemble): Lazily initialize.
1296 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1297 (md_init_after_args): Move functionality to m68k_init_arch.
1298 (mri_chip): Adjust table scanning.
1299 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1300 options with saner parsing.
1301 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1302 m68k_init_arch): New.
1303 (s_m68k_cpu, s_m68k_arch): New.
1304 (md_show_usage): Adjust.
1305 (m68k_elf_final_processing): Set CF EF flags.
1306 * config/tc-m68k.h (m68k_init_after_args): Remove.
1307 (tc_init_after_args): Remove.
1308 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1309 (M68k-Directives): Document .arch and .cpu directives.
1311 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1313 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1314 synonyms for equ and defl.
1315 (z80_cons_fix_new): New function.
1316 (emit_byte): Disallow relative jumps to absolute locations.
1317 (emit_data): Only handle defb, prototype changed, because defb is
1318 now handled as pseudo-op rather than an instruction.
1319 (instab): Entries for defb,defw,db,dw moved from here...
1320 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1321 Add entries for def24,def32,d24,d32.
1322 (md_assemble): Improved error handling.
1323 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1324 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1325 (z80_cons_fix_new): Declare.
1326 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1327 (def24,d24,def32,d32): New pseudo-ops.
1329 2006-02-02 Paul Brook <paul@codesourcery.com>
1331 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1333 2005-02-02 Paul Brook <paul@codesourcery.com>
1335 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1336 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1337 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1338 T2_OPCODE_RSB): Define.
1339 (thumb32_negate_data_op): New function.
1340 (md_apply_fix): Use it.
1342 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1344 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1346 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1347 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1349 (relaxation_requirements): Add pfinish_frag argument and use it to
1350 replace setting tinsn->record_fix fields.
1351 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1352 and vinsn_to_insnbuf. Remove references to record_fix and
1353 slot_sub_symbols fields.
1354 (xtensa_mark_narrow_branches): Delete unused code.
1355 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1357 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1359 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1360 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1361 of the record_fix field. Simplify error messages for unexpected
1363 (set_expr_symbol_offset_diff): Delete.
1365 2006-01-31 Paul Brook <paul@codesourcery.com>
1367 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1369 2006-01-31 Paul Brook <paul@codesourcery.com>
1370 Richard Earnshaw <rearnsha@arm.com>
1372 * config/tc-arm.c: Use arm_feature_set.
1373 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1374 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1375 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1378 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1379 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1380 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1381 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1383 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1384 (arm_opts): Move old cpu/arch options from here...
1385 (arm_legacy_opts): ... to here.
1386 (md_parse_option): Search arm_legacy_opts.
1387 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1388 (arm_float_abis, arm_eabis): Make const.
1390 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1392 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1394 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1396 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1397 in load immediate intruction.
1399 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1401 * config/bfin-parse.y (value_match): Use correct conversion
1402 specifications in template string for __FILE__ and __LINE__.
1406 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1408 Introduce TLS descriptors for i386 and x86_64.
1409 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1410 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1411 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1412 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1413 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1415 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1416 (lex_got): Handle @tlsdesc and @tlscall.
1417 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1419 2006-01-11 Nick Clifton <nickc@redhat.com>
1421 Fixes for building on 64-bit hosts:
1422 * config/tc-avr.c (mod_index): New union to allow conversion
1423 between pointers and integers.
1424 (md_begin, avr_ldi_expression): Use it.
1425 * config/tc-i370.c (md_assemble): Add cast for argument to print
1427 * config/tc-tic54x.c (subsym_substitute): Likewise.
1428 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1429 opindex field of fr_cgen structure into a pointer so that it can
1430 be stored in a frag.
1431 * config/tc-mn10300.c (md_assemble): Likewise.
1432 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1434 * config/tc-v850.c: Replace uses of (int) casts with correct
1437 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1440 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1442 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1445 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1446 a local-label reference.
1448 For older changes see ChangeLog-2005
1454 version-control: never