Do not create $(bfdlibdir) and $(bfdincludedir) if !INSTALL_LIBBFD.
[binutils.git] / opcodes / m68k-dis.c
blobdd7a3b33e8e0c614507425391f98ba7a9c0eb819
1 /* Print Motorola 68k instructions.
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009
4 Free Software Foundation, Inc.
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
23 #include "sysdep.h"
24 #include "dis-asm.h"
25 #include "floatformat.h"
26 #include "libiberty.h"
27 #include "opintl.h"
29 #include "opcode/m68k.h"
31 /* Local function prototypes. */
33 const char * const fpcr_names[] =
35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
39 static char *const reg_names[] =
41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
43 "%ps", "%pc"
46 /* Name of register halves for MAC/EMAC.
47 Seperate from reg_names since 'spu', 'fpl' look weird. */
48 static char *const reg_half_names[] =
50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
52 "%ps", "%pc"
55 /* Sign-extend an (unsigned char). */
56 #if __STDC__ == 1
57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
58 #else
59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 #endif
62 /* Get a 1 byte signed integer. */
63 #define NEXTBYTE(p, val) \
64 do \
65 { \
66 p += 2; \
67 if (!FETCH_DATA (info, p)) \
68 return -3; \
69 val = COERCE_SIGNED_CHAR (p[-1]); \
70 } \
71 while (0)
73 /* Get a 2 byte signed integer. */
74 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
76 #define NEXTWORD(p, val, ret_val) \
77 do \
78 { \
79 p += 2; \
80 if (!FETCH_DATA (info, p)) \
81 return ret_val; \
82 val = COERCE16 ((p[-2] << 8) + p[-1]); \
83 } \
84 while (0)
86 /* Get a 4 byte signed integer. */
87 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000)
89 #define NEXTLONG(p, val, ret_val) \
90 do \
91 { \
92 p += 4; \
93 if (!FETCH_DATA (info, p)) \
94 return ret_val; \
95 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
96 } \
97 while (0)
99 /* Get a 4 byte unsigned integer. */
100 #define NEXTULONG(p, val) \
101 do \
103 p += 4; \
104 if (!FETCH_DATA (info, p)) \
105 return -3; \
106 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \
108 while (0)
110 /* Get a single precision float. */
111 #define NEXTSINGLE(val, p) \
112 do \
114 p += 4; \
115 if (!FETCH_DATA (info, p)) \
116 return -3; \
117 floatformat_to_double (& floatformat_ieee_single_big, \
118 (char *) p - 4, & val); \
120 while (0)
122 /* Get a double precision float. */
123 #define NEXTDOUBLE(val, p) \
124 do \
126 p += 8; \
127 if (!FETCH_DATA (info, p)) \
128 return -3; \
129 floatformat_to_double (& floatformat_ieee_double_big, \
130 (char *) p - 8, & val); \
132 while (0)
134 /* Get an extended precision float. */
135 #define NEXTEXTEND(val, p) \
136 do \
138 p += 12; \
139 if (!FETCH_DATA (info, p)) \
140 return -3; \
141 floatformat_to_double (& floatformat_m68881_ext, \
142 (char *) p - 12, & val); \
144 while (0)
146 /* Need a function to convert from packed to double
147 precision. Actually, it's easier to print a
148 packed number than a double anyway, so maybe
149 there should be a special case to handle this... */
150 #define NEXTPACKED(p, val) \
151 do \
153 p += 12; \
154 if (!FETCH_DATA (info, p)) \
155 return -3; \
156 val = 0.0; \
158 while (0)
161 /* Maximum length of an instruction. */
162 #define MAXLEN 22
164 #include <setjmp.h>
166 struct private
168 /* Points to first byte not fetched. */
169 bfd_byte *max_fetched;
170 bfd_byte the_buffer[MAXLEN];
171 bfd_vma insn_start;
174 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
175 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */
176 #define FETCH_DATA(info, addr) \
177 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
178 ? 1 : fetch_data ((info), (addr)))
180 static int
181 fetch_data (struct disassemble_info *info, bfd_byte *addr)
183 int status;
184 struct private *priv = (struct private *)info->private_data;
185 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
187 status = (*info->read_memory_func) (start,
188 priv->max_fetched,
189 addr - priv->max_fetched,
190 info);
191 if (status != 0)
193 (*info->memory_error_func) (status, start, info);
194 return 0;
196 else
197 priv->max_fetched = addr;
198 return 1;
201 /* This function is used to print to the bit-bucket. */
202 static int
203 dummy_printer (FILE *file ATTRIBUTE_UNUSED,
204 const char *format ATTRIBUTE_UNUSED,
205 ...)
207 return 0;
210 static void
211 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED,
212 struct disassemble_info *info ATTRIBUTE_UNUSED)
216 /* Fetch BITS bits from a position in the instruction specified by CODE.
217 CODE is a "place to put an argument", or 'x' for a destination
218 that is a general address (mode and register).
219 BUFFER contains the instruction.
220 Returns -1 on failure. */
222 static int
223 fetch_arg (unsigned char *buffer,
224 int code,
225 int bits,
226 disassemble_info *info)
228 int val = 0;
230 switch (code)
232 case '/': /* MAC/EMAC mask bit. */
233 val = buffer[3] >> 5;
234 break;
236 case 'G': /* EMAC ACC load. */
237 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1);
238 break;
240 case 'H': /* EMAC ACC !load. */
241 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1);
242 break;
244 case ']': /* EMAC ACCEXT bit. */
245 val = buffer[0] >> 2;
246 break;
248 case 'I': /* MAC/EMAC scale factor. */
249 val = buffer[2] >> 1;
250 break;
252 case 'F': /* EMAC ACCx. */
253 val = buffer[0] >> 1;
254 break;
256 case 'f':
257 val = buffer[1];
258 break;
260 case 's':
261 val = buffer[1];
262 break;
264 case 'd': /* Destination, for register or quick. */
265 val = (buffer[0] << 8) + buffer[1];
266 val >>= 9;
267 break;
269 case 'x': /* Destination, for general arg. */
270 val = (buffer[0] << 8) + buffer[1];
271 val >>= 6;
272 break;
274 case 'k':
275 if (! FETCH_DATA (info, buffer + 3))
276 return -1;
277 val = (buffer[3] >> 4);
278 break;
280 case 'C':
281 if (! FETCH_DATA (info, buffer + 3))
282 return -1;
283 val = buffer[3];
284 break;
286 case '1':
287 if (! FETCH_DATA (info, buffer + 3))
288 return -1;
289 val = (buffer[2] << 8) + buffer[3];
290 val >>= 12;
291 break;
293 case '2':
294 if (! FETCH_DATA (info, buffer + 3))
295 return -1;
296 val = (buffer[2] << 8) + buffer[3];
297 val >>= 6;
298 break;
300 case '3':
301 case 'j':
302 if (! FETCH_DATA (info, buffer + 3))
303 return -1;
304 val = (buffer[2] << 8) + buffer[3];
305 break;
307 case '4':
308 if (! FETCH_DATA (info, buffer + 5))
309 return -1;
310 val = (buffer[4] << 8) + buffer[5];
311 val >>= 12;
312 break;
314 case '5':
315 if (! FETCH_DATA (info, buffer + 5))
316 return -1;
317 val = (buffer[4] << 8) + buffer[5];
318 val >>= 6;
319 break;
321 case '6':
322 if (! FETCH_DATA (info, buffer + 5))
323 return -1;
324 val = (buffer[4] << 8) + buffer[5];
325 break;
327 case '7':
328 if (! FETCH_DATA (info, buffer + 3))
329 return -1;
330 val = (buffer[2] << 8) + buffer[3];
331 val >>= 7;
332 break;
334 case '8':
335 if (! FETCH_DATA (info, buffer + 3))
336 return -1;
337 val = (buffer[2] << 8) + buffer[3];
338 val >>= 10;
339 break;
341 case '9':
342 if (! FETCH_DATA (info, buffer + 3))
343 return -1;
344 val = (buffer[2] << 8) + buffer[3];
345 val >>= 5;
346 break;
348 case 'e':
349 val = (buffer[1] >> 6);
350 break;
352 case 'E':
353 if (! FETCH_DATA (info, buffer + 3))
354 return -1;
355 val = (buffer[2] >> 1);
356 break;
358 case 'm':
359 val = (buffer[1] & 0x40 ? 0x8 : 0)
360 | ((buffer[0] >> 1) & 0x7)
361 | (buffer[3] & 0x80 ? 0x10 : 0);
362 break;
364 case 'n':
365 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
366 break;
368 case 'o':
369 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
370 break;
372 case 'M':
373 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
374 break;
376 case 'N':
377 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0);
378 break;
380 case 'h':
381 val = buffer[2] >> 2;
382 break;
384 default:
385 abort ();
388 /* bits is never too big. */
389 return val & ((1 << bits) - 1);
392 /* Check if an EA is valid for a particular code. This is required
393 for the EMAC instructions since the type of source address determines
394 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
395 is a non-load EMAC instruction and the bits mean register Ry.
396 A similar case exists for the movem instructions where the register
397 mask is interpreted differently for different EAs. */
399 static bfd_boolean
400 m68k_valid_ea (char code, int val)
402 int mode, mask;
403 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
404 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
405 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
407 switch (code)
409 case '*':
410 mask = M (1,1,1,1,1,1,1,1,1,1,1,1);
411 break;
412 case '~':
413 mask = M (0,0,1,1,1,1,1,1,1,0,0,0);
414 break;
415 case '%':
416 mask = M (1,1,1,1,1,1,1,1,1,0,0,0);
417 break;
418 case ';':
419 mask = M (1,0,1,1,1,1,1,1,1,1,1,1);
420 break;
421 case '@':
422 mask = M (1,0,1,1,1,1,1,1,1,1,1,0);
423 break;
424 case '!':
425 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
426 break;
427 case '&':
428 mask = M (0,0,1,0,0,1,1,1,1,0,0,0);
429 break;
430 case '$':
431 mask = M (1,0,1,1,1,1,1,1,1,0,0,0);
432 break;
433 case '?':
434 mask = M (1,0,1,0,0,1,1,1,1,0,0,0);
435 break;
436 case '/':
437 mask = M (1,0,1,0,0,1,1,1,1,1,1,0);
438 break;
439 case '|':
440 mask = M (0,0,1,0,0,1,1,1,1,1,1,0);
441 break;
442 case '>':
443 mask = M (0,0,1,0,1,1,1,1,1,0,0,0);
444 break;
445 case '<':
446 mask = M (0,0,1,1,0,1,1,1,1,1,1,0);
447 break;
448 case 'm':
449 mask = M (1,1,1,1,1,0,0,0,0,0,0,0);
450 break;
451 case 'n':
452 mask = M (0,0,0,0,0,1,0,0,0,1,0,0);
453 break;
454 case 'o':
455 mask = M (0,0,0,0,0,0,1,1,1,0,1,1);
456 break;
457 case 'p':
458 mask = M (1,1,1,1,1,1,0,0,0,0,0,0);
459 break;
460 case 'q':
461 mask = M (1,0,1,1,1,1,0,0,0,0,0,0);
462 break;
463 case 'v':
464 mask = M (1,0,1,1,1,1,0,1,1,0,0,0);
465 break;
466 case 'b':
467 mask = M (1,0,1,1,1,1,0,0,0,1,0,0);
468 break;
469 case 'w':
470 mask = M (0,0,1,1,1,1,0,0,0,1,0,0);
471 break;
472 case 'y':
473 mask = M (0,0,1,0,0,1,0,0,0,0,0,0);
474 break;
475 case 'z':
476 mask = M (0,0,1,0,0,1,0,0,0,1,0,0);
477 break;
478 case '4':
479 mask = M (0,0,1,1,1,1,0,0,0,0,0,0);
480 break;
481 default:
482 abort ();
484 #undef M
486 mode = (val >> 3) & 7;
487 if (mode == 7)
488 mode += val & 7;
489 return (mask & (1 << mode)) != 0;
492 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
493 REGNO = -1 for pc, -2 for none (suppressed). */
495 static void
496 print_base (int regno, bfd_vma disp, disassemble_info *info)
498 if (regno == -1)
500 (*info->fprintf_func) (info->stream, "%%pc@(");
501 (*info->print_address_func) (disp, info);
503 else
505 char buf[50];
507 if (regno == -2)
508 (*info->fprintf_func) (info->stream, "@(");
509 else if (regno == -3)
510 (*info->fprintf_func) (info->stream, "%%zpc@(");
511 else
512 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]);
514 sprintf_vma (buf, disp);
515 (*info->fprintf_func) (info->stream, "%s", buf);
519 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
520 P points to extension word, in buffer.
521 ADDR is the nominal core address of that extension word.
522 Returns NULL upon error. */
524 static unsigned char *
525 print_indexed (int basereg,
526 unsigned char *p,
527 bfd_vma addr,
528 disassemble_info *info)
530 int word;
531 static char *const scales[] = { "", ":2", ":4", ":8" };
532 bfd_vma base_disp;
533 bfd_vma outer_disp;
534 char buf[40];
535 char vmabuf[50];
537 NEXTWORD (p, word, NULL);
539 /* Generate the text for the index register.
540 Where this will be output is not yet determined. */
541 sprintf (buf, "%s:%c%s",
542 reg_names[(word >> 12) & 0xf],
543 (word & 0x800) ? 'l' : 'w',
544 scales[(word >> 9) & 3]);
546 /* Handle the 68000 style of indexing. */
548 if ((word & 0x100) == 0)
550 base_disp = word & 0xff;
551 if ((base_disp & 0x80) != 0)
552 base_disp -= 0x100;
553 if (basereg == -1)
554 base_disp += addr;
555 print_base (basereg, base_disp, info);
556 (*info->fprintf_func) (info->stream, ",%s)", buf);
557 return p;
560 /* Handle the generalized kind. */
561 /* First, compute the displacement to add to the base register. */
562 if (word & 0200)
564 if (basereg == -1)
565 basereg = -3;
566 else
567 basereg = -2;
569 if (word & 0100)
570 buf[0] = '\0';
571 base_disp = 0;
572 switch ((word >> 4) & 3)
574 case 2:
575 NEXTWORD (p, base_disp, NULL);
576 break;
577 case 3:
578 NEXTLONG (p, base_disp, NULL);
580 if (basereg == -1)
581 base_disp += addr;
583 /* Handle single-level case (not indirect). */
584 if ((word & 7) == 0)
586 print_base (basereg, base_disp, info);
587 if (buf[0] != '\0')
588 (*info->fprintf_func) (info->stream, ",%s", buf);
589 (*info->fprintf_func) (info->stream, ")");
590 return p;
593 /* Two level. Compute displacement to add after indirection. */
594 outer_disp = 0;
595 switch (word & 3)
597 case 2:
598 NEXTWORD (p, outer_disp, NULL);
599 break;
600 case 3:
601 NEXTLONG (p, outer_disp, NULL);
604 print_base (basereg, base_disp, info);
605 if ((word & 4) == 0 && buf[0] != '\0')
607 (*info->fprintf_func) (info->stream, ",%s", buf);
608 buf[0] = '\0';
610 sprintf_vma (vmabuf, outer_disp);
611 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf);
612 if (buf[0] != '\0')
613 (*info->fprintf_func) (info->stream, ",%s", buf);
614 (*info->fprintf_func) (info->stream, ")");
616 return p;
619 #define FETCH_ARG(size, val) \
620 do \
622 val = fetch_arg (buffer, place, size, info); \
623 if (val < 0) \
624 return -3; \
626 while (0)
628 /* Returns number of bytes "eaten" by the operand, or
629 return -1 if an invalid operand was found, or -2 if
630 an opcode tabe error was found or -3 to simply abort.
631 ADDR is the pc for this arg to be relative to. */
633 static int
634 print_insn_arg (const char *d,
635 unsigned char *buffer,
636 unsigned char *p0,
637 bfd_vma addr,
638 disassemble_info *info)
640 int val = 0;
641 int place = d[1];
642 unsigned char *p = p0;
643 int regno;
644 const char *regname;
645 unsigned char *p1;
646 double flval;
647 int flt_p;
648 bfd_signed_vma disp;
649 unsigned int uval;
651 switch (*d)
653 case 'c': /* Cache identifier. */
655 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" };
656 FETCH_ARG (2, val);
657 (*info->fprintf_func) (info->stream, cacheFieldName[val]);
658 break;
661 case 'a': /* Address register indirect only. Cf. case '+'. */
663 FETCH_ARG (3, val);
664 (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]);
665 break;
668 case '_': /* 32-bit absolute address for move16. */
670 NEXTULONG (p, uval);
671 (*info->print_address_func) (uval, info);
672 break;
675 case 'C':
676 (*info->fprintf_func) (info->stream, "%%ccr");
677 break;
679 case 'S':
680 (*info->fprintf_func) (info->stream, "%%sr");
681 break;
683 case 'U':
684 (*info->fprintf_func) (info->stream, "%%usp");
685 break;
687 case 'E':
688 (*info->fprintf_func) (info->stream, "%%acc");
689 break;
691 case 'G':
692 (*info->fprintf_func) (info->stream, "%%macsr");
693 break;
695 case 'H':
696 (*info->fprintf_func) (info->stream, "%%mask");
697 break;
699 case 'J':
701 /* FIXME: There's a problem here, different m68k processors call the
702 same address different names. The tables below try to get it right
703 using info->mach, but only for v4e. */
704 struct regname { char * name; int value; };
705 static const struct regname names[] =
707 {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
708 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
709 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
710 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
711 {"%msp", 0x803}, {"%isp", 0x804},
712 {"%pc", 0x80f},
713 /* Reg c04 is sometimes called flashbar or rambar.
714 Rec c05 is also sometimes called rambar. */
715 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
717 {"%mbar", 0xc0f},
719 /* Should we be calling this psr like we do in case 'Y'? */
720 {"%mmusr",0x805},
722 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
724 /* Fido added these. */
725 {"%cac", 0xffe}, {"%mbo", 0xfff}
727 /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */
728 static const struct regname names_v4e[] =
730 {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
731 {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
733 unsigned int arch_mask;
735 arch_mask = bfd_m68k_mach_to_features (info->mach);
736 FETCH_ARG (12, val);
737 if (arch_mask & (mcfisa_b | mcfisa_c))
739 for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
740 if (names_v4e[regno].value == val)
742 (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
743 break;
745 if (regno >= 0)
746 break;
748 for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
749 if (names[regno].value == val)
751 (*info->fprintf_func) (info->stream, "%s", names[regno].name);
752 break;
754 if (regno < 0)
755 (*info->fprintf_func) (info->stream, "0x%x", val);
757 break;
759 case 'Q':
760 FETCH_ARG (3, val);
761 /* 0 means 8, except for the bkpt instruction... */
762 if (val == 0 && d[1] != 's')
763 val = 8;
764 (*info->fprintf_func) (info->stream, "#%d", val);
765 break;
767 case 'x':
768 FETCH_ARG (3, val);
769 /* 0 means -1. */
770 if (val == 0)
771 val = -1;
772 (*info->fprintf_func) (info->stream, "#%d", val);
773 break;
775 case 'j':
776 FETCH_ARG (3, val);
777 (*info->fprintf_func) (info->stream, "#%d", val+1);
778 break;
780 case 'K':
781 FETCH_ARG (9, val);
782 (*info->fprintf_func) (info->stream, "#%d", val);
783 break;
785 case 'M':
786 if (place == 'h')
788 static char *const scalefactor_name[] = { "<<", ">>" };
790 FETCH_ARG (1, val);
791 (*info->fprintf_func) (info->stream, scalefactor_name[val]);
793 else
795 FETCH_ARG (8, val);
796 if (val & 0x80)
797 val = val - 0x100;
798 (*info->fprintf_func) (info->stream, "#%d", val);
800 break;
802 case 'T':
803 FETCH_ARG (4, val);
804 (*info->fprintf_func) (info->stream, "#%d", val);
805 break;
807 case 'D':
808 FETCH_ARG (3, val);
809 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
810 break;
812 case 'A':
813 FETCH_ARG (3, val);
814 (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]);
815 break;
817 case 'R':
818 FETCH_ARG (4, val);
819 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
820 break;
822 case 'r':
823 FETCH_ARG (4, regno);
824 if (regno > 7)
825 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]);
826 else
827 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]);
828 break;
830 case 'F':
831 FETCH_ARG (3, val);
832 (*info->fprintf_func) (info->stream, "%%fp%d", val);
833 break;
835 case 'O':
836 FETCH_ARG (6, val);
837 if (val & 0x20)
838 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]);
839 else
840 (*info->fprintf_func) (info->stream, "%d", val);
841 break;
843 case '+':
844 FETCH_ARG (3, val);
845 (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]);
846 break;
848 case '-':
849 FETCH_ARG (3, val);
850 (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]);
851 break;
853 case 'k':
854 if (place == 'k')
856 FETCH_ARG (3, val);
857 (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]);
859 else if (place == 'C')
861 FETCH_ARG (7, val);
862 if (val > 63) /* This is a signed constant. */
863 val -= 128;
864 (*info->fprintf_func) (info->stream, "{#%d}", val);
866 else
867 return -1;
868 break;
870 case '#':
871 case '^':
872 p1 = buffer + (*d == '#' ? 2 : 4);
873 if (place == 's')
874 FETCH_ARG (4, val);
875 else if (place == 'C')
876 FETCH_ARG (7, val);
877 else if (place == '8')
878 FETCH_ARG (3, val);
879 else if (place == '3')
880 FETCH_ARG (8, val);
881 else if (place == 'b')
882 NEXTBYTE (p1, val);
883 else if (place == 'w' || place == 'W')
884 NEXTWORD (p1, val, -3);
885 else if (place == 'l')
886 NEXTLONG (p1, val, -3);
887 else
888 return -2;
890 (*info->fprintf_func) (info->stream, "#%d", val);
891 break;
893 case 'B':
894 if (place == 'b')
895 NEXTBYTE (p, disp);
896 else if (place == 'B')
897 disp = COERCE_SIGNED_CHAR (buffer[1]);
898 else if (place == 'w' || place == 'W')
899 NEXTWORD (p, disp, -3);
900 else if (place == 'l' || place == 'L' || place == 'C')
901 NEXTLONG (p, disp, -3);
902 else if (place == 'g')
904 NEXTBYTE (buffer, disp);
905 if (disp == 0)
906 NEXTWORD (p, disp, -3);
907 else if (disp == -1)
908 NEXTLONG (p, disp, -3);
910 else if (place == 'c')
912 if (buffer[1] & 0x40) /* If bit six is one, long offset. */
913 NEXTLONG (p, disp, -3);
914 else
915 NEXTWORD (p, disp, -3);
917 else
918 return -2;
920 (*info->print_address_func) (addr + disp, info);
921 break;
923 case 'd':
925 int val1;
927 NEXTWORD (p, val, -3);
928 FETCH_ARG (3, val1);
929 (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val);
930 break;
933 case 's':
934 FETCH_ARG (3, val);
935 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
936 break;
938 case 'e':
939 FETCH_ARG (2, val);
940 (*info->fprintf_func) (info->stream, "%%acc%d", val);
941 break;
943 case 'g':
944 FETCH_ARG (1, val);
945 (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23");
946 break;
948 case 'i':
949 FETCH_ARG (2, val);
950 if (val == 1)
951 (*info->fprintf_func) (info->stream, "<<");
952 else if (val == 3)
953 (*info->fprintf_func) (info->stream, ">>");
954 else
955 return -1;
956 break;
958 case 'I':
959 /* Get coprocessor ID... */
960 val = fetch_arg (buffer, 'd', 3, info);
961 if (val < 0)
962 return -3;
963 if (val != 1) /* Unusual coprocessor ID? */
964 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
965 break;
967 case '4':
968 case '*':
969 case '~':
970 case '%':
971 case ';':
972 case '@':
973 case '!':
974 case '$':
975 case '?':
976 case '/':
977 case '&':
978 case '|':
979 case '<':
980 case '>':
981 case 'm':
982 case 'n':
983 case 'o':
984 case 'p':
985 case 'q':
986 case 'v':
987 case 'b':
988 case 'w':
989 case 'y':
990 case 'z':
991 if (place == 'd')
993 val = fetch_arg (buffer, 'x', 6, info);
994 if (val < 0)
995 return -3;
996 val = ((val & 7) << 3) + ((val >> 3) & 7);
998 else
1000 val = fetch_arg (buffer, 's', 6, info);
1001 if (val < 0)
1002 return -3;
1005 /* If the <ea> is invalid for *d, then reject this match. */
1006 if (!m68k_valid_ea (*d, val))
1007 return -1;
1009 /* Get register number assuming address register. */
1010 regno = (val & 7) + 8;
1011 regname = reg_names[regno];
1012 switch (val >> 3)
1014 case 0:
1015 (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
1016 break;
1018 case 1:
1019 (*info->fprintf_func) (info->stream, "%s", regname);
1020 break;
1022 case 2:
1023 (*info->fprintf_func) (info->stream, "%s@", regname);
1024 break;
1026 case 3:
1027 (*info->fprintf_func) (info->stream, "%s@+", regname);
1028 break;
1030 case 4:
1031 (*info->fprintf_func) (info->stream, "%s@-", regname);
1032 break;
1034 case 5:
1035 NEXTWORD (p, val, -3);
1036 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
1037 break;
1039 case 6:
1040 p = print_indexed (regno, p, addr, info);
1041 if (p == NULL)
1042 return -3;
1043 break;
1045 case 7:
1046 switch (val & 7)
1048 case 0:
1049 NEXTWORD (p, val, -3);
1050 (*info->print_address_func) (val, info);
1051 break;
1053 case 1:
1054 NEXTULONG (p, uval);
1055 (*info->print_address_func) (uval, info);
1056 break;
1058 case 2:
1059 NEXTWORD (p, val, -3);
1060 (*info->fprintf_func) (info->stream, "%%pc@(");
1061 (*info->print_address_func) (addr + val, info);
1062 (*info->fprintf_func) (info->stream, ")");
1063 break;
1065 case 3:
1066 p = print_indexed (-1, p, addr, info);
1067 if (p == NULL)
1068 return -3;
1069 break;
1071 case 4:
1072 flt_p = 1; /* Assume it's a float... */
1073 switch (place)
1075 case 'b':
1076 NEXTBYTE (p, val);
1077 flt_p = 0;
1078 break;
1080 case 'w':
1081 NEXTWORD (p, val, -3);
1082 flt_p = 0;
1083 break;
1085 case 'l':
1086 NEXTLONG (p, val, -3);
1087 flt_p = 0;
1088 break;
1090 case 'f':
1091 NEXTSINGLE (flval, p);
1092 break;
1094 case 'F':
1095 NEXTDOUBLE (flval, p);
1096 break;
1098 case 'x':
1099 NEXTEXTEND (flval, p);
1100 break;
1102 case 'p':
1103 NEXTPACKED (p, flval);
1104 break;
1106 default:
1107 return -1;
1109 if (flt_p) /* Print a float? */
1110 (*info->fprintf_func) (info->stream, "#%g", flval);
1111 else
1112 (*info->fprintf_func) (info->stream, "#%d", val);
1113 break;
1115 default:
1116 return -1;
1120 /* If place is '/', then this is the case of the mask bit for
1121 mac/emac loads. Now that the arg has been printed, grab the
1122 mask bit and if set, add a '&' to the arg. */
1123 if (place == '/')
1125 FETCH_ARG (1, val);
1126 if (val)
1127 info->fprintf_func (info->stream, "&");
1129 break;
1131 case 'L':
1132 case 'l':
1133 if (place == 'w')
1135 char doneany;
1136 p1 = buffer + 2;
1137 NEXTWORD (p1, val, -3);
1138 /* Move the pointer ahead if this point is farther ahead
1139 than the last. */
1140 p = p1 > p ? p1 : p;
1141 if (val == 0)
1143 (*info->fprintf_func) (info->stream, "#0");
1144 break;
1146 if (*d == 'l')
1148 int newval = 0;
1150 for (regno = 0; regno < 16; ++regno)
1151 if (val & (0x8000 >> regno))
1152 newval |= 1 << regno;
1153 val = newval;
1155 val &= 0xffff;
1156 doneany = 0;
1157 for (regno = 0; regno < 16; ++regno)
1158 if (val & (1 << regno))
1160 int first_regno;
1162 if (doneany)
1163 (*info->fprintf_func) (info->stream, "/");
1164 doneany = 1;
1165 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
1166 first_regno = regno;
1167 while (val & (1 << (regno + 1)))
1168 ++regno;
1169 if (regno > first_regno)
1170 (*info->fprintf_func) (info->stream, "-%s",
1171 reg_names[regno]);
1174 else if (place == '3')
1176 /* `fmovem' insn. */
1177 char doneany;
1179 FETCH_ARG (8, val);
1180 if (val == 0)
1182 (*info->fprintf_func) (info->stream, "#0");
1183 break;
1185 if (*d == 'l')
1187 int newval = 0;
1189 for (regno = 0; regno < 8; ++regno)
1190 if (val & (0x80 >> regno))
1191 newval |= 1 << regno;
1192 val = newval;
1194 val &= 0xff;
1195 doneany = 0;
1196 for (regno = 0; regno < 8; ++regno)
1197 if (val & (1 << regno))
1199 int first_regno;
1200 if (doneany)
1201 (*info->fprintf_func) (info->stream, "/");
1202 doneany = 1;
1203 (*info->fprintf_func) (info->stream, "%%fp%d", regno);
1204 first_regno = regno;
1205 while (val & (1 << (regno + 1)))
1206 ++regno;
1207 if (regno > first_regno)
1208 (*info->fprintf_func) (info->stream, "-%%fp%d", regno);
1211 else if (place == '8')
1213 FETCH_ARG (3, val);
1214 /* fmoveml for FP status registers. */
1215 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]);
1217 else
1218 return -2;
1219 break;
1221 case 'X':
1222 place = '8';
1223 case 'Y':
1224 case 'Z':
1225 case 'W':
1226 case '0':
1227 case '1':
1228 case '2':
1229 case '3':
1231 int val;
1232 char *name = 0;
1234 FETCH_ARG (5, val);
1235 switch (val)
1237 case 2: name = "%tt0"; break;
1238 case 3: name = "%tt1"; break;
1239 case 0x10: name = "%tc"; break;
1240 case 0x11: name = "%drp"; break;
1241 case 0x12: name = "%srp"; break;
1242 case 0x13: name = "%crp"; break;
1243 case 0x14: name = "%cal"; break;
1244 case 0x15: name = "%val"; break;
1245 case 0x16: name = "%scc"; break;
1246 case 0x17: name = "%ac"; break;
1247 case 0x18: name = "%psr"; break;
1248 case 0x19: name = "%pcsr"; break;
1249 case 0x1c:
1250 case 0x1d:
1252 int break_reg = ((buffer[3] >> 2) & 7);
1254 (*info->fprintf_func)
1255 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d",
1256 break_reg);
1258 break;
1259 default:
1260 (*info->fprintf_func) (info->stream, "<mmu register %d>", val);
1262 if (name)
1263 (*info->fprintf_func) (info->stream, "%s", name);
1265 break;
1267 case 'f':
1269 int fc;
1271 FETCH_ARG (5, fc);
1272 if (fc == 1)
1273 (*info->fprintf_func) (info->stream, "%%dfc");
1274 else if (fc == 0)
1275 (*info->fprintf_func) (info->stream, "%%sfc");
1276 else
1277 /* xgettext:c-format */
1278 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
1280 break;
1282 case 'V':
1283 (*info->fprintf_func) (info->stream, "%%val");
1284 break;
1286 case 't':
1288 int level;
1290 FETCH_ARG (3, level);
1291 (*info->fprintf_func) (info->stream, "%d", level);
1293 break;
1295 case 'u':
1297 short is_upper = 0;
1298 int reg;
1300 FETCH_ARG (5, reg);
1301 if (reg & 0x10)
1303 is_upper = 1;
1304 reg &= 0xf;
1306 (*info->fprintf_func) (info->stream, "%s%s",
1307 reg_half_names[reg],
1308 is_upper ? "u" : "l");
1310 break;
1312 default:
1313 return -2;
1316 return p - p0;
1319 /* Try to match the current instruction to best and if so, return the
1320 number of bytes consumed from the instruction stream, else zero. */
1322 static int
1323 match_insn_m68k (bfd_vma memaddr,
1324 disassemble_info * info,
1325 const struct m68k_opcode * best)
1327 unsigned char *save_p;
1328 unsigned char *p;
1329 const char *d;
1330 const char *args = best->args;
1332 struct private *priv = (struct private *) info->private_data;
1333 bfd_byte *buffer = priv->the_buffer;
1334 fprintf_ftype save_printer = info->fprintf_func;
1335 void (* save_print_address) (bfd_vma, struct disassemble_info *)
1336 = info->print_address_func;
1338 if (*args == '.')
1339 args++;
1341 /* Point at first word of argument data,
1342 and at descriptor for first argument. */
1343 p = buffer + 2;
1345 /* Figure out how long the fixed-size portion of the instruction is.
1346 The only place this is stored in the opcode table is
1347 in the arguments--look for arguments which specify fields in the 2nd
1348 or 3rd words of the instruction. */
1349 for (d = args; *d; d += 2)
1351 /* I don't think it is necessary to be checking d[0] here;
1352 I suspect all this could be moved to the case statement below. */
1353 if (d[0] == '#')
1355 if (d[1] == 'l' && p - buffer < 6)
1356 p = buffer + 6;
1357 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8')
1358 p = buffer + 4;
1361 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
1362 p = buffer + 4;
1364 switch (d[1])
1366 case '1':
1367 case '2':
1368 case '3':
1369 case '7':
1370 case '8':
1371 case '9':
1372 case 'i':
1373 if (p - buffer < 4)
1374 p = buffer + 4;
1375 break;
1376 case '4':
1377 case '5':
1378 case '6':
1379 if (p - buffer < 6)
1380 p = buffer + 6;
1381 break;
1382 default:
1383 break;
1387 /* pflusha is an exceptions. It takes no arguments but is two words
1388 long. Recognize it by looking at the lower 16 bits of the mask. */
1389 if (p - buffer < 4 && (best->match & 0xFFFF) != 0)
1390 p = buffer + 4;
1392 /* lpstop is another exception. It takes a one word argument but is
1393 three words long. */
1394 if (p - buffer < 6
1395 && (best->match & 0xffff) == 0xffff
1396 && args[0] == '#'
1397 && args[1] == 'w')
1399 /* Copy the one word argument into the usual location for a one
1400 word argument, to simplify printing it. We can get away with
1401 this because we know exactly what the second word is, and we
1402 aren't going to print anything based on it. */
1403 p = buffer + 6;
1404 FETCH_DATA (info, p);
1405 buffer[2] = buffer[4];
1406 buffer[3] = buffer[5];
1409 FETCH_DATA (info, p);
1411 save_p = p;
1412 info->print_address_func = dummy_print_address;
1413 info->fprintf_func = (fprintf_ftype) dummy_printer;
1415 /* We scan the operands twice. The first time we don't print anything,
1416 but look for errors. */
1417 for (d = args; *d; d += 2)
1419 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1421 if (eaten >= 0)
1422 p += eaten;
1423 else if (eaten == -1 || eaten == -3)
1425 info->fprintf_func = save_printer;
1426 info->print_address_func = save_print_address;
1427 return 0;
1429 else
1431 /* We must restore the print functions before trying to print the
1432 error message. */
1433 info->fprintf_func = save_printer;
1434 info->print_address_func = save_print_address;
1435 info->fprintf_func (info->stream,
1436 /* xgettext:c-format */
1437 _("<internal error in opcode table: %s %s>\n"),
1438 best->name, best->args);
1439 return 2;
1443 p = save_p;
1444 info->fprintf_func = save_printer;
1445 info->print_address_func = save_print_address;
1447 d = args;
1449 info->fprintf_func (info->stream, "%s", best->name);
1451 if (*d)
1452 info->fprintf_func (info->stream, " ");
1454 while (*d)
1456 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info);
1457 d += 2;
1459 if (*d && *(d - 2) != 'I' && *d != 'k')
1460 info->fprintf_func (info->stream, ",");
1463 return p - buffer;
1466 /* Try to interpret the instruction at address MEMADDR as one that
1467 can execute on a processor with the features given by ARCH_MASK.
1468 If successful, print the instruction to INFO->STREAM and return
1469 its length in bytes. Return 0 otherwise. */
1471 static int
1472 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info,
1473 unsigned int arch_mask)
1475 int i;
1476 const char *d;
1477 static const struct m68k_opcode **opcodes[16];
1478 static int numopcodes[16];
1479 int val;
1480 int major_opcode;
1482 struct private *priv = (struct private *) info->private_data;
1483 bfd_byte *buffer = priv->the_buffer;
1485 if (!opcodes[0])
1487 /* Speed up the matching by sorting the opcode
1488 table on the upper four bits of the opcode. */
1489 const struct m68k_opcode **opc_pointer[16];
1491 /* First count how many opcodes are in each of the sixteen buckets. */
1492 for (i = 0; i < m68k_numopcodes; i++)
1493 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++;
1495 /* Then create a sorted table of pointers
1496 that point into the unsorted table. */
1497 opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *)
1498 * m68k_numopcodes);
1499 opcodes[0] = opc_pointer[0];
1501 for (i = 1; i < 16; i++)
1503 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1];
1504 opcodes[i] = opc_pointer[i];
1507 for (i = 0; i < m68k_numopcodes; i++)
1508 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i];
1511 FETCH_DATA (info, buffer + 2);
1512 major_opcode = (buffer[0] >> 4) & 15;
1514 for (i = 0; i < numopcodes[major_opcode]; i++)
1516 const struct m68k_opcode *opc = opcodes[major_opcode][i];
1517 unsigned long opcode = opc->opcode;
1518 unsigned long match = opc->match;
1519 const char *args = opc->args;
1521 if (*args == '.')
1522 args++;
1524 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
1525 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
1526 /* Only fetch the next two bytes if we need to. */
1527 && (((0xffff & match) == 0)
1529 (FETCH_DATA (info, buffer + 4)
1530 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
1531 && ((0xff & buffer[3] & match) == (0xff & opcode)))
1533 && (opc->arch & arch_mask) != 0)
1535 /* Don't use for printout the variants of divul and divsl
1536 that have the same register number in two places.
1537 The more general variants will match instead. */
1538 for (d = args; *d; d += 2)
1539 if (d[1] == 'D')
1540 break;
1542 /* Don't use for printout the variants of most floating
1543 point coprocessor instructions which use the same
1544 register number in two places, as above. */
1545 if (*d == '\0')
1546 for (d = args; *d; d += 2)
1547 if (d[1] == 't')
1548 break;
1550 /* Don't match fmovel with more than one register;
1551 wait for fmoveml. */
1552 if (*d == '\0')
1554 for (d = args; *d; d += 2)
1556 if (d[0] == 's' && d[1] == '8')
1558 val = fetch_arg (buffer, d[1], 3, info);
1559 if (val < 0)
1560 return 0;
1561 if ((val & (val - 1)) != 0)
1562 break;
1567 /* Don't match FPU insns with non-default coprocessor ID. */
1568 if (*d == '\0')
1570 for (d = args; *d; d += 2)
1572 if (d[0] == 'I')
1574 val = fetch_arg (buffer, 'd', 3, info);
1575 if (val != 1)
1576 break;
1581 if (*d == '\0')
1582 if ((val = match_insn_m68k (memaddr, info, opc)))
1583 return val;
1586 return 0;
1589 /* Print the m68k instruction at address MEMADDR in debugged memory,
1590 on INFO->STREAM. Returns length of the instruction, in bytes. */
1593 print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
1595 unsigned int arch_mask;
1596 struct private priv;
1597 int val;
1599 bfd_byte *buffer = priv.the_buffer;
1601 info->private_data = & priv;
1602 /* Tell objdump to use two bytes per chunk
1603 and six bytes per line for displaying raw data. */
1604 info->bytes_per_chunk = 2;
1605 info->bytes_per_line = 6;
1606 info->display_endian = BFD_ENDIAN_BIG;
1607 priv.max_fetched = priv.the_buffer;
1608 priv.insn_start = memaddr;
1610 arch_mask = bfd_m68k_mach_to_features (info->mach);
1611 if (!arch_mask)
1613 /* First try printing an m680x0 instruction. Try printing a Coldfire
1614 one if that fails. */
1615 val = m68k_scan_mask (memaddr, info, m68k_mask);
1616 if (val == 0)
1617 val = m68k_scan_mask (memaddr, info, mcf_mask);
1619 else
1621 val = m68k_scan_mask (memaddr, info, arch_mask);
1624 if (val == 0)
1625 /* Handle undefined instructions. */
1626 info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]);
1628 return val ? val : 2;