1 #name
: Thumb ARM
-compat pseudos
2 #objdump
: -dr
--prefix
-addresses
--show
-raw
-insn
-M force
-thumb
5 # Test the Thumb pseudo instructions that exist
for ARM source compatibility
7 .*: +file format
.*arm
.*
9 Disassembly of section
.text
:
11 0+00 <[^
>]*> 4148 * adcs r0
, r1
12 0+02 <[^
>]*> 4148 * adcs r0
, r1
13 0+04 <[^
>]*> 4008 * ands r0
, r1
14 0+06 <[^
>]*> 4008 * ands r0
, r1
15 0+08 <[^
>]*> 4048 * eors r0
, r1
16 0+0a
<[^
>]*> 4048 * eors r0
, r1
17 0+0c
<[^
>]*> 4348 * muls r0
, r1
18 0+0e
<[^
>]*> 4348 * muls r0
, r1
19 0+10 <[^
>]*> 4308 * orrs r0
, r1
20 0+12 <[^
>]*> 4308 * orrs r0
, r1
21 0+14 <[^
>]*> 4388 * bics r0
, r1
22 0+16 <[^
>]*> 4188 * sbcs r0
, r1
23 0+18 <[^
>]*> 46c0
* nop \
(mov r8
, r8\
)
24 0+1a
<[^
>]*> 46c0
* nop \
(mov r8
, r8\
)
25 0+1c
<[^
>]*> 46c0
* nop \
(mov r8
, r8\
)
26 0+1e
<[^
>]*> 46c0
* nop \
(mov r8
, r8\
)