2010-05-26 Rafael Espindola <espindola@google.com>
[binutils.git] / opcodes / disassemble.c
blob17cf5e74e0210219442ea973b4aa1336e0b06b6b
1 /* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
22 #include "sysdep.h"
23 #include "dis-asm.h"
25 #ifdef ARCH_all
26 #define ARCH_alpha
27 #define ARCH_arc
28 #define ARCH_arm
29 #define ARCH_avr
30 #define ARCH_bfin
31 #define ARCH_cr16
32 #define ARCH_cris
33 #define ARCH_crx
34 #define ARCH_d10v
35 #define ARCH_d30v
36 #define ARCH_dlx
37 #define ARCH_fr30
38 #define ARCH_frv
39 #define ARCH_h8300
40 #define ARCH_h8500
41 #define ARCH_hppa
42 #define ARCH_i370
43 #define ARCH_i386
44 #define ARCH_i860
45 #define ARCH_i960
46 #define ARCH_ia64
47 #define ARCH_ip2k
48 #define ARCH_iq2000
49 #define ARCH_lm32
50 #define ARCH_m32c
51 #define ARCH_m32r
52 #define ARCH_m68hc11
53 #define ARCH_m68hc12
54 #define ARCH_m68k
55 #define ARCH_m88k
56 #define ARCH_maxq
57 #define ARCH_mcore
58 #define ARCH_mep
59 #define ARCH_microblaze
60 #define ARCH_mips
61 #define ARCH_mmix
62 #define ARCH_mn10200
63 #define ARCH_mn10300
64 #define ARCH_moxie
65 #define ARCH_mt
66 #define ARCH_msp430
67 #define ARCH_ns32k
68 #define ARCH_openrisc
69 #define ARCH_or32
70 #define ARCH_pdp11
71 #define ARCH_pj
72 #define ARCH_powerpc
73 #define ARCH_rs6000
74 #define ARCH_rx
75 #define ARCH_s390
76 #define ARCH_score
77 #define ARCH_sh
78 #define ARCH_sparc
79 #define ARCH_spu
80 #define ARCH_tic30
81 #define ARCH_tic4x
82 #define ARCH_tic54x
83 #define ARCH_tic6x
84 #define ARCH_tic80
85 #define ARCH_v850
86 #define ARCH_vax
87 #define ARCH_w65
88 #define ARCH_xstormy16
89 #define ARCH_xc16x
90 #define ARCH_xtensa
91 #define ARCH_z80
92 #define ARCH_z8k
93 #define INCLUDE_SHMEDIA
94 #endif
96 #ifdef ARCH_m32c
97 #include "m32c-desc.h"
98 #endif
100 disassembler_ftype
101 disassembler (abfd)
102 bfd *abfd;
104 enum bfd_architecture a = bfd_get_arch (abfd);
105 disassembler_ftype disassemble;
107 switch (a)
109 /* If you add a case to this table, also add it to the
110 ARCH_all definition right above this function. */
111 #ifdef ARCH_alpha
112 case bfd_arch_alpha:
113 disassemble = print_insn_alpha;
114 break;
115 #endif
116 #ifdef ARCH_arc
117 case bfd_arch_arc:
119 disassemble = arc_get_disassembler (abfd);
120 break;
122 #endif
123 #ifdef ARCH_arm
124 case bfd_arch_arm:
125 if (bfd_big_endian (abfd))
126 disassemble = print_insn_big_arm;
127 else
128 disassemble = print_insn_little_arm;
129 break;
130 #endif
131 #ifdef ARCH_avr
132 case bfd_arch_avr:
133 disassemble = print_insn_avr;
134 break;
135 #endif
136 #ifdef ARCH_bfin
137 case bfd_arch_bfin:
138 disassemble = print_insn_bfin;
139 break;
140 #endif
141 #ifdef ARCH_cr16
142 case bfd_arch_cr16:
143 disassemble = print_insn_cr16;
144 break;
145 #endif
146 #ifdef ARCH_cris
147 case bfd_arch_cris:
148 disassemble = cris_get_disassembler (abfd);
149 break;
150 #endif
151 #ifdef ARCH_crx
152 case bfd_arch_crx:
153 disassemble = print_insn_crx;
154 break;
155 #endif
156 #ifdef ARCH_d10v
157 case bfd_arch_d10v:
158 disassemble = print_insn_d10v;
159 break;
160 #endif
161 #ifdef ARCH_d30v
162 case bfd_arch_d30v:
163 disassemble = print_insn_d30v;
164 break;
165 #endif
166 #ifdef ARCH_dlx
167 case bfd_arch_dlx:
168 /* As far as I know we only handle big-endian DLX objects. */
169 disassemble = print_insn_dlx;
170 break;
171 #endif
172 #ifdef ARCH_h8300
173 case bfd_arch_h8300:
174 if (bfd_get_mach (abfd) == bfd_mach_h8300h
175 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
176 disassemble = print_insn_h8300h;
177 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
178 || bfd_get_mach (abfd) == bfd_mach_h8300sn
179 || bfd_get_mach (abfd) == bfd_mach_h8300sx
180 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
181 disassemble = print_insn_h8300s;
182 else
183 disassemble = print_insn_h8300;
184 break;
185 #endif
186 #ifdef ARCH_h8500
187 case bfd_arch_h8500:
188 disassemble = print_insn_h8500;
189 break;
190 #endif
191 #ifdef ARCH_hppa
192 case bfd_arch_hppa:
193 disassemble = print_insn_hppa;
194 break;
195 #endif
196 #ifdef ARCH_i370
197 case bfd_arch_i370:
198 disassemble = print_insn_i370;
199 break;
200 #endif
201 #ifdef ARCH_i386
202 case bfd_arch_i386:
203 case bfd_arch_l1om:
204 disassemble = print_insn_i386;
205 break;
206 #endif
207 #ifdef ARCH_i860
208 case bfd_arch_i860:
209 disassemble = print_insn_i860;
210 break;
211 #endif
212 #ifdef ARCH_i960
213 case bfd_arch_i960:
214 disassemble = print_insn_i960;
215 break;
216 #endif
217 #ifdef ARCH_ia64
218 case bfd_arch_ia64:
219 disassemble = print_insn_ia64;
220 break;
221 #endif
222 #ifdef ARCH_ip2k
223 case bfd_arch_ip2k:
224 disassemble = print_insn_ip2k;
225 break;
226 #endif
227 #ifdef ARCH_fr30
228 case bfd_arch_fr30:
229 disassemble = print_insn_fr30;
230 break;
231 #endif
232 #ifdef ARCH_lm32
233 case bfd_arch_lm32:
234 disassemble = print_insn_lm32;
235 break;
236 #endif
237 #ifdef ARCH_m32r
238 case bfd_arch_m32r:
239 disassemble = print_insn_m32r;
240 break;
241 #endif
242 #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
243 case bfd_arch_m68hc11:
244 disassemble = print_insn_m68hc11;
245 break;
246 case bfd_arch_m68hc12:
247 disassemble = print_insn_m68hc12;
248 break;
249 #endif
250 #ifdef ARCH_m68k
251 case bfd_arch_m68k:
252 disassemble = print_insn_m68k;
253 break;
254 #endif
255 #ifdef ARCH_m88k
256 case bfd_arch_m88k:
257 disassemble = print_insn_m88k;
258 break;
259 #endif
260 #ifdef ARCH_maxq
261 case bfd_arch_maxq:
262 disassemble = print_insn_maxq_little;
263 break;
264 #endif
265 #ifdef ARCH_mt
266 case bfd_arch_mt:
267 disassemble = print_insn_mt;
268 break;
269 #endif
270 #ifdef ARCH_microblaze
271 case bfd_arch_microblaze:
272 disassemble = print_insn_microblaze;
273 break;
274 #endif
275 #ifdef ARCH_msp430
276 case bfd_arch_msp430:
277 disassemble = print_insn_msp430;
278 break;
279 #endif
280 #ifdef ARCH_ns32k
281 case bfd_arch_ns32k:
282 disassemble = print_insn_ns32k;
283 break;
284 #endif
285 #ifdef ARCH_mcore
286 case bfd_arch_mcore:
287 disassemble = print_insn_mcore;
288 break;
289 #endif
290 #ifdef ARCH_mep
291 case bfd_arch_mep:
292 disassemble = print_insn_mep;
293 break;
294 #endif
295 #ifdef ARCH_mips
296 case bfd_arch_mips:
297 if (bfd_big_endian (abfd))
298 disassemble = print_insn_big_mips;
299 else
300 disassemble = print_insn_little_mips;
301 break;
302 #endif
303 #ifdef ARCH_mmix
304 case bfd_arch_mmix:
305 disassemble = print_insn_mmix;
306 break;
307 #endif
308 #ifdef ARCH_mn10200
309 case bfd_arch_mn10200:
310 disassemble = print_insn_mn10200;
311 break;
312 #endif
313 #ifdef ARCH_mn10300
314 case bfd_arch_mn10300:
315 disassemble = print_insn_mn10300;
316 break;
317 #endif
318 #ifdef ARCH_openrisc
319 case bfd_arch_openrisc:
320 disassemble = print_insn_openrisc;
321 break;
322 #endif
323 #ifdef ARCH_or32
324 case bfd_arch_or32:
325 if (bfd_big_endian (abfd))
326 disassemble = print_insn_big_or32;
327 else
328 disassemble = print_insn_little_or32;
329 break;
330 #endif
331 #ifdef ARCH_pdp11
332 case bfd_arch_pdp11:
333 disassemble = print_insn_pdp11;
334 break;
335 #endif
336 #ifdef ARCH_pj
337 case bfd_arch_pj:
338 disassemble = print_insn_pj;
339 break;
340 #endif
341 #ifdef ARCH_powerpc
342 case bfd_arch_powerpc:
343 if (bfd_big_endian (abfd))
344 disassemble = print_insn_big_powerpc;
345 else
346 disassemble = print_insn_little_powerpc;
347 break;
348 #endif
349 #ifdef ARCH_rs6000
350 case bfd_arch_rs6000:
351 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
352 disassemble = print_insn_big_powerpc;
353 else
354 disassemble = print_insn_rs6000;
355 break;
356 #endif
357 #ifdef ARCH_rx
358 case bfd_arch_rx:
359 disassemble = print_insn_rx;
360 break;
361 #endif
362 #ifdef ARCH_s390
363 case bfd_arch_s390:
364 disassemble = print_insn_s390;
365 break;
366 #endif
367 #ifdef ARCH_score
368 case bfd_arch_score:
369 if (bfd_big_endian (abfd))
370 disassemble = print_insn_big_score;
371 else
372 disassemble = print_insn_little_score;
373 break;
374 #endif
375 #ifdef ARCH_sh
376 case bfd_arch_sh:
377 disassemble = print_insn_sh;
378 break;
379 #endif
380 #ifdef ARCH_sparc
381 case bfd_arch_sparc:
382 disassemble = print_insn_sparc;
383 break;
384 #endif
385 #ifdef ARCH_spu
386 case bfd_arch_spu:
387 disassemble = print_insn_spu;
388 break;
389 #endif
390 #ifdef ARCH_tic30
391 case bfd_arch_tic30:
392 disassemble = print_insn_tic30;
393 break;
394 #endif
395 #ifdef ARCH_tic4x
396 case bfd_arch_tic4x:
397 disassemble = print_insn_tic4x;
398 break;
399 #endif
400 #ifdef ARCH_tic54x
401 case bfd_arch_tic54x:
402 disassemble = print_insn_tic54x;
403 break;
404 #endif
405 #ifdef ARCH_tic6x
406 case bfd_arch_tic6x:
407 disassemble = print_insn_tic6x;
408 break;
409 #endif
410 #ifdef ARCH_tic80
411 case bfd_arch_tic80:
412 disassemble = print_insn_tic80;
413 break;
414 #endif
415 #ifdef ARCH_v850
416 case bfd_arch_v850:
417 disassemble = print_insn_v850;
418 break;
419 #endif
420 #ifdef ARCH_w65
421 case bfd_arch_w65:
422 disassemble = print_insn_w65;
423 break;
424 #endif
425 #ifdef ARCH_xstormy16
426 case bfd_arch_xstormy16:
427 disassemble = print_insn_xstormy16;
428 break;
429 #endif
430 #ifdef ARCH_xc16x
431 case bfd_arch_xc16x:
432 disassemble = print_insn_xc16x;
433 break;
434 #endif
435 #ifdef ARCH_xtensa
436 case bfd_arch_xtensa:
437 disassemble = print_insn_xtensa;
438 break;
439 #endif
440 #ifdef ARCH_z80
441 case bfd_arch_z80:
442 disassemble = print_insn_z80;
443 break;
444 #endif
445 #ifdef ARCH_z8k
446 case bfd_arch_z8k:
447 if (bfd_get_mach(abfd) == bfd_mach_z8001)
448 disassemble = print_insn_z8001;
449 else
450 disassemble = print_insn_z8002;
451 break;
452 #endif
453 #ifdef ARCH_vax
454 case bfd_arch_vax:
455 disassemble = print_insn_vax;
456 break;
457 #endif
458 #ifdef ARCH_frv
459 case bfd_arch_frv:
460 disassemble = print_insn_frv;
461 break;
462 #endif
463 #ifdef ARCH_moxie
464 case bfd_arch_moxie:
465 disassemble = print_insn_moxie;
466 break;
467 #endif
468 #ifdef ARCH_iq2000
469 case bfd_arch_iq2000:
470 disassemble = print_insn_iq2000;
471 break;
472 #endif
473 #ifdef ARCH_m32c
474 case bfd_arch_m32c:
475 disassemble = print_insn_m32c;
476 break;
477 #endif
478 default:
479 return 0;
481 return disassemble;
484 void
485 disassembler_usage (stream)
486 FILE * stream ATTRIBUTE_UNUSED;
488 #ifdef ARCH_arm
489 print_arm_disassembler_options (stream);
490 #endif
491 #ifdef ARCH_mips
492 print_mips_disassembler_options (stream);
493 #endif
494 #ifdef ARCH_powerpc
495 print_ppc_disassembler_options (stream);
496 #endif
497 #ifdef ARCH_i386
498 print_i386_disassembler_options (stream);
499 #endif
500 #ifdef ARCH_s390
501 print_s390_disassembler_options (stream);
502 #endif
504 return;
507 void
508 disassemble_init_for_target (struct disassemble_info * info)
510 if (info == NULL)
511 return;
513 switch (info->arch)
515 #ifdef ARCH_arm
516 case bfd_arch_arm:
517 info->symbol_is_valid = arm_symbol_is_valid;
518 info->disassembler_needs_relocs = TRUE;
519 break;
520 #endif
521 #ifdef ARCH_ia64
522 case bfd_arch_ia64:
523 info->skip_zeroes = 16;
524 break;
525 #endif
526 #ifdef ARCH_tic4x
527 case bfd_arch_tic4x:
528 info->skip_zeroes = 32;
529 break;
530 #endif
531 #ifdef ARCH_mep
532 case bfd_arch_mep:
533 info->skip_zeroes = 256;
534 info->skip_zeroes_at_end = 0;
535 break;
536 #endif
537 #ifdef ARCH_m32c
538 case bfd_arch_m32c:
539 info->endian = BFD_ENDIAN_BIG;
540 if (! info->insn_sets)
542 info->insn_sets = cgen_bitset_create (ISA_MAX);
543 if (info->mach == bfd_mach_m16c)
544 cgen_bitset_set (info->insn_sets, ISA_M16C);
545 else
546 cgen_bitset_set (info->insn_sets, ISA_M32C);
548 break;
549 #endif
550 default:
551 break;