ld/testsuite/ld-powerpc/tlsso.d

   1 #source: tls.s
   2 #as: -a64
   3 #ld: -shared -melf64ppc
   4 #objdump: -dr
   5 #target: powerpc64*-*-*
   6
   7 .*: +file format elf64-powerpc
   8
   9 Disassembly of section \.text:
  10
  11 .* <00000010\.plt_call\.__tls_get_addr(|_opt)\+0>:
  12 .*      f8 41 00 28     std     r2,40\(r1\)
  13 .*      e9 62 80 78     ld      r11,-32648\(r2\)
  14 .*      7d 69 03 a6     mtctr   r11
  15 .*      e8 42 80 80     ld      r2,-32640\(r2\)
  16 .*      4e 80 04 20     bctr
  17
  18 .* <_start>:
  19 .*      38 62 80 20     addi    r3,r2,-32736
  20 .*      4b ff ff e9     bl      .*
  21 .*      e8 41 00 28     ld      r2,40\(r1\)
  22 .*      38 62 80 50     addi    r3,r2,-32688
  23 .*      4b ff ff dd     bl      .*
  24 .*      e8 41 00 28     ld      r2,40\(r1\)
  25 .*      38 62 80 38     addi    r3,r2,-32712
  26 .*      4b ff ff d1     bl      .*
  27 .*      e8 41 00 28     ld      r2,40\(r1\)
  28 .*      38 62 80 50     addi    r3,r2,-32688
  29 .*      4b ff ff c5     bl      .*
  30 .*      e8 41 00 28     ld      r2,40\(r1\)
  31 .*      39 23 80 40     addi    r9,r3,-32704
  32 .*      3d 23 00 00     addis   r9,r3,0
  33 .*      81 49 80 48     lwz     r10,-32696\(r9\)
  34 .*      e9 22 80 30     ld      r9,-32720\(r2\)
  35 .*      7d 49 18 2a     ldx     r10,r9,r3
  36 .*      e9 22 80 48     ld      r9,-32696\(r2\)
  37 .*      7d 49 6a 2e     lhzx    r10,r9,r13
  38 .*      89 4d 00 00     lbz     r10,0\(r13\)
  39 .*      3d 2d 00 00     addis   r9,r13,0
  40 .*      99 49 00 00     stb     r10,0\(r9\)
  41 .*      38 62 80 08     addi    r3,r2,-32760
  42 .*      4b ff ff 91     bl      .*
  43 .*      e8 41 00 28     ld      r2,40\(r1\)
  44 .*      38 62 80 50     addi    r3,r2,-32688
  45 .*      4b ff ff 85     bl      .*
  46 .*      e8 41 00 28     ld      r2,40\(r1\)
  47 .*      f9 43 80 08     std     r10,-32760\(r3\)
  48 .*      3d 23 00 00     addis   r9,r3,0
  49 .*      91 49 80 10     stw     r10,-32752\(r9\)
  50 .*      e9 22 80 18     ld      r9,-32744\(r2\)
  51 .*      7d 49 19 2a     stdx    r10,r9,r3
  52 .*      e9 22 80 48     ld      r9,-32696\(r2\)
  53 .*      7d 49 6b 2e     sthx    r10,r9,r13
  54 .*      e9 4d 00 02     lwa     r10,0\(r13\)
  55 .*      3d 2d 00 00     addis   r9,r13,0
  56 .*      a9 49 00 00     lha     r10,0\(r9\)
  57 .*      60 00 00 00     nop
  58 .*      00 00 00 00 .*
  59 .*      00 01 02 20 .*
  60 .* <__glink_PLTresolve>:
  61 .*      7d 88 02 a6     mflr    r12
  62 .*      42 9f 00 05     bcl-    20,4\*cr7\+so,.*
  63 .*      7d 68 02 a6     mflr    r11
  64 .*      e8 4b ff f0     ld      r2,-16\(r11\)
  65 .*      7d 88 03 a6     mtlr    r12
  66 .*      7d 82 5a 14     add     r12,r2,r11
  67 .*      e9 6c 00 00     ld      r11,0\(r12\)
  68 .*      e8 4c 00 08     ld      r2,8\(r12\)
  69 .*      7d 69 03 a6     mtctr   r11
  70 .*      e9 6c 00 10     ld      r11,16\(r12\)
  71 .*      4e 80 04 20     bctr
  72 .*      60 00 00 00     nop
  73 .*      60 00 00 00     nop
  74 .*      60 00 00 00     nop
  75 .*      38 00 00 00     li      r0,0
  76 .*      4b ff ff c4     b       .*