* elf32-spu.c (build_stub): Fix malloc under-allocation.
[binutils.git] / ld / testsuite / ld-arm / group-relocs.s
blobb6467f4f0e44c6500f2bc6f2b462bd4f874c07f6
1 @ Tests for group relocations.
3 @ Beware when editing this file: it is carefully crafted so that
4 @ specific PC- and SB-relative offsets arise.
6 @ Note that the gas tests have already checked that group relocations are
7 @ handled in the same way for local and external symbols.
9 @ We will place .text at 0x8000.
11 .text
12 .globl _start
14 _start:
15 @ ALU, PC-relative
17 @ Instructions start at .text + 0x0
18 add r0, r15, #:pc_g0:(one_group_needed_alu_pc)
20 @ Instructions start at .text + 0x4
21 add r0, r15, #:pc_g0_nc:(two_groups_needed_alu_pc)
22 add r0, r0, #:pc_g1:(two_groups_needed_alu_pc + 4)
24 @ Instructions start at .text + 0xc
25 add r0, r15, #:pc_g0_nc:(three_groups_needed_alu_pc)
26 add r0, r0, #:pc_g1_nc:(three_groups_needed_alu_pc + 4)
27 add r0, r0, #:pc_g2:(three_groups_needed_alu_pc + 8)
29 @ ALU, SB-relative
31 add r0, r0, #:sb_g0:(one_group_needed_alu_sb)
33 add r0, r15, #:sb_g0_nc:(two_groups_needed_alu_sb)
34 add r0, r0, #:sb_g1:(two_groups_needed_alu_sb)
36 add r0, r0, #:sb_g0_nc:(three_groups_needed_alu_sb)
37 add r0, r0, #:sb_g1_nc:(three_groups_needed_alu_sb)
38 add r0, r0, #:sb_g2:(three_groups_needed_alu_sb)
40 @ LDR, PC-relative
42 @ Instructions start at .text + 0x30
43 add r0, r0, #:pc_g0_nc:(two_groups_needed_ldr_pc)
44 ldr r1, [r0, #:pc_g1:(two_groups_needed_ldr_pc + 4)]
46 @ Instructions start at .text + 0x38
47 add r0, r0, #:pc_g0_nc:(three_groups_needed_ldr_pc)
48 add r0, r0, #:pc_g1_nc:(three_groups_needed_ldr_pc + 4)
49 ldr r1, [r0, #:pc_g2:(three_groups_needed_ldr_pc + 8)]
51 @ LDR, SB-relative
53 ldr r1, [r0, #:sb_g0:(one_group_needed_ldr_sb)]
55 add r0, r0, #:sb_g0_nc:(two_groups_needed_ldr_sb)
56 ldr r1, [r0, #:sb_g1:(two_groups_needed_ldr_sb)]
58 add r0, r0, #:sb_g0_nc:(three_groups_needed_ldr_sb)
59 add r0, r0, #:sb_g1_nc:(three_groups_needed_ldr_sb)
60 ldr r1, [r0, #:sb_g2:(three_groups_needed_ldr_sb)]
62 @ LDRS, PC-relative
64 @ Instructions start at .text + 0x5c
65 ldrd r2, [r0, #:pc_g0:(one_group_needed_ldrs_pc)]
67 @ Instructions start at .text + 0x60
68 add r0, r0, #:pc_g0_nc:(two_groups_needed_ldrs_pc)
69 ldrd r2, [r0, #:pc_g1:(two_groups_needed_ldrs_pc + 4)]
71 @ Instructions start at .text + 0x68
72 add r0, r0, #:pc_g0_nc:(three_groups_needed_ldrs_pc)
73 add r0, r0, #:pc_g1_nc:(three_groups_needed_ldrs_pc + 4)
74 ldrd r2, [r0, #:pc_g2:(three_groups_needed_ldrs_pc + 8)]
76 @ LDRS, SB-relative
78 ldrd r2, [r0, #:sb_g0:(one_group_needed_ldrs_sb)]
80 add r0, r0, #:sb_g0_nc:(two_groups_needed_ldrs_sb)
81 ldrd r2, [r0, #:sb_g1:(two_groups_needed_ldrs_sb)]
83 add r0, r0, #:sb_g0_nc:(three_groups_needed_ldrs_sb)
84 add r0, r0, #:sb_g1_nc:(three_groups_needed_ldrs_sb)
85 ldrd r2, [r0, #:sb_g2:(three_groups_needed_ldrs_sb)]
87 @ LDC, PC-relative
89 @ Instructions start at .text + 0x8c
90 ldc 0, c0, [r0, #:pc_g0:(one_group_needed_ldc_pc)]
92 @ Instructions start at .text + 0x90
93 add r0, r0, #:pc_g0_nc:(two_groups_needed_ldc_pc)
94 ldc 0, c0, [r0, #:pc_g1:(two_groups_needed_ldc_pc + 4)]
96 @ Instructions start at .text + 0x98
97 add r0, r0, #:pc_g0_nc:(three_groups_needed_ldc_pc)
98 add r0, r0, #:pc_g1_nc:(three_groups_needed_ldc_pc + 4)
99 ldc 0, c0, [r0, #:pc_g2:(three_groups_needed_ldc_pc + 8)]
101 @ LDC, SB-relative
103 ldc 0, c0, [r0, #:sb_g0:(one_group_needed_ldc_sb)]
105 add r0, r0, #:sb_g0_nc:(two_groups_needed_ldc_sb)
106 ldc 0, c0, [r0, #:sb_g1:(two_groups_needed_ldc_sb)]
108 add r0, r0, #:sb_g0_nc:(three_groups_needed_ldc_sb)
109 add r0, r0, #:sb_g1_nc:(three_groups_needed_ldc_sb)
110 ldc 0, c0, [r0, #:sb_g2:(three_groups_needed_ldc_sb)]
112 @ This point in the file is .text + 0xbc.
114 one_group_needed_alu_pc:
115 one_group_needed_ldrs_pc:
116 one_group_needed_ldc_pc:
117 mov r0, #0
119 @ We will place the section zero at 0x0.
121 .section zero, "x"
123 one_group_needed_alu_sb:
124 one_group_needed_ldr_sb:
125 one_group_needed_ldrs_sb:
126 one_group_needed_ldc_sb:
127 mov r0, #0
129 @ We will place the section alpha at 0xeef0.
131 .section alpha, "x"
133 two_groups_needed_alu_sb:
134 two_groups_needed_ldr_sb:
135 two_groups_needed_ldrs_sb:
136 two_groups_needed_ldc_sb:
137 two_groups_needed_alu_pc:
138 two_groups_needed_ldr_pc:
139 two_groups_needed_ldrs_pc:
140 two_groups_needed_ldc_pc:
141 mov r0, #0
143 @ We will place the section beta at 0xffeef0.
145 .section beta, "x"
147 three_groups_needed_alu_sb:
148 three_groups_needed_ldr_sb:
149 three_groups_needed_ldrs_sb:
150 three_groups_needed_ldc_sb:
151 three_groups_needed_alu_pc:
152 three_groups_needed_ldr_pc:
153 three_groups_needed_ldrs_pc:
154 three_groups_needed_ldc_pc:
155 mov r0, #0