Add field ``name'' to floatformat.
[binutils.git] / bfd / libhppa.h
blob7a8af9a385d37f862a6ae3a968d75c3d17d73ee3
1 /* HP PA-RISC SOM object file format: definitions internal to BFD.
2 Copyright (C) 1990, 91, 92, 93, 94, 95, 96, 98, 99, 2000
3 Free Software Foundation, Inc.
5 Contributed by the Center for Software Science at the
6 University of Utah (pa-gdb-bugs@cs.utah.edu).
8 This file is part of BFD, the Binary File Descriptor library.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24 #ifndef _HPPA_H
25 #define _HPPA_H
27 #define BYTES_IN_WORD 4
28 #define PA_PAGESIZE 0x1000
30 #ifndef INLINE
31 #ifdef __GNUC__
32 #define INLINE inline
33 #else
34 #define INLINE
35 #endif /* GNU C? */
36 #endif /* INLINE */
38 /* The PA instruction set variants. */
39 enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25};
41 /* HP PA-RISC relocation types */
43 enum hppa_reloc_field_selector_type
45 R_HPPA_FSEL = 0x0,
46 R_HPPA_LSSEL = 0x1,
47 R_HPPA_RSSEL = 0x2,
48 R_HPPA_LSEL = 0x3,
49 R_HPPA_RSEL = 0x4,
50 R_HPPA_LDSEL = 0x5,
51 R_HPPA_RDSEL = 0x6,
52 R_HPPA_LRSEL = 0x7,
53 R_HPPA_RRSEL = 0x8,
54 R_HPPA_NSEL = 0x9,
55 R_HPPA_NLSEL = 0xa,
56 R_HPPA_NLRSEL = 0xb,
57 R_HPPA_PSEL = 0xc,
58 R_HPPA_LPSEL = 0xd,
59 R_HPPA_RPSEL = 0xe,
60 R_HPPA_TSEL = 0xf,
61 R_HPPA_LTSEL = 0x10,
62 R_HPPA_RTSEL = 0x11,
63 R_HPPA_LTPSEL = 0x12,
64 R_HPPA_RTPSEL = 0x13
67 /* /usr/include/reloc.h defines these to constants. We want to use
68 them in enums, so #undef them before we start using them. We might
69 be able to fix this another way by simply managing not to include
70 /usr/include/reloc.h, but currently GDB picks up these defines
71 somewhere. */
72 #undef e_fsel
73 #undef e_lssel
74 #undef e_rssel
75 #undef e_lsel
76 #undef e_rsel
77 #undef e_ldsel
78 #undef e_rdsel
79 #undef e_lrsel
80 #undef e_rrsel
81 #undef e_nsel
82 #undef e_nlsel
83 #undef e_nlrsel
84 #undef e_psel
85 #undef e_lpsel
86 #undef e_rpsel
87 #undef e_tsel
88 #undef e_ltsel
89 #undef e_rtsel
90 #undef e_one
91 #undef e_two
92 #undef e_pcrel
93 #undef e_con
94 #undef e_plabel
95 #undef e_abs
97 /* for compatibility */
98 enum hppa_reloc_field_selector_type_alt
100 e_fsel = R_HPPA_FSEL,
101 e_lssel = R_HPPA_LSSEL,
102 e_rssel = R_HPPA_RSSEL,
103 e_lsel = R_HPPA_LSEL,
104 e_rsel = R_HPPA_RSEL,
105 e_ldsel = R_HPPA_LDSEL,
106 e_rdsel = R_HPPA_RDSEL,
107 e_lrsel = R_HPPA_LRSEL,
108 e_rrsel = R_HPPA_RRSEL,
109 e_nsel = R_HPPA_NSEL,
110 e_nlsel = R_HPPA_NLSEL,
111 e_nlrsel = R_HPPA_NLRSEL,
112 e_psel = R_HPPA_PSEL,
113 e_lpsel = R_HPPA_LPSEL,
114 e_rpsel = R_HPPA_RPSEL,
115 e_tsel = R_HPPA_TSEL,
116 e_ltsel = R_HPPA_LTSEL,
117 e_rtsel = R_HPPA_RTSEL,
118 e_ltpsel = R_HPPA_LTPSEL,
119 e_rtpsel = R_HPPA_RTPSEL
122 enum hppa_reloc_expr_type
124 R_HPPA_E_ONE = 0,
125 R_HPPA_E_TWO = 1,
126 R_HPPA_E_PCREL = 2,
127 R_HPPA_E_CON = 3,
128 R_HPPA_E_PLABEL = 7,
129 R_HPPA_E_ABS = 18
132 /* for compatibility */
133 enum hppa_reloc_expr_type_alt
135 e_one = R_HPPA_E_ONE,
136 e_two = R_HPPA_E_TWO,
137 e_pcrel = R_HPPA_E_PCREL,
138 e_con = R_HPPA_E_CON,
139 e_plabel = R_HPPA_E_PLABEL,
140 e_abs = R_HPPA_E_ABS
144 /* Relocations for function calls must be accompanied by parameter
145 relocation bits. These bits describe exactly where the caller has
146 placed the function's arguments and where it expects to find a return
147 value.
149 Both ELF and SOM encode this information within the addend field
150 of the call relocation. (Note this could break very badly if one
151 was to make a call like bl foo + 0x12345678).
153 The high order 10 bits contain parameter relocation information,
154 the low order 22 bits contain the constant offset. */
156 #define HPPA_R_ARG_RELOC(a) \
157 (((a) >> 22) & 0x3ff)
158 #define HPPA_R_CONSTANT(a) \
159 ((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22))
160 #define HPPA_R_ADDEND(r, c) \
161 (((r) << 22) + ((c) & 0x3fffff))
162 #define HPPA_WIDE (0) /* PSW W-bit, need to check! FIXME */
164 /* These macros get bit fields using HP's numbering (MSB = 0),
165 * but note that "MASK" assumes that the LSB bits are what's
166 * wanted.
168 #ifndef GET_FIELD
169 #define GET_FIELD(X, FROM, TO) \
170 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
171 #endif
172 #define GET_BIT(X, WHICH) \
173 GET_FIELD (X, WHICH, WHICH)
175 #define MASK(SIZE) \
176 (~((-1) << SIZE))
178 #define CATENATE(X, XSIZE, Y, YSIZE) \
179 (((X & MASK (XSIZE)) << YSIZE) | (Y & MASK (YSIZE)))
181 #define ELEVEN(X) \
182 CATENATE (GET_BIT (X, 10), 1, GET_FIELD (X, 0, 9), 10)
184 /* Some functions to manipulate PA instructions. */
186 /* NOTE: these use the HP convention that f{0} is the _left_ most
187 * bit (MSB) of f; they sometimes have to impose an assumption
188 * about the size of a field; and as far as I can tell, most
189 * aren't used.
192 #if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 7)
193 /* Declare the functions with the unused attribute to avoid warnings. */
194 static INLINE unsigned int sign_extend (unsigned int, unsigned int)
195 __attribute__ ((__unused__));
196 static INLINE unsigned int low_sign_extend (unsigned int, unsigned int)
197 __attribute__ ((__unused__));
198 static INLINE unsigned int assemble_3 (unsigned int)
199 __attribute__ ((__unused__));
200 static INLINE unsigned int assemble_6 (unsigned int, unsigned int)
201 __attribute__ ((__unused__));
202 static INLINE unsigned int assemble_12 (unsigned int, unsigned int)
203 __attribute__ ((__unused__));
204 static INLINE unsigned int assemble_16 (unsigned int, unsigned int)
205 __attribute__ ((__unused__));
206 static INLINE unsigned int assemble_16a (unsigned int, unsigned int,
207 unsigned int)
208 __attribute__ ((__unused__));
209 static INLINE unsigned int assemble_17 (unsigned int, unsigned int,
210 unsigned int)
211 __attribute__ ((__unused__));
212 static INLINE unsigned int assemble_21 (unsigned int)
213 __attribute ((__unused__));
215 static INLINE unsigned int sign_unext (unsigned int, unsigned int)
216 __attribute__ ((__unused__));
217 static INLINE unsigned int low_sign_unext (unsigned int, unsigned int)
218 __attribute__ ((__unused__));
219 static INLINE unsigned int re_assemble_3 (unsigned int, unsigned int)
220 __attribute__ ((__unused__));
221 static INLINE unsigned int re_assemble_12 (unsigned int, unsigned int)
222 __attribute__ ((__unused__));
223 static INLINE unsigned int re_assemble_16 (unsigned int, unsigned int, int)
224 __attribute__ ((__unused__));
225 static INLINE unsigned int re_assemble_17 (unsigned int, unsigned int)
226 __attribute__ ((__unused__));
227 static INLINE unsigned int re_assemble_22 (unsigned int, unsigned int)
228 __attribute__ ((__unused__));
229 static INLINE unsigned int re_assemble_21 (unsigned int, unsigned int)
230 __attribute__ ((__unused__));
231 static INLINE bfd_signed_vma hppa_field_adjust (bfd_signed_vma, bfd_signed_vma,
232 enum hppa_reloc_field_selector_type_alt)
233 __attribute__ ((__unused__));
234 static INLINE int bfd_hppa_insn2fmt (unsigned int)
235 __attribute__ ((__unused__));
236 static INLINE unsigned int hppa_rebuild_insn (bfd *, unsigned int,
237 unsigned int, unsigned int)
238 __attribute__ ((__unused__));
239 #endif /* gcc 2.7 or higher */
242 /* The *sign_extend and assemble_* functions are used to assemble
243 various bitfields taken from an instruction and return the
244 resulting immediate value. They correspond to functions by the
245 same name in HP's PA-RISC 2.0 Architecture Reference Manual. */
247 static INLINE unsigned int
248 sign_extend (x, len)
249 unsigned int x, len;
251 unsigned int signbit = (1 << (len - 1));
252 unsigned int mask = (signbit << 1) - 1;
253 return ((x & mask) ^ signbit) - signbit;
256 static INLINE unsigned int
257 low_sign_extend (x, len)
258 unsigned int x, len;
260 return (x >> 1) - ((x & 1) << (len - 1));
263 static INLINE unsigned int
264 assemble_3 (x)
265 unsigned int x;
267 return CATENATE (GET_BIT (x, 2), 1, GET_FIELD (x, 0, 1), 2);
270 static INLINE unsigned int
271 assemble_6 (x, y)
272 unsigned int x, y;
274 return (((x & 1) << 5) + (32 - (y & 0x1f)));
277 static INLINE unsigned int
278 assemble_12 (x, y)
279 unsigned int x, y;
281 return CATENATE (CATENATE (y, 1, GET_BIT (x, 10), 1), 2,
282 GET_FIELD (x, 0, 9), 9);
285 static INLINE unsigned int
286 assemble_16 (x, y)
287 unsigned int x, y;
289 /* Depends on PSW W-bit !*/
290 unsigned int temp;
292 if (HPPA_WIDE)
293 temp = CATENATE (CATENATE (GET_BIT (y, 13), 1,
294 (GET_BIT (y, 13) ^ GET_BIT (x, 0)), 1), 2,
295 CATENATE ((GET_BIT (y, 13) ^ GET_BIT (x, 1)), 1,
296 GET_FIELD (y, 0, 12), 13), 14);
297 else
298 temp = CATENATE (CATENATE (GET_BIT (y, 13), 1, GET_BIT (y, 13), 1), 2,
299 CATENATE (GET_BIT (y, 13), 1, GET_FIELD (y, 0, 12), 13), 14);
301 return sign_extend (temp, 16);
304 static INLINE unsigned int
305 assemble_16a (x, y, z)
306 unsigned int x, y, z;
308 /* Depends on PSW W-bit !*/
309 unsigned int temp;
311 if (HPPA_WIDE)
312 temp = CATENATE (CATENATE (z, 1, (z ^ GET_BIT (x, 0)), 1), 2,
313 CATENATE ((z ^ GET_BIT (x, 1)), 1, y, 11), 12);
314 else
315 temp = CATENATE (CATENATE (z, 1, z, 1), 2, CATENATE (z, 1, y, 11), 12);
317 return sign_extend ((temp << 2), 16);
320 static INLINE unsigned int
321 assemble_17 (x, y, z)
322 unsigned int x, y, z;
324 unsigned int temp;
326 temp = CATENATE (CATENATE (z, 1, x, 5), 6,
327 CATENATE (GET_BIT (y, 10), 1, GET_FIELD (y, 0, 9), 10), 11);
329 return temp;
332 static INLINE unsigned int
333 assemble_21 (x)
334 unsigned int x;
336 unsigned int temp;
338 temp = (( (x & 0x000001) << 20)
339 | ((x & 0x000ffe) << 8)
340 | ((x & 0x003000) >> 12)
341 | ((x & 0x00c000) >> 7)
342 | ((x & 0x1f0000) >> 14));
343 return temp;
346 static INLINE unsigned int
347 assemble_22 (a,b,c,d)
348 unsigned int a,b,c,d;
350 unsigned int temp;
352 temp = CATENATE (CATENATE (d, 1, a, 5), 6,
353 CATENATE (b, 5, ELEVEN (c), 11), 16);
355 return sign_extend (temp, 22);
359 /* The re_assemble_* functions splice together an opcode and an
360 immediate value. pa-risc uses all sorts of weird bitfields in the
361 instruction to hold the value. */
363 static INLINE unsigned int
364 sign_unext (x, len)
365 unsigned int x, len;
367 unsigned int len_ones;
369 len_ones = ((unsigned int) 1 << len) - 1;
371 return x & len_ones;
374 static INLINE unsigned int
375 low_sign_unext (x, len)
376 unsigned int x, len;
378 unsigned int temp;
379 unsigned int sign;
381 sign = (x >> (len-1)) & 1;
383 temp = sign_unext (x, len-1);
385 return (temp << 1) | sign;
388 static INLINE unsigned int
389 re_assemble_3 (insn, as3)
390 unsigned int insn;
391 unsigned int as3;
393 return (insn
394 | ((as3 & 4) << (13-2))
395 | ((as3 & 3) << (13+1)));
398 static INLINE unsigned int
399 re_assemble_12 (insn, as12)
400 unsigned int insn;
401 unsigned int as12;
403 return (insn
404 | ((as12 & 0x800) >> 11)
405 | ((as12 & 0x400) >> (10 - 2))
406 | ((as12 & 0x3ff) << (1 + 2)));
409 static INLINE unsigned int
410 re_assemble_16 (insn, as16, wide)
411 unsigned int insn;
412 unsigned int as16;
413 int wide;
415 unsigned int s, t;
417 if (wide)
419 /* Unusual 16-bit encoding. */
420 t = (as16 << 1) & 0xffff;
421 s = (as16 & 0x8000);
422 return insn | (t ^ s ^ (s >> 1)) | (s >> 15);
424 else
426 /* Standard 14-bit encoding. */
427 t = (as16 << 1) & 0x3fff;
428 s = (as16 & 0x2000);
429 return insn | t | (s >> 13);
433 static INLINE unsigned int
434 re_assemble_17 (insn, as17)
435 unsigned int insn;
436 unsigned int as17;
438 return (insn
439 | ((as17 & 0x10000) >> 16)
440 | ((as17 & 0x0f800) << (16 - 11))
441 | ((as17 & 0x00400) >> (10 - 2))
442 | ((as17 & 0x003ff) << (1 + 2)));
445 static INLINE unsigned int
446 re_assemble_21 (insn, as21)
447 unsigned int insn;
448 unsigned int as21;
450 return (insn
451 | ((as21 & 0x100000) >> 20)
452 | ((as21 & 0x0ffe00) >> 8)
453 | ((as21 & 0x000180) << 7)
454 | ((as21 & 0x00007c) << 14)
455 | ((as21 & 0x000003) << 12));
458 static INLINE unsigned int
459 re_assemble_22 (insn, as22)
460 unsigned int insn;
461 unsigned int as22;
463 return (insn
464 | ((as22 & 0x200000) >> 21)
465 | ((as22 & 0x1f0000) << (21 - 16))
466 | ((as22 & 0x00f800) << (16 - 11))
467 | ((as22 & 0x000400) >> (10 - 2))
468 | ((as22 & 0x0003ff) << (1 + 2)));
472 /* Handle field selectors for PA instructions.
473 The L and R (and LS, RS etc.) selectors are used in pairs to form a
474 full 32 bit address. eg.
476 LDIL L'start,%r1 ; put left part into r1
477 LDW R'start(%r1),%r2 ; add r1 and right part to form address
479 This function returns sign extended values in all cases.
482 static INLINE bfd_signed_vma
483 hppa_field_adjust (sym_val, addend, r_field)
484 bfd_signed_vma sym_val;
485 bfd_signed_vma addend;
486 enum hppa_reloc_field_selector_type_alt r_field;
488 bfd_signed_vma value;
490 value = sym_val + addend;
491 switch (r_field)
493 case e_fsel:
494 case e_nsel:
495 /* F: No change. */
496 break;
498 case e_lsel:
499 case e_nlsel:
500 /* L: Select top 21 bits. */
501 value = value >> 11;
502 break;
504 case e_rsel:
505 /* R: Select bottom 11 bits. */
506 value = value & 0x7ff;
507 break;
509 case e_lssel:
510 /* LS: Round to nearest multiple of 2048 then select top 21 bits. */
511 value = value + 0x400;
512 value = value >> 11;
513 break;
515 case e_rssel:
516 /* RS: Select bottom 11 bits for LS.
517 We need to return a value such that 2048 * LS'x + RS'x == x.
518 ie. RS'x = x - ((x + 0x400) & -0x800)
519 this is just a sign extension from bit 21. */
520 value = ((value & 0x7ff) ^ 0x400) - 0x400;
521 break;
523 case e_ldsel:
524 /* LD: Round to next multiple of 2048 then select top 21 bits.
525 Yes, if we are already on a multiple of 2048, we go up to the
526 next one. RD in this case will be -2048. */
527 value = value + 0x800;
528 value = value >> 11;
529 break;
531 case e_rdsel:
532 /* RD: Set bits 0-20 to one. */
533 value = value | -0x800;
534 break;
536 case e_lrsel:
537 case e_nlrsel:
538 /* LR: L with rounding of the addend to nearest 8k. */
539 value = sym_val + ((addend + 0x1000) & -0x2000);
540 value = value >> 11;
541 break;
543 case e_rrsel:
544 /* RR: R with rounding of the addend to nearest 8k.
545 We need to return a value such that 2048 * LR'x + RR'x == x
546 ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800))
547 . = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000))
548 . = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */
549 value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000);
550 break;
552 default:
553 abort ();
555 return value;
558 /* PA-RISC OPCODES */
559 #define get_opcode(insn) (((insn) >> 26) & 0x3f)
561 /* FIXME: this list is incomplete. It should also be an enumerated
562 type rather than #defines. */
564 #define LDO 0x0d
565 #define LDB 0x10
566 #define LDH 0x11
567 #define LDW 0x12
568 #define LDWM 0x13
569 #define STB 0x18
570 #define STH 0x19
571 #define STW 0x1a
572 #define STWM 0x1b
573 #define COMICLR 0x24
574 #define SUBI 0x25
575 #define SUBIO 0x25
576 #define ADDIT 0x2c
577 #define ADDITO 0x2c
578 #define ADDI 0x2d
579 #define ADDIO 0x2d
580 #define LDIL 0x08
581 #define ADDIL 0x0a
583 #define MOVB 0x32
584 #define MOVIB 0x33
585 #define COMBT 0x20
586 #define COMBF 0x22
587 #define COMIBT 0x21
588 #define COMIBF 0x23
589 #define ADDBT 0x28
590 #define ADDBF 0x2a
591 #define ADDIBT 0x29
592 #define ADDIBF 0x2b
593 #define BVB 0x30
594 #define BB 0x31
596 #define BL 0x3a
597 #define BLE 0x39
598 #define BE 0x38
600 #define CMPBDT 0x27
601 #define CMPBDF 0x2f
602 #define CMPIBD 0x3b
603 #define LDD 0x14
604 #define STD 0x1c
605 #define LDWL 0x17
606 #define STWL 0x1f
607 #define FLDW 0x16
608 #define FSTW 0x1e
610 /* Given a machine instruction, return its format.
612 FIXME: opcodes which do not map to a known format
613 should return an error of some sort. */
615 static INLINE int
616 bfd_hppa_insn2fmt (insn)
617 unsigned int insn;
619 unsigned char op = get_opcode (insn);
621 switch (op)
623 case ADDI:
624 case ADDIT:
625 case SUBI:
626 return 11;
628 case MOVB:
629 case MOVIB:
630 case COMBT:
631 case COMBF:
632 case COMIBT:
633 case COMIBF:
634 case ADDBT:
635 case ADDBF:
636 case ADDIBT:
637 case ADDIBF:
638 case BVB:
639 case BB:
640 case CMPBDT:
641 case CMPBDF:
642 case CMPIBD:
643 return 12;
645 case LDO:
646 case LDB:
647 case LDH:
648 case LDW:
649 case LDWM:
650 case STB:
651 case STH:
652 case STW:
653 case STWM:
654 return 14;
656 case LDWL:
657 case STWL:
658 case FLDW:
659 case FSTW:
660 /* This is a hack. Unfortunately, format 11 is already taken
661 and we're using integers rather than an enum, so it's hard
662 to describe the 11a format. */
663 return -11;
665 case LDD:
666 case STD:
667 return 10;
669 case BL:
670 case BE:
671 case BLE:
672 if ((insn & 0x00008000) != 0)
673 return 22;
674 return 17;
676 case LDIL:
677 case ADDIL:
678 return 21;
680 default:
681 break;
683 return 32;
687 /* Insert VALUE into INSN using R_FORMAT to determine exactly what
688 bits to change. */
690 static INLINE unsigned int
691 hppa_rebuild_insn (abfd, insn, value, r_format)
692 bfd *abfd ATTRIBUTE_UNUSED;
693 unsigned int insn;
694 unsigned int value;
695 unsigned int r_format;
697 switch (r_format)
699 case 11: return (insn & ~ 0x7ff) | low_sign_unext (value, 11);
700 case 12: return re_assemble_12 (insn & ~ 0x1ffd, value);
701 case 14: return (insn & ~ 0x3fff) | low_sign_unext (value, 14);
702 case 17: return re_assemble_17 (insn & ~ 0x1f1ffd, value);
703 case 21: return re_assemble_21 (insn & ~ 0x1fffff, value);
704 case 32: return value;
706 default:
707 abort ();
709 return insn;
712 #endif /* _HPPA_H */