1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright 1994, 1995, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008, 2009, 2010 Free Software Foundation, Inc.
4 Written by Ian Lance Taylor, Cygnus Support
6 This file is part of the GNU opcodes library.
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 It is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this file; see the file COPYING. If not, write to the
20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
27 #include "opcode/ppc.h"
29 /* This file provides several disassembler functions, all of which use
30 the disassembler interface defined in dis-asm.h. Several functions
31 are provided because this file handles disassembly for the PowerPC
32 in both big and little endian mode and also for the POWER (RS/6000)
34 static int print_insn_powerpc (bfd_vma
, struct disassemble_info
*, int,
39 /* Stash the result of parsing disassembler_options here. */
43 #define POWERPC_DIALECT(INFO) \
44 (((struct dis_private *) ((INFO)->private_data))->dialect)
52 struct ppc_mopt ppc_opts
[] = {
53 { "403", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_403
56 { "405", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_403
57 | PPC_OPCODE_405
| PPC_OPCODE_32
),
59 { "440", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
60 | PPC_OPCODE_440
| PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
62 { "464", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
63 | PPC_OPCODE_440
| PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
65 { "476", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ISEL
66 | PPC_OPCODE_440
| PPC_OPCODE_476
| PPC_OPCODE_POWER4
69 { "601", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_601
72 { "603", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
74 { "604", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
76 { "620", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
),
78 { "7400", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
81 { "7410", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
84 { "7450", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
87 { "7455", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ALTIVEC
90 { "750cl", (PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
)
92 { "altivec", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
),
96 { "booke", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
),
98 { "booke32", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_32
),
100 { "cell", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
101 | PPC_OPCODE_POWER4
| PPC_OPCODE_CELL
| PPC_OPCODE_ALTIVEC
),
103 { "com", (PPC_OPCODE_COMMON
| PPC_OPCODE_32
),
105 { "e300", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
108 { "e500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
109 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
110 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
111 | PPC_OPCODE_E500MC
),
113 { "e500mc", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
114 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
115 | PPC_OPCODE_E500MC
),
117 { "e500mc64", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
118 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
119 | PPC_OPCODE_64
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
120 | PPC_OPCODE_POWER7
),
122 { "e500x2", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
123 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
124 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
125 | PPC_OPCODE_E500MC
),
127 { "efs", (PPC_OPCODE_PPC
| PPC_OPCODE_EFS
),
129 { "power4", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
130 | PPC_OPCODE_POWER4
),
132 { "power5", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
133 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
),
135 { "power6", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
136 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
137 | PPC_OPCODE_ALTIVEC
),
139 { "power7", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ISEL
140 | PPC_OPCODE_64
| PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
141 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
144 { "ppc", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
146 { "ppc32", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_32
),
148 { "ppc64", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64
),
150 { "ppc64bridge", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_64_BRIDGE
153 { "a2", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
| PPC_OPCODE_ISEL
154 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_CACHELCK
155 | PPC_OPCODE_64
| PPC_OPCODE_A2
),
157 { "ppcps", (PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
),
159 { "pwr", (PPC_OPCODE_POWER
| PPC_OPCODE_32
),
161 { "pwr2", (PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
| PPC_OPCODE_32
),
163 { "pwrx", (PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
| PPC_OPCODE_32
),
165 { "spe", (PPC_OPCODE_PPC
| PPC_OPCODE_EFS
),
167 { "vsx", (PPC_OPCODE_PPC
| PPC_OPCODE_CLASSIC
),
171 /* Handle -m and -M options that set cpu type, and .machine arg. */
174 ppc_parse_cpu (ppc_cpu_t ppc_cpu
, const char *arg
)
177 ppc_cpu_t retain_flags
= ppc_cpu
& (PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
178 | PPC_OPCODE_SPE
| PPC_OPCODE_ANY
);
181 for (i
= 0; i
< sizeof (ppc_opts
) / sizeof (ppc_opts
[0]); i
++)
182 if (strcmp (ppc_opts
[i
].opt
, arg
) == 0)
184 if (ppc_opts
[i
].sticky
)
186 retain_flags
|= ppc_opts
[i
].sticky
;
187 if ((ppc_cpu
& ~(PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
188 | PPC_OPCODE_SPE
| PPC_OPCODE_ANY
)) != 0)
191 ppc_cpu
= ppc_opts
[i
].cpu
;
194 if (i
>= sizeof (ppc_opts
) / sizeof (ppc_opts
[0]))
197 ppc_cpu
|= retain_flags
;
201 /* Determine which set of machines to disassemble for. */
204 powerpc_init_dialect (struct disassemble_info
*info
)
206 ppc_cpu_t dialect
= 0;
208 struct dis_private
*priv
= calloc (sizeof (*priv
), 1);
213 arg
= info
->disassembler_options
;
216 ppc_cpu_t new_cpu
= 0;
217 char *end
= strchr (arg
, ',');
222 if ((new_cpu
= ppc_parse_cpu (dialect
, arg
)) != 0)
224 else if (strcmp (arg
, "32") == 0)
226 dialect
&= ~PPC_OPCODE_64
;
227 dialect
|= PPC_OPCODE_32
;
229 else if (strcmp (arg
, "64") == 0)
231 dialect
|= PPC_OPCODE_64
;
232 dialect
&= ~PPC_OPCODE_32
;
235 fprintf (stderr
, _("warning: ignoring unknown -M%s option\n"), arg
);
242 if ((dialect
& ~(PPC_OPCODE_32
| PPC_OPCODE_64
)) == 0)
244 if (info
->mach
== bfd_mach_ppc64
)
245 dialect
|= PPC_OPCODE_64
;
247 dialect
|= PPC_OPCODE_32
;
248 /* Choose a reasonable default. */
249 dialect
|= (PPC_OPCODE_PPC
| PPC_OPCODE_COMMON
| PPC_OPCODE_CLASSIC
250 | PPC_OPCODE_601
| PPC_OPCODE_ALTIVEC
);
253 info
->private_data
= priv
;
254 POWERPC_DIALECT(info
) = dialect
;
259 /* Print a big endian PowerPC instruction. */
262 print_insn_big_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
264 if (info
->private_data
== NULL
&& !powerpc_init_dialect (info
))
266 return print_insn_powerpc (memaddr
, info
, 1, POWERPC_DIALECT(info
));
269 /* Print a little endian PowerPC instruction. */
272 print_insn_little_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
274 if (info
->private_data
== NULL
&& !powerpc_init_dialect (info
))
276 return print_insn_powerpc (memaddr
, info
, 0, POWERPC_DIALECT(info
));
279 /* Print a POWER (RS/6000) instruction. */
282 print_insn_rs6000 (bfd_vma memaddr
, struct disassemble_info
*info
)
284 return print_insn_powerpc (memaddr
, info
, 1, PPC_OPCODE_POWER
);
287 /* Extract the operand value from the PowerPC or POWER instruction. */
290 operand_value_powerpc (const struct powerpc_operand
*operand
,
291 unsigned long insn
, ppc_cpu_t dialect
)
295 /* Extract the value from the instruction. */
296 if (operand
->extract
)
297 value
= (*operand
->extract
) (insn
, dialect
, &invalid
);
300 value
= (insn
>> operand
->shift
) & operand
->bitm
;
301 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
303 /* BITM is always some number of zeros followed by some
304 number of ones, followed by some numer of zeros. */
305 unsigned long top
= operand
->bitm
;
306 /* top & -top gives the rightmost 1 bit, so this
307 fills in any trailing zeros. */
308 top
|= (top
& -top
) - 1;
310 value
= (value
^ top
) - top
;
317 /* Determine whether the optional operand(s) should be printed. */
320 skip_optional_operands (const unsigned char *opindex
,
321 unsigned long insn
, ppc_cpu_t dialect
)
323 const struct powerpc_operand
*operand
;
325 for (; *opindex
!= 0; opindex
++)
327 operand
= &powerpc_operands
[*opindex
];
328 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0
329 || ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
330 && operand_value_powerpc (operand
, insn
, dialect
) != 0))
337 /* Print a PowerPC or POWER instruction. */
340 print_insn_powerpc (bfd_vma memaddr
,
341 struct disassemble_info
*info
,
348 const struct powerpc_opcode
*opcode
;
349 const struct powerpc_opcode
*opcode_end
;
351 ppc_cpu_t dialect_orig
= dialect
;
353 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
356 (*info
->memory_error_func
) (status
, memaddr
, info
);
361 insn
= bfd_getb32 (buffer
);
363 insn
= bfd_getl32 (buffer
);
365 /* Get the major opcode of the instruction. */
368 /* Find the first match in the opcode table. We could speed this up
369 a bit by doing a binary search on the major opcode. */
370 opcode_end
= powerpc_opcodes
+ powerpc_num_opcodes
;
372 for (opcode
= powerpc_opcodes
; opcode
< opcode_end
; opcode
++)
374 unsigned long table_op
;
375 const unsigned char *opindex
;
376 const struct powerpc_operand
*operand
;
382 table_op
= PPC_OP (opcode
->opcode
);
388 if ((insn
& opcode
->mask
) != opcode
->opcode
389 || (opcode
->flags
& dialect
) == 0
390 || (opcode
->deprecated
& dialect_orig
) != 0)
393 /* Make two passes over the operands. First see if any of them
394 have extraction functions, and, if they do, make sure the
395 instruction is valid. */
397 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
399 operand
= powerpc_operands
+ *opindex
;
400 if (operand
->extract
)
401 (*operand
->extract
) (insn
, dialect
, &invalid
);
406 /* The instruction is valid. */
407 if (opcode
->operands
[0] != 0)
408 (*info
->fprintf_func
) (info
->stream
, "%-7s ", opcode
->name
);
410 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
412 /* Now extract and print the operands. */
416 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
420 operand
= powerpc_operands
+ *opindex
;
422 /* Operands that are marked FAKE are simply ignored. We
423 already made sure that the extract function considered
424 the instruction to be valid. */
425 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
428 /* If all of the optional operands have the value zero,
429 then don't print any of them. */
430 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
432 if (skip_optional
< 0)
433 skip_optional
= skip_optional_operands (opindex
, insn
,
439 value
= operand_value_powerpc (operand
, insn
, dialect
);
443 (*info
->fprintf_func
) (info
->stream
, ",");
447 /* Print the operand as directed by the flags. */
448 if ((operand
->flags
& PPC_OPERAND_GPR
) != 0
449 || ((operand
->flags
& PPC_OPERAND_GPR_0
) != 0 && value
!= 0))
450 (*info
->fprintf_func
) (info
->stream
, "r%ld", value
);
451 else if ((operand
->flags
& PPC_OPERAND_FPR
) != 0)
452 (*info
->fprintf_func
) (info
->stream
, "f%ld", value
);
453 else if ((operand
->flags
& PPC_OPERAND_VR
) != 0)
454 (*info
->fprintf_func
) (info
->stream
, "v%ld", value
);
455 else if ((operand
->flags
& PPC_OPERAND_VSR
) != 0)
456 (*info
->fprintf_func
) (info
->stream
, "vs%ld", value
);
457 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0)
458 (*info
->print_address_func
) (memaddr
+ value
, info
);
459 else if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
460 (*info
->print_address_func
) ((bfd_vma
) value
& 0xffffffff, info
);
461 else if ((operand
->flags
& PPC_OPERAND_FSL
) != 0)
462 (*info
->fprintf_func
) (info
->stream
, "fsl%ld", value
);
463 else if ((operand
->flags
& PPC_OPERAND_FCR
) != 0)
464 (*info
->fprintf_func
) (info
->stream
, "fcr%ld", value
);
465 else if ((operand
->flags
& PPC_OPERAND_UDI
) != 0)
466 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
467 else if ((operand
->flags
& PPC_OPERAND_CR
) != 0
468 && (dialect
& PPC_OPCODE_PPC
) != 0)
470 if (operand
->bitm
== 7)
471 (*info
->fprintf_func
) (info
->stream
, "cr%ld", value
);
474 static const char *cbnames
[4] = { "lt", "gt", "eq", "so" };
480 (*info
->fprintf_func
) (info
->stream
, "4*cr%d+", cr
);
482 (*info
->fprintf_func
) (info
->stream
, "%s", cbnames
[cc
]);
486 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
490 (*info
->fprintf_func
) (info
->stream
, ")");
494 if ((operand
->flags
& PPC_OPERAND_PARENS
) == 0)
498 (*info
->fprintf_func
) (info
->stream
, "(");
503 /* We have found and printed an instruction; return. */
507 if ((dialect
& PPC_OPCODE_ANY
) != 0)
509 dialect
= ~PPC_OPCODE_ANY
;
513 /* We could not find a match. */
514 (*info
->fprintf_func
) (info
->stream
, ".long 0x%lx", insn
);
520 print_ppc_disassembler_options (FILE *stream
)
524 fprintf (stream
, _("\n\
525 The following PPC specific disassembler options are supported for use with\n\
528 for (col
= 0, i
= 0; i
< sizeof (ppc_opts
) / sizeof (ppc_opts
[0]); i
++)
530 col
+= fprintf (stream
, " %s,", ppc_opts
[i
].opt
);
533 fprintf (stream
, "\n");
537 fprintf (stream
, " 32, 64\n");