* config/tc-mcore.c (mcore_pool_count): New function.
[binutils.git] / opcodes / ia64-opc-m.c
blobba59d1dc4d2a6bb5937b2b345807563659f3b451
1 /* ia64-opc-m.c -- IA-64 `M' opcode table.
2 Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 2, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "ia64-opc.h"
24 #define M0 IA64_TYPE_M, 0
25 #define M IA64_TYPE_M, 1
26 #define M2 IA64_TYPE_M, 2
28 /* instruction bit fields: */
29 #define bM(x) (((ia64_insn) ((x) & 0x1)) << 36)
30 #define bX(x) (((ia64_insn) ((x) & 0x1)) << 27)
31 #define bX2(x) (((ia64_insn) ((x) & 0x3)) << 31)
32 #define bX3(x) (((ia64_insn) ((x) & 0x7)) << 33)
33 #define bX4(x) (((ia64_insn) ((x) & 0xf)) << 27)
34 #define bX6a(x) (((ia64_insn) ((x) & 0x3f)) << 30)
35 #define bX6b(x) (((ia64_insn) ((x) & 0x3f)) << 27)
36 #define bHint(x) (((ia64_insn) ((x) & 0x3)) << 28)
38 #define mM bM (-1)
39 #define mX bX (-1)
40 #define mX2 bX2 (-1)
41 #define mX3 bX3 (-1)
42 #define mX4 bX4 (-1)
43 #define mX6a bX6a (-1)
44 #define mX6b bX6b (-1)
45 #define mHint bHint (-1)
47 #define OpX3(a,b) (bOp (a) | bX3 (b)), (mOp | mX3)
48 #define OpX3X6b(a,b,c) (bOp (a) | bX3 (b) | bX6b (c)), \
49 (mOp | mX3 | mX6b)
50 #define OpX3X4(a,b,c) (bOp (a) | bX3 (b) | bX4 (c)), \
51 (mOp | mX3 | mX4)
52 #define OpX3X4X2(a,b,c,d) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d)), \
53 (mOp | mX3 | mX4 | mX2)
54 #define OpX6aHint(a,b,c) (bOp (a) | bX6a (b) | bHint (c)), \
55 (mOp | mX6a | mHint)
56 #define OpXX6aHint(a,b,c,d) (bOp (a) | bX (b) | bX6a (c) | bHint (d)), \
57 (mOp | mX | mX6a | mHint)
58 #define OpMXX6a(a,b,c,d) \
59 (bOp (a) | bM (b) | bX (c) | bX6a (d)), (mOp | mM | mX | mX6a)
60 #define OpMXX6aHint(a,b,c,d,e) \
61 (bOp (a) | bM (b) | bX (c) | bX6a (d) | bHint (e)), \
62 (mOp | mM | mX | mX6a | mHint)
64 /* Used to initialise unused fields in ia64_opcode struct,
65 in order to stop gcc from complaining. */
66 #define EMPTY 0,0,NULL
68 struct ia64_opcode ia64_opcodes_m[] =
70 /* M-type instruction encodings (sorted according to major opcode). */
72 {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY},
73 {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY},
74 {"chk.a.nc", M0, OpX3 (0, 6), {F1, TGT25c}, EMPTY},
75 {"chk.a.clr", M0, OpX3 (0, 7), {F1, TGT25c}, EMPTY},
77 {"invala", M0, OpX3X4X2 (0, 0, 0, 1), {}, EMPTY},
78 {"fwb", M0, OpX3X4X2 (0, 0, 0, 2), {}, EMPTY},
79 {"mf", M0, OpX3X4X2 (0, 0, 2, 2), {}, EMPTY},
80 {"mf.a", M0, OpX3X4X2 (0, 0, 3, 2), {}, EMPTY},
81 {"srlz.d", M0, OpX3X4X2 (0, 0, 0, 3), {}, EMPTY},
82 {"srlz.i", M0, OpX3X4X2 (0, 0, 1, 3), {}, EMPTY},
83 {"sync.i", M0, OpX3X4X2 (0, 0, 3, 3), {}, EMPTY},
84 {"flushrs", M0, OpX3X4X2 (0, 0, 0xc, 0), {}, FIRST | NO_PRED, 0, NULL},
85 {"loadrs", M0, OpX3X4X2 (0, 0, 0xa, 0), {}, FIRST | NO_PRED, 0, NULL},
86 {"invala.e", M0, OpX3X4X2 (0, 0, 2, 1), {R1}, EMPTY},
87 {"invala.e", M0, OpX3X4X2 (0, 0, 3, 1), {F1}, EMPTY},
88 {"mov.m", M, OpX3X4X2 (0, 0, 8, 2), {AR3, IMM8}, EMPTY},
90 {"break.m", M0, OpX3X4X2 (0, 0, 0, 0), {IMMU21}, EMPTY},
91 {"nop.m", M0, OpX3X4X2 (0, 0, 1, 0), {IMMU21}, EMPTY},
93 {"sum", M0, OpX3X4 (0, 0, 4), {IMMU24}, EMPTY},
94 {"rum", M0, OpX3X4 (0, 0, 5), {IMMU24}, EMPTY},
95 {"ssm", M0, OpX3X4 (0, 0, 6), {IMMU24}, PRIV, 0, NULL},
96 {"rsm", M0, OpX3X4 (0, 0, 7), {IMMU24}, PRIV, 0, NULL},
98 {"mov.m", M, OpX3X6b (1, 0, 0x2a), {AR3, R2}, EMPTY},
99 {"mov.m", M, OpX3X6b (1, 0, 0x22), {R1, AR3}, EMPTY},
100 {"mov", M, OpX3X6b (1, 0, 0x2c), {CR3, R2}, PRIV, 0, NULL},
101 {"mov", M, OpX3X6b (1, 0, 0x24), {R1, CR3}, PRIV, 0, NULL},
103 {"alloc", M, OpX3 (1, 6), {R1, AR_PFS, SOF, SOL, SOR}, FIRST|NO_PRED|MOD_RRBS, 0, NULL},
105 {"mov", M, OpX3X6b (1, 0, 0x2d), {PSR_L, R2}, PRIV, 0, NULL},
106 {"mov", M, OpX3X6b (1, 0, 0x29), {PSR_UM, R2}, EMPTY},
107 {"mov", M, OpX3X6b (1, 0, 0x25), {R1, PSR}, PRIV, 0, NULL},
108 {"mov", M, OpX3X6b (1, 0, 0x21), {R1, PSR_UM}, EMPTY},
109 {"probe.r", M, OpX3X6b (1, 0, 0x38), {R1, R3, R2}, EMPTY},
110 {"probe.w", M, OpX3X6b (1, 0, 0x39), {R1, R3, R2}, EMPTY},
111 {"probe.r", M, OpX3X6b (1, 0, 0x18), {R1, R3, IMMU2}, EMPTY},
112 {"probe.w", M, OpX3X6b (1, 0, 0x19), {R1, R3, IMMU2}, EMPTY},
113 {"probe.rw.fault", M0, OpX3X6b (1, 0, 0x31), {R3, IMMU2}, EMPTY},
114 {"probe.r.fault", M0, OpX3X6b (1, 0, 0x32), {R3, IMMU2}, EMPTY},
115 {"probe.w.fault", M0, OpX3X6b (1, 0, 0x33), {R3, IMMU2}, EMPTY},
116 {"itc.d", M0, OpX3X6b (1, 0, 0x2e), {R2}, LAST | PRIV, 0, NULL},
117 {"itc.i", M0, OpX3X6b (1, 0, 0x2f), {R2}, LAST | PRIV, 0, NULL},
119 {"mov", M, OpX3X6b (1, 0, 0x00), {RR_R3, R2}, PRIV, 0, NULL},
120 {"mov", M, OpX3X6b (1, 0, 0x01), {DBR_R3, R2}, PRIV, 0, NULL},
121 {"mov", M, OpX3X6b (1, 0, 0x02), {IBR_R3, R2}, PRIV, 0, NULL},
122 {"mov", M, OpX3X6b (1, 0, 0x03), {PKR_R3, R2}, PRIV, 0, NULL},
123 {"mov", M, OpX3X6b (1, 0, 0x04), {PMC_R3, R2}, PRIV, 0, NULL},
124 {"mov", M, OpX3X6b (1, 0, 0x05), {PMD_R3, R2}, PRIV, 0, NULL},
125 {"mov", M, OpX3X6b (1, 0, 0x06), {MSR_R3, R2}, PRIV, 0, NULL},
126 {"itr.d", M, OpX3X6b (1, 0, 0x0e), {DTR_R3, R2}, PRIV, 0, NULL},
127 {"itr.i", M, OpX3X6b (1, 0, 0x0f), {ITR_R3, R2}, PRIV, 0, NULL},
129 {"mov", M, OpX3X6b (1, 0, 0x10), {R1, RR_R3}, PRIV, 0, NULL},
130 {"mov", M, OpX3X6b (1, 0, 0x11), {R1, DBR_R3}, PRIV, 0, NULL},
131 {"mov", M, OpX3X6b (1, 0, 0x12), {R1, IBR_R3}, PRIV, 0, NULL},
132 {"mov", M, OpX3X6b (1, 0, 0x13), {R1, PKR_R3}, PRIV, 0, NULL},
133 {"mov", M, OpX3X6b (1, 0, 0x14), {R1, PMC_R3}, PRIV, 0, NULL},
134 {"mov", M, OpX3X6b (1, 0, 0x15), {R1, PMD_R3}, EMPTY},
135 {"mov", M, OpX3X6b (1, 0, 0x16), {R1, MSR_R3}, PRIV, 0, NULL},
136 {"mov", M, OpX3X6b (1, 0, 0x17), {R1, CPUID_R3}, EMPTY},
138 {"ptc.l", M0, OpX3X6b (1, 0, 0x09), {R3, R2}, PRIV, 0, NULL},
139 {"ptc.g", M0, OpX3X6b (1, 0, 0x0a), {R3, R2}, LAST | PRIV, 0, NULL},
140 {"ptc.ga", M0, OpX3X6b (1, 0, 0x0b), {R3, R2}, LAST | PRIV, 0, NULL},
141 {"ptr.d", M0, OpX3X6b (1, 0, 0x0c), {R3, R2}, PRIV, 0, NULL},
142 {"ptr.i", M0, OpX3X6b (1, 0, 0x0d), {R3, R2}, PRIV, 0, NULL},
144 {"thash", M, OpX3X6b (1, 0, 0x1a), {R1, R3}, EMPTY},
145 {"ttag", M, OpX3X6b (1, 0, 0x1b), {R1, R3}, EMPTY},
146 {"tpa", M, OpX3X6b (1, 0, 0x1e), {R1, R3}, PRIV, 0, NULL},
147 {"tak", M, OpX3X6b (1, 0, 0x1f), {R1, R3}, PRIV, 0, NULL},
149 {"chk.s.m", M0, OpX3 (1, 1), {R2, TGT25b}, EMPTY},
150 {"chk.s", M0, OpX3 (1, 3), {F2, TGT25b}, EMPTY},
152 {"fc", M0, OpX3X6b (1, 0, 0x30), {R3}, EMPTY},
153 {"ptc.e", M0, OpX3X6b (1, 0, 0x34), {R3}, PRIV, 0, NULL},
155 /* integer load */
156 {"ld1", M, OpMXX6aHint (4, 0, 0, 0x00, 0), {R1, MR3}, EMPTY},
157 {"ld1.nt1", M, OpMXX6aHint (4, 0, 0, 0x00, 1), {R1, MR3}, EMPTY},
158 {"ld1.nta", M, OpMXX6aHint (4, 0, 0, 0x00, 3), {R1, MR3}, EMPTY},
159 {"ld2", M, OpMXX6aHint (4, 0, 0, 0x01, 0), {R1, MR3}, EMPTY},
160 {"ld2.nt1", M, OpMXX6aHint (4, 0, 0, 0x01, 1), {R1, MR3}, EMPTY},
161 {"ld2.nta", M, OpMXX6aHint (4, 0, 0, 0x01, 3), {R1, MR3}, EMPTY},
162 {"ld4", M, OpMXX6aHint (4, 0, 0, 0x02, 0), {R1, MR3}, EMPTY},
163 {"ld4.nt1", M, OpMXX6aHint (4, 0, 0, 0x02, 1), {R1, MR3}, EMPTY},
164 {"ld4.nta", M, OpMXX6aHint (4, 0, 0, 0x02, 3), {R1, MR3}, EMPTY},
165 {"ld8", M, OpMXX6aHint (4, 0, 0, 0x03, 0), {R1, MR3}, EMPTY},
166 {"ld8.nt1", M, OpMXX6aHint (4, 0, 0, 0x03, 1), {R1, MR3}, EMPTY},
167 {"ld8.nta", M, OpMXX6aHint (4, 0, 0, 0x03, 3), {R1, MR3}, EMPTY},
168 {"ld1.s", M, OpMXX6aHint (4, 0, 0, 0x04, 0), {R1, MR3}, EMPTY},
169 {"ld1.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x04, 1), {R1, MR3}, EMPTY},
170 {"ld1.s.nta", M, OpMXX6aHint (4, 0, 0, 0x04, 3), {R1, MR3}, EMPTY},
171 {"ld2.s", M, OpMXX6aHint (4, 0, 0, 0x05, 0), {R1, MR3}, EMPTY},
172 {"ld2.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x05, 1), {R1, MR3}, EMPTY},
173 {"ld2.s.nta", M, OpMXX6aHint (4, 0, 0, 0x05, 3), {R1, MR3}, EMPTY},
174 {"ld4.s", M, OpMXX6aHint (4, 0, 0, 0x06, 0), {R1, MR3}, EMPTY},
175 {"ld4.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x06, 1), {R1, MR3}, EMPTY},
176 {"ld4.s.nta", M, OpMXX6aHint (4, 0, 0, 0x06, 3), {R1, MR3}, EMPTY},
177 {"ld8.s", M, OpMXX6aHint (4, 0, 0, 0x07, 0), {R1, MR3}, EMPTY},
178 {"ld8.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x07, 1), {R1, MR3}, EMPTY},
179 {"ld8.s.nta", M, OpMXX6aHint (4, 0, 0, 0x07, 3), {R1, MR3}, EMPTY},
180 {"ld1.a", M, OpMXX6aHint (4, 0, 0, 0x08, 0), {R1, MR3}, EMPTY},
181 {"ld1.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x08, 1), {R1, MR3}, EMPTY},
182 {"ld1.a.nta", M, OpMXX6aHint (4, 0, 0, 0x08, 3), {R1, MR3}, EMPTY},
183 {"ld2.a", M, OpMXX6aHint (4, 0, 0, 0x09, 0), {R1, MR3}, EMPTY},
184 {"ld2.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x09, 1), {R1, MR3}, EMPTY},
185 {"ld2.a.nta", M, OpMXX6aHint (4, 0, 0, 0x09, 3), {R1, MR3}, EMPTY},
186 {"ld4.a", M, OpMXX6aHint (4, 0, 0, 0x0a, 0), {R1, MR3}, EMPTY},
187 {"ld4.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x0a, 1), {R1, MR3}, EMPTY},
188 {"ld4.a.nta", M, OpMXX6aHint (4, 0, 0, 0x0a, 3), {R1, MR3}, EMPTY},
189 {"ld8.a", M, OpMXX6aHint (4, 0, 0, 0x0b, 0), {R1, MR3}, EMPTY},
190 {"ld8.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x0b, 1), {R1, MR3}, EMPTY},
191 {"ld8.a.nta", M, OpMXX6aHint (4, 0, 0, 0x0b, 3), {R1, MR3}, EMPTY},
192 {"ld1.sa", M, OpMXX6aHint (4, 0, 0, 0x0c, 0), {R1, MR3}, EMPTY},
193 {"ld1.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0c, 1), {R1, MR3}, EMPTY},
194 {"ld1.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0c, 3), {R1, MR3}, EMPTY},
195 {"ld2.sa", M, OpMXX6aHint (4, 0, 0, 0x0d, 0), {R1, MR3}, EMPTY},
196 {"ld2.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0d, 1), {R1, MR3}, EMPTY},
197 {"ld2.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0d, 3), {R1, MR3}, EMPTY},
198 {"ld4.sa", M, OpMXX6aHint (4, 0, 0, 0x0e, 0), {R1, MR3}, EMPTY},
199 {"ld4.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0e, 1), {R1, MR3}, EMPTY},
200 {"ld4.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0e, 3), {R1, MR3}, EMPTY},
201 {"ld8.sa", M, OpMXX6aHint (4, 0, 0, 0x0f, 0), {R1, MR3}, EMPTY},
202 {"ld8.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0f, 1), {R1, MR3}, EMPTY},
203 {"ld8.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0f, 3), {R1, MR3}, EMPTY},
204 {"ld1.bias", M, OpMXX6aHint (4, 0, 0, 0x10, 0), {R1, MR3}, EMPTY},
205 {"ld1.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x10, 1), {R1, MR3}, EMPTY},
206 {"ld1.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x10, 3), {R1, MR3}, EMPTY},
207 {"ld2.bias", M, OpMXX6aHint (4, 0, 0, 0x11, 0), {R1, MR3}, EMPTY},
208 {"ld2.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x11, 1), {R1, MR3}, EMPTY},
209 {"ld2.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x11, 3), {R1, MR3}, EMPTY},
210 {"ld4.bias", M, OpMXX6aHint (4, 0, 0, 0x12, 0), {R1, MR3}, EMPTY},
211 {"ld4.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x12, 1), {R1, MR3}, EMPTY},
212 {"ld4.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x12, 3), {R1, MR3}, EMPTY},
213 {"ld8.bias", M, OpMXX6aHint (4, 0, 0, 0x13, 0), {R1, MR3}, EMPTY},
214 {"ld8.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x13, 1), {R1, MR3}, EMPTY},
215 {"ld8.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x13, 3), {R1, MR3}, EMPTY},
216 {"ld1.acq", M, OpMXX6aHint (4, 0, 0, 0x14, 0), {R1, MR3}, EMPTY},
217 {"ld1.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x14, 1), {R1, MR3}, EMPTY},
218 {"ld1.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x14, 3), {R1, MR3}, EMPTY},
219 {"ld2.acq", M, OpMXX6aHint (4, 0, 0, 0x15, 0), {R1, MR3}, EMPTY},
220 {"ld2.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x15, 1), {R1, MR3}, EMPTY},
221 {"ld2.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x15, 3), {R1, MR3}, EMPTY},
222 {"ld4.acq", M, OpMXX6aHint (4, 0, 0, 0x16, 0), {R1, MR3}, EMPTY},
223 {"ld4.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x16, 1), {R1, MR3}, EMPTY},
224 {"ld4.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x16, 3), {R1, MR3}, EMPTY},
225 {"ld8.acq", M, OpMXX6aHint (4, 0, 0, 0x17, 0), {R1, MR3}, EMPTY},
226 {"ld8.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x17, 1), {R1, MR3}, EMPTY},
227 {"ld8.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x17, 3), {R1, MR3}, EMPTY},
228 {"ld8.fill", M, OpMXX6aHint (4, 0, 0, 0x1b, 0), {R1, MR3}, EMPTY},
229 {"ld8.fill.nt1", M, OpMXX6aHint (4, 0, 0, 0x1b, 1), {R1, MR3}, EMPTY},
230 {"ld8.fill.nta", M, OpMXX6aHint (4, 0, 0, 0x1b, 3), {R1, MR3}, EMPTY},
231 {"ld1.c.clr", M, OpMXX6aHint (4, 0, 0, 0x20, 0), {R1, MR3}, EMPTY},
232 {"ld1.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x20, 1), {R1, MR3}, EMPTY},
233 {"ld1.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x20, 3), {R1, MR3}, EMPTY},
234 {"ld2.c.clr", M, OpMXX6aHint (4, 0, 0, 0x21, 0), {R1, MR3}, EMPTY},
235 {"ld2.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x21, 1), {R1, MR3}, EMPTY},
236 {"ld2.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x21, 3), {R1, MR3}, EMPTY},
237 {"ld4.c.clr", M, OpMXX6aHint (4, 0, 0, 0x22, 0), {R1, MR3}, EMPTY},
238 {"ld4.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x22, 1), {R1, MR3}, EMPTY},
239 {"ld4.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x22, 3), {R1, MR3}, EMPTY},
240 {"ld8.c.clr", M, OpMXX6aHint (4, 0, 0, 0x23, 0), {R1, MR3}, EMPTY},
241 {"ld8.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x23, 1), {R1, MR3}, EMPTY},
242 {"ld8.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x23, 3), {R1, MR3}, EMPTY},
243 {"ld1.c.nc", M, OpMXX6aHint (4, 0, 0, 0x24, 0), {R1, MR3}, EMPTY},
244 {"ld1.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x24, 1), {R1, MR3}, EMPTY},
245 {"ld1.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x24, 3), {R1, MR3}, EMPTY},
246 {"ld2.c.nc", M, OpMXX6aHint (4, 0, 0, 0x25, 0), {R1, MR3}, EMPTY},
247 {"ld2.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x25, 1), {R1, MR3}, EMPTY},
248 {"ld2.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x25, 3), {R1, MR3}, EMPTY},
249 {"ld4.c.nc", M, OpMXX6aHint (4, 0, 0, 0x26, 0), {R1, MR3}, EMPTY},
250 {"ld4.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x26, 1), {R1, MR3}, EMPTY},
251 {"ld4.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x26, 3), {R1, MR3}, EMPTY},
252 {"ld8.c.nc", M, OpMXX6aHint (4, 0, 0, 0x27, 0), {R1, MR3}, EMPTY},
253 {"ld8.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x27, 1), {R1, MR3}, EMPTY},
254 {"ld8.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x27, 3), {R1, MR3}, EMPTY},
255 {"ld1.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x28, 0), {R1, MR3}, EMPTY},
256 {"ld1.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x28, 1), {R1, MR3}, EMPTY},
257 {"ld1.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x28, 3), {R1, MR3}, EMPTY},
258 {"ld2.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x29, 0), {R1, MR3}, EMPTY},
259 {"ld2.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x29, 1), {R1, MR3}, EMPTY},
260 {"ld2.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x29, 3), {R1, MR3}, EMPTY},
261 {"ld4.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2a, 0), {R1, MR3}, EMPTY},
262 {"ld4.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2a, 1), {R1, MR3}, EMPTY},
263 {"ld4.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2a, 3), {R1, MR3}, EMPTY},
264 {"ld8.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2b, 0), {R1, MR3}, EMPTY},
265 {"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY},
266 {"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY},
268 /* Integer load w/increment by register. */
269 #define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL
270 {"ld1", LDINCREG (0x00, 0)},
271 {"ld1.nt1", LDINCREG (0x00, 1)},
272 {"ld1.nta", LDINCREG (0x00, 3)},
273 {"ld2", LDINCREG (0x01, 0)},
274 {"ld2.nt1", LDINCREG (0x01, 1)},
275 {"ld2.nta", LDINCREG (0x01, 3)},
276 {"ld4", LDINCREG (0x02, 0)},
277 {"ld4.nt1", LDINCREG (0x02, 1)},
278 {"ld4.nta", LDINCREG (0x02, 3)},
279 {"ld8", LDINCREG (0x03, 0)},
280 {"ld8.nt1", LDINCREG (0x03, 1)},
281 {"ld8.nta", LDINCREG (0x03, 3)},
282 {"ld1.s", LDINCREG (0x04, 0)},
283 {"ld1.s.nt1", LDINCREG (0x04, 1)},
284 {"ld1.s.nta", LDINCREG (0x04, 3)},
285 {"ld2.s", LDINCREG (0x05, 0)},
286 {"ld2.s.nt1", LDINCREG (0x05, 1)},
287 {"ld2.s.nta", LDINCREG (0x05, 3)},
288 {"ld4.s", LDINCREG (0x06, 0)},
289 {"ld4.s.nt1", LDINCREG (0x06, 1)},
290 {"ld4.s.nta", LDINCREG (0x06, 3)},
291 {"ld8.s", LDINCREG (0x07, 0)},
292 {"ld8.s.nt1", LDINCREG (0x07, 1)},
293 {"ld8.s.nta", LDINCREG (0x07, 3)},
294 {"ld1.a", LDINCREG (0x08, 0)},
295 {"ld1.a.nt1", LDINCREG (0x08, 1)},
296 {"ld1.a.nta", LDINCREG (0x08, 3)},
297 {"ld2.a", LDINCREG (0x09, 0)},
298 {"ld2.a.nt1", LDINCREG (0x09, 1)},
299 {"ld2.a.nta", LDINCREG (0x09, 3)},
300 {"ld4.a", LDINCREG (0x0a, 0)},
301 {"ld4.a.nt1", LDINCREG (0x0a, 1)},
302 {"ld4.a.nta", LDINCREG (0x0a, 3)},
303 {"ld8.a", LDINCREG (0x0b, 0)},
304 {"ld8.a.nt1", LDINCREG (0x0b, 1)},
305 {"ld8.a.nta", LDINCREG (0x0b, 3)},
306 {"ld1.sa", LDINCREG (0x0c, 0)},
307 {"ld1.sa.nt1", LDINCREG (0x0c, 1)},
308 {"ld1.sa.nta", LDINCREG (0x0c, 3)},
309 {"ld2.sa", LDINCREG (0x0d, 0)},
310 {"ld2.sa.nt1", LDINCREG (0x0d, 1)},
311 {"ld2.sa.nta", LDINCREG (0x0d, 3)},
312 {"ld4.sa", LDINCREG (0x0e, 0)},
313 {"ld4.sa.nt1", LDINCREG (0x0e, 1)},
314 {"ld4.sa.nta", LDINCREG (0x0e, 3)},
315 {"ld8.sa", LDINCREG (0x0f, 0)},
316 {"ld8.sa.nt1", LDINCREG (0x0f, 1)},
317 {"ld8.sa.nta", LDINCREG (0x0f, 3)},
318 {"ld1.bias", LDINCREG (0x10, 0)},
319 {"ld1.bias.nt1", LDINCREG (0x10, 1)},
320 {"ld1.bias.nta", LDINCREG (0x10, 3)},
321 {"ld2.bias", LDINCREG (0x11, 0)},
322 {"ld2.bias.nt1", LDINCREG (0x11, 1)},
323 {"ld2.bias.nta", LDINCREG (0x11, 3)},
324 {"ld4.bias", LDINCREG (0x12, 0)},
325 {"ld4.bias.nt1", LDINCREG (0x12, 1)},
326 {"ld4.bias.nta", LDINCREG (0x12, 3)},
327 {"ld8.bias", LDINCREG (0x13, 0)},
328 {"ld8.bias.nt1", LDINCREG (0x13, 1)},
329 {"ld8.bias.nta", LDINCREG (0x13, 3)},
330 {"ld1.acq", LDINCREG (0x14, 0)},
331 {"ld1.acq.nt1", LDINCREG (0x14, 1)},
332 {"ld1.acq.nta", LDINCREG (0x14, 3)},
333 {"ld2.acq", LDINCREG (0x15, 0)},
334 {"ld2.acq.nt1", LDINCREG (0x15, 1)},
335 {"ld2.acq.nta", LDINCREG (0x15, 3)},
336 {"ld4.acq", LDINCREG (0x16, 0)},
337 {"ld4.acq.nt1", LDINCREG (0x16, 1)},
338 {"ld4.acq.nta", LDINCREG (0x16, 3)},
339 {"ld8.acq", LDINCREG (0x17, 0)},
340 {"ld8.acq.nt1", LDINCREG (0x17, 1)},
341 {"ld8.acq.nta", LDINCREG (0x17, 3)},
342 {"ld8.fill", LDINCREG (0x1b, 0)},
343 {"ld8.fill.nt1", LDINCREG (0x1b, 1)},
344 {"ld8.fill.nta", LDINCREG (0x1b, 3)},
345 {"ld1.c.clr", LDINCREG (0x20, 0)},
346 {"ld1.c.clr.nt1", LDINCREG (0x20, 1)},
347 {"ld1.c.clr.nta", LDINCREG (0x20, 3)},
348 {"ld2.c.clr", LDINCREG (0x21, 0)},
349 {"ld2.c.clr.nt1", LDINCREG (0x21, 1)},
350 {"ld2.c.clr.nta", LDINCREG (0x21, 3)},
351 {"ld4.c.clr", LDINCREG (0x22, 0)},
352 {"ld4.c.clr.nt1", LDINCREG (0x22, 1)},
353 {"ld4.c.clr.nta", LDINCREG (0x22, 3)},
354 {"ld8.c.clr", LDINCREG (0x23, 0)},
355 {"ld8.c.clr.nt1", LDINCREG (0x23, 1)},
356 {"ld8.c.clr.nta", LDINCREG (0x23, 3)},
357 {"ld1.c.nc", LDINCREG (0x24, 0)},
358 {"ld1.c.nc.nt1", LDINCREG (0x24, 1)},
359 {"ld1.c.nc.nta", LDINCREG (0x24, 3)},
360 {"ld2.c.nc", LDINCREG (0x25, 0)},
361 {"ld2.c.nc.nt1", LDINCREG (0x25, 1)},
362 {"ld2.c.nc.nta", LDINCREG (0x25, 3)},
363 {"ld4.c.nc", LDINCREG (0x26, 0)},
364 {"ld4.c.nc.nt1", LDINCREG (0x26, 1)},
365 {"ld4.c.nc.nta", LDINCREG (0x26, 3)},
366 {"ld8.c.nc", LDINCREG (0x27, 0)},
367 {"ld8.c.nc.nt1", LDINCREG (0x27, 1)},
368 {"ld8.c.nc.nta", LDINCREG (0x27, 3)},
369 {"ld1.c.clr.acq", LDINCREG (0x28, 0)},
370 {"ld1.c.clr.acq.nt1", LDINCREG (0x28, 1)},
371 {"ld1.c.clr.acq.nta", LDINCREG (0x28, 3)},
372 {"ld2.c.clr.acq", LDINCREG (0x29, 0)},
373 {"ld2.c.clr.acq.nt1", LDINCREG (0x29, 1)},
374 {"ld2.c.clr.acq.nta", LDINCREG (0x29, 3)},
375 {"ld4.c.clr.acq", LDINCREG (0x2a, 0)},
376 {"ld4.c.clr.acq.nt1", LDINCREG (0x2a, 1)},
377 {"ld4.c.clr.acq.nta", LDINCREG (0x2a, 3)},
378 {"ld8.c.clr.acq", LDINCREG (0x2b, 0)},
379 {"ld8.c.clr.acq.nt1", LDINCREG (0x2b, 1)},
380 {"ld8.c.clr.acq.nta", LDINCREG (0x2b, 3)},
381 #undef LDINCREG
383 {"st1", M, OpMXX6aHint (4, 0, 0, 0x30, 0), {MR3, R2}, EMPTY},
384 {"st1.nta", M, OpMXX6aHint (4, 0, 0, 0x30, 3), {MR3, R2}, EMPTY},
385 {"st2", M, OpMXX6aHint (4, 0, 0, 0x31, 0), {MR3, R2}, EMPTY},
386 {"st2.nta", M, OpMXX6aHint (4, 0, 0, 0x31, 3), {MR3, R2}, EMPTY},
387 {"st4", M, OpMXX6aHint (4, 0, 0, 0x32, 0), {MR3, R2}, EMPTY},
388 {"st4.nta", M, OpMXX6aHint (4, 0, 0, 0x32, 3), {MR3, R2}, EMPTY},
389 {"st8", M, OpMXX6aHint (4, 0, 0, 0x33, 0), {MR3, R2}, EMPTY},
390 {"st8.nta", M, OpMXX6aHint (4, 0, 0, 0x33, 3), {MR3, R2}, EMPTY},
391 {"st1.rel", M, OpMXX6aHint (4, 0, 0, 0x34, 0), {MR3, R2}, EMPTY},
392 {"st1.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x34, 3), {MR3, R2}, EMPTY},
393 {"st2.rel", M, OpMXX6aHint (4, 0, 0, 0x35, 0), {MR3, R2}, EMPTY},
394 {"st2.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x35, 3), {MR3, R2}, EMPTY},
395 {"st4.rel", M, OpMXX6aHint (4, 0, 0, 0x36, 0), {MR3, R2}, EMPTY},
396 {"st4.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x36, 3), {MR3, R2}, EMPTY},
397 {"st8.rel", M, OpMXX6aHint (4, 0, 0, 0x37, 0), {MR3, R2}, EMPTY},
398 {"st8.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x37, 3), {MR3, R2}, EMPTY},
399 {"st8.spill", M, OpMXX6aHint (4, 0, 0, 0x3b, 0), {MR3, R2}, EMPTY},
400 {"st8.spill.nta", M, OpMXX6aHint (4, 0, 0, 0x3b, 3), {MR3, R2}, EMPTY},
402 #define CMPXCHG(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CCV}, EMPTY
403 {"cmpxchg1.acq", CMPXCHG (0x00, 0)},
404 {"cmpxchg1.acq.nt1", CMPXCHG (0x00, 1)},
405 {"cmpxchg1.acq.nta", CMPXCHG (0x00, 3)},
406 {"cmpxchg2.acq", CMPXCHG (0x01, 0)},
407 {"cmpxchg2.acq.nt1", CMPXCHG (0x01, 1)},
408 {"cmpxchg2.acq.nta", CMPXCHG (0x01, 3)},
409 {"cmpxchg4.acq", CMPXCHG (0x02, 0)},
410 {"cmpxchg4.acq.nt1", CMPXCHG (0x02, 1)},
411 {"cmpxchg4.acq.nta", CMPXCHG (0x02, 3)},
412 {"cmpxchg8.acq", CMPXCHG (0x03, 0)},
413 {"cmpxchg8.acq.nt1", CMPXCHG (0x03, 1)},
414 {"cmpxchg8.acq.nta", CMPXCHG (0x03, 3)},
415 {"cmpxchg1.rel", CMPXCHG (0x04, 0)},
416 {"cmpxchg1.rel.nt1", CMPXCHG (0x04, 1)},
417 {"cmpxchg1.rel.nta", CMPXCHG (0x04, 3)},
418 {"cmpxchg2.rel", CMPXCHG (0x05, 0)},
419 {"cmpxchg2.rel.nt1", CMPXCHG (0x05, 1)},
420 {"cmpxchg2.rel.nta", CMPXCHG (0x05, 3)},
421 {"cmpxchg4.rel", CMPXCHG (0x06, 0)},
422 {"cmpxchg4.rel.nt1", CMPXCHG (0x06, 1)},
423 {"cmpxchg4.rel.nta", CMPXCHG (0x06, 3)},
424 {"cmpxchg8.rel", CMPXCHG (0x07, 0)},
425 {"cmpxchg8.rel.nt1", CMPXCHG (0x07, 1)},
426 {"cmpxchg8.rel.nta", CMPXCHG (0x07, 3)},
427 #undef CMPXCHG
428 {"xchg1", M, OpMXX6aHint (4, 0, 1, 0x08, 0), {R1, MR3, R2}, EMPTY},
429 {"xchg1.nt1", M, OpMXX6aHint (4, 0, 1, 0x08, 1), {R1, MR3, R2}, EMPTY},
430 {"xchg1.nta", M, OpMXX6aHint (4, 0, 1, 0x08, 3), {R1, MR3, R2}, EMPTY},
431 {"xchg2", M, OpMXX6aHint (4, 0, 1, 0x09, 0), {R1, MR3, R2}, EMPTY},
432 {"xchg2.nt1", M, OpMXX6aHint (4, 0, 1, 0x09, 1), {R1, MR3, R2}, EMPTY},
433 {"xchg2.nta", M, OpMXX6aHint (4, 0, 1, 0x09, 3), {R1, MR3, R2}, EMPTY},
434 {"xchg4", M, OpMXX6aHint (4, 0, 1, 0x0a, 0), {R1, MR3, R2}, EMPTY},
435 {"xchg4.nt1", M, OpMXX6aHint (4, 0, 1, 0x0a, 1), {R1, MR3, R2}, EMPTY},
436 {"xchg4.nta", M, OpMXX6aHint (4, 0, 1, 0x0a, 3), {R1, MR3, R2}, EMPTY},
437 {"xchg8", M, OpMXX6aHint (4, 0, 1, 0x0b, 0), {R1, MR3, R2}, EMPTY},
438 {"xchg8.nt1", M, OpMXX6aHint (4, 0, 1, 0x0b, 1), {R1, MR3, R2}, EMPTY},
439 {"xchg8.nta", M, OpMXX6aHint (4, 0, 1, 0x0b, 3), {R1, MR3, R2}, EMPTY},
441 {"fetchadd4.acq", M, OpMXX6aHint (4, 0, 1, 0x12, 0), {R1, MR3, INC3}, EMPTY},
442 {"fetchadd4.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x12, 1), {R1, MR3, INC3}, EMPTY},
443 {"fetchadd4.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x12, 3), {R1, MR3, INC3}, EMPTY},
444 {"fetchadd8.acq", M, OpMXX6aHint (4, 0, 1, 0x13, 0), {R1, MR3, INC3}, EMPTY},
445 {"fetchadd8.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x13, 1), {R1, MR3, INC3}, EMPTY},
446 {"fetchadd8.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x13, 3), {R1, MR3, INC3}, EMPTY},
447 {"fetchadd4.rel", M, OpMXX6aHint (4, 0, 1, 0x16, 0), {R1, MR3, INC3}, EMPTY},
448 {"fetchadd4.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x16, 1), {R1, MR3, INC3}, EMPTY},
449 {"fetchadd4.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x16, 3), {R1, MR3, INC3}, EMPTY},
450 {"fetchadd8.rel", M, OpMXX6aHint (4, 0, 1, 0x17, 0), {R1, MR3, INC3}, EMPTY},
451 {"fetchadd8.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x17, 1), {R1, MR3, INC3}, EMPTY},
452 {"fetchadd8.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x17, 3), {R1, MR3, INC3}, EMPTY},
454 {"getf.sig", M, OpMXX6a (4, 0, 1, 0x1c), {R1, F2}, EMPTY},
455 {"getf.exp", M, OpMXX6a (4, 0, 1, 0x1d), {R1, F2}, EMPTY},
456 {"getf.s", M, OpMXX6a (4, 0, 1, 0x1e), {R1, F2}, EMPTY},
457 {"getf.d", M, OpMXX6a (4, 0, 1, 0x1f), {R1, F2}, EMPTY},
459 /* Integer load w/increment by immediate. */
460 #define LDINCIMMED(c,h) M, OpX6aHint (5, c, h), {R1, MR3, IMM9b}, POSTINC, 0, NULL
461 {"ld1", LDINCIMMED (0x00, 0)},
462 {"ld1.nt1", LDINCIMMED (0x00, 1)},
463 {"ld1.nta", LDINCIMMED (0x00, 3)},
464 {"ld2", LDINCIMMED (0x01, 0)},
465 {"ld2.nt1", LDINCIMMED (0x01, 1)},
466 {"ld2.nta", LDINCIMMED (0x01, 3)},
467 {"ld4", LDINCIMMED (0x02, 0)},
468 {"ld4.nt1", LDINCIMMED (0x02, 1)},
469 {"ld4.nta", LDINCIMMED (0x02, 3)},
470 {"ld8", LDINCIMMED (0x03, 0)},
471 {"ld8.nt1", LDINCIMMED (0x03, 1)},
472 {"ld8.nta", LDINCIMMED (0x03, 3)},
473 {"ld1.s", LDINCIMMED (0x04, 0)},
474 {"ld1.s.nt1", LDINCIMMED (0x04, 1)},
475 {"ld1.s.nta", LDINCIMMED (0x04, 3)},
476 {"ld2.s", LDINCIMMED (0x05, 0)},
477 {"ld2.s.nt1", LDINCIMMED (0x05, 1)},
478 {"ld2.s.nta", LDINCIMMED (0x05, 3)},
479 {"ld4.s", LDINCIMMED (0x06, 0)},
480 {"ld4.s.nt1", LDINCIMMED (0x06, 1)},
481 {"ld4.s.nta", LDINCIMMED (0x06, 3)},
482 {"ld8.s", LDINCIMMED (0x07, 0)},
483 {"ld8.s.nt1", LDINCIMMED (0x07, 1)},
484 {"ld8.s.nta", LDINCIMMED (0x07, 3)},
485 {"ld1.a", LDINCIMMED (0x08, 0)},
486 {"ld1.a.nt1", LDINCIMMED (0x08, 1)},
487 {"ld1.a.nta", LDINCIMMED (0x08, 3)},
488 {"ld2.a", LDINCIMMED (0x09, 0)},
489 {"ld2.a.nt1", LDINCIMMED (0x09, 1)},
490 {"ld2.a.nta", LDINCIMMED (0x09, 3)},
491 {"ld4.a", LDINCIMMED (0x0a, 0)},
492 {"ld4.a.nt1", LDINCIMMED (0x0a, 1)},
493 {"ld4.a.nta", LDINCIMMED (0x0a, 3)},
494 {"ld8.a", LDINCIMMED (0x0b, 0)},
495 {"ld8.a.nt1", LDINCIMMED (0x0b, 1)},
496 {"ld8.a.nta", LDINCIMMED (0x0b, 3)},
497 {"ld1.sa", LDINCIMMED (0x0c, 0)},
498 {"ld1.sa.nt1", LDINCIMMED (0x0c, 1)},
499 {"ld1.sa.nta", LDINCIMMED (0x0c, 3)},
500 {"ld2.sa", LDINCIMMED (0x0d, 0)},
501 {"ld2.sa.nt1", LDINCIMMED (0x0d, 1)},
502 {"ld2.sa.nta", LDINCIMMED (0x0d, 3)},
503 {"ld4.sa", LDINCIMMED (0x0e, 0)},
504 {"ld4.sa.nt1", LDINCIMMED (0x0e, 1)},
505 {"ld4.sa.nta", LDINCIMMED (0x0e, 3)},
506 {"ld8.sa", LDINCIMMED (0x0f, 0)},
507 {"ld8.sa.nt1", LDINCIMMED (0x0f, 1)},
508 {"ld8.sa.nta", LDINCIMMED (0x0f, 3)},
509 {"ld1.bias", LDINCIMMED (0x10, 0)},
510 {"ld1.bias.nt1", LDINCIMMED (0x10, 1)},
511 {"ld1.bias.nta", LDINCIMMED (0x10, 3)},
512 {"ld2.bias", LDINCIMMED (0x11, 0)},
513 {"ld2.bias.nt1", LDINCIMMED (0x11, 1)},
514 {"ld2.bias.nta", LDINCIMMED (0x11, 3)},
515 {"ld4.bias", LDINCIMMED (0x12, 0)},
516 {"ld4.bias.nt1", LDINCIMMED (0x12, 1)},
517 {"ld4.bias.nta", LDINCIMMED (0x12, 3)},
518 {"ld8.bias", LDINCIMMED (0x13, 0)},
519 {"ld8.bias.nt1", LDINCIMMED (0x13, 1)},
520 {"ld8.bias.nta", LDINCIMMED (0x13, 3)},
521 {"ld1.acq", LDINCIMMED (0x14, 0)},
522 {"ld1.acq.nt1", LDINCIMMED (0x14, 1)},
523 {"ld1.acq.nta", LDINCIMMED (0x14, 3)},
524 {"ld2.acq", LDINCIMMED (0x15, 0)},
525 {"ld2.acq.nt1", LDINCIMMED (0x15, 1)},
526 {"ld2.acq.nta", LDINCIMMED (0x15, 3)},
527 {"ld4.acq", LDINCIMMED (0x16, 0)},
528 {"ld4.acq.nt1", LDINCIMMED (0x16, 1)},
529 {"ld4.acq.nta", LDINCIMMED (0x16, 3)},
530 {"ld8.acq", LDINCIMMED (0x17, 0)},
531 {"ld8.acq.nt1", LDINCIMMED (0x17, 1)},
532 {"ld8.acq.nta", LDINCIMMED (0x17, 3)},
533 {"ld8.fill", LDINCIMMED (0x1b, 0)},
534 {"ld8.fill.nt1", LDINCIMMED (0x1b, 1)},
535 {"ld8.fill.nta", LDINCIMMED (0x1b, 3)},
536 {"ld1.c.clr", LDINCIMMED (0x20, 0)},
537 {"ld1.c.clr.nt1", LDINCIMMED (0x20, 1)},
538 {"ld1.c.clr.nta", LDINCIMMED (0x20, 3)},
539 {"ld2.c.clr", LDINCIMMED (0x21, 0)},
540 {"ld2.c.clr.nt1", LDINCIMMED (0x21, 1)},
541 {"ld2.c.clr.nta", LDINCIMMED (0x21, 3)},
542 {"ld4.c.clr", LDINCIMMED (0x22, 0)},
543 {"ld4.c.clr.nt1", LDINCIMMED (0x22, 1)},
544 {"ld4.c.clr.nta", LDINCIMMED (0x22, 3)},
545 {"ld8.c.clr", LDINCIMMED (0x23, 0)},
546 {"ld8.c.clr.nt1", LDINCIMMED (0x23, 1)},
547 {"ld8.c.clr.nta", LDINCIMMED (0x23, 3)},
548 {"ld1.c.nc", LDINCIMMED (0x24, 0)},
549 {"ld1.c.nc.nt1", LDINCIMMED (0x24, 1)},
550 {"ld1.c.nc.nta", LDINCIMMED (0x24, 3)},
551 {"ld2.c.nc", LDINCIMMED (0x25, 0)},
552 {"ld2.c.nc.nt1", LDINCIMMED (0x25, 1)},
553 {"ld2.c.nc.nta", LDINCIMMED (0x25, 3)},
554 {"ld4.c.nc", LDINCIMMED (0x26, 0)},
555 {"ld4.c.nc.nt1", LDINCIMMED (0x26, 1)},
556 {"ld4.c.nc.nta", LDINCIMMED (0x26, 3)},
557 {"ld8.c.nc", LDINCIMMED (0x27, 0)},
558 {"ld8.c.nc.nt1", LDINCIMMED (0x27, 1)},
559 {"ld8.c.nc.nta", LDINCIMMED (0x27, 3)},
560 {"ld1.c.clr.acq", LDINCIMMED (0x28, 0)},
561 {"ld1.c.clr.acq.nt1", LDINCIMMED (0x28, 1)},
562 {"ld1.c.clr.acq.nta", LDINCIMMED (0x28, 3)},
563 {"ld2.c.clr.acq", LDINCIMMED (0x29, 0)},
564 {"ld2.c.clr.acq.nt1", LDINCIMMED (0x29, 1)},
565 {"ld2.c.clr.acq.nta", LDINCIMMED (0x29, 3)},
566 {"ld4.c.clr.acq", LDINCIMMED (0x2a, 0)},
567 {"ld4.c.clr.acq.nt1", LDINCIMMED (0x2a, 1)},
568 {"ld4.c.clr.acq.nta", LDINCIMMED (0x2a, 3)},
569 {"ld8.c.clr.acq", LDINCIMMED (0x2b, 0)},
570 {"ld8.c.clr.acq.nt1", LDINCIMMED (0x2b, 1)},
571 {"ld8.c.clr.acq.nta", LDINCIMMED (0x2b, 3)},
572 #undef LDINCIMMED
574 /* Store w/increment by immediate. */
575 #define STINCIMMED(c,h) M, OpX6aHint (5, c, h), {MR3, R2, IMM9a}, POSTINC, 0, NULL
576 {"st1", STINCIMMED (0x30, 0)},
577 {"st1.nta", STINCIMMED (0x30, 3)},
578 {"st2", STINCIMMED (0x31, 0)},
579 {"st2.nta", STINCIMMED (0x31, 3)},
580 {"st4", STINCIMMED (0x32, 0)},
581 {"st4.nta", STINCIMMED (0x32, 3)},
582 {"st8", STINCIMMED (0x33, 0)},
583 {"st8.nta", STINCIMMED (0x33, 3)},
584 {"st1.rel", STINCIMMED (0x34, 0)},
585 {"st1.rel.nta", STINCIMMED (0x34, 3)},
586 {"st2.rel", STINCIMMED (0x35, 0)},
587 {"st2.rel.nta", STINCIMMED (0x35, 3)},
588 {"st4.rel", STINCIMMED (0x36, 0)},
589 {"st4.rel.nta", STINCIMMED (0x36, 3)},
590 {"st8.rel", STINCIMMED (0x37, 0)},
591 {"st8.rel.nta", STINCIMMED (0x37, 3)},
592 {"st8.spill", STINCIMMED (0x3b, 0)},
593 {"st8.spill.nta", STINCIMMED (0x3b, 3)},
594 #undef STINCIMMED
596 /* Floating-point load. */
597 {"ldfs", M, OpMXX6aHint (6, 0, 0, 0x02, 0), {F1, MR3}, EMPTY},
598 {"ldfs.nt1", M, OpMXX6aHint (6, 0, 0, 0x02, 1), {F1, MR3}, EMPTY},
599 {"ldfs.nta", M, OpMXX6aHint (6, 0, 0, 0x02, 3), {F1, MR3}, EMPTY},
600 {"ldfd", M, OpMXX6aHint (6, 0, 0, 0x03, 0), {F1, MR3}, EMPTY},
601 {"ldfd.nt1", M, OpMXX6aHint (6, 0, 0, 0x03, 1), {F1, MR3}, EMPTY},
602 {"ldfd.nta", M, OpMXX6aHint (6, 0, 0, 0x03, 3), {F1, MR3}, EMPTY},
603 {"ldf8", M, OpMXX6aHint (6, 0, 0, 0x01, 0), {F1, MR3}, EMPTY},
604 {"ldf8.nt1", M, OpMXX6aHint (6, 0, 0, 0x01, 1), {F1, MR3}, EMPTY},
605 {"ldf8.nta", M, OpMXX6aHint (6, 0, 0, 0x01, 3), {F1, MR3}, EMPTY},
606 {"ldfe", M, OpMXX6aHint (6, 0, 0, 0x00, 0), {F1, MR3}, EMPTY},
607 {"ldfe.nt1", M, OpMXX6aHint (6, 0, 0, 0x00, 1), {F1, MR3}, EMPTY},
608 {"ldfe.nta", M, OpMXX6aHint (6, 0, 0, 0x00, 3), {F1, MR3}, EMPTY},
609 {"ldfs.s", M, OpMXX6aHint (6, 0, 0, 0x06, 0), {F1, MR3}, EMPTY},
610 {"ldfs.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x06, 1), {F1, MR3}, EMPTY},
611 {"ldfs.s.nta", M, OpMXX6aHint (6, 0, 0, 0x06, 3), {F1, MR3}, EMPTY},
612 {"ldfd.s", M, OpMXX6aHint (6, 0, 0, 0x07, 0), {F1, MR3}, EMPTY},
613 {"ldfd.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x07, 1), {F1, MR3}, EMPTY},
614 {"ldfd.s.nta", M, OpMXX6aHint (6, 0, 0, 0x07, 3), {F1, MR3}, EMPTY},
615 {"ldf8.s", M, OpMXX6aHint (6, 0, 0, 0x05, 0), {F1, MR3}, EMPTY},
616 {"ldf8.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x05, 1), {F1, MR3}, EMPTY},
617 {"ldf8.s.nta", M, OpMXX6aHint (6, 0, 0, 0x05, 3), {F1, MR3}, EMPTY},
618 {"ldfe.s", M, OpMXX6aHint (6, 0, 0, 0x04, 0), {F1, MR3}, EMPTY},
619 {"ldfe.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x04, 1), {F1, MR3}, EMPTY},
620 {"ldfe.s.nta", M, OpMXX6aHint (6, 0, 0, 0x04, 3), {F1, MR3}, EMPTY},
621 {"ldfs.a", M, OpMXX6aHint (6, 0, 0, 0x0a, 0), {F1, MR3}, EMPTY},
622 {"ldfs.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x0a, 1), {F1, MR3}, EMPTY},
623 {"ldfs.a.nta", M, OpMXX6aHint (6, 0, 0, 0x0a, 3), {F1, MR3}, EMPTY},
624 {"ldfd.a", M, OpMXX6aHint (6, 0, 0, 0x0b, 0), {F1, MR3}, EMPTY},
625 {"ldfd.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x0b, 1), {F1, MR3}, EMPTY},
626 {"ldfd.a.nta", M, OpMXX6aHint (6, 0, 0, 0x0b, 3), {F1, MR3}, EMPTY},
627 {"ldf8.a", M, OpMXX6aHint (6, 0, 0, 0x09, 0), {F1, MR3}, EMPTY},
628 {"ldf8.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x09, 1), {F1, MR3}, EMPTY},
629 {"ldf8.a.nta", M, OpMXX6aHint (6, 0, 0, 0x09, 3), {F1, MR3}, EMPTY},
630 {"ldfe.a", M, OpMXX6aHint (6, 0, 0, 0x08, 0), {F1, MR3}, EMPTY},
631 {"ldfe.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x08, 1), {F1, MR3}, EMPTY},
632 {"ldfe.a.nta", M, OpMXX6aHint (6, 0, 0, 0x08, 3), {F1, MR3}, EMPTY},
633 {"ldfs.sa", M, OpMXX6aHint (6, 0, 0, 0x0e, 0), {F1, MR3}, EMPTY},
634 {"ldfs.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0e, 1), {F1, MR3}, EMPTY},
635 {"ldfs.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0e, 3), {F1, MR3}, EMPTY},
636 {"ldfd.sa", M, OpMXX6aHint (6, 0, 0, 0x0f, 0), {F1, MR3}, EMPTY},
637 {"ldfd.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0f, 1), {F1, MR3}, EMPTY},
638 {"ldfd.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0f, 3), {F1, MR3}, EMPTY},
639 {"ldf8.sa", M, OpMXX6aHint (6, 0, 0, 0x0d, 0), {F1, MR3}, EMPTY},
640 {"ldf8.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0d, 1), {F1, MR3}, EMPTY},
641 {"ldf8.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0d, 3), {F1, MR3}, EMPTY},
642 {"ldfe.sa", M, OpMXX6aHint (6, 0, 0, 0x0c, 0), {F1, MR3}, EMPTY},
643 {"ldfe.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0c, 1), {F1, MR3}, EMPTY},
644 {"ldfe.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0c, 3), {F1, MR3}, EMPTY},
645 {"ldf.fill", M, OpMXX6aHint (6, 0, 0, 0x1b, 0), {F1, MR3}, EMPTY},
646 {"ldf.fill.nt1", M, OpMXX6aHint (6, 0, 0, 0x1b, 1), {F1, MR3}, EMPTY},
647 {"ldf.fill.nta", M, OpMXX6aHint (6, 0, 0, 0x1b, 3), {F1, MR3}, EMPTY},
648 {"ldfs.c.clr", M, OpMXX6aHint (6, 0, 0, 0x22, 0), {F1, MR3}, EMPTY},
649 {"ldfs.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x22, 1), {F1, MR3}, EMPTY},
650 {"ldfs.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x22, 3), {F1, MR3}, EMPTY},
651 {"ldfd.c.clr", M, OpMXX6aHint (6, 0, 0, 0x23, 0), {F1, MR3}, EMPTY},
652 {"ldfd.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x23, 1), {F1, MR3}, EMPTY},
653 {"ldfd.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x23, 3), {F1, MR3}, EMPTY},
654 {"ldf8.c.clr", M, OpMXX6aHint (6, 0, 0, 0x21, 0), {F1, MR3}, EMPTY},
655 {"ldf8.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x21, 1), {F1, MR3}, EMPTY},
656 {"ldf8.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x21, 3), {F1, MR3}, EMPTY},
657 {"ldfe.c.clr", M, OpMXX6aHint (6, 0, 0, 0x20, 0), {F1, MR3}, EMPTY},
658 {"ldfe.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x20, 1), {F1, MR3}, EMPTY},
659 {"ldfe.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x20, 3), {F1, MR3}, EMPTY},
660 {"ldfs.c.nc", M, OpMXX6aHint (6, 0, 0, 0x26, 0), {F1, MR3}, EMPTY},
661 {"ldfs.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x26, 1), {F1, MR3}, EMPTY},
662 {"ldfs.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x26, 3), {F1, MR3}, EMPTY},
663 {"ldfd.c.nc", M, OpMXX6aHint (6, 0, 0, 0x27, 0), {F1, MR3}, EMPTY},
664 {"ldfd.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x27, 1), {F1, MR3}, EMPTY},
665 {"ldfd.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x27, 3), {F1, MR3}, EMPTY},
666 {"ldf8.c.nc", M, OpMXX6aHint (6, 0, 0, 0x25, 0), {F1, MR3}, EMPTY},
667 {"ldf8.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x25, 1), {F1, MR3}, EMPTY},
668 {"ldf8.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x25, 3), {F1, MR3}, EMPTY},
669 {"ldfe.c.nc", M, OpMXX6aHint (6, 0, 0, 0x24, 0), {F1, MR3}, EMPTY},
670 {"ldfe.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x24, 1), {F1, MR3}, EMPTY},
671 {"ldfe.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x24, 3), {F1, MR3}, EMPTY},
673 /* Floating-point load w/increment by register. */
674 #define FLDINCREG(c,h) M, OpMXX6aHint (6, 1, 0, c, h), {F1, MR3, R2}, POSTINC, 0, NULL
675 {"ldfs", FLDINCREG (0x02, 0)},
676 {"ldfs.nt1", FLDINCREG (0x02, 1)},
677 {"ldfs.nta", FLDINCREG (0x02, 3)},
678 {"ldfd", FLDINCREG (0x03, 0)},
679 {"ldfd.nt1", FLDINCREG (0x03, 1)},
680 {"ldfd.nta", FLDINCREG (0x03, 3)},
681 {"ldf8", FLDINCREG (0x01, 0)},
682 {"ldf8.nt1", FLDINCREG (0x01, 1)},
683 {"ldf8.nta", FLDINCREG (0x01, 3)},
684 {"ldfe", FLDINCREG (0x00, 0)},
685 {"ldfe.nt1", FLDINCREG (0x00, 1)},
686 {"ldfe.nta", FLDINCREG (0x00, 3)},
687 {"ldfs.s", FLDINCREG (0x06, 0)},
688 {"ldfs.s.nt1", FLDINCREG (0x06, 1)},
689 {"ldfs.s.nta", FLDINCREG (0x06, 3)},
690 {"ldfd.s", FLDINCREG (0x07, 0)},
691 {"ldfd.s.nt1", FLDINCREG (0x07, 1)},
692 {"ldfd.s.nta", FLDINCREG (0x07, 3)},
693 {"ldf8.s", FLDINCREG (0x05, 0)},
694 {"ldf8.s.nt1", FLDINCREG (0x05, 1)},
695 {"ldf8.s.nta", FLDINCREG (0x05, 3)},
696 {"ldfe.s", FLDINCREG (0x04, 0)},
697 {"ldfe.s.nt1", FLDINCREG (0x04, 1)},
698 {"ldfe.s.nta", FLDINCREG (0x04, 3)},
699 {"ldfs.a", FLDINCREG (0x0a, 0)},
700 {"ldfs.a.nt1", FLDINCREG (0x0a, 1)},
701 {"ldfs.a.nta", FLDINCREG (0x0a, 3)},
702 {"ldfd.a", FLDINCREG (0x0b, 0)},
703 {"ldfd.a.nt1", FLDINCREG (0x0b, 1)},
704 {"ldfd.a.nta", FLDINCREG (0x0b, 3)},
705 {"ldf8.a", FLDINCREG (0x09, 0)},
706 {"ldf8.a.nt1", FLDINCREG (0x09, 1)},
707 {"ldf8.a.nta", FLDINCREG (0x09, 3)},
708 {"ldfe.a", FLDINCREG (0x08, 0)},
709 {"ldfe.a.nt1", FLDINCREG (0x08, 1)},
710 {"ldfe.a.nta", FLDINCREG (0x08, 3)},
711 {"ldfs.sa", FLDINCREG (0x0e, 0)},
712 {"ldfs.sa.nt1", FLDINCREG (0x0e, 1)},
713 {"ldfs.sa.nta", FLDINCREG (0x0e, 3)},
714 {"ldfd.sa", FLDINCREG (0x0f, 0)},
715 {"ldfd.sa.nt1", FLDINCREG (0x0f, 1)},
716 {"ldfd.sa.nta", FLDINCREG (0x0f, 3)},
717 {"ldf8.sa", FLDINCREG (0x0d, 0)},
718 {"ldf8.sa.nt1", FLDINCREG (0x0d, 1)},
719 {"ldf8.sa.nta", FLDINCREG (0x0d, 3)},
720 {"ldfe.sa", FLDINCREG (0x0c, 0)},
721 {"ldfe.sa.nt1", FLDINCREG (0x0c, 1)},
722 {"ldfe.sa.nta", FLDINCREG (0x0c, 3)},
723 {"ldf.fill", FLDINCREG (0x1b, 0)},
724 {"ldf.fill.nt1", FLDINCREG (0x1b, 1)},
725 {"ldf.fill.nta", FLDINCREG (0x1b, 3)},
726 {"ldfs.c.clr", FLDINCREG (0x22, 0)},
727 {"ldfs.c.clr.nt1", FLDINCREG (0x22, 1)},
728 {"ldfs.c.clr.nta", FLDINCREG (0x22, 3)},
729 {"ldfd.c.clr", FLDINCREG (0x23, 0)},
730 {"ldfd.c.clr.nt1", FLDINCREG (0x23, 1)},
731 {"ldfd.c.clr.nta", FLDINCREG (0x23, 3)},
732 {"ldf8.c.clr", FLDINCREG (0x21, 0)},
733 {"ldf8.c.clr.nt1", FLDINCREG (0x21, 1)},
734 {"ldf8.c.clr.nta", FLDINCREG (0x21, 3)},
735 {"ldfe.c.clr", FLDINCREG (0x20, 0)},
736 {"ldfe.c.clr.nt1", FLDINCREG (0x20, 1)},
737 {"ldfe.c.clr.nta", FLDINCREG (0x20, 3)},
738 {"ldfs.c.nc", FLDINCREG (0x26, 0)},
739 {"ldfs.c.nc.nt1", FLDINCREG (0x26, 1)},
740 {"ldfs.c.nc.nta", FLDINCREG (0x26, 3)},
741 {"ldfd.c.nc", FLDINCREG (0x27, 0)},
742 {"ldfd.c.nc.nt1", FLDINCREG (0x27, 1)},
743 {"ldfd.c.nc.nta", FLDINCREG (0x27, 3)},
744 {"ldf8.c.nc", FLDINCREG (0x25, 0)},
745 {"ldf8.c.nc.nt1", FLDINCREG (0x25, 1)},
746 {"ldf8.c.nc.nta", FLDINCREG (0x25, 3)},
747 {"ldfe.c.nc", FLDINCREG (0x24, 0)},
748 {"ldfe.c.nc.nt1", FLDINCREG (0x24, 1)},
749 {"ldfe.c.nc.nta", FLDINCREG (0x24, 3)},
750 #undef FLDINCREG
752 /* Floating-point store. */
753 {"stfs", M, OpMXX6aHint (6, 0, 0, 0x32, 0), {MR3, F2}, EMPTY},
754 {"stfs.nta", M, OpMXX6aHint (6, 0, 0, 0x32, 3), {MR3, F2}, EMPTY},
755 {"stfd", M, OpMXX6aHint (6, 0, 0, 0x33, 0), {MR3, F2}, EMPTY},
756 {"stfd.nta", M, OpMXX6aHint (6, 0, 0, 0x33, 3), {MR3, F2}, EMPTY},
757 {"stf8", M, OpMXX6aHint (6, 0, 0, 0x31, 0), {MR3, F2}, EMPTY},
758 {"stf8.nta", M, OpMXX6aHint (6, 0, 0, 0x31, 3), {MR3, F2}, EMPTY},
759 {"stfe", M, OpMXX6aHint (6, 0, 0, 0x30, 0), {MR3, F2}, EMPTY},
760 {"stfe.nta", M, OpMXX6aHint (6, 0, 0, 0x30, 3), {MR3, F2}, EMPTY},
761 {"stf.spill", M, OpMXX6aHint (6, 0, 0, 0x3b, 0), {MR3, F2}, EMPTY},
762 {"stf.spill.nta", M, OpMXX6aHint (6, 0, 0, 0x3b, 3), {MR3, F2}, EMPTY},
764 /* Floating-point load pair. */
765 {"ldfps", M2, OpMXX6aHint (6, 0, 1, 0x02, 0), {F1, F2, MR3}, EMPTY},
766 {"ldfps.nt1", M2, OpMXX6aHint (6, 0, 1, 0x02, 1), {F1, F2, MR3}, EMPTY},
767 {"ldfps.nta", M2, OpMXX6aHint (6, 0, 1, 0x02, 3), {F1, F2, MR3}, EMPTY},
768 {"ldfpd", M2, OpMXX6aHint (6, 0, 1, 0x03, 0), {F1, F2, MR3}, EMPTY},
769 {"ldfpd.nt1", M2, OpMXX6aHint (6, 0, 1, 0x03, 1), {F1, F2, MR3}, EMPTY},
770 {"ldfpd.nta", M2, OpMXX6aHint (6, 0, 1, 0x03, 3), {F1, F2, MR3}, EMPTY},
771 {"ldfp8", M2, OpMXX6aHint (6, 0, 1, 0x01, 0), {F1, F2, MR3}, EMPTY},
772 {"ldfp8.nt1", M2, OpMXX6aHint (6, 0, 1, 0x01, 1), {F1, F2, MR3}, EMPTY},
773 {"ldfp8.nta", M2, OpMXX6aHint (6, 0, 1, 0x01, 3), {F1, F2, MR3}, EMPTY},
774 {"ldfps.s", M2, OpMXX6aHint (6, 0, 1, 0x06, 0), {F1, F2, MR3}, EMPTY},
775 {"ldfps.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x06, 1), {F1, F2, MR3}, EMPTY},
776 {"ldfps.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x06, 3), {F1, F2, MR3}, EMPTY},
777 {"ldfpd.s", M2, OpMXX6aHint (6, 0, 1, 0x07, 0), {F1, F2, MR3}, EMPTY},
778 {"ldfpd.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x07, 1), {F1, F2, MR3}, EMPTY},
779 {"ldfpd.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x07, 3), {F1, F2, MR3}, EMPTY},
780 {"ldfp8.s", M2, OpMXX6aHint (6, 0, 1, 0x05, 0), {F1, F2, MR3}, EMPTY},
781 {"ldfp8.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x05, 1), {F1, F2, MR3}, EMPTY},
782 {"ldfp8.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x05, 3), {F1, F2, MR3}, EMPTY},
783 {"ldfps.a", M2, OpMXX6aHint (6, 0, 1, 0x0a, 0), {F1, F2, MR3}, EMPTY},
784 {"ldfps.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0a, 1), {F1, F2, MR3}, EMPTY},
785 {"ldfps.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x0a, 3), {F1, F2, MR3}, EMPTY},
786 {"ldfpd.a", M2, OpMXX6aHint (6, 0, 1, 0x0b, 0), {F1, F2, MR3}, EMPTY},
787 {"ldfpd.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0b, 1), {F1, F2, MR3}, EMPTY},
788 {"ldfpd.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x0b, 3), {F1, F2, MR3}, EMPTY},
789 {"ldfp8.a", M2, OpMXX6aHint (6, 0, 1, 0x09, 0), {F1, F2, MR3}, EMPTY},
790 {"ldfp8.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x09, 1), {F1, F2, MR3}, EMPTY},
791 {"ldfp8.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x09, 3), {F1, F2, MR3}, EMPTY},
792 {"ldfps.sa", M2, OpMXX6aHint (6, 0, 1, 0x0e, 0), {F1, F2, MR3}, EMPTY},
793 {"ldfps.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0e, 1), {F1, F2, MR3}, EMPTY},
794 {"ldfps.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0e, 3), {F1, F2, MR3}, EMPTY},
795 {"ldfpd.sa", M2, OpMXX6aHint (6, 0, 1, 0x0f, 0), {F1, F2, MR3}, EMPTY},
796 {"ldfpd.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0f, 1), {F1, F2, MR3}, EMPTY},
797 {"ldfpd.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0f, 3), {F1, F2, MR3}, EMPTY},
798 {"ldfp8.sa", M2, OpMXX6aHint (6, 0, 1, 0x0d, 0), {F1, F2, MR3}, EMPTY},
799 {"ldfp8.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0d, 1), {F1, F2, MR3}, EMPTY},
800 {"ldfp8.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0d, 3), {F1, F2, MR3}, EMPTY},
801 {"ldfps.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x22, 0), {F1, F2, MR3}, EMPTY},
802 {"ldfps.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x22, 1), {F1, F2, MR3}, EMPTY},
803 {"ldfps.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x22, 3), {F1, F2, MR3}, EMPTY},
804 {"ldfpd.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x23, 0), {F1, F2, MR3}, EMPTY},
805 {"ldfpd.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x23, 1), {F1, F2, MR3}, EMPTY},
806 {"ldfpd.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x23, 3), {F1, F2, MR3}, EMPTY},
807 {"ldfp8.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x21, 0), {F1, F2, MR3}, EMPTY},
808 {"ldfp8.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x21, 1), {F1, F2, MR3}, EMPTY},
809 {"ldfp8.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x21, 3), {F1, F2, MR3}, EMPTY},
810 {"ldfps.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x26, 0), {F1, F2, MR3}, EMPTY},
811 {"ldfps.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x26, 1), {F1, F2, MR3}, EMPTY},
812 {"ldfps.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x26, 3), {F1, F2, MR3}, EMPTY},
813 {"ldfpd.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x27, 0), {F1, F2, MR3}, EMPTY},
814 {"ldfpd.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x27, 1), {F1, F2, MR3}, EMPTY},
815 {"ldfpd.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x27, 3), {F1, F2, MR3}, EMPTY},
816 {"ldfp8.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x25, 0), {F1, F2, MR3}, EMPTY},
817 {"ldfp8.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x25, 1), {F1, F2, MR3}, EMPTY},
818 {"ldfp8.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x25, 3), {F1, F2, MR3}, EMPTY},
820 /* Floating-point load pair w/increment by immediate. */
821 #define LD(a,b,c) M2, OpMXX6aHint (6, 1, 1, a, b), {F1, F2, MR3, c}, POSTINC, 0, NULL
822 {"ldfps", LD (0x02, 0, C8)},
823 {"ldfps.nt1", LD (0x02, 1, C8)},
824 {"ldfps.nta", LD (0x02, 3, C8)},
825 {"ldfpd", LD (0x03, 0, C16)},
826 {"ldfpd.nt1", LD (0x03, 1, C16)},
827 {"ldfpd.nta", LD (0x03, 3, C16)},
828 {"ldfp8", LD (0x01, 0, C16)},
829 {"ldfp8.nt1", LD (0x01, 1, C16)},
830 {"ldfp8.nta", LD (0x01, 3, C16)},
831 {"ldfps.s", LD (0x06, 0, C8)},
832 {"ldfps.s.nt1", LD (0x06, 1, C8)},
833 {"ldfps.s.nta", LD (0x06, 3, C8)},
834 {"ldfpd.s", LD (0x07, 0, C16)},
835 {"ldfpd.s.nt1", LD (0x07, 1, C16)},
836 {"ldfpd.s.nta", LD (0x07, 3, C16)},
837 {"ldfp8.s", LD (0x05, 0, C16)},
838 {"ldfp8.s.nt1", LD (0x05, 1, C16)},
839 {"ldfp8.s.nta", LD (0x05, 3, C16)},
840 {"ldfps.a", LD (0x0a, 0, C8)},
841 {"ldfps.a.nt1", LD (0x0a, 1, C8)},
842 {"ldfps.a.nta", LD (0x0a, 3, C8)},
843 {"ldfpd.a", LD (0x0b, 0, C16)},
844 {"ldfpd.a.nt1", LD (0x0b, 1, C16)},
845 {"ldfpd.a.nta", LD (0x0b, 3, C16)},
846 {"ldfp8.a", LD (0x09, 0, C16)},
847 {"ldfp8.a.nt1", LD (0x09, 1, C16)},
848 {"ldfp8.a.nta", LD (0x09, 3, C16)},
849 {"ldfps.sa", LD (0x0e, 0, C8)},
850 {"ldfps.sa.nt1", LD (0x0e, 1, C8)},
851 {"ldfps.sa.nta", LD (0x0e, 3, C8)},
852 {"ldfpd.sa", LD (0x0f, 0, C16)},
853 {"ldfpd.sa.nt1", LD (0x0f, 1, C16)},
854 {"ldfpd.sa.nta", LD (0x0f, 3, C16)},
855 {"ldfp8.sa", LD (0x0d, 0, C16)},
856 {"ldfp8.sa.nt1", LD (0x0d, 1, C16)},
857 {"ldfp8.sa.nta", LD (0x0d, 3, C16)},
858 {"ldfps.c.clr", LD (0x22, 0, C8)},
859 {"ldfps.c.clr.nt1", LD (0x22, 1, C8)},
860 {"ldfps.c.clr.nta", LD (0x22, 3, C8)},
861 {"ldfpd.c.clr", LD (0x23, 0, C16)},
862 {"ldfpd.c.clr.nt1", LD (0x23, 1, C16)},
863 {"ldfpd.c.clr.nta", LD (0x23, 3, C16)},
864 {"ldfp8.c.clr", LD (0x21, 0, C16)},
865 {"ldfp8.c.clr.nt1", LD (0x21, 1, C16)},
866 {"ldfp8.c.clr.nta", LD (0x21, 3, C16)},
867 {"ldfps.c.nc", LD (0x26, 0, C8)},
868 {"ldfps.c.nc.nt1", LD (0x26, 1, C8)},
869 {"ldfps.c.nc.nta", LD (0x26, 3, C8)},
870 {"ldfpd.c.nc", LD (0x27, 0, C16)},
871 {"ldfpd.c.nc.nt1", LD (0x27, 1, C16)},
872 {"ldfpd.c.nc.nta", LD (0x27, 3, C16)},
873 {"ldfp8.c.nc", LD (0x25, 0, C16)},
874 {"ldfp8.c.nc.nt1", LD (0x25, 1, C16)},
875 {"ldfp8.c.nc.nta", LD (0x25, 3, C16)},
876 #undef LD
878 /* Line prefetch. */
879 {"lfetch", M0, OpMXX6aHint (6, 0, 0, 0x2c, 0), {MR3}, EMPTY},
880 {"lfetch.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2c, 1), {MR3}, EMPTY},
881 {"lfetch.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2c, 2), {MR3}, EMPTY},
882 {"lfetch.nta", M0, OpMXX6aHint (6, 0, 0, 0x2c, 3), {MR3}, EMPTY},
883 {"lfetch.excl", M0, OpMXX6aHint (6, 0, 0, 0x2d, 0), {MR3}, EMPTY},
884 {"lfetch.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2d, 1), {MR3}, EMPTY},
885 {"lfetch.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2d, 2), {MR3}, EMPTY},
886 {"lfetch.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2d, 3), {MR3}, EMPTY},
887 {"lfetch.fault", M0, OpMXX6aHint (6, 0, 0, 0x2e, 0), {MR3}, EMPTY},
888 {"lfetch.fault.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2e, 1), {MR3}, EMPTY},
889 {"lfetch.fault.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2e, 2), {MR3}, EMPTY},
890 {"lfetch.fault.nta", M0, OpMXX6aHint (6, 0, 0, 0x2e, 3), {MR3}, EMPTY},
891 {"lfetch.fault.excl", M0, OpMXX6aHint (6, 0, 0, 0x2f, 0), {MR3}, EMPTY},
892 {"lfetch.fault.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2f, 1), {MR3}, EMPTY},
893 {"lfetch.fault.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2f, 2), {MR3}, EMPTY},
894 {"lfetch.fault.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2f, 3), {MR3}, EMPTY},
896 /* Line prefetch w/increment by register. */
897 #define LFETCHINCREG(c,h) M0, OpMXX6aHint (6, 1, 0, c, h), {MR3, R2}, POSTINC, 0, NULL
898 {"lfetch", LFETCHINCREG (0x2c, 0)},
899 {"lfetch.nt1", LFETCHINCREG (0x2c, 1)},
900 {"lfetch.nt2", LFETCHINCREG (0x2c, 2)},
901 {"lfetch.nta", LFETCHINCREG (0x2c, 3)},
902 {"lfetch.excl", LFETCHINCREG (0x2d, 0)},
903 {"lfetch.excl.nt1", LFETCHINCREG (0x2d, 1)},
904 {"lfetch.excl.nt2", LFETCHINCREG (0x2d, 2)},
905 {"lfetch.excl.nta", LFETCHINCREG (0x2d, 3)},
906 {"lfetch.fault", LFETCHINCREG (0x2e, 0)},
907 {"lfetch.fault.nt1", LFETCHINCREG (0x2e, 1)},
908 {"lfetch.fault.nt2", LFETCHINCREG (0x2e, 2)},
909 {"lfetch.fault.nta", LFETCHINCREG (0x2e, 3)},
910 {"lfetch.fault.excl", LFETCHINCREG (0x2f, 0)},
911 {"lfetch.fault.excl.nt1", LFETCHINCREG (0x2f, 1)},
912 {"lfetch.fault.excl.nt2", LFETCHINCREG (0x2f, 2)},
913 {"lfetch.fault.excl.nta", LFETCHINCREG (0x2f, 3)},
914 #undef LFETCHINCREG
916 /* Semaphore operations. */
917 {"setf.sig", M, OpMXX6a (6, 0, 1, 0x1c), {F1, R2}, EMPTY},
918 {"setf.exp", M, OpMXX6a (6, 0, 1, 0x1d), {F1, R2}, EMPTY},
919 {"setf.s", M, OpMXX6a (6, 0, 1, 0x1e), {F1, R2}, EMPTY},
920 {"setf.d", M, OpMXX6a (6, 0, 1, 0x1f), {F1, R2}, EMPTY},
922 /* Floating-point load w/increment by immediate. */
923 #define FLDINCIMMED(c,h) M, OpX6aHint (7, c, h), {F1, MR3, IMM9b}, POSTINC, 0, NULL
924 {"ldfs", FLDINCIMMED (0x02, 0)},
925 {"ldfs.nt1", FLDINCIMMED (0x02, 1)},
926 {"ldfs.nta", FLDINCIMMED (0x02, 3)},
927 {"ldfd", FLDINCIMMED (0x03, 0)},
928 {"ldfd.nt1", FLDINCIMMED (0x03, 1)},
929 {"ldfd.nta", FLDINCIMMED (0x03, 3)},
930 {"ldf8", FLDINCIMMED (0x01, 0)},
931 {"ldf8.nt1", FLDINCIMMED (0x01, 1)},
932 {"ldf8.nta", FLDINCIMMED (0x01, 3)},
933 {"ldfe", FLDINCIMMED (0x00, 0)},
934 {"ldfe.nt1", FLDINCIMMED (0x00, 1)},
935 {"ldfe.nta", FLDINCIMMED (0x00, 3)},
936 {"ldfs.s", FLDINCIMMED (0x06, 0)},
937 {"ldfs.s.nt1", FLDINCIMMED (0x06, 1)},
938 {"ldfs.s.nta", FLDINCIMMED (0x06, 3)},
939 {"ldfd.s", FLDINCIMMED (0x07, 0)},
940 {"ldfd.s.nt1", FLDINCIMMED (0x07, 1)},
941 {"ldfd.s.nta", FLDINCIMMED (0x07, 3)},
942 {"ldf8.s", FLDINCIMMED (0x05, 0)},
943 {"ldf8.s.nt1", FLDINCIMMED (0x05, 1)},
944 {"ldf8.s.nta", FLDINCIMMED (0x05, 3)},
945 {"ldfe.s", FLDINCIMMED (0x04, 0)},
946 {"ldfe.s.nt1", FLDINCIMMED (0x04, 1)},
947 {"ldfe.s.nta", FLDINCIMMED (0x04, 3)},
948 {"ldfs.a", FLDINCIMMED (0x0a, 0)},
949 {"ldfs.a.nt1", FLDINCIMMED (0x0a, 1)},
950 {"ldfs.a.nta", FLDINCIMMED (0x0a, 3)},
951 {"ldfd.a", FLDINCIMMED (0x0b, 0)},
952 {"ldfd.a.nt1", FLDINCIMMED (0x0b, 1)},
953 {"ldfd.a.nta", FLDINCIMMED (0x0b, 3)},
954 {"ldf8.a", FLDINCIMMED (0x09, 0)},
955 {"ldf8.a.nt1", FLDINCIMMED (0x09, 1)},
956 {"ldf8.a.nta", FLDINCIMMED (0x09, 3)},
957 {"ldfe.a", FLDINCIMMED (0x08, 0)},
958 {"ldfe.a.nt1", FLDINCIMMED (0x08, 1)},
959 {"ldfe.a.nta", FLDINCIMMED (0x08, 3)},
960 {"ldfs.sa", FLDINCIMMED (0x0e, 0)},
961 {"ldfs.sa.nt1", FLDINCIMMED (0x0e, 1)},
962 {"ldfs.sa.nta", FLDINCIMMED (0x0e, 3)},
963 {"ldfd.sa", FLDINCIMMED (0x0f, 0)},
964 {"ldfd.sa.nt1", FLDINCIMMED (0x0f, 1)},
965 {"ldfd.sa.nta", FLDINCIMMED (0x0f, 3)},
966 {"ldf8.sa", FLDINCIMMED (0x0d, 0)},
967 {"ldf8.sa.nt1", FLDINCIMMED (0x0d, 1)},
968 {"ldf8.sa.nta", FLDINCIMMED (0x0d, 3)},
969 {"ldfe.sa", FLDINCIMMED (0x0c, 0)},
970 {"ldfe.sa.nt1", FLDINCIMMED (0x0c, 1)},
971 {"ldfe.sa.nta", FLDINCIMMED (0x0c, 3)},
972 {"ldf.fill", FLDINCIMMED (0x1b, 0)},
973 {"ldf.fill.nt1", FLDINCIMMED (0x1b, 1)},
974 {"ldf.fill.nta", FLDINCIMMED (0x1b, 3)},
975 {"ldfs.c.clr", FLDINCIMMED (0x22, 0)},
976 {"ldfs.c.clr.nt1", FLDINCIMMED (0x22, 1)},
977 {"ldfs.c.clr.nta", FLDINCIMMED (0x22, 3)},
978 {"ldfd.c.clr", FLDINCIMMED (0x23, 0)},
979 {"ldfd.c.clr.nt1", FLDINCIMMED (0x23, 1)},
980 {"ldfd.c.clr.nta", FLDINCIMMED (0x23, 3)},
981 {"ldf8.c.clr", FLDINCIMMED (0x21, 0)},
982 {"ldf8.c.clr.nt1", FLDINCIMMED (0x21, 1)},
983 {"ldf8.c.clr.nta", FLDINCIMMED (0x21, 3)},
984 {"ldfe.c.clr", FLDINCIMMED (0x20, 0)},
985 {"ldfe.c.clr.nt1", FLDINCIMMED (0x20, 1)},
986 {"ldfe.c.clr.nta", FLDINCIMMED (0x20, 3)},
987 {"ldfs.c.nc", FLDINCIMMED (0x26, 0)},
988 {"ldfs.c.nc.nt1", FLDINCIMMED (0x26, 1)},
989 {"ldfs.c.nc.nta", FLDINCIMMED (0x26, 3)},
990 {"ldfd.c.nc", FLDINCIMMED (0x27, 0)},
991 {"ldfd.c.nc.nt1", FLDINCIMMED (0x27, 1)},
992 {"ldfd.c.nc.nta", FLDINCIMMED (0x27, 3)},
993 {"ldf8.c.nc", FLDINCIMMED (0x25, 0)},
994 {"ldf8.c.nc.nt1", FLDINCIMMED (0x25, 1)},
995 {"ldf8.c.nc.nta", FLDINCIMMED (0x25, 3)},
996 {"ldfe.c.nc", FLDINCIMMED (0x24, 0)},
997 {"ldfe.c.nc.nt1", FLDINCIMMED (0x24, 1)},
998 {"ldfe.c.nc.nta", FLDINCIMMED (0x24, 3)},
999 #undef FLDINCIMMED
1001 /* Floating-point store w/increment by immediate. */
1002 #define FSTINCIMMED(c,h) M, OpX6aHint (7, c, h), {MR3, F2, IMM9a}, POSTINC, 0, NULL
1003 {"stfs", FSTINCIMMED (0x32, 0)},
1004 {"stfs.nta", FSTINCIMMED (0x32, 3)},
1005 {"stfd", FSTINCIMMED (0x33, 0)},
1006 {"stfd.nta", FSTINCIMMED (0x33, 3)},
1007 {"stf8", FSTINCIMMED (0x31, 0)},
1008 {"stf8.nta", FSTINCIMMED (0x31, 3)},
1009 {"stfe", FSTINCIMMED (0x30, 0)},
1010 {"stfe.nta", FSTINCIMMED (0x30, 3)},
1011 {"stf.spill", FSTINCIMMED (0x3b, 0)},
1012 {"stf.spill.nta", FSTINCIMMED (0x3b, 3)},
1013 #undef FSTINCIMMED
1015 /* Line prefetch w/increment by immediate. */
1016 #define LFETCHINCIMMED(c,h) M0, OpX6aHint (7, c, h), {MR3, IMM9b}, POSTINC, 0, NULL
1017 {"lfetch", LFETCHINCIMMED (0x2c, 0)},
1018 {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1)},
1019 {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2)},
1020 {"lfetch.nta", LFETCHINCIMMED (0x2c, 3)},
1021 {"lfetch.excl", LFETCHINCIMMED (0x2d, 0)},
1022 {"lfetch.excl.nt1", LFETCHINCIMMED (0x2d, 1)},
1023 {"lfetch.excl.nt2", LFETCHINCIMMED (0x2d, 2)},
1024 {"lfetch.excl.nta", LFETCHINCIMMED (0x2d, 3)},
1025 {"lfetch.fault", LFETCHINCIMMED (0x2e, 0)},
1026 {"lfetch.fault.nt1", LFETCHINCIMMED (0x2e, 1)},
1027 {"lfetch.fault.nt2", LFETCHINCIMMED (0x2e, 2)},
1028 {"lfetch.fault.nta", LFETCHINCIMMED (0x2e, 3)},
1029 {"lfetch.fault.excl", LFETCHINCIMMED (0x2f, 0)},
1030 {"lfetch.fault.excl.nt1", LFETCHINCIMMED (0x2f, 1)},
1031 {"lfetch.fault.excl.nt2", LFETCHINCIMMED (0x2f, 2)},
1032 {"lfetch.fault.excl.nta", LFETCHINCIMMED (0x2f, 3)},
1033 #undef LFETCHINCIMMED
1035 {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
1038 #undef M0
1039 #undef M
1040 #undef M2
1041 #undef bM
1042 #undef bX
1043 #undef bX2
1044 #undef bX3
1045 #undef bX4
1046 #undef bX6a
1047 #undef bX6b
1048 #undef bHint
1049 #undef mM
1050 #undef mX
1051 #undef mX2
1052 #undef mX3
1053 #undef mX4
1054 #undef mX6a
1055 #undef mX6b
1056 #undef mHint
1057 #undef OpX3
1058 #undef OpX3X6b
1059 #undef OpX3X4
1060 #undef OpX3X4X2
1061 #undef OpX6aHint
1062 #undef OpXX6aHint
1063 #undef OpMXX6a
1064 #undef OpMXX6aHint
1065 #undef EMPTY