* config/tc-mcore.c (mcore_pool_count): New function.
[binutils.git] / opcodes / avr-dis.c
blobadc4680cd14bc85d006e9b77ab5ed13a81bdc19b
1 /* Disassemble AVR instructions.
2 Copyright 1999, 2000 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov <denisc@overta.ru>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20 #include <assert.h>
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "opintl.h"
24 #include "libiberty.h"
26 struct avr_opcodes_s
28 char *name;
29 char *constraints;
30 char *opcode;
31 int insn_size; /* in words */
32 int isa;
33 unsigned int bin_opcode;
36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
37 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
39 const struct avr_opcodes_s avr_opcodes[] =
41 #include "opcode/avr.h"
42 {NULL, NULL, NULL, 0, 0, 0}
45 static int avr_operand PARAMS ((unsigned int, unsigned int,
46 unsigned int, int, char *, char *, int));
48 static int
49 avr_operand (insn, insn2, pc, constraint, buf, comment, regs)
50 unsigned int insn;
51 unsigned int insn2;
52 unsigned int pc;
53 int constraint;
54 char *buf;
55 char *comment;
56 int regs;
58 int ok = 1;
60 switch (constraint)
62 /* Any register operand. */
63 case 'r':
64 if (regs)
65 insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* source register */
66 else
67 insn = (insn & 0x01f0) >> 4; /* destination register */
69 sprintf (buf, "r%d", insn);
70 break;
72 case 'd':
73 if (regs)
74 sprintf (buf, "r%d", 16 + (insn & 0xf));
75 else
76 sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
77 break;
79 case 'w':
80 sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
81 break;
83 case 'a':
84 if (regs)
85 sprintf (buf, "r%d", 16 + (insn & 7));
86 else
87 sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
88 break;
90 case 'v':
91 if (regs)
92 sprintf (buf, "r%d", (insn & 0xf) * 2);
93 else
94 sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
95 break;
97 case 'e':
99 char *xyz;
101 switch (insn & 0x100f)
103 case 0x0000: xyz = "Z"; break;
104 case 0x1001: xyz = "Z+"; break;
105 case 0x1002: xyz = "-Z"; break;
106 case 0x0008: xyz = "Y"; break;
107 case 0x1009: xyz = "Y+"; break;
108 case 0x100a: xyz = "-Y"; break;
109 case 0x100c: xyz = "X"; break;
110 case 0x100d: xyz = "X+"; break;
111 case 0x100e: xyz = "-X"; break;
112 default: xyz = "??"; ok = 0;
114 sprintf (buf, xyz);
116 if (AVR_UNDEF_P (insn))
117 sprintf (comment, _("undefined"));
119 break;
121 case 'z':
122 *buf++ = 'Z';
123 if (insn & 0x1)
124 *buf++ = '+';
125 *buf = '\0';
126 if (AVR_UNDEF_P (insn))
127 sprintf (comment, _("undefined"));
128 break;
130 case 'b':
132 unsigned int x;
134 x = (insn & 7);
135 x |= (insn >> 7) & (3 << 3);
136 x |= (insn >> 8) & (1 << 5);
138 if (insn & 0x8)
139 *buf++ = 'Y';
140 else
141 *buf++ = 'Z';
142 sprintf (buf, "+%d", x);
143 sprintf (comment, "0x%02x", x);
145 break;
147 case 'h':
148 sprintf (buf, "0x%x",
149 ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2);
150 break;
152 case 'L':
154 int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
155 sprintf (buf, ".%+-8d", rel_addr);
156 sprintf (comment, "0x%x", pc + 2 + rel_addr);
158 break;
160 case 'l':
162 int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
163 sprintf (buf, ".%+-8d", rel_addr);
164 sprintf (comment, "0x%x", pc + 2 + rel_addr);
166 break;
168 case 'i':
169 sprintf (buf, "0x%04X", insn2);
170 break;
172 case 'M':
173 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
174 sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
175 break;
177 case 'n':
178 sprintf (buf, "??");
179 fprintf (stderr, _("Internal disassembler error"));
180 ok = 0;
181 break;
183 case 'K':
185 unsigned int x;
187 x = (insn & 0xf) | ((insn >> 2) & 0x30);
188 sprintf (buf, "0x%02x", x);
189 sprintf (comment, "%d", x);
191 break;
193 case 's':
194 sprintf (buf, "%d", insn & 7);
195 break;
197 case 'S':
198 sprintf (buf, "%d", (insn >> 4) & 7);
199 break;
201 case 'P':
203 unsigned int x;
204 x = (insn & 0xf);
205 x |= (insn >> 5) & 0x30;
206 sprintf (buf, "0x%02x", x);
207 sprintf (comment, "%d", x);
209 break;
211 case 'p':
213 unsigned int x;
215 x = (insn >> 3) & 0x1f;
216 sprintf (buf, "0x%02x", x);
217 sprintf (comment, "%d", x);
219 break;
221 case '?':
222 *buf = '\0';
223 break;
225 default:
226 sprintf (buf, "??");
227 fprintf (stderr, _("unknown constraint `%c'"), constraint);
228 ok = 0;
231 return ok;
234 static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
236 static unsigned short
237 avrdis_opcode (addr, info)
238 bfd_vma addr;
239 disassemble_info *info;
241 bfd_byte buffer[2];
242 int status;
243 status = info->read_memory_func(addr, buffer, 2, info);
244 if (status != 0)
246 info->memory_error_func(status, addr, info);
247 return -1;
249 return bfd_getl16 (buffer);
254 print_insn_avr(addr, info)
255 bfd_vma addr;
256 disassemble_info *info;
258 unsigned int insn, insn2;
259 const struct avr_opcodes_s *opcode;
260 static unsigned int *maskptr;
261 void *stream = info->stream;
262 fprintf_ftype prin = info->fprintf_func;
263 static unsigned int *avr_bin_masks;
264 static int initialized;
265 int cmd_len = 2;
266 int ok = 0;
267 char op1[20], op2[20], comment1[40], comment2[40];
269 if (!initialized)
271 unsigned int nopcodes;
273 nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
275 avr_bin_masks = (unsigned int *)
276 xmalloc (nopcodes * sizeof (unsigned int));
278 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
279 opcode->name;
280 opcode++, maskptr++)
282 char * s;
283 unsigned int bin = 0;
284 unsigned int mask = 0;
286 for (s = opcode->opcode; *s; ++s)
288 bin <<= 1;
289 mask <<= 1;
290 bin |= (*s == '1');
291 mask |= (*s == '1' || *s == '0');
293 assert (s - opcode->opcode == 16);
294 assert (opcode->bin_opcode == bin);
295 *maskptr = mask;
298 initialized = 1;
301 insn = avrdis_opcode (addr, info);
303 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
304 opcode->name;
305 opcode++, maskptr++)
307 if ((insn & *maskptr) == opcode->bin_opcode)
308 break;
311 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
312 `std b+0,r' as `st b,r' (next entry in the table). */
314 if (AVR_DISP0_P (insn))
315 opcode++;
317 op1[0] = 0;
318 op2[0] = 0;
319 comment1[0] = 0;
320 comment2[0] = 0;
322 if (opcode->name)
324 char *op = opcode->constraints;
326 insn2 = 0;
327 ok = 1;
329 if (opcode->insn_size > 1)
331 insn2 = avrdis_opcode (addr + 2, info);
332 cmd_len = 4;
335 if (*op && *op != '?')
337 int regs = REGISTER_P (*op);
339 ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0);
341 if (ok && *(++op) == ',')
342 ok = avr_operand (insn, insn2, addr, *(++op), op2,
343 *comment1 ? comment2 : comment1, regs);
347 if (!ok)
349 /* Unknown opcode, or invalid combination of operands. */
350 sprintf (op1, "0x%04x", insn);
351 op2[0] = 0;
352 sprintf (comment1, "????");
353 comment2[0] = 0;
356 (*prin) (stream, "%s", ok ? opcode->name : ".word");
358 if (*op1)
359 (*prin) (stream, "\t%s", op1);
361 if (*op2)
362 (*prin) (stream, ", %s", op2);
364 if (*comment1)
365 (*prin) (stream, "\t; %s", comment1);
367 if (*comment2)
368 (*prin) (stream, " %s", comment2);
370 return cmd_len;