1 @c Copyright (C) 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
8 @chapter H8/300 Dependent Features
10 @cindex H8/300 support
12 * H8/300 Options:: Options
13 * H8/300 Syntax:: Syntax
14 * H8/300 Floating Point:: Floating Point
15 * H8/300 Directives:: H8/300 Machine Directives
16 * H8/300 Opcodes:: Opcodes
22 @cindex H8/300 options (none)
23 @cindex options, H8/300 (none)
24 @code{@value{AS}} has no additional command-line options for the Hitachi
30 * H8/300-Chars:: Special Characters
31 * H8/300-Regs:: Register Names
32 * H8/300-Addressing:: Addressing Modes
36 @subsection Special Characters
38 @cindex line comment character, H8/300
39 @cindex H8/300 line comment character
40 @samp{;} is the line comment character.
42 @cindex line separator, H8/300
43 @cindex statement separator, H8/300
44 @cindex H8/300 line separator
45 @samp{$} can be used instead of a newline to separate statements.
46 Therefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
49 @subsection Register Names
51 @cindex H8/300 registers
52 @cindex register names, H8/300
53 You can use predefined symbols of the form @samp{r@var{n}h} and
54 @samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
55 general-purpose registers. @var{n} is a digit from @samp{0} to
56 @samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
59 You can also use the eight predefined symbols @samp{r@var{n}} to refer
60 to the H8/300 registers as 16-bit registers (you must use this form for
63 On the H8/300H, you can also use the eight predefined symbols
64 @samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
65 general purpose registers.
67 The two control registers are called @code{pc} (program counter; a
68 16-bit register, except on the H8/300H where it is 24 bits) and
69 @code{ccr} (condition code register; an 8-bit register). @code{r7} is
70 used as the stack pointer, and can also be called @code{sp}.
72 @node H8/300-Addressing
73 @subsection Addressing Modes
75 @cindex addressing modes, H8/300
76 @cindex H8/300 addressing modes
77 @value{AS} understands the following addressing modes for the H8/300:
86 @item @@(@var{d}, r@var{n})
87 @itemx @@(@var{d}:16, r@var{n})
88 @itemx @@(@var{d}:24, r@var{n})
89 Register indirect: 16-bit or 24-bit displacement @var{d} from register
90 @var{n}. (24-bit displacements are only meaningful on the H8/300H.)
93 Register indirect with post-increment
96 Register indirect with pre-decrement
98 @item @code{@@}@var{aa}
99 @itemx @code{@@}@var{aa}:8
100 @itemx @code{@@}@var{aa}:16
101 @itemx @code{@@}@var{aa}:24
102 Absolute address @code{aa}. (The address size @samp{:24} only makes
103 sense on the H8/300H.)
109 Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
110 @samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
111 requires this nor uses it---the data size required is taken from
114 @item @code{@@}@code{@@}@var{aa}
115 @itemx @code{@@}@code{@@}@var{aa}:8
116 Memory indirect. You may specify the @samp{:8} for clarity, if you
117 wish; but @code{@value{AS}} neither requires this nor uses it.
120 @node H8/300 Floating Point
121 @section Floating Point
123 @cindex floating point, H8/300 (@sc{ieee})
124 @cindex H8/300 floating point (@sc{ieee})
125 The H8/300 family has no hardware floating point, but the @code{.float}
126 directive generates @sc{ieee} floating-point numbers for compatibility
127 with other development tools.
130 @node H8/300 Directives
131 @section H8/300 Machine Directives
133 @cindex H8/300 machine directives (none)
134 @cindex machine directives, H8/300 (none)
135 @cindex @code{word} directive, H8/300
136 @cindex @code{int} directive, H8/300
137 @code{@value{AS}} has only one machine-dependent directive for the
141 @cindex H8/300H, assembling for
143 Recognize and emit additional instructions for the H8/300H variant, and
144 also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
145 for the H8/300 family.
148 On the H8/300 family (including the H8/300H) @samp{.word} directives
149 generate 16-bit numbers.
154 @cindex H8/300 opcode summary
155 @cindex opcode summary, H8/300
156 @cindex mnemonics, H8/300
157 @cindex instruction summary, H8/300
158 For detailed information on the H8/300 machine instruction set, see
159 @cite{H8/300 Series Programming Manual} (Hitachi ADE--602--025). For
160 information specific to the H8/300H, see @cite{H8/300H Series
161 Programming Manual} (Hitachi).
163 @code{@value{AS}} implements all the standard H8/300 opcodes. No additional
164 pseudo-instructions are needed on this family.
167 @c this table, due to the multi-col faking and hardcoded order, looks silly
168 @c except in smallbook. See comments below "@set SMALL" near top of this file.
170 The following table summarizes the H8/300 opcodes, and their arguments.
171 Entries marked @samp{*} are opcodes used only on the H8/300H.
174 @c Using @group seems to use the normal baselineskip, not the smallexample
175 @c baselineskip; looks approx doublespaced.
177 Rs @r{source register}
178 Rd @r{destination register}
179 abs @r{absolute address}
180 imm @r{immediate data}
181 disp:N @r{N-bit displacement from a register}
182 pcrel:N @r{N-bit displacement relative to program counter}
184 add.b #imm,rd * andc #imm,ccr
185 add.b rs,rd band #imm,rd
186 add.w rs,rd band #imm,@@rd
187 * add.w #imm,rd band #imm,@@abs:8
188 * add.l rs,rd bra pcrel:8
189 * add.l #imm,rd * bra pcrel:16
190 adds #imm,rd bt pcrel:8
191 addx #imm,rd * bt pcrel:16
192 addx rs,rd brn pcrel:8
193 and.b #imm,rd * brn pcrel:16
194 and.b rs,rd bf pcrel:8
195 * and.w rs,rd * bf pcrel:16
196 * and.w #imm,rd bhi pcrel:8
197 * and.l #imm,rd * bhi pcrel:16
198 * and.l rs,rd bls pcrel:8
200 * bls pcrel:16 bld #imm,rd
201 bcc pcrel:8 bld #imm,@@rd
202 * bcc pcrel:16 bld #imm,@@abs:8
203 bhs pcrel:8 bnot #imm,rd
204 * bhs pcrel:16 bnot #imm,@@rd
205 bcs pcrel:8 bnot #imm,@@abs:8
206 * bcs pcrel:16 bnot rs,rd
207 blo pcrel:8 bnot rs,@@rd
208 * blo pcrel:16 bnot rs,@@abs:8
209 bne pcrel:8 bor #imm,rd
210 * bne pcrel:16 bor #imm,@@rd
211 beq pcrel:8 bor #imm,@@abs:8
212 * beq pcrel:16 bset #imm,rd
213 bvc pcrel:8 bset #imm,@@rd
214 * bvc pcrel:16 bset #imm,@@abs:8
215 bvs pcrel:8 bset rs,rd
216 * bvs pcrel:16 bset rs,@@rd
217 bpl pcrel:8 bset rs,@@abs:8
218 * bpl pcrel:16 bsr pcrel:8
219 bmi pcrel:8 bsr pcrel:16
220 * bmi pcrel:16 bst #imm,rd
221 bge pcrel:8 bst #imm,@@rd
222 * bge pcrel:16 bst #imm,@@abs:8
223 blt pcrel:8 btst #imm,rd
224 * blt pcrel:16 btst #imm,@@rd
225 bgt pcrel:8 btst #imm,@@abs:8
226 * bgt pcrel:16 btst rs,rd
227 ble pcrel:8 btst rs,@@rd
228 * ble pcrel:16 btst rs,@@abs:8
229 bclr #imm,rd bxor #imm,rd
230 bclr #imm,@@rd bxor #imm,@@rd
231 bclr #imm,@@abs:8 bxor #imm,@@abs:8
232 bclr rs,rd cmp.b #imm,rd
233 bclr rs,@@rd cmp.b rs,rd
234 bclr rs,@@abs:8 cmp.w rs,rd
235 biand #imm,rd cmp.w rs,rd
236 biand #imm,@@rd * cmp.w #imm,rd
237 biand #imm,@@abs:8 * cmp.l #imm,rd
238 bild #imm,rd * cmp.l rs,rd
239 bild #imm,@@rd daa rs
240 bild #imm,@@abs:8 das rs
241 bior #imm,rd dec.b rs
242 bior #imm,@@rd * dec.w #imm,rd
243 bior #imm,@@abs:8 * dec.l #imm,rd
244 bist #imm,rd divxu.b rs,rd
245 bist #imm,@@rd * divxu.w rs,rd
246 bist #imm,@@abs:8 * divxs.b rs,rd
247 bixor #imm,rd * divxs.w rs,rd
248 bixor #imm,@@rd eepmov
249 bixor #imm,@@abs:8 * eepmovw
251 * exts.w rd mov.w rs,@@abs:16
252 * exts.l rd * mov.l #imm,rd
253 * extu.w rd * mov.l rs,rd
254 * extu.l rd * mov.l @@rs,rd
255 inc rs * mov.l @@(disp:16,rs),rd
256 * inc.w #imm,rd * mov.l @@(disp:24,rs),rd
257 * inc.l #imm,rd * mov.l @@rs+,rd
258 jmp @@rs * mov.l @@abs:16,rd
259 jmp abs * mov.l @@abs:24,rd
260 jmp @@@@abs:8 * mov.l rs,@@rd
261 jsr @@rs * mov.l rs,@@(disp:16,rd)
262 jsr abs * mov.l rs,@@(disp:24,rd)
263 jsr @@@@abs:8 * mov.l rs,@@-rd
264 ldc #imm,ccr * mov.l rs,@@abs:16
265 ldc rs,ccr * mov.l rs,@@abs:24
266 * ldc @@abs:16,ccr movfpe @@abs:16,rd
267 * ldc @@abs:24,ccr movtpe rs,@@abs:16
268 * ldc @@(disp:16,rs),ccr mulxu.b rs,rd
269 * ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
270 * ldc @@rs+,ccr * mulxs.b rs,rd
271 * ldc @@rs,ccr * mulxs.w rs,rd
272 * mov.b @@(disp:24,rs),rd neg.b rs
273 * mov.b rs,@@(disp:24,rd) * neg.w rs
274 mov.b @@abs:16,rd * neg.l rs
276 mov.b @@abs:8,rd not.b rs
277 mov.b rs,@@abs:8 * not.w rs
278 mov.b rs,rd * not.l rs
279 mov.b #imm,rd or.b #imm,rd
280 mov.b @@rs,rd or.b rs,rd
281 mov.b @@(disp:16,rs),rd * or.w #imm,rd
282 mov.b @@rs+,rd * or.w rs,rd
283 mov.b @@abs:8,rd * or.l #imm,rd
284 mov.b rs,@@rd * or.l rs,rd
285 mov.b rs,@@(disp:16,rd) orc #imm,ccr
286 mov.b rs,@@-rd pop.w rs
287 mov.b rs,@@abs:8 * pop.l rs
288 mov.w rs,@@rd push.w rs
289 * mov.w @@(disp:24,rs),rd * push.l rs
290 * mov.w rs,@@(disp:24,rd) rotl.b rs
291 * mov.w @@abs:24,rd * rotl.w rs
292 * mov.w rs,@@abs:24 * rotl.l rs
293 mov.w rs,rd rotr.b rs
294 mov.w #imm,rd * rotr.w rs
295 mov.w @@rs,rd * rotr.l rs
296 mov.w @@(disp:16,rs),rd rotxl.b rs
297 mov.w @@rs+,rd * rotxl.w rs
298 mov.w @@abs:16,rd * rotxl.l rs
299 mov.w rs,@@(disp:16,rd) rotxr.b rs
300 mov.w rs,@@-rd * rotxr.w rs
302 * rotxr.l rs * stc ccr,@@(disp:24,rd)
304 rte * stc ccr,@@abs:16
305 rts * stc ccr,@@abs:24
306 shal.b rs sub.b rs,rd
307 * shal.w rs sub.w rs,rd
308 * shal.l rs * sub.w #imm,rd
309 shar.b rs * sub.l rs,rd
310 * shar.w rs * sub.l #imm,rd
311 * shar.l rs subs #imm,rd
312 shll.b rs subx #imm,rd
313 * shll.w rs subx rs,rd
314 * shll.l rs * trapa #imm
315 shlr.b rs xor #imm,rd
316 * shlr.w rs xor rs,rd
317 * shlr.l rs * xor.w #imm,rd
319 stc ccr,rd * xor.l #imm,rd
320 * stc ccr,@@rs * xor.l rs,rd
321 * stc ccr,@@(disp:16,rd) xorc #imm,ccr
325 @cindex size suffixes, H8/300
326 @cindex H8/300 size suffixes
327 Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
328 @code{sub}) are defined with variants using the suffixes @samp{.b},
329 @samp{.w}, and @samp{.l} to specify the size of a memory operand.
330 @code{@value{AS}} supports these suffixes, but does not require them;
331 since one of the operands is always a register, @code{@value{AS}} can
332 deduce the correct size.
334 For example, since @code{r0} refers to a 16-bit register,
337 @exdent is equivalent to
341 If you use the size suffixes, @code{@value{AS}} issues a warning when
342 the suffix and the register size do not match.