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[binutils.git] / opcodes / m32r-asm.c
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1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2004 Free Software Foundation, Inc.
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "m32r-desc.h"
34 #include "m32r-opc.h"
35 #include "opintl.h"
36 #include "xregex.h"
37 #include "libiberty.h"
38 #include "safe-ctype.h"
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
45 static const char * parse_insn_normal
46 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
48 /* -- assembler routines inserted here. */
50 /* -- asm.c */
51 static const char * parse_hash
52 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
53 static const char * parse_hi16
54 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
55 static const char * parse_slo16
56 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
57 static const char * parse_ulo16
58 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
60 /* Handle '#' prefixes (i.e. skip over them). */
62 static const char *
63 parse_hash (cd, strp, opindex, valuep)
64 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
65 const char **strp;
66 int opindex ATTRIBUTE_UNUSED;
67 unsigned long *valuep ATTRIBUTE_UNUSED;
69 if (**strp == '#')
70 ++*strp;
71 return NULL;
74 /* Handle shigh(), high(). */
76 static const char *
77 parse_hi16 (cd, strp, opindex, valuep)
78 CGEN_CPU_DESC cd;
79 const char **strp;
80 int opindex;
81 unsigned long *valuep;
83 const char *errmsg;
84 enum cgen_parse_operand_result result_type;
85 bfd_vma value;
87 if (**strp == '#')
88 ++*strp;
90 if (strncasecmp (*strp, "high(", 5) == 0)
92 *strp += 5;
93 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
94 &result_type, &value);
95 if (**strp != ')')
96 return "missing `)'";
97 ++*strp;
98 if (errmsg == NULL
99 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
100 value >>= 16;
101 *valuep = value;
102 return errmsg;
104 else if (strncasecmp (*strp, "shigh(", 6) == 0)
106 *strp += 6;
107 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
108 &result_type, &value);
109 if (**strp != ')')
110 return "missing `)'";
111 ++*strp;
112 if (errmsg == NULL
113 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
115 value = value + (value & 0x8000 ? 0x10000 : 0);
116 value >>= 16;
118 *valuep = value;
119 return errmsg;
122 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
125 /* Handle low() in a signed context. Also handle sda().
126 The signedness of the value doesn't matter to low(), but this also
127 handles the case where low() isn't present. */
129 static const char *
130 parse_slo16 (cd, strp, opindex, valuep)
131 CGEN_CPU_DESC cd;
132 const char **strp;
133 int opindex;
134 long *valuep;
136 const char *errmsg;
137 enum cgen_parse_operand_result result_type;
138 bfd_vma value;
140 if (**strp == '#')
141 ++*strp;
143 if (strncasecmp (*strp, "low(", 4) == 0)
145 *strp += 4;
146 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
147 &result_type, &value);
148 if (**strp != ')')
149 return "missing `)'";
150 ++*strp;
151 if (errmsg == NULL
152 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
154 value &= 0xffff;
155 if (value & 0x8000)
156 value |= 0xffff0000;
158 *valuep = value;
159 return errmsg;
162 if (strncasecmp (*strp, "sda(", 4) == 0)
164 *strp += 4;
165 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
166 NULL, &value);
167 if (**strp != ')')
168 return "missing `)'";
169 ++*strp;
170 *valuep = value;
171 return errmsg;
174 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
177 /* Handle low() in an unsigned context.
178 The signedness of the value doesn't matter to low(), but this also
179 handles the case where low() isn't present. */
181 static const char *
182 parse_ulo16 (cd, strp, opindex, valuep)
183 CGEN_CPU_DESC cd;
184 const char **strp;
185 int opindex;
186 unsigned long *valuep;
188 const char *errmsg;
189 enum cgen_parse_operand_result result_type;
190 bfd_vma value;
192 if (**strp == '#')
193 ++*strp;
195 if (strncasecmp (*strp, "low(", 4) == 0)
197 *strp += 4;
198 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
199 &result_type, &value);
200 if (**strp != ')')
201 return "missing `)'";
202 ++*strp;
203 if (errmsg == NULL
204 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
205 value &= 0xffff;
206 *valuep = value;
207 return errmsg;
210 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
213 /* -- */
215 const char * m32r_cgen_parse_operand
216 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
218 /* Main entry point for operand parsing.
220 This function is basically just a big switch statement. Earlier versions
221 used tables to look up the function to use, but
222 - if the table contains both assembler and disassembler functions then
223 the disassembler contains much of the assembler and vice-versa,
224 - there's a lot of inlining possibilities as things grow,
225 - using a switch statement avoids the function call overhead.
227 This function could be moved into `parse_insn_normal', but keeping it
228 separate makes clear the interface between `parse_insn_normal' and each of
229 the handlers. */
231 const char *
232 m32r_cgen_parse_operand (cd, opindex, strp, fields)
233 CGEN_CPU_DESC cd;
234 int opindex;
235 const char ** strp;
236 CGEN_FIELDS * fields;
238 const char * errmsg = NULL;
239 /* Used by scalar operands that still need to be parsed. */
240 long junk ATTRIBUTE_UNUSED;
242 switch (opindex)
244 case M32R_OPERAND_ACC :
245 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
246 break;
247 case M32R_OPERAND_ACCD :
248 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
249 break;
250 case M32R_OPERAND_ACCS :
251 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
252 break;
253 case M32R_OPERAND_DCR :
254 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
255 break;
256 case M32R_OPERAND_DISP16 :
258 bfd_vma value;
259 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
260 fields->f_disp16 = value;
262 break;
263 case M32R_OPERAND_DISP24 :
265 bfd_vma value;
266 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
267 fields->f_disp24 = value;
269 break;
270 case M32R_OPERAND_DISP8 :
272 bfd_vma value;
273 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
274 fields->f_disp8 = value;
276 break;
277 case M32R_OPERAND_DR :
278 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
279 break;
280 case M32R_OPERAND_HASH :
281 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
282 break;
283 case M32R_OPERAND_HI16 :
284 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
285 break;
286 case M32R_OPERAND_IMM1 :
287 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
288 break;
289 case M32R_OPERAND_SCR :
290 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
291 break;
292 case M32R_OPERAND_SIMM16 :
293 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
294 break;
295 case M32R_OPERAND_SIMM8 :
296 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
297 break;
298 case M32R_OPERAND_SLO16 :
299 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
300 break;
301 case M32R_OPERAND_SR :
302 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
303 break;
304 case M32R_OPERAND_SRC1 :
305 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
306 break;
307 case M32R_OPERAND_SRC2 :
308 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
309 break;
310 case M32R_OPERAND_UIMM16 :
311 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
312 break;
313 case M32R_OPERAND_UIMM24 :
315 bfd_vma value;
316 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
317 fields->f_uimm24 = value;
319 break;
320 case M32R_OPERAND_UIMM3 :
321 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, &fields->f_uimm3);
322 break;
323 case M32R_OPERAND_UIMM4 :
324 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
325 break;
326 case M32R_OPERAND_UIMM5 :
327 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
328 break;
329 case M32R_OPERAND_UIMM8 :
330 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, &fields->f_uimm8);
331 break;
332 case M32R_OPERAND_ULO16 :
333 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
334 break;
336 default :
337 /* xgettext:c-format */
338 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
339 abort ();
342 return errmsg;
345 cgen_parse_fn * const m32r_cgen_parse_handlers[] =
347 parse_insn_normal,
350 void
351 m32r_cgen_init_asm (cd)
352 CGEN_CPU_DESC cd;
354 m32r_cgen_init_opcode_table (cd);
355 m32r_cgen_init_ibld_table (cd);
356 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
357 cd->parse_operand = m32r_cgen_parse_operand;
362 /* Regex construction routine.
364 This translates an opcode syntax string into a regex string,
365 by replacing any non-character syntax element (such as an
366 opcode) with the pattern '.*'
368 It then compiles the regex and stores it in the opcode, for
369 later use by m32r_cgen_assemble_insn
371 Returns NULL for success, an error message for failure. */
373 char *
374 m32r_cgen_build_insn_regex (CGEN_INSN *insn)
376 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
377 const char *mnem = CGEN_INSN_MNEMONIC (insn);
378 char rxbuf[CGEN_MAX_RX_ELEMENTS];
379 char *rx = rxbuf;
380 const CGEN_SYNTAX_CHAR_TYPE *syn;
381 int reg_err;
383 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
385 /* Mnemonics come first in the syntax string. */
386 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
387 return _("missing mnemonic in syntax string");
388 ++syn;
390 /* Generate a case sensitive regular expression that emulates case
391 insensitive matching in the "C" locale. We cannot generate a case
392 insensitive regular expression because in Turkish locales, 'i' and 'I'
393 are not equal modulo case conversion. */
395 /* Copy the literal mnemonic out of the insn. */
396 for (; *mnem; mnem++)
398 char c = *mnem;
400 if (ISALPHA (c))
402 *rx++ = '[';
403 *rx++ = TOLOWER (c);
404 *rx++ = TOUPPER (c);
405 *rx++ = ']';
407 else
408 *rx++ = c;
411 /* Copy any remaining literals from the syntax string into the rx. */
412 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
414 if (CGEN_SYNTAX_CHAR_P (* syn))
416 char c = CGEN_SYNTAX_CHAR (* syn);
418 switch (c)
420 /* Escape any regex metacharacters in the syntax. */
421 case '.': case '[': case '\\':
422 case '*': case '^': case '$':
424 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
425 case '?': case '{': case '}':
426 case '(': case ')': case '*':
427 case '|': case '+': case ']':
428 #endif
429 *rx++ = '\\';
430 *rx++ = c;
431 break;
433 default:
434 if (ISALPHA (c))
436 *rx++ = '[';
437 *rx++ = TOLOWER (c);
438 *rx++ = TOUPPER (c);
439 *rx++ = ']';
441 else
442 *rx++ = c;
443 break;
446 else
448 /* Replace non-syntax fields with globs. */
449 *rx++ = '.';
450 *rx++ = '*';
454 /* Trailing whitespace ok. */
455 * rx++ = '[';
456 * rx++ = ' ';
457 * rx++ = '\t';
458 * rx++ = ']';
459 * rx++ = '*';
461 /* But anchor it after that. */
462 * rx++ = '$';
463 * rx = '\0';
465 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
466 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
468 if (reg_err == 0)
469 return NULL;
470 else
472 static char msg[80];
474 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
475 regfree ((regex_t *) CGEN_INSN_RX (insn));
476 free (CGEN_INSN_RX (insn));
477 (CGEN_INSN_RX (insn)) = NULL;
478 return msg;
483 /* Default insn parser.
485 The syntax string is scanned and operands are parsed and stored in FIELDS.
486 Relocs are queued as we go via other callbacks.
488 ??? Note that this is currently an all-or-nothing parser. If we fail to
489 parse the instruction, we return 0 and the caller will start over from
490 the beginning. Backtracking will be necessary in parsing subexpressions,
491 but that can be handled there. Not handling backtracking here may get
492 expensive in the case of the m68k. Deal with later.
494 Returns NULL for success, an error message for failure. */
496 static const char *
497 parse_insn_normal (CGEN_CPU_DESC cd,
498 const CGEN_INSN *insn,
499 const char **strp,
500 CGEN_FIELDS *fields)
502 /* ??? Runtime added insns not handled yet. */
503 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
504 const char *str = *strp;
505 const char *errmsg;
506 const char *p;
507 const CGEN_SYNTAX_CHAR_TYPE * syn;
508 #ifdef CGEN_MNEMONIC_OPERANDS
509 /* FIXME: wip */
510 int past_opcode_p;
511 #endif
513 /* For now we assume the mnemonic is first (there are no leading operands).
514 We can parse it without needing to set up operand parsing.
515 GAS's input scrubber will ensure mnemonics are lowercase, but we may
516 not be called from GAS. */
517 p = CGEN_INSN_MNEMONIC (insn);
518 while (*p && TOLOWER (*p) == TOLOWER (*str))
519 ++p, ++str;
521 if (* p)
522 return _("unrecognized instruction");
524 #ifndef CGEN_MNEMONIC_OPERANDS
525 if (* str && ! ISSPACE (* str))
526 return _("unrecognized instruction");
527 #endif
529 CGEN_INIT_PARSE (cd);
530 cgen_init_parse_operand (cd);
531 #ifdef CGEN_MNEMONIC_OPERANDS
532 past_opcode_p = 0;
533 #endif
535 /* We don't check for (*str != '\0') here because we want to parse
536 any trailing fake arguments in the syntax string. */
537 syn = CGEN_SYNTAX_STRING (syntax);
539 /* Mnemonics come first for now, ensure valid string. */
540 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
541 abort ();
543 ++syn;
545 while (* syn != 0)
547 /* Non operand chars must match exactly. */
548 if (CGEN_SYNTAX_CHAR_P (* syn))
550 /* FIXME: While we allow for non-GAS callers above, we assume the
551 first char after the mnemonic part is a space. */
552 /* FIXME: We also take inappropriate advantage of the fact that
553 GAS's input scrubber will remove extraneous blanks. */
554 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
556 #ifdef CGEN_MNEMONIC_OPERANDS
557 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
558 past_opcode_p = 1;
559 #endif
560 ++ syn;
561 ++ str;
563 else if (*str)
565 /* Syntax char didn't match. Can't be this insn. */
566 static char msg [80];
568 /* xgettext:c-format */
569 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
570 CGEN_SYNTAX_CHAR(*syn), *str);
571 return msg;
573 else
575 /* Ran out of input. */
576 static char msg [80];
578 /* xgettext:c-format */
579 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
580 CGEN_SYNTAX_CHAR(*syn));
581 return msg;
583 continue;
586 /* We have an operand of some sort. */
587 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
588 &str, fields);
589 if (errmsg)
590 return errmsg;
592 /* Done with this operand, continue with next one. */
593 ++ syn;
596 /* If we're at the end of the syntax string, we're done. */
597 if (* syn == 0)
599 /* FIXME: For the moment we assume a valid `str' can only contain
600 blanks now. IE: We needn't try again with a longer version of
601 the insn and it is assumed that longer versions of insns appear
602 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
603 while (ISSPACE (* str))
604 ++ str;
606 if (* str != '\0')
607 return _("junk at end of line"); /* FIXME: would like to include `str' */
609 return NULL;
612 /* We couldn't parse it. */
613 return _("unrecognized instruction");
616 /* Main entry point.
617 This routine is called for each instruction to be assembled.
618 STR points to the insn to be assembled.
619 We assume all necessary tables have been initialized.
620 The assembled instruction, less any fixups, is stored in BUF.
621 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
622 still needs to be converted to target byte order, otherwise BUF is an array
623 of bytes in target byte order.
624 The result is a pointer to the insn's entry in the opcode table,
625 or NULL if an error occured (an error message will have already been
626 printed).
628 Note that when processing (non-alias) macro-insns,
629 this function recurses.
631 ??? It's possible to make this cpu-independent.
632 One would have to deal with a few minor things.
633 At this point in time doing so would be more of a curiosity than useful
634 [for example this file isn't _that_ big], but keeping the possibility in
635 mind helps keep the design clean. */
637 const CGEN_INSN *
638 m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
639 const char *str,
640 CGEN_FIELDS *fields,
641 CGEN_INSN_BYTES_PTR buf,
642 char **errmsg)
644 const char *start;
645 CGEN_INSN_LIST *ilist;
646 const char *parse_errmsg = NULL;
647 const char *insert_errmsg = NULL;
648 int recognized_mnemonic = 0;
650 /* Skip leading white space. */
651 while (ISSPACE (* str))
652 ++ str;
654 /* The instructions are stored in hashed lists.
655 Get the first in the list. */
656 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
658 /* Keep looking until we find a match. */
659 start = str;
660 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
662 const CGEN_INSN *insn = ilist->insn;
663 recognized_mnemonic = 1;
665 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
666 /* Not usually needed as unsupported opcodes
667 shouldn't be in the hash lists. */
668 /* Is this insn supported by the selected cpu? */
669 if (! m32r_cgen_insn_supported (cd, insn))
670 continue;
671 #endif
672 /* If the RELAXED attribute is set, this is an insn that shouldn't be
673 chosen immediately. Instead, it is used during assembler/linker
674 relaxation if possible. */
675 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
676 continue;
678 str = start;
680 /* Skip this insn if str doesn't look right lexically. */
681 if (CGEN_INSN_RX (insn) != NULL &&
682 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
683 continue;
685 /* Allow parse/insert handlers to obtain length of insn. */
686 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
688 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
689 if (parse_errmsg != NULL)
690 continue;
692 /* ??? 0 is passed for `pc'. */
693 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
694 (bfd_vma) 0);
695 if (insert_errmsg != NULL)
696 continue;
698 /* It is up to the caller to actually output the insn and any
699 queued relocs. */
700 return insn;
704 static char errbuf[150];
705 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
706 const char *tmp_errmsg;
708 /* If requesting verbose error messages, use insert_errmsg.
709 Failing that, use parse_errmsg. */
710 tmp_errmsg = (insert_errmsg ? insert_errmsg :
711 parse_errmsg ? parse_errmsg :
712 recognized_mnemonic ?
713 _("unrecognized form of instruction") :
714 _("unrecognized instruction"));
716 if (strlen (start) > 50)
717 /* xgettext:c-format */
718 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
719 else
720 /* xgettext:c-format */
721 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
722 #else
723 if (strlen (start) > 50)
724 /* xgettext:c-format */
725 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
726 else
727 /* xgettext:c-format */
728 sprintf (errbuf, _("bad instruction `%.50s'"), start);
729 #endif
731 *errmsg = errbuf;
732 return NULL;
736 #if 0 /* This calls back to GAS which we can't do without care. */
738 /* Record each member of OPVALS in the assembler's symbol table.
739 This lets GAS parse registers for us.
740 ??? Interesting idea but not currently used. */
742 /* Record each member of OPVALS in the assembler's symbol table.
743 FIXME: Not currently used. */
745 void
746 m32r_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
748 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
749 const CGEN_KEYWORD_ENTRY * ke;
751 while ((ke = cgen_keyword_search_next (& search)) != NULL)
753 #if 0 /* Unnecessary, should be done in the search routine. */
754 if (! m32r_cgen_opval_supported (ke))
755 continue;
756 #endif
757 cgen_asm_record_register (cd, ke->name, ke->value);
761 #endif /* 0 */