file id.gmo was initially added on branch binutils-2_14-branch.
[binutils.git] / opcodes / m68hc11-dis.c
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1 /* m68hc11-dis.c -- Motorola 68HC11 & 68HC12 disassembly
2 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@nerim.fr)
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19 #include <stdio.h>
21 #include "ansidecl.h"
22 #include "opcode/m68hc11.h"
23 #include "dis-asm.h"
25 #define PC_REGNUM 3
27 static const char *const reg_name[] = {
28 "X", "Y", "SP", "PC"
31 static const char *const reg_src_table[] = {
32 "A", "B", "CCR", "TMP3", "D", "X", "Y", "SP"
35 static const char *const reg_dst_table[] = {
36 "A", "B", "CCR", "TMP2", "D", "X", "Y", "SP"
39 #define OP_PAGE_MASK (M6811_OP_PAGE2|M6811_OP_PAGE3|M6811_OP_PAGE4)
41 /* Prototypes for local functions. */
42 static int read_memory
43 PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
44 static int print_indexed_operand
45 PARAMS ((bfd_vma, struct disassemble_info *, int*, int, int, bfd_vma));
46 static int print_insn
47 PARAMS ((bfd_vma, struct disassemble_info *, int));
49 static int
50 read_memory (memaddr, buffer, size, info)
51 bfd_vma memaddr;
52 bfd_byte *buffer;
53 int size;
54 struct disassemble_info *info;
56 int status;
58 /* Get first byte. Only one at a time because we don't know the
59 size of the insn. */
60 status = (*info->read_memory_func) (memaddr, buffer, size, info);
61 if (status != 0)
63 (*info->memory_error_func) (status, memaddr, info);
64 return -1;
66 return 0;
70 /* Read the 68HC12 indexed operand byte and print the corresponding mode.
71 Returns the number of bytes read or -1 if failure. */
72 static int
73 print_indexed_operand (memaddr, info, indirect, mov_insn, pc_offset, endaddr)
74 bfd_vma memaddr;
75 struct disassemble_info *info;
76 int *indirect;
77 int mov_insn;
78 int pc_offset;
79 bfd_vma endaddr;
81 bfd_byte buffer[4];
82 int reg;
83 int status;
84 short sval;
85 int pos = 1;
87 if (indirect)
88 *indirect = 0;
90 status = read_memory (memaddr, &buffer[0], 1, info);
91 if (status != 0)
93 return status;
96 /* n,r with 5-bits signed constant. */
97 if ((buffer[0] & 0x20) == 0)
99 reg = (buffer[0] >> 6) & 3;
100 sval = (buffer[0] & 0x1f);
101 if (sval & 0x10)
102 sval |= 0xfff0;
103 /* 68HC12 requires an adjustment for movb/movw pc relative modes. */
104 if (reg == PC_REGNUM && info->mach == bfd_mach_m6812 && mov_insn)
105 sval += pc_offset;
106 (*info->fprintf_func) (info->stream, "%d,%s",
107 (int) sval, reg_name[reg]);
109 if (reg == PC_REGNUM)
111 (* info->fprintf_func) (info->stream, " {");
112 (* info->print_address_func) (endaddr + sval, info);
113 (* info->fprintf_func) (info->stream, "}");
117 /* Auto pre/post increment/decrement. */
118 else if ((buffer[0] & 0xc0) != 0xc0)
120 const char *mode;
122 reg = (buffer[0] >> 6) & 3;
123 sval = (buffer[0] & 0x0f);
124 if (sval & 0x8)
126 sval |= 0xfff0;
127 sval = -sval;
128 mode = "-";
130 else
132 sval = sval + 1;
133 mode = "+";
135 (*info->fprintf_func) (info->stream, "%d,%s%s%s",
136 (int) sval,
137 (buffer[0] & 0x10 ? "" : mode),
138 reg_name[reg], (buffer[0] & 0x10 ? mode : ""));
141 /* [n,r] 16-bits offset indexed indirect. */
142 else if ((buffer[0] & 0x07) == 3)
144 if (mov_insn)
146 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
147 buffer[0] & 0x0ff);
148 return 0;
150 reg = (buffer[0] >> 3) & 0x03;
151 status = read_memory (memaddr + pos, &buffer[0], 2, info);
152 if (status != 0)
154 return status;
157 pos += 2;
158 sval = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
159 (*info->fprintf_func) (info->stream, "[%u,%s]",
160 sval & 0x0ffff, reg_name[reg]);
161 if (indirect)
162 *indirect = 1;
165 /* n,r with 9 and 16 bit signed constant. */
166 else if ((buffer[0] & 0x4) == 0)
168 if (mov_insn)
170 (*info->fprintf_func) (info->stream, "<invalid op: 0x%x>",
171 buffer[0] & 0x0ff);
172 return 0;
174 reg = (buffer[0] >> 3) & 0x03;
175 status = read_memory (memaddr + pos,
176 &buffer[1], (buffer[0] & 0x2 ? 2 : 1), info);
177 if (status != 0)
179 return status;
181 if (buffer[0] & 2)
183 sval = ((buffer[1] << 8) | (buffer[2] & 0x0FF));
184 sval &= 0x0FFFF;
185 pos += 2;
186 endaddr += 2;
188 else
190 sval = buffer[1] & 0x00ff;
191 if (buffer[0] & 0x01)
192 sval |= 0xff00;
193 pos++;
194 endaddr++;
196 (*info->fprintf_func) (info->stream, "%d,%s",
197 (int) sval, reg_name[reg]);
198 if (reg == PC_REGNUM)
200 (* info->fprintf_func) (info->stream, " {");
201 (* info->print_address_func) (endaddr + sval, info);
202 (* info->fprintf_func) (info->stream, "}");
205 else
207 reg = (buffer[0] >> 3) & 0x03;
208 switch (buffer[0] & 3)
210 case 0:
211 (*info->fprintf_func) (info->stream, "A,%s", reg_name[reg]);
212 break;
213 case 1:
214 (*info->fprintf_func) (info->stream, "B,%s", reg_name[reg]);
215 break;
216 case 2:
217 (*info->fprintf_func) (info->stream, "D,%s", reg_name[reg]);
218 break;
219 case 3:
220 default:
221 (*info->fprintf_func) (info->stream, "[D,%s]", reg_name[reg]);
222 if (indirect)
223 *indirect = 1;
224 break;
228 return pos;
231 /* Disassemble one instruction at address 'memaddr'. Returns the number
232 of bytes used by that instruction. */
233 static int
234 print_insn (memaddr, info, arch)
235 bfd_vma memaddr;
236 struct disassemble_info *info;
237 int arch;
239 int status;
240 bfd_byte buffer[4];
241 unsigned char code;
242 long format, pos, i;
243 short sval;
244 const struct m68hc11_opcode *opcode;
246 /* Get first byte. Only one at a time because we don't know the
247 size of the insn. */
248 status = read_memory (memaddr, buffer, 1, info);
249 if (status != 0)
251 return status;
254 format = 0;
255 code = buffer[0];
256 pos = 0;
258 /* Look for page2,3,4 opcodes. */
259 if (code == M6811_OPCODE_PAGE2)
261 pos++;
262 format = M6811_OP_PAGE2;
264 else if (code == M6811_OPCODE_PAGE3 && arch == cpu6811)
266 pos++;
267 format = M6811_OP_PAGE3;
269 else if (code == M6811_OPCODE_PAGE4 && arch == cpu6811)
271 pos++;
272 format = M6811_OP_PAGE4;
275 /* We are in page2,3,4; get the real opcode. */
276 if (pos == 1)
278 status = read_memory (memaddr + pos, &buffer[1], 1, info);
279 if (status != 0)
281 return status;
283 code = buffer[1];
287 /* Look first for a 68HC12 alias. All of them are 2-bytes long and
288 in page 1. There is no operand to print. We read the second byte
289 only when we have a possible match. */
290 if ((arch & cpu6812) && format == 0)
292 int must_read = 1;
294 /* Walk the alias table to find a code1+code2 match. */
295 for (i = 0; i < m68hc12_num_alias; i++)
297 if (m68hc12_alias[i].code1 == code)
299 if (must_read)
301 status = read_memory (memaddr + pos + 1,
302 &buffer[1], 1, info);
303 if (status != 0)
304 break;
306 must_read = 1;
308 if (m68hc12_alias[i].code2 == (unsigned char) buffer[1])
310 (*info->fprintf_func) (info->stream, "%s",
311 m68hc12_alias[i].name);
312 return 2;
318 pos++;
320 /* Scan the opcode table until we find the opcode
321 with the corresponding page. */
322 opcode = m68hc11_opcodes;
323 for (i = 0; i < m68hc11_num_opcodes; i++, opcode++)
325 int offset;
326 int pc_src_offset;
327 int pc_dst_offset;
329 if ((opcode->arch & arch) == 0)
330 continue;
331 if (opcode->opcode != code)
332 continue;
333 if ((opcode->format & OP_PAGE_MASK) != format)
334 continue;
336 if (opcode->format & M6812_OP_REG)
338 int j;
339 int is_jump;
341 if (opcode->format & M6811_OP_JUMP_REL)
342 is_jump = 1;
343 else
344 is_jump = 0;
346 status = read_memory (memaddr + pos, &buffer[0], 1, info);
347 if (status != 0)
349 return status;
351 for (j = 0; i + j < m68hc11_num_opcodes; j++)
353 if ((opcode[j].arch & arch) == 0)
354 continue;
355 if (opcode[j].opcode != code)
356 continue;
357 if (is_jump)
359 if (!(opcode[j].format & M6811_OP_JUMP_REL))
360 continue;
362 if ((opcode[j].format & M6812_OP_IBCC_MARKER)
363 && (buffer[0] & 0xc0) != 0x80)
364 continue;
365 if ((opcode[j].format & M6812_OP_TBCC_MARKER)
366 && (buffer[0] & 0xc0) != 0x40)
367 continue;
368 if ((opcode[j].format & M6812_OP_DBCC_MARKER)
369 && (buffer[0] & 0xc0) != 0)
370 continue;
371 if ((opcode[j].format & M6812_OP_EQ_MARKER)
372 && (buffer[0] & 0x20) == 0)
373 break;
374 if (!(opcode[j].format & M6812_OP_EQ_MARKER)
375 && (buffer[0] & 0x20) != 0)
376 break;
377 continue;
379 if (opcode[j].format & M6812_OP_EXG_MARKER && buffer[0] & 0x80)
380 break;
381 if ((opcode[j].format & M6812_OP_SEX_MARKER)
382 && (((buffer[0] & 0x07) >= 3 && (buffer[0] & 7) <= 7))
383 && ((buffer[0] & 0x0f0) <= 0x20))
384 break;
385 if (opcode[j].format & M6812_OP_TFR_MARKER
386 && !(buffer[0] & 0x80))
387 break;
389 if (i + j < m68hc11_num_opcodes)
390 opcode = &opcode[j];
393 /* We have found the opcode. Extract the operand and print it. */
394 (*info->fprintf_func) (info->stream, "%s", opcode->name);
396 format = opcode->format;
397 if (format & (M6811_OP_MASK | M6811_OP_BITMASK
398 | M6811_OP_JUMP_REL | M6812_OP_JUMP_REL16))
400 (*info->fprintf_func) (info->stream, "\t");
403 /* The movb and movw must be handled in a special way...
404 The source constant 'ii' is not always at the same place.
405 This is the same for the destination for the post-indexed byte.
406 The 'offset' is used to do the appropriate correction.
408 offset offset
409 for constant for destination
410 movb 18 OB ii hh ll 0 0
411 18 08 xb ii 1 -1
412 18 0C hh ll hh ll 0 0
413 18 09 xb hh ll 1 -1
414 18 0D xb hh ll 0 0
415 18 0A xb xb 0 0
417 movw 18 03 jj kk hh ll 0 0
418 18 00 xb jj kk 1 -1
419 18 04 hh ll hh ll 0 0
420 18 01 xb hh ll 1 -1
421 18 05 xb hh ll 0 0
422 18 02 xb xb 0 0
424 After the source operand is read, the position 'pos' is incremented
425 this explains the negative offset for destination.
427 movb/movw above are the only instructions with this matching
428 format. */
429 offset = ((format & M6812_OP_IDX_P2)
430 && (format & (M6811_OP_IMM8 | M6811_OP_IMM16 |
431 M6811_OP_IND16)));
433 /* Operand with one more byte: - immediate, offset,
434 direct-low address. */
435 if (format &
436 (M6811_OP_IMM8 | M6811_OP_IX | M6811_OP_IY | M6811_OP_DIRECT))
438 status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
439 if (status != 0)
441 return status;
444 pos++;
446 /* This movb/movw is special (see above). */
447 offset = -offset;
449 pc_dst_offset = 2;
450 if (format & M6811_OP_IMM8)
452 (*info->fprintf_func) (info->stream, "#%d", (int) buffer[0]);
453 format &= ~M6811_OP_IMM8;
454 /* Set PC destination offset. */
455 pc_dst_offset = 1;
457 else if (format & M6811_OP_IX)
459 /* Offsets are in range 0..255, print them unsigned. */
460 (*info->fprintf_func) (info->stream, "%u,x", buffer[0] & 0x0FF);
461 format &= ~M6811_OP_IX;
463 else if (format & M6811_OP_IY)
465 (*info->fprintf_func) (info->stream, "%u,y", buffer[0] & 0x0FF);
466 format &= ~M6811_OP_IY;
468 else if (format & M6811_OP_DIRECT)
470 (*info->fprintf_func) (info->stream, "*");
471 (*info->print_address_func) (buffer[0] & 0x0FF, info);
472 format &= ~M6811_OP_DIRECT;
476 #define M6812_DST_MOVE (M6812_OP_IND16_P2 | M6812_OP_IDX_P2)
477 #define M6812_INDEXED_FLAGS (M6812_OP_IDX|M6812_OP_IDX_1|M6812_OP_IDX_2)
478 /* Analyze the 68HC12 indexed byte. */
479 if (format & M6812_INDEXED_FLAGS)
481 int indirect;
482 bfd_vma endaddr;
484 endaddr = memaddr + pos + 1;
485 if (format & M6811_OP_IND16)
486 endaddr += 2;
487 pc_src_offset = -1;
488 pc_dst_offset = 1;
489 status = print_indexed_operand (memaddr + pos, info, &indirect,
490 (format & M6812_DST_MOVE),
491 pc_src_offset, endaddr);
492 if (status < 0)
494 return status;
496 pos += status;
498 /* The indirect addressing mode of the call instruction does
499 not need the page code. */
500 if ((format & M6812_OP_PAGE) && indirect)
501 format &= ~M6812_OP_PAGE;
504 /* 68HC12 dbcc/ibcc/tbcc operands. */
505 if ((format & M6812_OP_REG) && (format & M6811_OP_JUMP_REL))
507 status = read_memory (memaddr + pos, &buffer[0], 2, info);
508 if (status != 0)
510 return status;
512 (*info->fprintf_func) (info->stream, "%s,",
513 reg_src_table[buffer[0] & 0x07]);
514 sval = buffer[1] & 0x0ff;
515 if (buffer[0] & 0x10)
516 sval |= 0xff00;
518 pos += 2;
519 (*info->print_address_func) (memaddr + pos + sval, info);
520 format &= ~(M6812_OP_REG | M6811_OP_JUMP_REL);
522 else if (format & (M6812_OP_REG | M6812_OP_REG_2))
524 status = read_memory (memaddr + pos, &buffer[0], 1, info);
525 if (status != 0)
527 return status;
530 pos++;
531 (*info->fprintf_func) (info->stream, "%s,%s",
532 reg_src_table[(buffer[0] >> 4) & 7],
533 reg_dst_table[(buffer[0] & 7)]);
536 if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
538 int val;
539 bfd_vma addr;
540 unsigned page = 0;
542 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
543 if (status != 0)
545 return status;
547 if (format & M6812_OP_IDX_P2)
548 offset = -2;
549 else
550 offset = 0;
551 pos += 2;
553 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
554 val &= 0x0FFFF;
555 addr = val;
556 pc_dst_offset = 2;
557 if (format & M6812_OP_PAGE)
559 status = read_memory (memaddr + pos + offset, buffer, 1, info);
560 if (status != 0)
561 return status;
563 page = (unsigned) buffer[0];
564 if (addr >= M68HC12_BANK_BASE && addr < 0x0c000)
565 addr = ((val - M68HC12_BANK_BASE)
566 | (page << M68HC12_BANK_SHIFT))
567 + M68HC12_BANK_VIRT;
569 else if ((arch & cpu6812)
570 && addr >= M68HC12_BANK_BASE && addr < 0x0c000)
572 int cur_page;
573 bfd_vma vaddr;
575 if (memaddr >= M68HC12_BANK_VIRT)
576 cur_page = ((memaddr - M68HC12_BANK_VIRT)
577 >> M68HC12_BANK_SHIFT);
578 else
579 cur_page = 0;
581 vaddr = ((addr - M68HC12_BANK_BASE)
582 + (cur_page << M68HC12_BANK_SHIFT))
583 + M68HC12_BANK_VIRT;
584 if (!info->symbol_at_address_func (addr, info)
585 && info->symbol_at_address_func (vaddr, info))
586 addr = vaddr;
588 if (format & M6811_OP_IMM16)
590 format &= ~M6811_OP_IMM16;
591 (*info->fprintf_func) (info->stream, "#");
593 else
594 format &= ~M6811_OP_IND16;
596 (*info->print_address_func) (addr, info);
597 if (format & M6812_OP_PAGE)
599 (* info->fprintf_func) (info->stream, " {");
600 (* info->print_address_func) (val, info);
601 (* info->fprintf_func) (info->stream, ", %d}", page);
602 format &= ~M6812_OP_PAGE;
603 pos += 1;
607 if (format & M6812_OP_IDX_P2)
609 (*info->fprintf_func) (info->stream, ", ");
610 status = print_indexed_operand (memaddr + pos + offset, info,
611 0, 1, pc_dst_offset,
612 memaddr + pos + offset + 1);
613 if (status < 0)
614 return status;
615 pos += status;
618 if (format & M6812_OP_IND16_P2)
620 int val;
622 (*info->fprintf_func) (info->stream, ", ");
624 status = read_memory (memaddr + pos + offset, &buffer[0], 2, info);
625 if (status != 0)
627 return status;
629 pos += 2;
631 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
632 val &= 0x0FFFF;
633 (*info->print_address_func) (val, info);
636 /* M6811_OP_BITMASK and M6811_OP_JUMP_REL must be treated separately
637 and in that order. The brset/brclr insn have a bitmask and then
638 a relative branch offset. */
639 if (format & M6811_OP_BITMASK)
641 status = read_memory (memaddr + pos, &buffer[0], 1, info);
642 if (status != 0)
644 return status;
646 pos++;
647 (*info->fprintf_func) (info->stream, " #$%02x%s",
648 buffer[0] & 0x0FF,
649 (format & M6811_OP_JUMP_REL ? " " : ""));
650 format &= ~M6811_OP_BITMASK;
652 if (format & M6811_OP_JUMP_REL)
654 int val;
656 status = read_memory (memaddr + pos, &buffer[0], 1, info);
657 if (status != 0)
659 return status;
662 pos++;
663 val = (buffer[0] & 0x80) ? buffer[0] | 0xFFFFFF00 : buffer[0];
664 (*info->print_address_func) (memaddr + pos + val, info);
665 format &= ~M6811_OP_JUMP_REL;
667 else if (format & M6812_OP_JUMP_REL16)
669 int val;
671 status = read_memory (memaddr + pos, &buffer[0], 2, info);
672 if (status != 0)
674 return status;
677 pos += 2;
678 val = ((buffer[0] << 8) | (buffer[1] & 0x0FF));
679 if (val & 0x8000)
680 val |= 0xffff0000;
682 (*info->print_address_func) (memaddr + pos + val, info);
683 format &= ~M6812_OP_JUMP_REL16;
686 if (format & M6812_OP_PAGE)
688 int val;
690 status = read_memory (memaddr + pos + offset, &buffer[0], 1, info);
691 if (status != 0)
693 return status;
695 pos += 1;
697 val = buffer[0] & 0x0ff;
698 (*info->fprintf_func) (info->stream, ", %d", val);
701 #ifdef DEBUG
702 /* Consistency check. 'format' must be 0, so that we have handled
703 all formats; and the computed size of the insn must match the
704 opcode table content. */
705 if (format & ~(M6811_OP_PAGE4 | M6811_OP_PAGE3 | M6811_OP_PAGE2))
707 (*info->fprintf_func) (info->stream, "; Error, format: %x", format);
709 if (pos != opcode->size)
711 (*info->fprintf_func) (info->stream, "; Error, size: %d expect %d",
712 pos, opcode->size);
714 #endif
715 return pos;
718 /* Opcode not recognized. */
719 if (format == M6811_OP_PAGE2 && arch & cpu6812
720 && ((code >= 0x30 && code <= 0x39) || (code >= 0x40 && code <= 0xff)))
721 (*info->fprintf_func) (info->stream, "trap\t#%d", code & 0x0ff);
723 else if (format == M6811_OP_PAGE2)
724 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
725 M6811_OPCODE_PAGE2, code);
726 else if (format == M6811_OP_PAGE3)
727 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
728 M6811_OPCODE_PAGE3, code);
729 else if (format == M6811_OP_PAGE4)
730 (*info->fprintf_func) (info->stream, ".byte\t0x%02x, 0x%02x",
731 M6811_OPCODE_PAGE4, code);
732 else
733 (*info->fprintf_func) (info->stream, ".byte\t0x%02x", code);
735 return pos;
738 /* Disassemble one instruction at address 'memaddr'. Returns the number
739 of bytes used by that instruction. */
741 print_insn_m68hc11 (memaddr, info)
742 bfd_vma memaddr;
743 struct disassemble_info *info;
745 return print_insn (memaddr, info, cpu6811);
749 print_insn_m68hc12 (memaddr, info)
750 bfd_vma memaddr;
751 struct disassemble_info *info;
753 return print_insn (memaddr, info, cpu6812);