2 @c Free Software Foundation, Inc.
3 @c Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
4 @c This is part of the GAS manual.
5 @c For copying conditions, see the file as.texinfo.
10 @chapter IA-64 Dependent Features
14 @node Machine Dependencies
15 @chapter IA-64 Dependent Features
20 * IA-64 Options:: Options
21 * IA-64 Syntax:: Syntax
22 @c * IA-64 Floating Point:: Floating Point // to be written
23 @c * IA-64 Directives:: IA-64 Machine Directives // to be written
24 * IA-64 Opcodes:: Opcodes
30 @cindex options for IA-64
33 @cindex @code{-mconstant-gp} command line option, IA-64
36 This option instructs the assembler to mark the resulting object file
37 as using the ``constant GP'' model. With this model, it is assumed
38 that the entire program uses a single global pointer (GP) value. Note
39 that this option does not in any fashion affect the machine code
40 emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP
41 flag in the ELF file header.
44 This option instructs the assembler to mark the resulting object file
45 as using the ``constant GP without function descriptor'' data model.
46 This model is like the ``constant GP'' model, except that it
47 additionally does away with function descriptors. What this means is
48 that the address of a function refers directly to the function's code
49 entry-point. Normally, such an address would refer to a function
50 descriptor, which contains both the code entry-point and the GP-value
51 needed by the function. Note that this option does not in any fashion
52 affect the machine code emitted by the assembler. All it does is
53 turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
59 These options select the data model. The assembler defaults to @code{-mlp64}
64 These options select the byte order. The @code{-mle} option selects little-endian
65 byte order (default) and @code{-mbe} selects big-endian byte order. Note that
66 IA-64 machine code always uses little-endian byte order.
70 These options turn on dependency violation checking. This checking is turned on by
74 This option instructs the assembler to automatically insert stop bits where necessary
75 to remove dependency violations.
78 This turns on debug output intended to help tracking down bugs in the dependency
86 The assembler syntax closely follows the IA-64 Assembly Language
90 * IA-64-Chars:: Special Characters
91 * IA-64-Regs:: Register Names
92 * IA-64-Bits:: Bit Names
93 * IA-64-Relocs:: Relocations
97 @subsection Special Characters
99 @cindex line comment character, IA-64
100 @cindex IA-64 line comment character
101 @samp{//} is the line comment token.
103 @cindex line separator, IA-64
104 @cindex statement separator, IA-64
105 @cindex IA-64 line separator
106 @samp{;} can be used instead of a newline to separate statements.
109 @subsection Register Names
110 @cindex IA-64 registers
111 @cindex register names, IA-64
113 The 128 integer registers are refered to as @samp{r@var{n}}.
114 The 128 floating-point registers are refered to as @samp{f@var{n}}.
115 The 128 application registers are refered to as @samp{ar@var{n}}.
116 The 128 control registers are refered to as @samp{cr@var{n}}.
117 The 64 one-bit predicate registers are refered to as @samp{p@var{n}}.
118 The 8 branch registers are refered to as @samp{b@var{n}}.
119 In addition, the assembler defines a number of aliases:
120 @samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}),
121 @samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}),
122 @samp{ret3} (@samp{r9}), @samp{farg@var{n}} (@samp{f8+@var{n}}), and
123 @samp{fret@var{n}} (@samp{f8+@var{n}}).
125 For convenience, the assembler also defines aliases for all named application
126 and control registers. For example, @samp{ar.bsp} refers to the register
127 backing store pointer (@samp{ar17}). Similarly, @samp{cr.eoi} refers to
128 the end-of-interrupt register (@samp{cr67}).
131 @subsection IA-64 Processor-Status-Register (PSR) Bit Names
132 @cindex IA-64 Processor-status-Register bit names
134 @cindex bit names, IA-64
136 The assembler defines bit masks for each of the bits in the IA-64
137 processor status register. For example, @samp{psr.ic} corresponds to
138 a value of 0x2000. These masks are primarily intended for use with
139 the @sample{ssm}/@sample{sum} and @sample{rsm}/@sample{rum}
140 instructions, but they can be used anywhere else where an integer
141 constant is expected.
145 For detailed information on the IA-64 machine instruction set, see the
146 @c Attempt to work around a very overfull hbox.
148 IA-64 Assembly Language Reference Guide available at
151 http://developer.intel.com/design/itanium/arch_spec.htm
156 @uref{http://developer.intel.com/design/itanium/arch_spec.htm,IA-64 Architecture Handbook}.